CN114598330A - Quasi-cyclic low-density parity-check code decoding method, system, device and equipment - Google Patents

Abstract

The present application discloses a quasi-cyclic low-density parity-check code decoding method, system, equipment and device, which are used to obtain a target code word to be decoded; Whether to perform bit inversion on the previous recursion number representing the current decoding recursion number; obtain the symptom value that has been calculated for the target codeword at the current decoding recursion number; obtain the row weight value of the target codeword; based on the current decoding recursion The number of times, the previous inversion signal, the symptom value and the row weight value determine the current inversion signal; based on the current inversion signal and the symptom value, the current decoding result of the target codeword at the current decoding recursion is determined, so as to determine the target based on the current decoding result The target decoding result of the codeword. The present application can quickly determine the current inversion signal, and then can quickly determine the current decoding result of the target codeword at the current decoding recursion number based on the current inversion signal and the symptom value, and can improve the decoding efficiency of the quasi-cyclic low-density parity check code .

Description

Quasi-Cyclic Low Density Parity Check Code Decoding Method, System, Apparatus and Equipment

technical field

The present application relates to the technical field of decoding, and more particularly, to a quasi-cyclic low-density parity-check code decoding method, system, apparatus, and device.

Background technique

At present, in the decoding process of quasi-cyclic low-density parity check code, the symptom value of each bit in the codeword needs to be calculated each time, and then the inversion of each bit can be determined from the symptom value, that is, to determine Whether to perform the flip operation makes the decoding efficiency of the quasi-cyclic low-density parity-check code decoding method low.

To sum up, how to improve the decoding efficiency of the quasi-cyclic low-density parity-check code decoding method is an urgent problem to be solved by those skilled in the art.

SUMMARY OF THE INVENTION

The purpose of the present application is to provide a quasi-cyclic low-density parity-check code decoding method, which can solve the technical problem of how to improve the decoding efficiency of the quasi-cyclic low-density parity-check code decoding method to a certain extent. The present application also provides a quasi-cyclic low-density parity-check code decoding system, device, and device.

In order to achieve the above purpose, the application provides the following technical solutions:

A quasi-cyclic low-density parity-check code decoding method, comprising:

Obtain the target codeword to be decoded;

obtaining the current decoding recursion number and the previous inversion signal, the previous inversion signal is used to represent whether the previous recursive number of the current decoding recursion number is bit inverted;

Obtain the symptom value that has been calculated for the target codeword at the current decoding recursion number;

Obtain the row weight value of the target codeword;

determining a current toggle signal based on the current decoding recursion number, the previous toggle signal, the symptom value, and the row weight value;

A current decoding result of the target codeword at the current decoding recursion number is determined based on the current inversion signal and the symptom value, so as to determine a target decoding of the target codeword based on the current decoding result result.

Preferably, the determining of the current inversion signal based on the current decoding recursion number, the previous inversion signal, the symptom value and the row weight value includes:

determining a rollover threshold corresponding to the current decoding rollover number based on the current decoding rollover number and the previous rollover signal;

determining a flip function value corresponding to the current decoding recursion number based on the symptom value and the row weight value;

If the inversion threshold is greater than the inversion function value, determining that the current inversion signal indicates that no bit inversion is performed;

If the inversion threshold is less than or equal to the inversion function value, it is determined that the current inversion signal represents a bit inversion.

Preferably, the determining of the inversion threshold corresponding to the current decoding recursion number based on the current decoding recursion number and the previous inversion signal includes:

If the value of the current decoding recursion number is 1, it is determined that the rollover threshold is a first preset value;

If the value of the current decoding recursion number is 2, then determining that the rollover threshold is a second preset value;

If the value of the current decoding recursion number is greater than or equal to 2, and the previous inversion signal indicates that a bit inversion has been performed, then determine that the inversion threshold is 1;

If the value of the current decoding recursion number is greater than or equal to 2, and the previous inversion signal indicates that bit inversion has not been performed, the inversion threshold is determined to be 0.

Preferably, the determining a flip function value corresponding to the current decoding recursion number based on the symptom value and the row weight value includes:

The inversion function value is determined based on an existing correspondence between the symptom value, the row weight value, and the inversion function value.

Preferably, the determining a flip function value corresponding to the current decoding recursion number based on the symptom value and the row weight value includes:

Determine the inversion function value based on the symptom value and the row weight value by using an operation formula of the inversion function value;

The calculation formula of the inversion function value includes:

Wherein, n represents the nth bit in the target codeword; E _n represents the inversion function value of the nth bit in the target codeword; M(n) represents the corresponding value of the target codeword The position of 1 in the nth parity check matrix; _Sk represents the symptom value corresponding to k; col _wt(n) represents the row weight value.

A quasi-cyclic low-density parity-check code decoding system, comprising:

The first acquisition module is used to acquire the target codeword to be decoded;

The second acquisition module is used for acquiring the current decoding recursion number and the previous inversion signal, and the previous inversion signal is used to represent whether the previous recursion number of the current decoding recursion number is bit inverted;

A third acquisition module, configured to acquire the symptom value of the target codeword when the current decoding recursion number has been calculated;

the fourth acquisition module, for acquiring the row weight value of the target codeword;

a first determining module, configured to determine a current inversion signal based on the current decoding recursion number, the previous inversion signal, the symptom value and the row weight value;

a second determining module, configured to determine a current decoding result of the target codeword at the current decoding recursion number based on the current inversion signal and the symptom value, so as to determine the current decoding result based on the current decoding result The target decoding result of the target codeword.

A quasi-cyclic low-density parity-check code decoding device, comprising:

memory for storing computer programs;

The processor is configured to implement the steps of any of the above-mentioned quasi-cyclic low-density parity-check code decoding methods when executing the computer program.

A quasi-cyclic low-density parity-check code decoding device, comprising:

The input temporary register is used to obtain the target codeword to be decoded;

Select the multiplexer to obtain the current decoding recursion number;

A bit inversion and symptom value updater is used to obtain the previous inversion signal, and the previous inversion signal is used to represent whether the previous recursion of the current decoding recursion is bit inverted; to obtain the target codeword The symptom value that has been calculated at the current decoding recursion number; obtains the row weight value of the target codeword; based on the current decoding recursion number, the previous inversion signal, the symptom value and the The row weight value determines the current inversion signal; the current decoding result of the target codeword at the current decoding recursion is determined based on the current inversion signal and the symptom value, so as to determine the current decoding result based on the current decoding result. Describe the target decoding result of the target codeword.

Preferably, the bit flip and symptom value updater includes:

a rollover threshold selector, configured to determine a rollover threshold corresponding to the current number of decoding iterations based on the current number of decoding iterations and the previous rollover signal;

a flip function value determiner, configured to determine a flip function value corresponding to the current decoding recursion number based on the symptom value and the row weight value;

A bit inversion determiner, configured to determine that the current inversion signal represents no bit inversion if the inversion threshold is greater than the inversion function value; if the inversion threshold is less than or equal to the inversion function value, determine the The current inversion signal indicates that bit inversion is performed;

a bit flip and symptom value operator for determining a current decoding result of the target codeword at the current decoding recursion number based on the current flip signal and the symptom value, so as to based on the current decoding The result determines the target decoding result of the target codeword.

Preferably, the bit flip and symptom value calculator includes:

a first shifter, configured to shift the target symptom value in the symptom value to obtain the shifted symptom value;

a first mutually exclusive OR operator, configured to perform a mutually exclusive OR operation on the shifted symptom value and the current flip signal to obtain the shifted updated symptom value;

a second shifter, configured to shift the shifted updated symptom value to obtain the updated symptom value;

The second mutually exclusive OR operator is configured to perform a mutually exclusive OR operation on the codeword information corresponding to the current decoding recursion number and the current inversion signal to obtain the inverted codeword corresponding to the current decoding recursion number.

A quasi-cyclic low-density parity-check code decoding method provided by the present application is to obtain the target codeword to be decoded; obtain the current decoding recursion number and the previous inversion signal, and the previous inversion signal is used to represent the current decoding process. Whether the previous recursion number of the round number is bit flipped; get the symptom value that has been calculated for the target codeword at the current decoding recursion number; get the row weight value of the target codeword; based on the current decoding recursion number, the previous flip signal , the symptom value and the row weight value determine the current inversion signal; determine the current decoding result of the target codeword at the current decoding recursion number based on the current inversion signal and the symptom value, so as to determine the target decoding of the target codeword based on the current decoding result result. In the present application, the current inversion signal can be quickly determined based on the current decoding recursion number, the previous inversion signal, the symptom value and the row weight value, and then the target codeword can be quickly determined based on the current inverted signal and the symptom value when the current decoding recursion number is present. The current decoding result can improve the decoding efficiency of the quasi-cyclic low-density parity check code. The quasi-cyclic low-density parity-check code decoding system, device and device provided by the present application also solve the corresponding technical problems.

Description of drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only It is an embodiment of the present application. For those of ordinary skill in the art, other drawings can also be obtained according to the provided drawings without any creative effort.

1 is a flowchart of a method for decoding a quasi-cyclic low-density parity-check code provided by an embodiment of the present application;

2 is a schematic structural diagram of a quasi-cyclic low-density parity-check code decoding system provided by an embodiment of the present application;

3 is a schematic structural diagram of a quasi-cyclic low-density parity-check code decoding apparatus provided by an embodiment of the present application;

4 is another schematic structural diagram of a quasi-cyclic low-density parity-check code decoding apparatus provided by an embodiment of the present application;

5 is a schematic structural diagram of a quasi-cyclic low-density parity-check code decoding device provided by an embodiment of the present application;

FIG. 6 is another schematic structural diagram of a quasi-cyclic low-density parity-check code decoding device provided by an embodiment of the present application.

Detailed ways

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

症状值(Syndrome)由算式

获得，R^T代表待译码的码字R的转置矩阵(Transpose Matrix)，且

的维度为M×1。In order to facilitate the understanding of the present application, the corresponding information in the fast decoding method of the aligned cyclic low density parity check code is described first. The (N, K) quasi-cyclic low-density parity-check code is a linear code, where N is the length of the codeword, and K is the length of the transmitted information. An LDPC code is defined by a Parity Check Matrix H. The dimension of H is M×N. The received code word (Received Word) R has length N, R=[r ₀ , r ₁ , r ₂ , . . . , r _N-1 ]. Define the flipped vector (FlippedVector)

The symptom value (Syndrome) is calculated by the formula

Obtain, R ^T represents the transpose matrix (Transpose Matrix) of the codeword R to be decoded, and

The dimension of is M×1.

Please refer to FIG. 1. FIG. 1 is a flowchart of a method for decoding a quasi-cyclic low-density parity check code according to an embodiment of the present application.

A quasi-cyclic low-density parity-check code decoding method provided by an embodiment of the present application may include the following steps:

Step S101: Obtain a target codeword to be decoded.

In practical applications, the target codeword to be decoded may be obtained first, and the type and content of the target codeword may be determined according to actual needs, which is not specifically limited in this application.

Step S102 : Obtain the current decoding recursion number and the previous inversion signal. The previous inversion signal is used to represent whether the previous recursion number of the current decoding recursion is bit inverted.

In practical applications, after obtaining the target codeword to be decoded, the current decoding recursion number and the previous inversion signal can be obtained. Inversion, so that the current inversion signal of the current decoding recursion number is subsequently determined based on the current decoding recursion number and the previous inversion signal.

Step S103: Acquire the symptom value of the target codeword that has been calculated at the current decoding recursion number.

Step S104: Obtain the row weight value of the target codeword.

In practical applications, after obtaining the current decoding recursion number and the previous inversion signal, it is also necessary to obtain the symptom value calculated by the target codeword at the current decoding recursion number, and obtain the row weight value of the target codeword.

It should be noted that the symptom value obtained by the target codeword at the current decoding recursion number is the symptom value obtained at the beginning of the decoding process corresponding to the current decoding recursion number, which can be determined according to the specific calculation process, and the line The weight value can be determined according to actual needs, which is not specifically limited in this application.

Step S105: Determine the current inversion signal based on the current decoding recursion number, the previous inversion signal, the symptom value and the row weight value.

In practical applications, after obtaining the current decoding recursion number, the previous inversion signal, the symptom value and the row weight value, the current inversion can be quickly determined based on the current decoding recursion number, the previous inversion signal, the symptom value and the row weight value. signal.

In a specific application scenario, in the process of determining the current inversion signal based on the current decoding recursion number, the previous inversion signal, the symptom value and the row weight value, the current decoding recurrence number can be determined based on the current decoding recurrence number and the previous inversion signal Corresponding flip threshold; determine the flip function value corresponding to the current decoding recursion based on the symptom value and the row weight value; if the flip threshold is greater than the flip function value, it is determined that the current flip signal characterizes no bit flip; if the flip threshold is less than or equal to flip If the function value is set, it is determined that the current flip signal characterizes the bit flip.

In a specific application scenario, in the process of determining the inversion threshold corresponding to the current decoding recursion number based on the current decoding recursion number and the previous inversion signal, if the value of the current decoding recursion number is 1, it can be determined that the inversion threshold is the first Default value; if the value of the current decoding recursion number is 2, the flip threshold is determined to be the second default value; if the current decoding recursion number is greater than or equal to 2, and the previous flip signal indicates that the bit flip has been performed, The flip threshold is determined to be 1; if the value of the current decoding recursion number is greater than or equal to 2, and the previous flip signal indicates that no bit flip has been performed, the flip threshold is determined to be 0.

It should be noted that the specific values of the first preset value and the second preset value can be determined according to actual needs, for example, can be determined according to the row weight value, for example, when the row weight value is 3 or 4, it can be set. The first preset value is 4, the second preset value is 1, etc., which are not specifically limited in this application.

In a specific application scenario, in the process of determining the inversion function value corresponding to the current decoding recursion number based on the symptom value and the row weight value, the inversion function can be determined based on the existing correspondence between the symptom value, the row weight value and the inversion function value. value.

For ease of understanding, assuming that the row weight value is 4, the corresponding relationship between the symptom value, the row weight value and the flip function can be shown in Table 1. Assuming that the row weight value is 4, the relationship between the symptom value, the row weight value and the flip function is as follows: The corresponding relationship of can be shown in Table 2, where #( _{s_k} =1) represents the synthesis of symptom values, and En represents the value of the inversion function.

Table 1 Correspondence between symptom value, row weight value and flip function when the row weight value is 4

#(s_k=1) E_n 0 -4 1 -2 2 0 3 2 4 4

Table 2 Correspondence between symptom value, row weight value and flip function when the row weight value is 3

#(s_k=1) E_n 0 -3 1 -1 2 1 3 3

In a specific application scenario, in the process of determining the inversion function value corresponding to the current decoding recursion number based on the symptom value and the row weight value, the inversion function value can also be determined based on the symptom value and the row weight value through the calculation formula of the inversion function value;

The formula for flipping the function value includes:

Among them, n represents the nth bit in the target codeword; E _n represents the flip function value of the nth bit in the target codeword; M(n) represents the nth bit in the parity check matrix corresponding to the target codeword 1 is the location; _Sk represents the symptom value corresponding to k; col _wt(n) represents the row weight value.

Step S106: Determine the current decoding result of the target codeword at the current decoding recursion number based on the current inversion signal and the symptom value, so as to determine the target decoding result of the target codeword based on the current decoding result.

In practical applications, after the current inversion signal is determined based on the current decoding recursion number, the previous inversion signal, the symptom value and the row weight value, the target codeword can be determined based on the current inversion signal and the symptom value at the current decoding recursion number. The current decoding result to determine the target decoding result of the target codeword based on the current decoding result.

A quasi-cyclic low-density parity-check code decoding method provided by the present application is to obtain the target codeword to be decoded; obtain the current decoding recursion number and the previous inversion signal, and the previous inversion signal is used to represent the current decoding process. Whether the previous recursion number of the round number is bit flipped; get the symptom value that has been calculated for the target codeword at the current decoding recursion number; get the row weight value of the target codeword; based on the current decoding recursion number, the previous flip signal , the symptom value and the row weight value determine the current inversion signal; determine the current decoding result of the target codeword at the current decoding recursion number based on the current inversion signal and the symptom value, so as to determine the target decoding of the target codeword based on the current decoding result result. In the present application, the current inversion signal can be quickly determined based on the current decoding recursion number, the previous inversion signal, the symptom value and the row weight value, and then the target codeword can be quickly determined based on the current inverted signal and the symptom value when the current decoding recursion number is present. The current decoding result can improve the decoding efficiency of the quasi-cyclic low-density parity check code.

Please refer to FIG. 2 , which is a schematic structural diagram of a quasi-cyclic low-density parity-check code decoding system provided by an embodiment of the present application.

A quasi-cyclic low-density parity-check code decoding system provided by an embodiment of the present application may include:

The first obtaining module 101 is used to obtain the target codeword to be decoded;

The second obtaining module 102 is used to obtain the current decoding recursion number and the previous inversion signal, and the previous inversion signal is used to represent whether the previous recursive number of the current decoding recursion number is bit inverted;

The third acquisition module 103 is used to acquire the symptom value that the target codeword has calculated when the current decoding recursion number;

the fourth obtaining module 104, for obtaining the row weight value of the target codeword;

The first determining module 105 is configured to determine the current inversion signal based on the current decoding recursion number, the previous inversion signal, the symptom value and the row weight value;

The second determining module 106 is configured to determine the current decoding result of the target codeword at the current decoding recursion number based on the current inversion signal and the symptom value, so as to determine the target decoding result of the target codeword based on the current decoding result.

For the relevant description of each module in the quasi-cyclic low-density parity-check code decoding system provided by the embodiment of the present application, reference may be made to the foregoing embodiment, and details are not repeated here.

Please refer to FIG. 3 , which is a schematic structural diagram of a quasi-cyclic low-density parity-check code decoding apparatus provided by an embodiment of the present application.

A quasi-cyclic low-density parity-check code decoding apparatus provided by an embodiment of the present application may include:

Input the temporary register 11, for obtaining the target codeword to be decoded;

The multiplexer 12 is selected for obtaining the current decoding recursion number;

The bit inversion and symptom value updater 13 is used to obtain the previous inversion signal, and the previous inversion signal is used to represent whether the previous recursion number of the current decoding recursion is bit inverted; the acquired target codeword is in the current decoding process. The symptom value that has been calculated during the number of rounds; the row weight value of the target codeword is obtained; the current inversion signal is determined based on the current decoding recursion number, the previous inversion signal, the symptom value and the row weight value; the target is determined based on the current inversion signal and the symptom value The current decoding result of the codeword at the current decoding recursion number, so as to determine the target decoding result of the target codeword based on the current decoding result.

In practical applications, the quasi-cyclic low-density parity-check code decoding device provided in the embodiment of the present application may further include a symptom value temporary register 14, a data temporary register 15, a decoding termination logic 16, etc. No specific limitation is made.

It should be noted that the selection multiplexer needs to be connected to the data register to transmit the data in the data register to the bit flip and symptom value updater when needed. In addition, when there is an external recursive data source Under the circumstance, the selection multiplexer also needs to be connected with the external recursive number source in order to obtain the current decoding recursive number, etc.; the bit flip and symptom value updater are bidirectionally connected to the symptom value register, that is, the bit flip and symptom value The updater can transmit the updated symptom value to the symptom value register for storage, and the symptom value register can transmit data to the bit flip and symptom value updater; the data register 50 has one end connected to the bit flip and the symptom value The updater is used to store the bit flip and the flip code word calculated by the symptom updater. The decoding termination logic is connected to the symptom value register to determine whether the decoding state is continued decoding, decoding success, decoding almost success, or decoding failure based on the symptom value stored in the symptom value register, and then decoding The termination logic provides a decoding state signal to an external decoding process control module, and finally, the decoding process control module controls the decoding process according to the decoding state signal.

Please refer to FIG. 4 , which is another schematic structural diagram of a quasi-cyclic low-density parity-check code decoding apparatus provided by an embodiment of the present application.

In specific application scenarios, the bit flip and symptom value updater can include:

The flip threshold selector 131 is used to determine the flip threshold corresponding to the current decoding recursion number based on the current decoding recursion number and the previous flip signal;

a flip function value determiner 132, configured to determine a flip function value corresponding to the current decoding recursion number based on the symptom value and the row weight value;

The bit flip determiner 133 is used to determine that the current flip signal characterizes not to perform bit flip if the flip threshold is greater than the flip function value; if the flip threshold is less than or equal to the flip function value, then determine that the current flip signal represents a bit flip;

The bit flip and symptom value operator is used to determine the current decoding result of the target codeword at the current decoding recursion number based on the current flip signal and the symptom value, so as to determine the target decoding result of the target codeword based on the current decoding result .

In specific application scenarios, the bit flip and symptom value operators can include:

a first shifter 134, configured to shift the target symptom value in the symptom value to obtain the shifted symptom value;

a first mutually exclusive OR operator 135, configured to perform a mutually exclusive OR operation on the shifted symptom value and the current flip signal to obtain the shifted updated symptom value;

The second shifter 136 is configured to shift the shifted updated symptom value to obtain the updated symptom value;

The second mutually exclusive OR operator 137 is configured to perform a mutually exclusive OR operation on the codeword information corresponding to the current decoding recursion number and the current inverted signal to obtain the inverted codeword corresponding to the current decoding recursion number.

It should be noted that the toggle threshold selector has one end connected to the input register or the external previous toggle signal source through the data selection multiplexer, the other end is connected to the external recursive number source, and the other end is connected to the bit toggle determination. During operation, the inversion threshold selector determines the inversion threshold corresponding to the current decoding recursion number based on the current decoding recursion number and the previous inversion signal. The bit flip determiner is also connected to the first exclusive OR operator and the second exclusive OR operator. One end of the first shifter is connected to the above-mentioned symptom value register, the other end is connected to the inversion function value determiner, and the other end is connected to the first mutually exclusive OR operator. The first mutually exclusive OR operator also has one end connected to the second mutually exclusive OR operator. The second shifter is connected to the first exclusive OR operator and is also connected to the symptom register. The second mutually exclusive OR operator is connected to the data register. And in specific application scenarios, the shifters in this application can all be barrel shifters, etc., which are not specifically limited in this application.

The present application also provides a quasi-cyclic low-density parity-check code decoding device and a computer-readable storage medium, both of which have the corresponding quasi-cyclic low-density parity-check code decoding methods provided by the embodiments of the present application. Effect. Please refer to FIG. 5 , which is a schematic structural diagram of a quasi-cyclic low-density parity-check code decoding device provided by an embodiment of the present application.

A quasi-cyclic low-density parity-check code decoding device provided by an embodiment of the present application includes a memory 201 and a processor 202. A computer program is stored in the memory 201. When the processor 202 executes the computer program, the method described in any of the above embodiments is implemented. Describe the steps of a quasi-cyclic low-density parity-check code decoding method.

Referring to FIG. 6 , another quasi-cyclic low-density parity-check code decoding device provided by an embodiment of the present application may further include: an input port 203 connected to the processor 202 for transmitting externally inputted commands to the processor 202; the display unit 204 connected with the processor 202 is used to display the processing result of the processor 202 to the outside world; the communication module 205 connected with the processor 202 is used to realize the quasi-cyclic low-density parity-check code decoding device and the outside world Communication. The display unit 204 can be a display panel, a laser scanning display, etc.; the communication mode adopted by the communication module 205 includes but is not limited to mobile high-definition link technology (HML), universal serial bus (USB), high-definition multimedia interface (HDMI), Wireless connection: wireless fidelity technology (WiFi), Bluetooth communication technology, Bluetooth low energy communication technology, communication technology based on IEEE802.11s.

A computer-readable storage medium provided by an embodiment of the present application, where a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the quasi-cyclic low-density parity-check code decoding described in any of the preceding embodiments is implemented steps of the method.

The computer-readable storage medium referred to in this application includes random access memory (RAM), internal memory, read only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs , or any other form of storage medium known in the art.

For the description of the relevant parts of a quasi-cyclic low-density parity-check code decoding system, device, device, and computer-readable storage medium provided by the embodiments of the present application, please refer to the quasi-cyclic low-density parity-check code provided by the embodiments of the present application The detailed description of the corresponding part in the decoding method will not be repeated here. In addition, the parts of the above technical solutions provided in the embodiments of the present application that are consistent with the implementation principles of the corresponding technical solutions in the prior art are not described in detail, so as to avoid redundant descriptions.

It should also be noted that in this document, relational terms such as first and second are used only to distinguish one entity or operation from another, and do not necessarily require or imply those entities or operations There is no such actual relationship or order between them. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that a process, method, article or device comprising a list of elements includes not only those elements, but also includes not explicitly listed or other elements inherent to such a process, method, article or apparatus. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in a process, method, article or apparatus that includes the element.

The above description of the disclosed embodiments enables any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, this application is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A quasi-cyclic low density parity check code decoding method is characterized by comprising the following steps:

acquiring a target code word to be decoded;

acquiring a current decoding recurrence number and a previous overturning signal, wherein the previous overturning signal is used for representing whether the previous recurrence number of the current decoding recurrence number carries out bit overturning or not;

acquiring a symptom value calculated when the target code word is returned from the current decoding;

acquiring a line weight value of the target code word;

determining a current rollover signal based on the current decoding pass number, the previous rollover signal, the symptom value, and the line weight value;

determining a current coding result of the target codeword at the current coding pass count based on the current rollover signal and the syndrome value to determine a target coding result of the target codeword based on the current coding result.

2. The method of claim 1, wherein said determining a current rollover signal based on the current coded pass back number, the previous rollover signal, the symptom value, and the line weight value comprises:

determining a rollover threshold corresponding to the current decoding iteration number based on the current decoding iteration number and the last rollover signal;

determining a rollover function value corresponding to the current coding recurrence number based on the symptom value and the line weight value;

if the turning threshold value is larger than the turning function value, determining that the current turning signal representation does not carry out bit turning;

and if the turning threshold value is less than or equal to the turning function value, determining that the representation of the current turning signal is subjected to bit turning.

3. The method of claim 2, wherein determining a rollover threshold corresponding to the current decoded recursion number based on the current decoded recursion number and the previous rollover signal comprises:

if the value of the current decoding recurrence number is 1, determining that the turning threshold value is a first preset value;

if the value of the current decoding recurrence number is 2, determining that the turning threshold value is a second preset value;

if the value of the current decoding recurrence number is more than or equal to 2 and the representation of the last turning signal carries out bit turning, determining that the turning threshold value is 1;

and if the value of the current decoding recurrence number is more than or equal to 2 and the last-time upset signal represents that no bit upset is carried out, determining that the upset threshold is 0.

4. The method of claim 3, wherein determining a rollover function value corresponding to the current coding pass back number based on the symptom value and the line weight value comprises:

and determining the turnover function value based on the existing corresponding relation among the symptom value, the line weight value and the turnover function value.

5. The method of claim 3, wherein determining a rollover function value corresponding to the current coding pass back number based on the symptom value and the line weight value comprises:

determining the roll-over function value based on the symptom value and the line weight value through a roll-over function value operation formula;

the inversion function value operation formula comprises:

wherein n represents the nth bit in the target codeword; e_nThe flipping function value representing the nth bit in the target codeword; m (n) represents the position of 1 in the n-th parity check matrix corresponding to the target code word; s_kRepresenting the symptom value corresponding to k; col_wt(n)Representing the line weight value.

6. A quasi-cyclic low density parity check code decoding system, comprising:

the first acquisition module is used for acquiring a target code word to be decoded;

a second obtaining module, configured to obtain a current decoding pass count and a previous roll-over signal, where the previous roll-over signal is used to indicate whether a previous pass count of the current decoding pass count performs bit roll-over or not;

a third obtaining module, configured to obtain a symptom value obtained by calculation when the target codeword is the current decoding number of pass;

a fourth obtaining module, configured to obtain a line weight value of the target codeword;

a first determining module for determining a current rollover signal based on the current decoding pass count, the previous rollover signal, the symptom value, and the line weight value;

a second determining module, configured to determine a current coding result of the target codeword at the current coding pass count based on the current flipping signal and the syndrome value, so as to determine a target coding result of the target codeword based on the current coding result.

7. A quasi-cyclic low density parity check code decoding apparatus, comprising:

a memory for storing a computer program;

a processor for implementing the steps of the method for decoding quasi-cyclic low density parity check codes according to any one of claims 1 to 5 when executing the computer program.

8. An apparatus for decoding a quasi-cyclic low-density parity-check code, comprising:

the input temporary storage is used for acquiring a target code word to be decoded;

selecting a multiplexer for acquiring the current decoding return number;

a bit flipping and symptom value updater for obtaining a previous flipping signal, wherein the previous flipping signal is used for representing whether the previous recursion number of the current decoding recursion number carries out bit flipping; acquiring a symptom value calculated when the target code word is returned from the current decoding; acquiring a line weight value of the target code word; determining a current rollover signal based on the current decode number of passes, the last rollover signal, the syndrome value, and the line weight value; determining a current coding result of the target codeword at the current coding pass count based on the current rollover signal and the syndrome value to determine a target coding result of the target codeword based on the current coding result.

9. The apparatus of claim 8, wherein the bit flip and syndrome updater comprises:

a rolling threshold selector for determining a rolling threshold corresponding to the current decoding recurrence number based on the current decoding recurrence number and the previous rolling signal;

a roll-over function value determiner for determining a roll-over function value corresponding to the current coding recurrence number based on the symptom value and the line weight value;

a bit flipping determiner, configured to determine that the current flipping signal represents no bit flipping if the flipping threshold is greater than the flipping function value; if the turning threshold value is less than or equal to the turning function value, determining that the current turning signal represents to carry out bit turning;

a bit flipping and syndrome value operator for determining a current decoding result of the target codeword when the current decoding is performed based on the current flipping signal and the syndrome value, so as to determine a target decoding result of the target codeword based on the current decoding result.

10. The apparatus of claim 9 wherein the bit flip and syndrome operator comprises:

the first shifter is used for shifting a target symptom value in the symptom values to obtain a shifted symptom value;

a first exclusive-or operator, configured to perform exclusive-or operation on the shifted symptom value and the current inversion signal to obtain a shifted updated symptom value;

a second shifter for shifting the shifted updated symptom value to obtain an updated symptom value;

and the second exclusive OR operator is used for carrying out exclusive OR operation on the code word information corresponding to the current decoding recursion number and the current overturning signal to obtain an overturning code word corresponding to the current decoding recursion number.

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