CN114640292B - Current judgment circuit - Google Patents
Current judgment circuitInfo
- Publication number
- CN114640292B CN114640292B CN202011371017.XA CN202011371017A CN114640292B CN 114640292 B CN114640292 B CN 114640292B CN 202011371017 A CN202011371017 A CN 202011371017A CN 114640292 B CN114640292 B CN 114640292B
- Authority
- CN
- China
- Prior art keywords
- voltage level
- current
- low
- signal
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P23/00—Arrangements or methods for the control of AC motors characterised by a control method other than vector control
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Measurement Of Current Or Voltage (AREA)
- Inverter Devices (AREA)
Abstract
一种电流判断电路，用以判断通过一马达的一线圈的一电流的状态，并包括一高侧电路、一低侧电路以及一处理单元。该高侧电路用以根据一高侧晶体管的一第一体二极管的两端的一第一电压差与一第一控制信号的电压准位输出一第一判断信号。该低侧电路用以根据一低侧晶体管的一第二体二极管的两端的一第二电压差与一第二控制信号的电压准位输出一第二判断信号。该处理单元用以接收该第一判断信号与该第二判断信号，并根据该第一判断信号的电压准位与该第二判断信号的电压准位判断该电流的状态。通过高侧电路与低侧电路的设计，电流判断电路不需量测节点的电压值，进而可避免因为要量测高于系统高电压或低于系统低电压的电压值而引起的问题。
A current determination circuit is used to determine the state of a current passing through a coil of a motor, and includes a high-side circuit, a low-side circuit, and a processing unit. The high-side circuit outputs a first determination signal based on a first voltage difference across a first body diode of a high-side transistor and the voltage level of a first control signal. The low-side circuit outputs a second determination signal based on a second voltage difference across a second body diode of a low-side transistor and the voltage level of a second control signal. The processing unit receives the first and second determination signals and determines the state of the current based on the voltage levels of the first and second determination signals. By designing the high-side and low-side circuits, the current determination circuit does not need to measure node voltages, thereby avoiding problems caused by measuring voltages above the system high voltage or below the system low voltage.
Description
Technical Field
The present disclosure relates to a current determination circuit, and more particularly to a current determination circuit for determining a state of a coil current.
Background
Taking one group of high-side transistors and low-side transistors in the driving circuit of the three-phase motor as an example, in general, the high-side transistors and the low-side transistors are turned on in turn to change the flow direction of the coil current, so as to drive the motor. When the motor is driven, there is a period of time (hereinafter referred to as Dead Zone) when the high-side transistor and the low-side transistor are simultaneously in an off state. It is noted that the coil current flow direction in the dead zone most reflects the instantaneous state of the motor in operation. The voltage value of a node where the high-side transistor, the low-side transistor and the motor coil are commonly coupled changes according to the flow direction of the coil current in the dead zone. Accordingly, conventionally, by comparing the voltage value of the node with the system high voltage or the system low voltage, the flow direction of the coil current in the dead zone can be determined, so as to obtain the instant state information of the motor in operation.
However, the above determination result is easily affected by system noise, and since the measurement is higher than the voltage value of the high system voltage (or lower than the voltage value of the low system voltage), an auxiliary circuit (or other special method) is often required, which results in an increase of cost. In addition, when the voltage value of the node is between the high system voltage and the low system voltage, the current flowing in the coil cannot be determined.
Disclosure of Invention
In view of this, the present disclosure provides a current determination circuit. The current judging circuit is used for judging the state of a current passing through a coil of a motor and comprises a high-side transistor, a low-side transistor, a high-side circuit, a low-side circuit and a processing unit. The high-side transistor is coupled to the coil, selectively turned on or off according to a voltage level of a first control signal, and includes a first body diode. The low-side transistor is coupled to the coil, selectively turned on or off according to a voltage level of a second control signal, and includes a second body diode. The high-side circuit is coupled to the high-side transistor and is configured to output a first determination signal according to a first voltage difference between two ends of the first body diode and a voltage level of the first control signal. The low-side circuit is coupled to the low-side transistor and is configured to output a second determination signal according to a second voltage difference between two ends of the second body diode and the voltage level of the second control signal. The processing unit is used for outputting the first control signal and the second control signal, receiving the first judgment signal and the second judgment signal, and judging the state of the current according to the voltage level of the first judgment signal and the voltage level of the second judgment signal.
In another embodiment, when the first determination signal is at a low voltage level and the second determination signal is at a low voltage level, the processing unit determines that the current is zero.
In another embodiment, when the first determination signal is at a high voltage level and the second determination signal is at a low voltage level, the processing unit determines that the current flows out of the coil and then passes through the first body diode.
In another embodiment, when the first determination signal is at a low voltage level and the second determination signal is at a high voltage level, the processing unit determines that the current flows into the coil after passing through the second body diode.
In another embodiment, when the first determination signal is at a high voltage level and the second determination signal is at a high voltage level, the processing unit determines that the current is not in a certain state.
In another embodiment, the high-side circuit includes a first comparator coupled to the first body diode and configured to output a first status signal according to the first voltage difference across the first body diode.
In another embodiment, the high-side circuit further includes a first logic gate coupled to the first comparator and the high-side transistor, and configured to output the first determination signal according to the voltage level of the first status signal and the voltage level of the first control signal.
In another embodiment, the low-side circuit includes a second comparator coupled to the second body diode and configured to output a second status signal according to the second voltage difference across the second body diode.
In another embodiment, the low-side circuit further includes a second logic gate coupled to the low-side transistor for switching the voltage level of the second control signal, and a third logic gate coupled to the second comparator and the second logic gate for outputting the second determination signal according to the voltage level of the second status signal and the voltage level of the second control signal switched by the second logic gate.
In another embodiment, the high-side transistor further comprises a first end, a second end and a first control end, wherein two ends of the first body diode are coupled to the first end and the second end, the first end is used for receiving a system high voltage, the second end is coupled to the coil, the first control end is used for receiving the first control signal, the low-side transistor further comprises a third end, a fourth end and a second control end, two ends of the second body diode are coupled to the third end and the fourth end, the third end is coupled to the coil, the fourth end is used for receiving a system low voltage, and the second control end is used for receiving the second control signal.
By designing the high-side circuit and the low-side circuit, the current judging circuit of the disclosure can judge the state of the current in the coil in the static stagnation area according to the first voltage difference between two ends of the first body diode of the high-side transistor and the second voltage difference between two ends of the second body diode of the low-side transistor. Since the voltage value of the node is not required to be measured, the current judgment circuit can avoid the problem caused by measuring the voltage value higher than the high voltage of the system or lower than the low voltage of the system. In addition, the processing unit can also acquire the phase information of the current and adjust the phase relation between the current and the back electromotive force of the motor so that the motor can run at the optimal rotation speed value.
Drawings
FIG. 1 is a schematic diagram of a current determination circuit according to some embodiments of the present disclosure;
FIG. 2is a schematic diagram illustrating a current determination circuit in operation according to some embodiments of the present disclosure;
FIG. 3 is a schematic diagram illustrating a current determination circuit in operation according to some embodiments of the present disclosure;
FIG. 4 is a schematic diagram illustrating a current determination circuit in operation according to some embodiments of the present disclosure;
FIG. 5 is a schematic diagram illustrating a current determination circuit in operation according to some embodiments of the present disclosure.
[ Symbolic description ]
10 Coil
100 Current judging circuit
102 High side transistor
104 Low side transistor
106 High side circuit
108 Low side circuitry
110 Processing unit
120 Controller
121 First body diode
141 Second body diode
161 First comparator
162 First logic gate
181 Second comparator
182 Second logic gate
183 Third logic gate
CS1 first control Signal
CS2 second control Signal
SS1 first status signal
SS2:second status signal
DS1 first judgment signal
DS2 second judgment Signal
Vcc: system high Voltage
Vss, system Low Voltage
I1, I2, I3, I4 current
N: node
Detailed Description
The following detailed description of the embodiments is given by way of example only and not by way of limitation, and the scope of the present disclosure is not intended to be limited by the accompanying drawings, in which like reference numerals indicate like elements, and in which like elements are rearranged to provide a equivalent result.
The term "about" as used throughout the specification and claims, unless otherwise indicated, shall generally have the ordinary meaning of each term used in this field, in the context of this disclosure, and in the special context.
The terms "first," "second," and the like, as used herein, do not denote a particular order or sequence, nor are they intended to limit the disclosure, but rather are merely used to distinguish one element or operation from another in the same technical term.
In addition, as used herein, "coupled" or "connected" may mean that two or more elements are in direct physical or electrical contact with each other, or in indirect physical or electrical contact with each other, and may also mean that two or more elements are in operation or action with each other.
Referring to fig. 1, one embodiment of the present disclosure relates to a current determination circuit 100. The current determination circuit 100 is configured to determine a state of a current (e.g., a current I2 in fig. 3 or a current I3 in fig. 4) passing through a coil 10 of a motor (not shown), and includes a high-side transistor 102, a low-side transistor 104, a high-side circuit 106, a low-side circuit 108, and a processing unit 110.
In this embodiment, the motor is a three-phase motor. It will be appreciated that the motor includes three coils (one of which is coil 10 as shown in fig. 1). However, for simplicity of explanation, the other two coils and the two current determination circuits corresponding to these coils are omitted in fig. 1.
Structurally, the processing unit 110 is coupled to the high-side transistor 102 and the low-side transistor 104, and outputs a first control signal CS1 and a second control signal CS2 to the high-side transistor 102 and the low-side transistor 104, respectively, to control the high-side transistor 102 and the low-side transistor 104. Specifically, the processing unit 110 includes a controller 120, and the controller 120 is configured to generate a first control signal CS1 and a second control signal CS2.
The high-side transistor 102 is selectively turned on or off according to the voltage level of the first control signal CS1, and the low-side transistor 104 is selectively turned on or off according to the voltage level of the second control signal CS 2. As shown in fig. 1, the high side transistor 102, the low side transistor 104 are commonly coupled to a node N with the motor coil 10.
Specifically, the high-side transistor 102 includes a first terminal for receiving a system high voltage Vcc, a second terminal coupled to the node N, a first control terminal for receiving the first control signal CS1, a first control terminal coupled to the first terminal, and a first body diode 121 parasitic between the first terminal and the second terminal, wherein a cathode terminal of the first body diode 121 is coupled to the first terminal, and an anode terminal of the first body diode 121 is coupled to the second terminal (or the node N). The low-side transistor 104 includes a third terminal coupled to the node N, a fourth terminal for receiving a system low voltage Vss, a second control terminal for receiving the second control signal CS2, a second control terminal coupled to the third terminal (or node N), and a second body diode 141 parasitic between the third terminal and the fourth terminal, wherein an anode terminal of the second body diode 141 is coupled to the fourth terminal. In other words, the second terminal of the high-side transistor 102 and the third terminal of the low-side transistor 104 are coupled to the coil 10 of the motor.
In the present embodiment, the high-side transistor 102 is a P-type metal oxide semiconductor, and the low-side transistor 104 is an N-type metal oxide semiconductor, however, the disclosure is not limited thereto. In some embodiments, the high-side transistor 102 may be implemented with an N-type mos and the low-side transistor 104 may be implemented with a P-type mos. In still other embodiments, the high-side transistor 102 and the low-side transistor 104 may be implemented as bipolar transistors.
The high-side circuit 106 and the low-side circuit 108 are coupled to the high-side transistor 102 and the low-side transistor 104, respectively, wherein the high-side circuit 106 is configured to output a first determination signal DS1 according to a first voltage difference VD1 between two ends of the first body diode 121 and a voltage level of the first control signal CS1 (corresponding to a conductive state of the high-side transistor 102), and the low-side circuit 108 is configured to output a second determination signal DS2 according to a second voltage difference VD2 between two ends of the second body diode 141 and a voltage level of the second control signal CS2 (corresponding to a conductive state of the low-side transistor 104).
Specifically, the high-side circuit 106 includes a first comparator 161 and a first logic gate 162. The first comparator 161 has a positive input terminal and a negative input terminal coupled to the anode terminal and the cathode terminal of the first body diode 121, respectively, and outputs a first status signal SS1 according to a first voltage difference VD1 between two ends (i.e., the anode terminal and the cathode terminal) of the first body diode 121. In the present embodiment, the first voltage difference VD1 is changed according to whether a current flows through the first body diode 121 in the forward direction. For example, when a current flows through the first body diode 121 in the forward direction, the first voltage difference VD1 (e.g., 0.7 v) between two ends of the first body diode 121 is greater than 0 v (i.e., positive value), which results in the voltage level of the positive input terminal of the first comparator 161 being higher than the voltage level of the negative input terminal of the first comparator 161, and thus the first comparator 161 outputs the first status signal SS1 with a high voltage level. Conversely, when no current flows through the first body diode 121 in the forward direction, the first voltage difference VD1 across the first body diode 121 is not greater than 0 v (i.e., is not positive), resulting in the voltage level of the positive input terminal of the first comparator 161 being lower than the voltage level of the negative input terminal of the first comparator 161, and thus the first comparator 161 will output the first status signal SS1 with a low voltage level.
The two input terminals of the first logic gate 162 are coupled to the output terminal of the first comparator 161 and the first control terminal of the high-side transistor 102, respectively, and are configured to output a first determination signal DS1 of a high voltage level or a low voltage level according to the voltage level of the first status signal SS1 and the voltage level of the first control signal CS 1. For example, when at least one of the first status signal SS1 and the first control signal CS1 is at the low voltage level, the first logic gate 162 outputs the first determination signal DS1 at the low voltage level. When the first status signal SS1 and the first control signal CS1 are at the high voltage level, the first logic gate 162 outputs the first determination signal DS1 at the high voltage level. In the present embodiment, the first logic gate 162 is an AND gate (AND gate).
The low-side circuit 108 includes a second comparator 181, a second logic gate 182, and a third logic gate 182. A positive input terminal and a negative input terminal of the second comparator 181 are coupled to the anode terminal and the cathode terminal of the second body diode 141, respectively. Similar to the previous description of the first comparator 161, the second voltage difference VD2 is changed according to whether or not a current flows in the forward direction through the second body diode 141. In this way, the second comparator 181 is configured to determine whether the second voltage difference VD2 between two ends of the second body diode 141 is positive or not to output a second status signal SS2 of the high voltage level or the low voltage level.
The second logic gate 182 is coupled to the second control terminal of the low-side transistor 104 and is used for switching the voltage level of the second control signal CS 2. For example, when the processing unit 110 outputs the second control signal CS2 with a low voltage level, the second logic gate 182 can switch the second control signal CS2 from the low voltage level to the high voltage level, and vice versa. In the present embodiment, the second logic gate 182 is a NOT gate (NOT gate).
The two input terminals of the third logic gate 182 are coupled to the output terminal of the second comparator 181 and the output terminal of the second logic gate 182, respectively. Similar to the description of the first logic gate 162, the third logic gate 182 is configured to output the second determination signal DS2 with a high voltage level or a low voltage level according to the voltage level of the second status signal SS2 and the voltage level of the second control signal CS 2. In the present embodiment, the third logic gate 182 is an AND gate (AND gate).
In addition, the output terminal of the first logic gate 162 and the output terminal of the third logic gate 182 are coupled to the processing unit 110. In this way, the processing unit 110 can be configured to receive the first determination signal DS1 and the second determination signal DS2, and determine the current state in the coil 10 according to the voltage level of the first determination signal DS1 and the voltage level of the second determination signal DS 2.
For a better understanding of the present disclosure, the operation of the current determination circuit 100 will be described in the following paragraphs with reference to the drawings.
When the motor is running, the processing unit 110 of the current determination circuit 100 controls the voltage level of the first control signal CS1 and the voltage level of the second control signal CS2 through the controller 120 to turn on the high-side transistor 102 and the low-side transistor 104 in turn.
Referring to fig. 2, first, the processing unit 110 outputs the first control signal CS1 at the low voltage level and the second control signal CS2 at the low voltage level respectively to turn on the high-side transistor 102 and turn off the low-side transistor 104. In this way, the current I1 can flow from the system high voltage Vcc, through the high-side transistor 102 and the node N in sequence, and into the coil 10 to drive the motor. The processing unit 110 determines that the current determination circuit 100 does not enter the dead zone (dead zone) according to the first control signal CS1 at the low voltage level and the second control signal CS2 at the low voltage level.
The processing unit 110 then changes the first control signal CS1 from the low voltage level to the high voltage level to switch the high-side transistor 102 from the on state to the off state. Referring to fig. 3 and 4, the high-side transistor 102 and the low-side transistor 104 are simultaneously turned off (i.e., the current determination circuit 100 enters the dead zone). At the instant when the high-side transistor 102 switches from an on state to an off state (while the low-side transistor 104 remains in the off state), there is still a transient current (current I2 as shown in fig. 3 or current I3 as shown in fig. 4). As the high-side transistor 102 is completely turned off, the transient current will flow through the first body diode 121 or the second body diode 141 in the forward direction, so that the first voltage difference VD1 or the second voltage difference VD2 is changed. For example, when the high-side transistor 102 and the low-side transistor 104 are kept in the off state, if there is a current I2 (sequentially flowing through the second body diode 141 and the node N and into the coil 10) as shown in fig. 3, the second voltage difference VD2 becomes a positive value. Conversely, if there is a current I3 (flowing out of the coil 10 and sequentially passing through the node N and the first body diode 121) as shown in fig. 4, it represents that the first voltage difference VD1 becomes positive. It is understood that neither the first voltage difference VD1 shown in fig. 3 (because no current flows in the forward direction through the first body diode 121 in fig. 3) nor the second voltage difference VD2 shown in fig. 4 (because no current flows in the forward direction through the second body diode 141 in fig. 4) becomes positive.
Referring to fig. 3 again, since the first voltage difference VD1 is not positive (because the current I2 does not flow through the first body diode 121 in the forward direction), the first comparator 161 outputs the first state signal SS1 with the low voltage level according to the first voltage difference VD1 which is not positive, and the first logic gate 162 outputs the first determination signal DS1 with the low voltage level (e.g. logic 0) according to the first state signal SS1 with the low voltage level and the first control signal CS1 with the high voltage level. Since the second voltage difference VD2 is positive (since the current I2 flows from the system low voltage Vss, sequentially through the second body diode 141 and the node N) and the second control signal CS2 is switched from the low voltage level to the high voltage level through the second logic gate 182, the second comparator 181 outputs the second state signal SS2 of the high voltage level according to the positive second voltage difference VD2, and the third logic gate 183 outputs the second determination signal DS2 of the high voltage level (e.g. logic 1) according to the second state signal SS2 of the high voltage level and the second control signal CS2 of the high voltage level. The processing unit 110 determines that the current determination circuit 100 enters the dead zone according to the first control signal CS1 at the high voltage level and the second control signal CS2 at the low voltage level, and determines that the current I2 sequentially passes through the second body diode 141 and the node N according to the first determination signal DS1 at the low voltage level and the second determination signal DS2 at the high voltage level, and flows into the coil 10.
Referring to fig. 4 again, since the first voltage difference VD1 is positive (because the current I3 flows into the system high voltage Vcc through the node N and the first body diode 121 in sequence), the first comparator 161 outputs the first status signal SS1 with a high voltage level according to the positive first voltage difference VD1, and the first logic gate 162 outputs the first determination signal DS1 with a high voltage level (e.g. logic 1) according to the first status signal SS1 with a high voltage level and the first control signal CS1 with a high voltage level. Since the second voltage difference VD2 is not positive (because the current I3 does not flow through the second body diode 141 in the forward direction) and the second control signal CS2 is switched from the low voltage level to the high voltage level through the second logic gate 182, the second comparator 181 outputs the first status signal SS1 of the low voltage level according to the second voltage difference VD2 which is not positive, and the third logic gate 183 outputs the second determination signal DS2 of the low voltage level (e.g., logic 0) according to the second status signal SS2 of the low voltage level and the second control signal CS2 of the high voltage level. The processing unit 110 determines that the current determination circuit 100 enters the dead zone according to the first control signal CS1 at the high voltage level and the second control signal CS2 at the low voltage level, and determines that the current I3 flows out of the coil 10 according to the first determination signal DS1 at the high voltage level and the second determination signal DS2 at the low voltage level, and sequentially passes through the node N and the first body diode 121.
The processing unit 110 then changes the second control signal CS2 from the low voltage level to the high voltage level to switch the low-side transistor 104 from the off state to the on state. Referring to fig. 5, the high-side transistor 102 is in an off state and the low-side transistor 104 is in an on state. In this way, current I4 can flow from the coil 10, through the node N and the low-side transistor 104 in sequence, and into the system low voltage Vss to drive the motor. The processing unit 110 determines that the current determination circuit 100 does not enter the dead zone according to the first control signal CS1 at the high voltage level and the second control signal CS2 at the high voltage level.
It should be noted that, when the current determination circuit 100 enters the dead zone (the first control signal CS1 is at a high voltage level and the second control signal CS2 is at a low voltage level), the first voltage difference VD1 and the second voltage difference VD2 may not be positive because the magnitude of the current I2 or the current I3 is just zero. In this way, since the first voltage difference VD1 is not positive and the first control signal CS1 is at the high voltage level, the first logic gate 162 outputs the first determination signal DS1 at the low voltage level (e.g. logic 0) according to the first state signal SS1 at the low voltage level and the first control signal CS1 at the high voltage level, and since the second voltage difference VD2 is not positive and the second control signal CS2 is switched from the low voltage level to the high voltage level through the second logic gate 182, the third logic gate 183 outputs the second determination signal DS2 at the low voltage level (e.g. logic 0) according to the second state signal SS2 at the low voltage level and the second control signal CS2 at the high voltage level. The processing unit 110 determines that the current determination circuit 100 enters the dead zone according to the first control signal CS1 at the high voltage level and the second control signal CS2 at the low voltage level, and determines that the current I2 or the current I3 is zero (i.e. no current passes through the coil 10) according to the first determination signal DS1 at the low voltage level and the second determination signal DS2 at the low voltage level.
In addition, when the current determination circuit 100 enters the dead zone (the first control signal CS1 is at a high voltage level and the second control signal CS2 is at a low voltage level), the first comparator 161 and the second comparator 181 may also output the first state signal SS1 at the high voltage level and the second state signal SS2 at the high voltage level respectively due to circuit failure. In this way, the first logic gate 162 outputs the first determination signal DS1 of the high voltage level (e.g., logic 1) according to the first status signal SS1 of the high voltage level and the first control signal CS1 of the high voltage level, and the third logic gate 183 outputs the second determination signal DS2 of the high voltage level (e.g., logic 1) according to the second status signal SS2 of the high voltage level and the second control signal CS2 of the high voltage level due to the switching of the second control signal CS2 from the low voltage level to the high voltage level via the second logic gate 182. The processing unit 110 determines that the current determination circuit 100 enters the dead zone according to the first control signal CS1 at the high voltage level and the second control signal CS2 at the low voltage level, and determines that the state of the current passing through the coil 10 is not determined according to the first determination signal DS1 at the high voltage level and the second determination signal DS2 at the high voltage level. Since the state of the current passing through the coil 10 is not fixed, the processing unit 110 determines that the current determination circuit 100 has failed, and stops the operation of the current determination circuit 100.
In summary, a truth table can be developed. In other words, the processing unit 110 can determine the state of the current in the coil 10 in the dead zone according to the truth table. Wherein, the truth table is as follows:
| DS1 | DS2 | state of current flowing through the coil |
| 0 | 0 | Current is zero |
| 0 | 1 | Current flows into coil |
| 1 | 0 | Current outflow coil |
| 1 | 1 | The current state is not defined |
By designing the high-side circuit 106 and the low-side circuit 108, the current determining circuit 100 of the present disclosure can determine the current state in the coil 10 in the dead zone according to the first voltage difference VD1 parasitic to the two ends of the first body diode 121 of the high-side transistor 102 and the second voltage difference VD2 parasitic to the two ends of the second body diode 141 of the low-side transistor 104. Since the voltage value of the node N is not required to be measured, the current determination circuit 100 can avoid the problem caused by measuring the voltage value higher than the system high voltage Vcc or lower than the system low voltage Vss. In addition, the processing unit 110 may also obtain the phase information of the current, and adjust the phase relationship between the current and the back electromotive force of the motor, so that the motor can operate at the optimal rotation speed value.
While the present disclosure has been described with reference to the embodiments, it should be understood that the invention is not limited thereto, but may be variously modified and modified by one skilled in the art without departing from the spirit and scope of the present disclosure, and the scope of the present disclosure is accordingly defined by the appended claims.
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011371017.XA CN114640292B (en) | 2020-11-30 | 2020-11-30 | Current judgment circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011371017.XA CN114640292B (en) | 2020-11-30 | 2020-11-30 | Current judgment circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114640292A CN114640292A (en) | 2022-06-17 |
| CN114640292B true CN114640292B (en) | 2025-08-01 |
Family
ID=81944915
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011371017.XA Active CN114640292B (en) | 2020-11-30 | 2020-11-30 | Current judgment circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114640292B (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105191133A (en) * | 2013-04-26 | 2015-12-23 | 丰田自动车株式会社 | Driving device and control method of switching circuit |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6958592B2 (en) * | 2003-11-26 | 2005-10-25 | Power-One, Inc. | Adaptive delay control circuit for switched mode power supply |
| CN101989807B (en) * | 2009-08-07 | 2013-04-17 | 普诚科技股份有限公司 | Power conversion drive circuit and system with shortened dead time |
| CN101944845B (en) * | 2010-08-06 | 2012-09-05 | 东南大学 | Switch-level circuit with adaptive control of dead time |
| TWI496403B (en) * | 2013-08-07 | 2015-08-11 | Richtek Technology Corp | Voltage converter controller and voltage converter circuit |
| CN104467364B (en) * | 2014-12-15 | 2017-03-01 | 矽力杰半导体技术(杭州)有限公司 | A kind of zero cross detection circuit and Switching Power Supply |
| DE102017129983B4 (en) * | 2017-12-14 | 2019-06-27 | Deutsches Zentrum für Luft- und Raumfahrt e.V. | Device for converting a first voltage into a different second voltage from this |
| US11770073B2 (en) * | 2019-04-26 | 2023-09-26 | Texas Instruments Incorporated | Methods and apparatus for regulated hybrid converters |
-
2020
- 2020-11-30 CN CN202011371017.XA patent/CN114640292B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105191133A (en) * | 2013-04-26 | 2015-12-23 | 丰田自动车株式会社 | Driving device and control method of switching circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114640292A (en) | 2022-06-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4280418B2 (en) | Circuit for simulating a diode | |
| US8098058B2 (en) | Circuit arrangement comprising a load transistor and a measuring transistor | |
| US20100141304A1 (en) | Drive circuit for power element | |
| US6930517B2 (en) | Differential transistor and method therefor | |
| US20110075452A1 (en) | Detecting device for the midpoint voltage of a transistor half bridge circuit | |
| JP2003046380A (en) | Load drive circuit | |
| CN105765865A (en) | Semiconductor device | |
| JP5667946B2 (en) | High side switch circuit | |
| KR19980087505A (en) | Abnormal current detection circuit and load driving circuit including the same | |
| JP5831527B2 (en) | Semiconductor device | |
| US20220173734A1 (en) | Drive circuit and drive system | |
| WO1996019870A1 (en) | A power semiconductor switch | |
| CN114640292B (en) | Current judgment circuit | |
| JP2020030179A (en) | Current detection circuit | |
| US9893725B2 (en) | Low side and high side drivers for a motor | |
| JP2022001845A (en) | Battery voltage measuring device | |
| CN114815956B (en) | Under-voltage locking circuit suitable for gate drive | |
| TWI748772B (en) | Current determination circuit | |
| JPH0946191A (en) | Integrated comparator circuit | |
| JP3959924B2 (en) | Load drive circuit | |
| US20210203320A1 (en) | Input circuit | |
| CN113014077B (en) | High-voltage PN bridge gate driving circuit | |
| JP2023108333A (en) | On-voltage measurement circuit and on-voltage measurement method | |
| TWI776304B (en) | Current state determination method and circuit | |
| KR102867737B1 (en) | A circuit for detecting the aging state of power semiconductor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |