CN114720853A - Failure analysis method for laminated chip packaging product - Google Patents

Abstract

The invention discloses a failure analysis method of a laminated chip packaging product, which comprises the steps of placing the laminated chip packaging product after plastic packaging in heating equipment; setting a temperature curve and heating and baking; and after the baking is finished, taking out the laminated chip packaging product, separating out each layer of chip, and performing chip abnormity judgment and analysis. The failure analysis method of the laminated chip packaging product enables the chip to observe and analyze the failure reason of the chip under the secondary destructive effects of no chemical corrosion or artificial damage and the like.

Description

A method for failure analysis of stacked chip packaging products

technical field

The invention belongs to the technical field of chip packaging failure analysis, and in particular relates to a failure analysis method for stacked chip packaging products.

Background technique

In the failure analysis of laminated chip packaging products, for laminated chip packaging products with large chip size aspect ratio and thin chip thickness, the P-Lapping grinding and polishing method is usually used to analyze the failure cause of each layer of chips. In addition, as the thickness of the chip decreases, the higher the requirements for P-Lapping grinding and polishing, the greater the risk of artificially causing chip damage in this method; in the prior art, some researchers use acid/alkali The boiling method achieves full opening. This method has a violent chemical reaction with the plastic sealing compound, resulting in uneven stress on the chip and damage to the chip, as shown in Figure 9, and due to the complexity of the chip structure and the diversity of materials (such as arsenic gallium nitride/silicon nitride), acids or bases will corrode the chip and interfere with the accuracy of failure analysis conclusions. Therefore, there is an urgent need for a new failure analysis method for stacked chip packaging products to make up for the deficiencies of the prior art.

SUMMARY OF THE INVENTION

The purpose of the present invention is to solve the above problems in the prior art, and provide a method for analyzing the failure of laminated chip packaging products, so that the chip can observe and analyze the failure cause of the chip without secondary damage such as chemical corrosion or artificial damage.

To achieve the above object, the technical scheme adopted in the present invention is:

A method for analyzing the failure of a laminated chip package product, comprising placing the plastic-encapsulated laminated chip package product in a heating device; setting a temperature curve and heating and baking, and after baking for a preset time, the laminated chip package product is taken out , separate the chips of each layer, and conduct chip abnormality judgment and analysis.

Further, when the stacked chip package product is placed in the heating device, first place the stacked chip package product on the tray, and when placing, turn the plastic surface of the stacked chip package product upward; then, place the stacked chip package product on the tray. The tray is placed in the constant temperature zone of the heating device.

Further, the temperature curve is set to a heating section, a heat preservation section and a cooling section; in the heating section, the temperature of the laminated chip package product gradually increases with the increase of the temperature of the heating equipment; in the cooling section, the temperature of the laminated chip package product increases with the increase of the temperature. The temperature of the heating equipment decreases gradually.

Further, in the heating section, the heating slope is ≤30°C/min; in the holding section, the temperature is maintained at 500-805°C, and the holding time is 2-4 hours; in the cooling section, the cooling slope is ≤30°C/min.

Further, when the aspect ratio of the laminated chip package product is greater than 1, or the number of laminated layers is greater than or equal to four layers, or the thickness of the chip is less than or equal to 100 μm, or the ratio of the thermal expansion coefficient of the bonding material between the chips to the thermal expansion coefficient of the chip is greater than or equal to 50, the Before the stacked chip package product is placed in the heating device, pretreatment of the plastic sealing material of the stacked chip package product is performed.

Further, the preprocessing includes the following steps:

Step 1: Use chemical or physical methods to remove the plastic packaging material for the laminated chip packaging product;

Step 2: Then use cleaning or air gun blowing to remove the plastic sealing material residue. If it is found that it is not cleaned, go back to step 1;

Step 3: Bake and dry.

Further, in the step 1, before removing the plastic encapsulation material of the laminated chip encapsulation product, pre-bake the encapsulated product in advance; the physical method is to use a laser unsealing machine to remove the plastic encapsulation material; the chemical method is to use acid and alkali. Or organic solvent to remove the molding material.

Further, the cleaning in the step 2 adopts the method of acetone, water, water, and acetone to clean in sequence.

Further, the baking and drying in the step 3 is air-gun drying or baking in a heating device.

Further, the acid is fuming nitric acid or concentrated sulfuric acid, the alkali is potassium hydroxide, and the organic dissolving agent is a resin dissolving agent.

Compared with the prior art, the present invention has the following beneficial effects:

Based on the thermal expansion of materials and the decomposition mechanism of organic matter, the invention decomposes organic matter through high temperature carbonization, so that chips can be extracted and abnormal analysis and judgment are performed without secondary damage such as chemical corrosion or artificial damage. The technical scheme adopted in the present invention is to use the adhesive between the chips of the laminated chip package product, such as the carbonization and decomposition temperature of organic matter such as adhesive/patch glue/DAF/plastic encapsulation material, to carbonize and decompose the organic matter other than the chips. The thermal expansion of the material above and below the chip enables the chip to restore the original appearance of the chip before plastic packaging with minimal influence, so as to judge the abnormality of the chip.

Further, by setting the temperature curve into a heating section, a heat preservation section and a cooling section, the risk of damage to the chip caused by rapid thermal expansion of the organic matter is reduced when the organic matter is decomposed by high temperature carbonization.

Further, through the chip length-width ratio > 1, or the number of laminated layers ≥ four layers, or the chip thickness ≤ 100 μm, or the ratio of the thermal expansion coefficient of the bonding material between the chips to the chip thermal expansion coefficient ≥ 50. In the pretreatment of plastic packaging materials, due to the low bending strength of the laminated chip packaging product itself in the above situation, pretreatment can reduce the tensile and compressive stress of the chip caused by the difference in thermal expansion coefficient, and further reduce the risk of chip damage.

Description of drawings

Fig. 1 is the schematic diagram of heating equipment;

Figure 2 is a temperature curve setting diagram;

Figure 3 is a diagram of a substrate package product;

Figure 4 is a diagram of a frame package product;

Figure 5 is a product diagram of a substrate-type multi-layer flush stack packaging product;

Figure 6 is a product diagram of a substrate-type multi-layer staggered stack packaging product;

Figure 7 is the effect diagram of chip separation of substrate type and frame type package products;

Figure 8 is a diagram showing the effect of chip separation of substrate-based multilayer flush and staggered stack packaging products;

FIG. 9 is a diagram showing the chip damage effect of the substrate-type multi-layer flush stack packaging product using the acid boiling method;

Among them: 1-solder ball; 2-substrate; 3-adhesive/SMD adhesive/DAF; 4-chip; 5-plastic compound; 6-metal substrate; 7-frame; 9-heating equipment door; 10 - Heating zone; 11- Constant temperature zone.

Detailed ways

In order to make the content of the present invention easier to understand, the method for failure analysis of stacked chip packaging products of the present invention will be described in further detail below with reference to the accompanying drawings, but the present invention is not limited thereto.

A method for failure analysis of a laminated chip package product, comprising placing the plastic-encapsulated laminated chip package product in a heating device, as shown in FIG. A heating zone 10 is arranged in the body, and a constant temperature zone 11 is arranged in the heating zone 10; when the laminated chip packaged product is placed in the heating equipment, the laminated chip packaged product is first placed on the tray, and when placed, the laminated chip packaged product is placed Then, place the tray in the constant temperature zone 11 of the heating equipment; then set the temperature curve and heat and bake, after baking for a preset time, take out the product, separate the chips of each layer, and analyze the abnormality of the chips. . Preferably, the temperature curve is set to a heating section, a heating section and a cooling section; in the heating section, the temperature of the laminated chip package product increases gradually with the increase of the temperature of the heating device 8; in the cooling section, the temperature of the laminated chip package product increases with the heating The temperature of the equipment decreases gradually; preferably, in the heating section, the heating slope is less than or equal to 30°C/min; in the holding section, the temperature is kept at 500-805 °C, and the holding time is 2-4h; in the cooling section, the cooling slope is less than or equal to 30 °C/min.

When the aspect ratio of the laminated chip package product is greater than 1, or the number of laminated layers is greater than or equal to four layers, or the thickness of the chip is less than or equal to 100 μm, or the ratio of the thermal expansion coefficient of the bonding material between the chips to the thermal expansion coefficient of the chip is greater than or equal to 50, the laminated chip Before the packaged product is placed in the heating equipment, the pretreatment of the plastic sealing material of the stacked chip packaged product is performed.

Preprocessing includes the following steps:

Step 1: Use a chemical method or a physical method to remove the plastic packaging material of the laminated chip packaging product; preferably, before removing the plastic packaging material, pre-bake the packaging product in advance; the physical method is to use a laser unsealing machine to remove the plastic packaging material. Removal; chemical method is to use acid, alkali or organic dissolving agent to remove the plastic sealing material, preferably, the acid is fuming nitric acid or concentrated sulfuric acid, the alkali is potassium hydroxide, and the organic dissolving agent is resin dissolving agent.

Step 2: Then, the plastic sealing material residue is removed by cleaning or air gun blowing. Preferably, cleaning is performed by acetone, water, water, and acetone in sequence. If it is found that it is not cleaned, go back to step 1;

Step 3: Bake and dry, preferably air gun drying or baking in heating equipment.

Hereinafter, the failure analysis method of the present invention will be described in detail by taking substrate-type package products, frame-type package products, substrate-type multi-layer flush-stack package products, and substrate-type multi-layer staggered-stack package products as examples.

Figure 3 shows a substrate package product, which includes a substrate 2, a solder ball 1, and the upper surface of the substrate 2 is sequentially provided with adhesive/patch adhesive/DAF3, chip 4, adhesive/patch from bottom to top The glue/DAF 3 and the chip 4 are encapsulated by the plastic sealing compound 5 as a whole. The aspect ratio of the chip of this product is greater than 1, and the number of laminated layers is 2. As shown in Figure 4, it is a frame type package product, which includes a frame 7, a metal substrate 6, and the upper surface of the metal substrate 6 is sequentially provided with adhesive/patch adhesive/DAF3, chip 4, adhesive sheet from bottom to top The glue/patch glue/DAF 3 and the chip 4 are wrapped by the plastic compound 5 as a whole. The aspect ratio of the product chip is greater than 1, and the number of laminated layers is 2.

In the failure analysis of the above packaged products, firstly select sample 1# and sample 2# of substrate package products; Sample 4# was placed in the heating equipment for baking. When placed in the heating equipment, the above samples were first placed on the tray, and the plastic surface of the sample was facing upward; then, the tray was placed at the constant temperature of the heating equipment. Zone 11; During heating, the temperature curve is set as follows: at a constant rate of 10°C/min from room temperature to 500°C, hold at 500°C for 120 minutes, and then cool down to room temperature at a constant rate of 10°C/min, as shown in Figure 2 ; In the heating section, the sample temperature gradually increases with the increase of the temperature of the heating equipment; in the cooling section, the sample temperature gradually decreases with the decrease of the temperature of the heating equipment. After the baking is completed, each sample is taken out, the chips of each layer are separated, and the abnormality judgment and analysis of the chips are carried out.

Figure 7 shows the chip separation results of sample 1#, sample 2#, sample 3# and sample 4#. In Figure 7, 1 and 2 represent the chips separated from the first layer and the second layer of each sample. It can be seen that the failure analysis method provided in the embodiment of the present invention is based on the thermal expansion of materials and the decomposition mechanism of organic matter, and decomposes organic matter through high-temperature carbonization, so that without secondary damage such as chemical corrosion or artificial damage, the chips of each layer can be completely separated. The separated chips are free of edge chipping, chipping, cracking and other phenomena.

As shown in Figure 5, it is a substrate-type multi-layer flush stacking package product. The product includes a substrate 2 and a solder ball 1. The upper surface of the substrate 2 is sequentially provided with adhesive/patch adhesive/DAF 3 and chip 4 from bottom to top. , Adhesive/SMD Adhesive/DAF 3, Chip 4, Adhesive Adhesive/SMD Adhesive/DAF 3, Chip 4, Adhesive Adhesive/SMD Adhesive/DAF 3, Chip 4, the upper part of the substrate 2 passes through the plastic sealing compound as a whole 5 wraps, this product has a stack of 4. Figure 6 shows a substrate-type multi-layer staggered stacking package product. The product includes a substrate 2, a solder ball 1, and the upper surface of the substrate 2 is provided with adhesive/patch adhesive/DAF 3, adhesive/patch adhesive/DAF The chip 4 is arranged on the top of the chip 4, and the upper part of the chip 4 is staggered and arranged with two stacks. Wrapped with plastic compound 5, the number of laminated layers of this product is 4. The ratio of the thermal expansion coefficient of the bonding material to the thermal expansion coefficient of the chip between the product chips shown in Figures 5 and 6 is 66.7. The above-mentioned product failure analysis method includes the following steps:

Step 1: First, select samples 1#, 2#, 3#, and 4# of substrate-based multilayer flush-stacked packaging products; select sample 5#, sample 6#, and sample 7# of substrate-based multi-layer staggered stacked packaging products and sample 8#; pre-bake the above samples at 60-130°C, and use concentrated sulfuric acid to remove the plastic sealing compound 5;

Step 2: Use the acetone-water-water-acetone cleaning method to clean and remove the plastic sealing compound 5, and observe whether the plastic sealing compound 5 above the chip is cleaned. If it is found that it is not cleaned, go back to step 1;

Step 3: Bake the above sample at 60-130°C until most of the water vapor inside the sample is removed;

Step 4: Place each sample in a heating device for baking. When placing it in the heating device, first place each sample on a tray, and place the plastic surface of each sample upward; then, place the tray on the heating device. In the constant temperature zone 11 of the equipment, the temperature curve of the heating equipment is set, and the temperature curve is set as a heating section, a holding section and a cooling section; in the heating section, the temperature of the samples 3 and 4 gradually increases with the increase of the temperature of the heating equipment; in the cooling section , the temperature of samples three and four gradually decreased with the decrease of the temperature of the heating equipment. As shown in Figure 2, the temperature curve is set as follows: the temperature is uniformly heated from room temperature to 500°C at a rate of 10°C/min, maintained at 500°C for 120 minutes, and then cooled to room temperature at a uniform rate of 10°C/min;

Step 5: After the baking is finished, each sample is taken out, the chips of each layer are separated, and the abnormality judgment and analysis of the chips are carried out.

Figure 8 shows the substrate-type multi-layer flush stack package product samples 1#, sample 2#, sample 3# and sample 4#, and the substrate-type multi-layer staggered stack package product samples 5#, sample 6#, sample 7# and sample 8# Chip separation results of each layer. Embodiments of the present invention The substrate-based multi-layer flush stacking package product shown in FIG. 5 and the substrate-based multi-layer staggered stacking package product shown in FIG. For the chips separated from the first layer, second layer, third layer and fourth layer of each sample, the ratio of the thermal expansion coefficient of the bonding material between the chips to the thermal expansion coefficient of the chip is 66.7, and the bending strength of the two products is low. Failure analysis In the method, the pretreatment of the plastic packaging material is first performed, which can reduce the tensile and compressive stress of the chip due to the difference in thermal expansion coefficient, and further reduce the risk of chip damage. It can be seen from FIG. 8 that the method can separate the chips of each layer well, and the separated chips have no phenomenon such as chipping, chipping, and cracking.

However, the example embodiments can be implemented in various forms, and should not be construed as limited to the embodiments set forth herein, those of ordinary skill in the art, under the inspiration of the present invention, without departing from the spirit of the present invention and the protection of the claims In the case of the scope of the present invention, many forms can also be made, which all fall within the protection scope of the present invention.

Claims (10)

1. a method for analyzing the failure of a laminated chip package product, it is characterized in that, comprising placing the laminated chip package product after plastic sealing in a heating device; setting a temperature curve and heating and baking, after baking a preset time, the The laminated chip package product is taken out, the chips of each layer are separated, and the abnormality judgment and analysis of the chip is carried out. 2 . The method for failure analysis of a stacked chip package product according to claim 1 , wherein when the stacked chip package product is placed in a heating device, the stacked chip package product is first placed in a heating device. 3 . On the tray, when placing, the plastic surface of the laminated chip package product is facing upward; then, the tray is placed in the constant temperature zone (11) of the heating device. 3. a kind of laminated chip package product failure analysis method according to claim 1, is characterized in that, described temperature curve is set to heating section, heat preservation section and cooling section; The temperature of the heating equipment increases gradually; in the cooling section, the temperature of the stacked chip package product gradually decreases with the decrease of the temperature of the heating equipment. 4. The method for analyzing the failure of a laminated chip package product according to claim 3, characterized in that, in the heating section, the heating slope is less than or equal to 30°C/min; The holding time is 2-4h; in the cooling section, the cooling slope is less than or equal to 30°C/min. 5 . The method for analyzing the failure of a laminated chip package product according to claim 1 , wherein, when the chip aspect ratio of the laminated chip package product is greater than 1, or the number of laminated layers is greater than or equal to four layers, or the chip thickness is less than or equal to 1. 6 . 100μm, or when the ratio of the thermal expansion coefficient of the bonding material between the chips to the thermal expansion coefficient of the chip is ≥50, before the laminated chip package product is placed in the heating equipment, pretreatment of the laminated chip package product plastic sealing material is performed. 6. The method for failure analysis of stacked chip packaging products according to claim 5, wherein the preprocessing comprises the following steps: Step 1: Use chemical or physical methods to remove the plastic packaging material for the laminated chip packaging product; Step 2: Then use cleaning or air gun blowing to remove the plastic sealing material residue. If it is found that it is not cleaned, go back to step 1; Step 3: Bake and dry. 7 . The method for analyzing the failure of a stacked chip package product according to claim 6 , wherein, in the step 1, before removing the plastic sealing material for the stacked chip package product, pre-baking the packaged product is performed in advance; 7 . The physical method is to use a laser unsealing machine to remove the plastic sealing material; the chemical method is to use an acid, an alkali or an organic solvent to remove the plastic sealing material. 8 . The method for analyzing the failure of a laminated chip package product according to claim 6 , wherein in the step 2, cleaning is performed in sequence with acetone, water, water, and acetone. 9 . 9 . The method for analyzing the failure of a stacked chip package product according to claim 6 , wherein the baking and drying in the step 3 is air-gun drying or baking in a heating device. 10 . 10. The method for analyzing the failure of a laminated chip package product according to claim 7, wherein the acid is fuming nitric acid or concentrated sulfuric acid, the alkali is potassium hydroxide, and the organic dissolving agent is a resin solubilizer.

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