CN114765671A - High-dynamic image sensor, pixel unit, and electronic information device - Google Patents

Abstract

The embodiment of the invention discloses a high dynamic range image sensor, a pixel unit and an electronic information device, wherein the image sensor comprises: a reset transistor; a source follower transistor; an overflow drain; a first photodiode; a first transfer transistor; a first floating diffusion region; a second photodiode; a second transfer transistor; a second floating diffusion region; the first photodiode and the second photodiode have different full well capacities; the first photodiode and the second photodiode share one of the overflow drains; the source follower transistor outputs a signal at its source. The embodiment of the invention is different from the existing 4T pixel structure design, adopts the 3T pixel structure design and the photodiodes with different full-well capacities to share the overflow drain, adds three switching transistors and three corresponding capacitors, and selectively opens or closes the capacitors through the switching transistors, thereby realizing the multi-level conversion gain high dynamic range image sensor.

Description

High dynamic image sensor, pixel unit, electronic information device

technical field

The present invention relates to the field of image sensors, in particular to a high dynamic image sensor and a pixel unit.

Background technique

In different real scenes, there is a very large variation range of light intensity. Especially for surveillance, vehicle and other scenes, the change of light and shade is very common. In order to adapt to different scenarios, the image sensors used in these scenarios need to have a large enough dynamic range to record as much image detail as possible. High Dynamic Range (HDR, High DynamicRange) has different design requirements for sensor pixels under different brightness. At high brightness, recording details requires the pixel's photodiode (PD, Photodiode) to have as large a full-well capacity (FWC, Full-well Capacitance) as possible. At low brightness, the capacitance of the floating diffusion region (FD, Floating Diffusion) needs to be as small as possible to obtain as large a conversion gain as possible, so as to improve the signal-to-noise ratio of the sensor. There is a contradiction in the design of the two. The floating diffusion area that is too small cannot fully read all the electrons of the PD with a large full well capacity under bright light, resulting in an afterimage (Lag) phenomenon. Therefore, some people propose to use two different FWC pixels (pixels) for combined output. Large pixels have high FWC and are suitable for low-light scenes; small pixels have low FWC and are suitable for high-light scenes. Together, a higher dynamic range than the respective single-pixel image is obtained by changing the effective capacitance of the floating diffusion.

Existing variable conversion gain sensors are often designed with dual conversion gain (DCG, Dual Conversion Gain). The design introduces an external capacitor and adds a control switch (usually using a metal-oxide-semiconductor field-effect transistor, or MOSFET, as a switch). When the high exposure signal needs to be read out, the switch is turned on, so that the FD is connected to the capacitor to help extract the charge; when the low signal strength needs to be read out, the switch is turned off, so that the effective capacitance of the floating diffusion area is reduced, so that the Obtain higher conversion gain and improve readout signal-to-noise ratio. Independently rely on the distribution of large and small pixel arrays to output two image data with different exposure levels, and then combine with DCG technology, with high conversion gain (HCG, High Conversion Gain) and low conversion gain (LCG, Low Conversion Gain) in the large and small pixels, respectively. The data is stretched to the appropriate data range. This further increases the brightness separation of the image data and preserves more image details. The algorithm integrates the two images to form a single-frame HDR image.

With the improvement of the image sensor fabrication process, the FWC of the pixel is also gradually increasing, which puts forward higher proportional requirements for the conversion gain. Image sensors with large and small pixels may have dozens of times the difference in electrical signal strength under strong light and dark light. If only the DCG solution is used, the size of the external capacitor must be dozens of times the value of the FD capacitor. This brings great challenges to the circuit design of the image sensor. At the same time, the two gears with huge differences cannot provide the best conversion gain in the entire light intensity range, so that the image details are lost in medium light intensity scenes.

SUMMARY OF THE INVENTION

In view of the problems existing in the prior art, an image sensor with large and small pixels needs to be designed with more conversion gain gears. An aspect of the embodiments of the present invention provides a high dynamic image sensor, including:

reset transistor; source follower transistor; overflow drain;

first photodiode; first transfer transistor; first floating diffusion;

second photodiode; second transfer transistor; second floating diffusion;

the first photodiode and the second photodiode have different full well capacities;

the first photodiode and the second photodiode share one of the overflow drain;

The source follows the source output signal of the transistor.

In some embodiments, the first transfer transistor and the second transfer transistor employ vertical transfer gates.

In some embodiments, the method further includes: at least three transistors and three corresponding capacitors, so as to realize multi-conversion gain.

In some embodiments, the three transistors include a first transistor, a second transistor and a third transistor; a first end of the first transistor is connected to the first floating diffusion region; The second end is connected to the second floating diffusion region and to the first end of the first capacitor; the second end of the first capacitor is grounded;

The first end of the second transistor is connected to the second floating diffusion region; the second end of the second transistor is connected to the first end of the second capacitor; the second end of the second capacitor ground;

The first end of the third transistor is connected to the second end of the second transistor; the second end of the third transistor is connected to the first end of the third capacitor; the second end of the third capacitor terminal grounding;

The first end of the reset transistor is connected to the second end of the third transistor, and the second end of the reset transistor is connected to the power supply.

In some embodiments, for the first floating diffusion region or the second floating diffusion region, gates of the first transistor, the second transistor, the third transistor and the reset transistor are controlled pole, so that the first floating diffusion region or the second floating diffusion region can obtain the first, second, third or fourth conversion gain.

In some embodiments, for the first floating diffusion, keeping the third transistor on and the reset transistor on so that the first transistor provides a reset function for the first floating diffusion, when When the first transistor is turned off, a first conversion gain is obtained; when the first transistor and the second transistor are turned off, and the first transistor is turned on, a second conversion gain is obtained; when the third transistor is turned off , and when the first transistor and the second transistor are turned on, a third conversion gain is obtained; when the first transistor, the second transistor and the third transistor are turned on, a fourth conversion gain is obtained.

In some embodiments, for the second floating diffusion, keeping the reset transistor on, so that the third transistor provides a reset function for the second floating diffusion, when the first transistor is turned off and When the second transistor is turned off, a first conversion gain is obtained; when the second transistor and the third transistor are turned off, and the first transistor is turned on, a second conversion gain is obtained; when the third transistor is turned off, And when the first transistor and the second transistor are turned on, a third conversion gain is obtained; when the first transistor, the second transistor and the third transistor are turned on, a fourth conversion gain is obtained.

Another aspect of the embodiments of the present invention provides a pixel unit of a high dynamic image sensor, including: a reset transistor; a source follower transistor; a first photodiode; a first transfer transistor; a first floating diffusion region; a second photodiode ; second transfer transistor; second floating diffusion region; first transistor, second transistor, third transistor; first capacitor, second capacitor, third capacitor; first active region and second active region; wherein , the first photodiode and the second photodiode are arranged diagonally; the first active region and the second active region are respectively arranged on the first photodiode and the second photodiode The reset transistor, the second transistor and the third transistor are arranged in the first active region; the source follower transistor is arranged in the second active region; the source follower transistor is a fin field effect transistor; the first transistor is arranged between the first photodiode and the second photodiode.

Another aspect of the embodiments of the present invention further provides an electronic information device including the above-mentioned high dynamic image sensor.

Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

The embodiment of the present invention introduces two types of photodiodes PD with different FWCs and a quad conversion gain (QCG, Quad Conversion Gain) design in the pixel design of the high dynamic image sensor. In the case of high exposure, when using a large PD output signal, the transistors corresponding to all capacitors should be turned on to provide the largest effective capacitance and obtain the smallest conversion gain. In the case of low exposure, using a small PD output signal, all capacitive switches should be turned off at this time to provide the smallest effective capacitance and obtain the largest conversion gain. The conversion gain circuit includes three capacitors with different sizes of capacitors in stages, and three transistors as switches of the three capacitors respectively. Different switch configurations are performed on the three switches, and capacitors with different capacitances can be added to the floating diffusion regions FD corresponding to different photodiodes PD to switch the conversion gain among four different gears. This allows the image sensor to have a larger dynamic range.

The embodiment of the present invention is different from the existing 4T pixel structure design, and adopts the 3T pixel structure design and photodiodes with different full well capacities to share one overflow drain, and adds three switching transistors and three corresponding capacitors respectively. Transistors that selectively turn on or off capacitors to achieve multi-level conversion gain high dynamic range image sensors.

Description of drawings

FIG. 1 is a schematic structural diagram of a pixel unit of a multi-conversion gain high dynamic image sensor according to an exemplary embodiment of the present invention;

2 is a graph showing the relationship between pixel signal and readout electron number during readout of an exemplary dual conversion gain image sensor pixel;

3 is a graph showing the relationship between the pixel signal and the number of readout electrons during readout of an exemplary multi-conversion gain high dynamic image sensor pixel according to an embodiment of the present invention;

4 is a schematic diagram of layout design of an exemplary multi-conversion gain high dynamic image sensor pixel unit according to an embodiment of the present invention.

Detailed ways

In order to illustrate the technical solutions of the embodiments of the present invention more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some examples or embodiments of the present invention. For those of ordinary skill in the art, the present invention can also be applied to the present invention according to these drawings without any creative effort. other similar situations. Unless obvious from the locale or otherwise specified, the same reference numbers in the figures represent the same structure or operation.

As used herein and in the claims, unless the context clearly dictates otherwise, the words "a", "an", "an" and/or "the" are not intended to be specific in the singular and may include the plural. Generally speaking, the terms "comprising" and "comprising" only imply that the clearly identified steps and elements are included, and these steps and elements do not constitute an exclusive list, and the method or apparatus may also include other steps or elements.

FIG. 1 is a schematic diagram of a circuit structure of a pixel unit of a multi-conversion gain high dynamic image sensor according to an exemplary embodiment of the present invention.

As shown in FIG. 1 , the high dynamic image sensor pixel unit includes: a reset transistor RST, a source follower transistor SF, an overflow drain (OFD, over flow diffusion, not shown in FIG. 1 ), a first photodiode PD0, a first photodiode PD0, a first transfer transistor TX0; first floating diffusion FD0; second photodiode PD1; second transfer transistor TX1; second floating diffusion FD1, first transistor QCG0 and corresponding capacitor C0, second transistor QCG1 and corresponding capacitor C1, the third transistor QCG2 and the corresponding capacitor C2. The first photodiode PD0 and the second photodiode PD1 have different sensitivities. For example, the light-sensing areas of the first photodiode PD0 and the second photodiode PD1 may be different. The first photodiode PD0 shares an overflow drain with the second photodiode PD1. The overflow drain may be disposed between the first photodiode PD0 and the second photodiode PD1. The source follower transistor SF outputs the signal PXD.

The first end of the first transistor QCG0 is connected to the first floating diffusion region FD0; the second end of the first transistor QCG0 is connected to the second floating diffusion region FD1, and is connected to the first end of the first capacitor C0; the The second end of the first capacitor C0 is grounded.

The first end of the second transistor QCG1 is connected to the second floating diffusion FD1; the second end of the second transistor QCG1 is connected to the first end of the second capacitor C1; the second end of the second capacitor C1 is grounded.

The first end of the third transistor QCG2 is connected to the second end of the second transistor QCG1; the second end of the third transistor QCG2 is connected to the first end of the third capacitor C2; the second end of the third capacitor C2 is grounded.

The first end of the reset transistor RST is connected to the second end of the third transistor QCG2, and the second end of the reset transistor RST is connected to the power supply VDD.

For the first floating diffusion region FD0 or the second floating diffusion region FD1, the gates of the first transistor QCG0, the second transistor QCG1, the third transistor QCG2 and the reset transistor RST are controlled so that the first floating diffusion region FD0 or the second floating diffusion region FD0 or the Two floating diffusion regions FD1 to obtain the first, second, third or fourth conversion gain.

For the first floating diffusion FD0, keep the third transistor QCG2 on and the reset transistor RST on, so that the first transistor QCG0 provides the reset function for the first floating diffusion FD0, and when the first transistor QCG0 is turned off, the first conversion is obtained Gain; when the first transistor QCG0 and the second transistor QCG1 are turned off, and the first transistor QCG0 is turned on, the second conversion gain is obtained; when the third transistor QCG2 is turned off, and the first transistor QCG0 and the second transistor QCG1 are turned on, the second conversion gain is obtained. Three conversion gains; a fourth conversion gain is obtained when the first transistor QCG0, the second transistor QCG1 and the third transistor QCG2 are turned on.

For the second floating diffusion FD1, keep the reset transistor RST on, so that the third transistor QCG2 provides the reset function for the second floating diffusion FD1, and when the first transistor QCG0 and the second transistor QCG1 are turned off, the first conversion gain is obtained ; When the second transistor QCG1 and the third transistor QCG2 are turned off, and the first transistor QCG0 is turned on, the second conversion gain is obtained; when the third transistor QCG2 is turned off, and the first transistor QCG0 and the second transistor QCG1 are turned on, the third Conversion gain; the fourth conversion gain is obtained when the first transistor QCG0, the second transistor QCG1 and the third transistor QCG2 are turned on.

In some embodiments, the first transfer transistor TX0 and the second transfer transistor TX1 employ a vertical transfer gate (VTG).

It should be noted that the embodiment of the present invention is a 3T structure design, and specifically adopts a reset transistor RST, a transfer transistor TX (for example, a first transfer transistor TX0, a second transfer transistor TX1), a source follower transistor SF, and two types of photodiodes PD. For example, the design of the first photodiode PD0 and the second photodiode PD1 sharing one overflow drain, the pixel signal PXD is directly output from the source of the source follower transistor SF. The existing image sensor adopts a 4T structure design, and the pixel signal is output from one end of the row selection transistor SEL. Therefore, the pixel unit of the embodiment of the present invention is different from the existing 4T structure design.

2 is a graph of pixel signal versus readout electron number during readout of an exemplary dual conversion gain image sensor pixel.

3 is a graph showing the relationship between the pixel signal and the number of readout electrons during readout of an exemplary multi-conversion gain high dynamic image sensor pixel according to an embodiment of the present invention.

Figures 2 and 3 show the corresponding readout signal intensity (digital number, DN) distributions in the same readout FWC range using the DCG scheme and using the QCG scheme, respectively.

In Figure 3, when the signal in PD0 or PD1 causes the readout signal to overflow, a lower conversion gain will be used automatically. For a pixel design with a large FWC, in order to cover the entire FWC range, the low-grade conversion gain needs to be set relatively small. Therefore, after entering the Gain 2 range, the rate at which DN increases with the number of electrons will decrease significantly. For example, in Figure 2, when the darkest and brightest light intensity distributions in a certain image correspond to points A and B in the figure, the brightness in the image is only distinguished by (N-M) order. For Figure 3, when using the QCG scheme for readout, a conversion gain switching occurs at points A and B, so the same brightness range, the corresponding brightness level can reach (DNsat-S)+(T-P). To cover the same FWC range, it is assumed that Gain 2 in the DCG scheme is equal to Gain 4 in the QCG scheme. Since the slope of the Gain 3-segment curve in the QCG scheme is obviously higher than that of Gain2 in the DCG scheme, for the same brightness range A~B, the difference in DN value from point A to point C of the gain conversion point in the QCG scheme is obviously larger than that of DCG. Program. Therefore, the image output by the QCG scheme will contain more detailed brightness distinction in the range of medium light intensity, and have more image details.

FIG. 4 is a schematic layout design diagram of a pixel unit of a multi-conversion gain high dynamic image sensor according to an embodiment of the present invention.

The pixel unit of the embodiment of the present invention includes a reset transistor RST, a source follower transistor SF, a first photodiode PD0, a first transfer transistor TX0, a first floating diffusion region FD0, a second photodiode PD1, a second transfer transistor TX1, a first Two floating diffusion regions FD1, first transistor QCG0, second transistor QCG1, third transistor QCG2, first capacitor C0, second capacitor C1, third capacitor C2, first active area AA1 and second active area AA2 .

The first photodiode PD0 and the second photodiode PD1 are arranged diagonally. The first active area AA1 and the second active area AA2 are arranged on both sides of the first photodiode PD0 and the second photodiode PD1, respectively. Specifically, the first active area AA1 is arranged in the upper left corner area of the first photodiode PD0 and the second photodiode PD1; the second active area AA1 is arranged in the lower right corner area of the first photodiode PD0 and the second photodiode PD1 .

The reset transistor RST, the second transistor QCG1 and the third transistor QC2 are arranged in the first active area AA1; the source follower transistor SF is arranged in the second active area AA2; the first transistor QCG0 is arranged in the first photodiode PD0 and the second photodiode between diode PD1.

In some embodiments, the first capacitor C0, the second capacitor C1, or the third capacitor C2 may be an inter-metal capacitance or a metal-insulator-metal (MIM) capacitance.

In some embodiments, the source follower transistor SF may be a Fin Field Effect Transistor (FinFET).

It should be noted that the accompanying drawings are all in simplified form and inaccurate scales, and are only used for the purpose of assisting in explaining some embodiments of the present invention conveniently and clearly.

It will be apparent to those skilled in the art that the present invention is not limited to the details of the above-described exemplary embodiments, but that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in any way as exemplary and not restrictive. Furthermore, it is clear that the word "comprising" does not exclude other elements and steps, and the word "a" does not exclude a plural. The terms first, second, etc. are used to denote names and do not denote any particular order.

Claims (9)

1. a high dynamic range image sensor, is characterized in that, comprises: reset transistor; source follower transistor; overflow drain; first photodiode; first transfer transistor; first floating diffusion; second photodiode; second transfer transistor; second floating diffusion; the first photodiode and the second photodiode have different full well capacities; the first photodiode and the second photodiode share one of the overflow drain; The source follows the source output signal of the transistor. 2. The high dynamic range image sensor of claim 1, wherein the first transfer transistor and the second transfer transistor employ vertical transfer gates. 3. The high dynamic range image sensor of claim 2, further comprising: At least three transistors and three corresponding capacitors are included to realize multi-conversion gain. 4. The high dynamic range image sensor of claim 3, wherein the three transistors comprise a first transistor, a second transistor and a third transistor; The first end of the first transistor is connected to the first floating diffusion region; the second end of the first transistor is connected to the second floating diffusion region, and to the first end of the first capacitor terminal connection; the second terminal of the first capacitor is grounded; The first end of the second transistor is connected to the second floating diffusion region; the second end of the second transistor is connected to the first end of the second capacitor; the second end of the second capacitor ground; The first end of the third transistor is connected to the second end of the second transistor; the second end of the third transistor is connected to the first end of the third capacitor; the second end of the third capacitor terminal grounding; The first end of the reset transistor is connected to the second end of the third transistor, and the second end of the reset transistor is connected to the power supply. 5. The high dynamic range image sensor of claim 4, wherein For the first floating diffusion region or the second floating diffusion region, the gates of the first transistor, the second transistor, the third transistor and the reset transistor are controlled so that the first transistor A floating diffusion region or the second floating diffusion region obtains the first, second, third or fourth conversion gain. 6. The high dynamic range image sensor of claim 5, wherein For the first floating diffusion region, Keep the third transistor turned on and the reset transistor turned on, so that the first transistor provides a reset function for the first floating diffusion region, and when the first transistor is turned off, a first conversion gain is obtained; When the first transistor and the second transistor are turned off, and the first transistor is turned on, a second conversion gain is obtained; When the third transistor is turned off and the first transistor and the second transistor are turned on, a third conversion gain is obtained; A fourth conversion gain is obtained when the first transistor, the second transistor and the third transistor are turned on. 7. The high dynamic range image sensor of claim 5, wherein For the second floating diffusion region, Keeping the reset transistor turned on, so that the third transistor provides a reset function for the second floating diffusion region, and when the first transistor and the second transistor are turned off, a first conversion gain is obtained; When the second transistor and the third transistor are turned off, and the first transistor is turned on, a second conversion gain is obtained; When the third transistor is turned off and the first transistor and the second transistor are turned on, a third conversion gain is obtained; A fourth conversion gain is obtained when the first transistor, the second transistor and the third transistor are turned on. 8. A pixel unit of a high dynamic image sensor according to any one of claims 1 to 7, wherein the pixel unit comprises: the reset transistor; the source follower transistor; the first photodiode; the first transfer transistor; the first floating diffusion; the second photodiode; the second transfer transistor; the second floating diffusion; the first transistor, the second transistor, and the third transistor; the first capacitor, the second capacitor, the third capacitor; a first active region and a second active region; Wherein, the first photodiode and the second photodiode are arranged diagonally; the first active region and the second active region are respectively arranged on both sides of the first photodiode and the second photodiode; the reset transistor, the second transistor and the third transistor are arranged in the first active region; the source follower transistor is arranged in the second active region; the source follower transistor is a fin field effect transistor; The first transistor is arranged between the first photodiode and the second photodiode. 9. An electronic information device, comprising the high dynamic image sensor according to any one of claims 1 to 7.

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