CN115064629B - Micro-LED device based on photoelectric isolation and preparation method thereof - Google Patents
Micro-LED device based on photoelectric isolation and preparation method thereofInfo
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- CN115064629B CN115064629B CN202111248207.7A CN202111248207A CN115064629B CN 115064629 B CN115064629 B CN 115064629B CN 202111248207 A CN202111248207 A CN 202111248207A CN 115064629 B CN115064629 B CN 115064629B
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/84—Coatings, e.g. passivation layers or antireflective coatings
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
- H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
- H10H20/01335—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
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- H—ELECTRICITY
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- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/84—Coatings, e.g. passivation layers or antireflective coatings
- H10H20/841—Reflective coatings, e.g. dielectric Bragg reflectors
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- H—ELECTRICITY
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- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
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- H10H20/034—Manufacture or treatment of coatings
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Abstract
本发明揭示了一种基于光电隔离的Micro‑LED器件及其制备方法，所述Micro‑LED器件包括自下而上依次设置的衬底、N型半导体层、多量子阱层、P型半导体层及电极，所述多量子阱层包括若干分离设置的多量子阱结构，P型半导体层包括若干位于多量子阱结构上的P型半导体结构，所述多量子阱结构上还设有形成于P型半导体结构侧壁上的隔离层，所述隔离层及多量子阱结构的侧壁上设有反射层，所述电极包括与N型半导体层电性连接的N电极及与P型半导体结构电性连接的P电极。本发明中的Micro‑LED器件通过引入隔离层及反射层，可以实现器件的电学隔离及光学隔离，提高了器件的发光效率及显示对比度，降低了光学串扰效应。
The present invention discloses a Micro-LED device based on photoelectric isolation and a method for preparing the same. The Micro-LED device comprises, arranged in order from bottom to top, a substrate, an N-type semiconductor layer, a multi-quantum well layer, a P-type semiconductor layer, and electrodes. The multi-quantum well layer comprises several separately arranged multi-quantum well structures, the P-type semiconductor layer comprises several P-type semiconductor structures located on the multi-quantum well structures, the multi-quantum well structures are further provided with an isolation layer formed on the sidewalls of the P-type semiconductor structures, the isolation layer and the sidewalls of the multi-quantum well structures are provided with a reflective layer, and the electrodes comprise an N-electrode electrically connected to the N-type semiconductor layer and a P-electrode electrically connected to the P-type semiconductor structure. By introducing the isolation layer and the reflective layer, the Micro-LED device of the present invention can achieve electrical and optical isolation of the device, thereby improving the device's luminous efficiency and display contrast and reducing optical crosstalk.
Description
Technical Field
The invention belongs to the technical field of semiconductor display, and particularly relates to a Micro-LED device based on photoelectric isolation and a preparation method thereof.
Background
In the prior art, the preparation method of the Micro-LED device is to obtain the LED Micro-light emitting device with the micron size through a Micro etching process on the basis of a conventional LED, however, in the preparation process of the Micro-LED device, a large number of side wall damages and dangling bonds are formed through the etching process, the damages mean that high-density defect energy levels exist in the edge area of the Micro-LED device, and the dangling bonds correspond to leakage paths of carriers, so that the Micro-LED device is greatly limited to obtain better photoelectric characteristics. In addition, there may be severe optical crosstalk between adjacent Micro-LED devices fabricated using conventional processes, which may seriously affect the Micro-display effect of the devices. For example, the light emission of a single Micro-LED pixel may cause the side wall of an adjacent Micro-LED pixel to reflect light, and when the periphery of the light emitting pixel is required to be black in the Micro-display process to improve the contrast ratio, the display effect is greatly compromised due to the existence of the optical crosstalk problem. Meanwhile, optical crosstalk can also cause the dispersity of light transmission, so that the brightness of a Micro-LED device is greatly reduced, and if the Micro-LED device is applied to the light signal of a traffic indicator lamp, the light signal can be seriously influenced by strong solar rays, so that a driver can make wrong operation to influence safe operation.
In order to improve the brightness and contrast of Micro-LED devices, it is necessary to continuously improve the luminous efficiency thereof and reduce the optical crosstalk between adjacent Micro-LED devices. The traditional etching method is particularly remarkable in damage to the Micro-LED device, and with the reduction of the size of the Micro-LED device, the side wall damage can greatly reduce the electro-optical conversion efficiency of the whole light emitting array, and higher requirements on the device yield and the process reliability are also put forward.
Therefore, in order to solve the above technical problems, it is necessary to provide a Micro-LED device based on photoelectric isolation and a method for manufacturing the same.
Disclosure of Invention
In view of the above, the present invention aims to provide a Micro-LED device based on photoelectric isolation and a method for manufacturing the same.
In order to achieve the above object, an embodiment of the present invention provides the following technical solution:
The Micro-LED device based on photoelectric isolation comprises a substrate, an N-type semiconductor layer, a multiple quantum well layer, a P-type semiconductor layer and an electrode which are sequentially arranged from bottom to top, wherein the multiple quantum well layer comprises a plurality of multiple quantum well structures which are arranged in a separated mode, the P-type semiconductor layer comprises a plurality of P-type semiconductor structures which are arranged on the multiple quantum well structures, an isolation layer which is formed on the side wall of the P-type semiconductor structure is further arranged on the multiple quantum well structures, a reflecting layer is arranged on the isolation layer and the side wall of the multiple quantum well structures, and the electrode comprises an N electrode which is electrically connected with the N-type semiconductor layer and a P electrode which is electrically connected with the P-type semiconductor structure.
In one embodiment, the height of the isolation layer is equal to that of the P-type semiconductor structure, and/or the side wall of the isolation layer is distributed in a level manner with the side wall of the P-type semiconductor structure.
In an embodiment, the reflective layer at least covers the isolation layer and the sidewall of the multiple quantum well structure, and the height of the reflective layer is greater than or equal to the sum of the height of the isolation layer and the height of the multiple quantum well structure.
In one embodiment, the N-type semiconductor layer is formed with an N step, the N electrode is located on the N step, the reflecting layer is further formed on the surface and the side wall of the N step, and the height of the reflecting layer is equal to the sum of the height of the isolation layer, the height of the multiple quantum well structure and the depth of the N step.
In one embodiment, a current diffusion layer is formed on the top surface of the P-type semiconductor structure, and a P-electrode is formed on the current diffusion layer and is electrically connected with the P-type semiconductor structure through the current diffusion layer.
In one embodiment, the current spreading layer is also formed on the top surfaces of the isolation layer and the reflective layer and on the sidewalls of all or part of the reflective layer.
In one embodiment, the substrate is a sapphire substrate, and/or,
The N-type semiconductor layer is an N-type GaN layer, and/or,
The P-type semiconductor layer is a P-type GaN layer, the P-type semiconductor structure is a P-type GaN structure, and/or,
The multiple quantum well layer is an InGaN/GaN multiple quantum well layer, and/or,
The isolation layer is an H + ion isolation layer and/or,
A buffer layer is formed between the substrate and the N-type semiconductor layer.
The technical scheme provided by the other embodiment of the invention is as follows:
a method of fabricating a Micro-LED device based on photo-isolation, the method comprising:
providing a substrate;
sequentially epitaxially growing an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer on a substrate;
carrying out ion implantation on the non-light-emitting area of the P-type semiconductor layer to form a plurality of ion implantation areas;
Etching part of the ion implantation region and the multi-quantum well layer below the ion implantation region to form a plurality of multi-quantum well structures which are arranged separately, and a P-type semiconductor structure and an isolation layer which are positioned on the multi-quantum well structures;
Forming a reflecting layer on the side walls of the isolation layer and the multiple quantum well structure;
A P electrode is formed on the P-type semiconductor structure, and an N electrode is formed on the N-type semiconductor layer.
In one embodiment, the ions implanted in the ion implantation step are H + ions.
In one embodiment, the preparation method further comprises:
forming a current diffusion layer on the top surfaces of the P-type semiconductor structure and the isolation and reflection layers, forming a P-electrode on the current diffusion layer, and/or,
And etching part of the N-type semiconductor layer to form an N step, and forming an N electrode on the N step.
The invention has the following beneficial effects:
According to the Micro-LED device, through the introduction of the isolation layer and the reflection layer, the electrical isolation and the optical isolation of the device can be realized, the luminous efficiency and the display contrast of the device are improved, and the optical crosstalk effect is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings may be obtained according to the drawings without inventive effort to those skilled in the art.
FIG. 1 is a schematic diagram of a Micro-LED device according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart of a method for fabricating a Micro-LED device according to an embodiment of the present invention;
Fig. 3 a-3 f are process flow diagrams of Micro-LED devices according to an embodiment of the present invention.
Detailed Description
In order to make the technical solution of the present invention better understood by those skilled in the art, the technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
The invention discloses a Micro-LED device based on photoelectric isolation, which comprises a substrate, an N-type semiconductor layer, a multiple quantum well layer, a P-type semiconductor layer and an electrode, wherein the substrate, the N-type semiconductor layer, the multiple quantum well layer, the P-type semiconductor layer and the electrode are sequentially arranged from bottom to top, the multiple quantum well layer comprises a plurality of multiple quantum well structures which are arranged in a separated mode, the P-type semiconductor layer comprises a plurality of P-type semiconductor structures which are arranged on the multiple quantum well structures, an isolation layer which is formed on the side wall of the P-type semiconductor structure is further arranged on the multiple quantum well structures, a reflecting layer is arranged on the isolation layer and the side wall of the multiple quantum well structures, and the electrode comprises an N electrode which is electrically connected with the N-type semiconductor layer and a P electrode which is electrically connected with the P-type semiconductor structure.
The invention also discloses a preparation method of the Micro-LED device based on photoelectric isolation, which comprises the following steps:
providing a substrate;
sequentially epitaxially growing an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer on a substrate;
carrying out ion implantation on the non-light-emitting area of the P-type semiconductor layer to form a plurality of ion implantation areas;
Etching part of the ion implantation region and the multi-quantum well layer below the ion implantation region to form a plurality of multi-quantum well structures which are arranged separately, and a P-type semiconductor structure and an isolation layer which are positioned on the multi-quantum well structures;
Forming a reflecting layer on the side walls of the isolation layer and the multiple quantum well structure;
A P electrode is formed on the P-type semiconductor structure, and an N electrode is formed on the N-type semiconductor layer.
The Micro-LED device and the method of manufacturing the same of the present invention are further described below with reference to specific examples.
Referring to fig. 1, the Micro-LED device according to an embodiment of the present invention includes a substrate 10, an N-type semiconductor layer 20, a multiple quantum well layer 30, a P-type semiconductor layer 40, and electrodes sequentially disposed from bottom to top.
Specifically, the multiple quantum well layer 30 includes a plurality of multiple quantum well structures 31 disposed separately, the P-type semiconductor layer 40 includes a plurality of P-type semiconductor structures 41 disposed on the multiple quantum well structures, the multiple quantum well structures 31 are further provided with isolation layers 60 formed on sidewalls of the P-type semiconductor structures, and the isolation layers 60 and sidewalls of the multiple quantum well structures 31 are provided with reflective layers 70. The electrodes include an N electrode 51 electrically connected to the N-type semiconductor layer 20 and a P electrode 52 electrically connected to the P-type semiconductor structure 31.
Preferably, the height of the isolation layer 60 is equal to the height of the P-type semiconductor structure 41 in this embodiment, and the sidewall of the isolation layer 60 is flush with the sidewall of the P-type semiconductor structure 41.
Further, the N-type semiconductor layer 20 in this embodiment is etched to form an N step, and the N electrode 51 is located on the N step. The reflective layer 70 covers the spacer 60 and the sidewall of the multiple quantum well structure 31 and is formed on the surface and the sidewall of the N step, and in the region other than the N step, the height of the reflective layer is equal to the sum of the height of the spacer and the height of the multiple quantum well structure, and in the region of the N step, the height of the reflective layer is equal to the sum of the height of the spacer, the height of the multiple quantum well structure and the depth of the N step.
In addition, a current diffusion layer 80 is formed on the top surface of the P-type semiconductor structure 41, a P-electrode 52 is formed on the current diffusion layer, and the P-electrode 52 is electrically connected with the P-type semiconductor structure 41 through the current diffusion layer 80. Preferably, the current diffusion layer 80 in this embodiment is formed on the top surfaces of the isolation layer and the reflective layer and on the sidewalls of the reflective layer in addition to the top surface of the P-type semiconductor structure 41.
Preferably, the substrate in this embodiment is a sapphire substrate, the N-type semiconductor layer is an N-type GaN layer, the P-type semiconductor layer is a P-type GaN layer, the P-type semiconductor structure is a P-type GaN structure, the multiple quantum well layer is an InGaN/GaN multiple quantum well layer, the isolation layer is an H + ion isolation layer, the current diffusion layer is an ITO current diffusion layer, and the electrode is a Cr/Al/Ti/Au metal electrode.
Preferably, a buffer layer 90 is formed between the substrate and the N-type semiconductor layer in this embodiment, and the buffer layer 90 may be an undoped GaN buffer layer or the like.
Of course, in other embodiments, the materials of the substrate, the N-type semiconductor layer, the P-type semiconductor layer, the multiple quantum well layer, the current diffusion layer, the electrode, and the buffer layer may be other materials in the art. For example, the substrate may be a silicon substrate or a silicon carbide substrate, the P-type semiconductor layer/N-type semiconductor layer may be P-type/N-type doped GaAs, inP, inGaAsP, the current diffusion layer may be an IZO current diffusion layer, etc., and the details are not repeated here.
Referring to fig. 2 in combination with fig. 3a to 3f, the preparation method of the Micro-LED device in this embodiment includes the following steps:
Referring to fig. 3a, a substrate 10 is provided, and a buffer layer 90, an N-type semiconductor layer 20, a multiple quantum well layer 30 and a P-type semiconductor layer 40 are epitaxially grown on the substrate in sequence, wherein the substrate is a sapphire substrate, the buffer layer is an undoped GaN buffer layer, the N-type semiconductor layer is an N-type GaN layer, the P-type semiconductor layer is a P-type GaN layer, and the multiple quantum well layer is an InGaN/GaN multiple quantum well layer.
Referring to fig. 3b, the non-light emitting region of the P-type semiconductor layer 40 is subjected to H + ion implantation to form a plurality of ion implantation regions 401.
The P-type semiconductor layer 40 is implanted with ions through the implantation mask to form a high-resistance P-type isolation region, and the P-type semiconductor layer 40 is isolated by the ion implantation region to form a plurality of P-type semiconductor structures 41.
Referring to fig. 3c, a dry etching process is used to etch a portion of the ion implantation region and the multiple quantum well layer thereunder, thereby forming a plurality of separately disposed multiple quantum well structures 31, and P-type semiconductor structures 41 and isolation layers 60 thereon.
In addition, etching a portion of the N-type semiconductor layer 20 forms an N step 201.
Referring to fig. 3d, a reflective layer 70 is formed on the isolation layer 60 and the sidewalls of the multiple quantum well structure 31, and on a portion of the surface and sidewalls of the N step 201.
The reflecting layer can be prepared by sputtering, vapor plating or electroplating.
Referring to fig. 3e, a current diffusion layer 80, which is an ITO current diffusion layer, is deposited on the P-type semiconductor structure 41 and the top surfaces of the isolation layer 60 and the reflective layer 70, and on the sidewalls of the reflective layer 60.
Referring to fig. 3f, a P electrode is formed on the current diffusion layer 80, and an N electrode is formed on the N step 201.
Preferably, the annealing is also performed for ITO/P-GaN contacts and P/N electrodes in this embodiment.
The Micro-LED device with high energy efficiency and low optical crosstalk can be prepared by the process, and the device can be applied to various terminal display fields such as mobile phones, computers, wearable equipment and the like.
In the embodiment, an ion implantation method is adopted, ions are implanted in a non-light-emitting area to enable the non-light-emitting area to be in a high-resistance state, so that electric isolation of the Micro-LED device is achieved, a side wall structure is introduced into the ion implantation area by a dry etching process, and the optical crosstalk effect of adjacent light-emitting units is reduced by coating a reflecting layer on the side wall, so that the display contrast of the device is improved.
The ion implantation can be an effective method for realizing a Micro-LED device with high light efficiency, the crystal lattice of the semiconductor material can be damaged by implanting high-energy ions into a non-luminous area, the electrical property of the material is obviously reduced, and when the conductivity of the material is reduced to a certain range, the material of the implanted area is close to electrical insulation, so that the material can be used as an electrical isolation area between adjacent luminous units. The Micro-LED device manufactured by ion implantation isolation has the important characteristics of compatibility with the mainstream silicon process, and has remarkable advantages of improving the yield and reducing the cost of the Micro-LED device. The ion implantation is used as a preparation means with high repeatability and planarization, and can be produced in large scale, thereby being beneficial to simplifying the preparation process of Micro-LED devices. It is worth mentioning that ion implantation greatly reduces carrier non-radiative recombination probability, on this basis, through further adjusting device lateral wall light reflection structure, can effectively reduce the influence of optical crosstalk to the display effect.
As can be seen from the technical scheme, the invention has the following advantages:
According to the Micro-LED device, through the introduction of the isolation layer and the reflection layer, the electrical isolation and the optical isolation of the device can be realized, the luminous efficiency and the display contrast of the device are improved, and the optical crosstalk effect is reduced.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present disclosure describes embodiments, not every embodiment is provided with a separate embodiment, and that this description is provided for clarity only, and that the disclosure is not limited to the embodiments described in detail below, and that the embodiments described in the examples may be combined as appropriate to form other embodiments that will be apparent to those skilled in the art.
Claims (9)
1. The preparation method of the Micro-LED device based on photoelectric isolation is characterized by comprising the following steps of:
providing a substrate;
sequentially epitaxially growing an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer on a substrate;
carrying out ion implantation on the non-light-emitting area of the P-type semiconductor layer to form a plurality of ion implantation areas;
Etching part of the ion implantation region and the multi-quantum well layer below the ion implantation region to form a plurality of multi-quantum well structures which are arranged separately, and a P-type semiconductor structure and an isolation layer which are positioned on the multi-quantum well structures;
Forming a reflecting layer on the side walls of the isolation layer and the multiple quantum well structure;
A P electrode is formed on the P-type semiconductor structure, and an N electrode is formed on the N-type semiconductor layer.
2. The method of claim 1, wherein the ions implanted in the ion implantation step are H + ions.
3. The method of manufacturing according to claim 1, characterized in that the method of manufacturing further comprises:
forming a current diffusion layer on the top surface of the P-type semiconductor structure, forming a P-electrode on the current diffusion layer, and/or,
And etching part of the N-type semiconductor layer to form an N step, and forming an N electrode on the N step.
4. The Micro-LED device based on photoelectric isolation, which is prepared by adopting the preparation method in claim 1, is characterized by comprising a substrate, an N-type semiconductor layer, a multiple quantum well layer, a P-type semiconductor layer and an electrode which are sequentially arranged from bottom to top, wherein the multiple quantum well layer comprises a plurality of separated multiple quantum well structures, the P-type semiconductor layer comprises a plurality of P-type semiconductor structures positioned on the multiple quantum well structures, an isolation layer formed on the side wall of the P-type semiconductor structure is further arranged on the multiple quantum well structures, the isolation layer and the side wall of the multiple quantum well structures are provided with reflecting layers, and the electrode comprises an N electrode electrically connected with the N-type semiconductor layer and a P electrode electrically connected with the P-type semiconductor structure.
5. The Micro-LED device based on photoelectric isolation according to claim 4, wherein the height of the isolation layer is equal to the height of the P-type semiconductor structure, and/or the sidewalls of the isolation layer are distributed flush with the sidewalls of the P-type semiconductor structure.
6. The Micro-LED device of claim 4, wherein the reflective layer covers at least the isolation layer and the sidewalls of the multiple quantum well structure, and the height of the reflective layer is greater than or equal to the sum of the height of the isolation layer and the height of the multiple quantum well structure.
7. The Micro-LED device according to claim 6, wherein the N-type semiconductor layer is formed with an N step, the N electrode is located on the N step, the reflective layer is further formed on a surface and a sidewall of the N step, and a height of the reflective layer is equal to a sum of a height of the isolation layer, a height of the multiple quantum well structure, and a depth of the N step.
8. The Micro-LED device of claim 4, wherein the P-type semiconductor structure has a current diffusion layer formed on a top surface thereof, and a P-electrode formed on the current diffusion layer, the P-electrode being electrically connected to the P-type semiconductor structure through the current diffusion layer.
9. The Micro-LED device based on photo-isolation according to claim 4, wherein the substrate is a sapphire substrate, and/or,
The N-type semiconductor layer is an N-type GaN layer, and/or,
The P-type semiconductor layer is a P-type GaN layer, the P-type semiconductor structure is a P-type GaN structure, and/or,
The multiple quantum well layer is an InGaN/GaN multiple quantum well layer, and/or,
The isolation layer is an H + ion isolation layer and/or,
A buffer layer is formed between the substrate and the N-type semiconductor layer.
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| CN211320096U (en) * | 2020-02-27 | 2020-08-21 | 重庆康佳光电技术研究院有限公司 | LED display |
| CN111490061A (en) * | 2020-06-01 | 2020-08-04 | 深圳市奥视微科技有限公司 | Anti-crosstalk Micro-L ED display screen and manufacturing method thereof |
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