CN115078290A - A kind of gas sensor chip suitable for NDIR principle and preparation method thereof - Google Patents

Abstract

The invention provides a gas sensor chip suitable for NDIR principle and a preparation method thereof, wherein a micro convex lens and an NDIR infrared gas sensor chip are integrated in the chip manufacturing process, so that the micro convex lens can well gather the energy of infrared light in the sensitive area of an infrared detection chip, the output of the chip is improved, and the gas detection sensitivity of the whole sensor is improved, and the gas sensor chip is characterized in that: the chip comprises a chip body and a micro convex lens, wherein the chip body and the micro convex lens are fixed together through an optical adhesive, and the arc surface of the micro convex lens is positioned above a black light absorption layer of the chip body.

Description

A kind of gas sensor chip suitable for NDIR principle and preparation method thereof

technical field

The invention relates to the related technical field of gas sensors, in particular to a gas sensor chip suitable for NDIR principle and a preparation method thereof.

Background technique

Gas sensors can be divided into semiconductor sensors, electrochemical gas sensors, NDIR (non-dispersive infrared, non-dispersive infrared) gas sensors, solid electrolyte gas sensors, combustion gas sensors and optical waveguide sensors from the working principle. At present, metal oxide semiconductor sensors and solid electrolyte sensors occupy most of the gas sensor market, but both of them need to work at higher temperatures, and have problems such as high power consumption, low sensitivity, poor anti-interference ability, and inconvenience. NDIR gas sensors have many advantages: high accuracy, good selectivity, not easy to be poisoned, long life, wide range, strong anti-interference ability and so on.

The NDIR gas sensor is based on the Lambert-Beer law of infrared absorption by gas. It uses high-sensitivity infrared detectors, electrically modulated infrared light sources, gas chambers, amplifier circuits, A/D conversion and microprocessors to form cost-effective gas concentrations. Detection Systems. Its basic working process: directly pass the gas to be tested into the gas chamber, when the infrared light emitted by the infrared light source passes through the gas chamber, use an infrared detector to detect the change of light intensity before and after, including when the gas to be tested is not passed through. The intensity of infrared light is detected and the intensity of infrared light is detected when the gas to be tested is passed in, and the concentration of the gas to be tested is determined by calculating the difference between the light intensity before and after.

In order to better detect the light intensity, the high-sensitivity infrared detector generally installs a convex lens on the infrared detection chip to focus the infrared light. In the prior art, the convex lens is only coupled and installed on the infrared detection chip when the NDIR gas sensor is assembled. Due to the deviation in the coupling process, the convex lens cannot well concentrate the energy of the infrared light in the sensitive area of the infrared detection chip, thereby reducing the the gas detection sensitivity of the entire sensor.

SUMMARY OF THE INVENTION

In order to solve the problems mentioned above, the present invention provides a gas sensor chip suitable for the NDIR principle and a preparation method thereof, which integrates the microconvex lens and the NDIR gas sensor chip during the chip manufacturing process, so that the microconvex lens can be The energy of the concentrated infrared light is well concentrated in the sensitive area of the infrared detection chip, which improves the output of the chip, thereby improving the gas detection sensitivity of the entire sensor.

Its technical solution is as follows:

A gas sensor chip suitable for NDIR principle is characterized in that: it comprises a chip body and a micro-convex lens, the chip body and the micro-convex lens are fixed together by an optical adhesive, and the arc surface of the micro-convex lens is located on the black light-absorbing surface of the chip body. above the layer.

Further, the chip body includes a substrate, and a support layer is provided on the upper surface of the substrate;

A thermocouple stack and an electrode PAD are arranged on the support layer; the thermocouple stack includes several thermocouple pairs, and each of the thermocouple pairs sequentially includes a metal aluminum upper layer thermocouple, a silicon oxide layer and a N Type polysilicon lower layer thermocouple, the N-type polysilicon lower layer thermocouple and the metal aluminum upper layer thermocouple of the adjacent thermocouple pair are connected through the cold end connecting through holes close to the cold end, and the metal aluminum upper layer thermocouple in the same thermocouple pair is connected Couple and N-type polysilicon lower layer thermocouples are connected through hot end connection through holes close to the hot end;

The upper surface of the thermocouple stack is provided with a top oxide layer, the upper surface of the top oxide layer is provided with a silicon nitride absorption passivation layer, and the silicon nitride absorption passivation layer and the metal aluminum upper layer thermocouple pass through a thermal couple close to the hot end. Thermal via connection;

The upper surface of the silicon nitride absorption passivation layer is provided with a black light absorption layer at the hot end.

Further, the support layer includes a first silicon oxide support layer, a silicon nitride support layer and a second silicon dioxide support layer in order from bottom to top.

Further, the upper surface of the electrode PAD is exposed.

Further, the surface of the black light-absorbing layer is roughened to form a surface-roughened black light-absorbing layer.

Further, the substrate is provided with a backside release cavity at the hot end, and the four sides of the etched pattern in the backside release cavity are rounded.

The present invention also provides a preparation method of a gas sensor chip suitable for the NDIR principle, which is characterized in that it comprises the following steps:

Step 1, prepare microconvex lens;

Step 2, preparing the chip body;

Step 3, integrating the chip body and the microconvex lens.

Further, the step 1 specifically includes:

Step 1-1, the P-type double-polished silicon wafer is cleaned and thinned;

Step 1-2, spin coating a layer of photoresist with a thickness of 1~50um on the upper surface of the above-mentioned silicon wafer;

Steps 1-3, under the constraints of the circular hole photolithography mask, through exposure and development processes, regularly arranged tiny cylindrical photoresists are formed on the surface of the silicon wafer;

Steps 1-4, invert the above-mentioned silicon wafer, and fix the silicon wafer on the heating plate through the support frame for baking, so that the above-mentioned tiny cylindrical photoresist automatically flows under the action of surface tension to form a circular arc or close to the surface. Microlens structure with arc profile, baking temperature range: 100-250℃, time: 0.5-3h;

Steps 1-5, complete the silicon microlens pattern transfer by reactive ion etching to form a microlens array structure;

Steps 1-6, a microlens array structure with a back cavity is formed on the backside of the silicon wafer through the processes of photolithography and dry etching.

Further, the step 2 specifically includes:

Step 2-1, the P-type double-polished silicon wafer is cleaned and thinned;

Step 2-2, using the above-mentioned silicon wafer as a substrate, perform a thermal oxygen process on the upper surface of the substrate to deposit a first silicon oxide support layer with a thickness of 0.1~5um, and then use the front surface on the upper surface of the first silicon oxide support layer Low pressure chemical vapor deposition of a silicon nitride support layer with a thickness of 0.01~0.5um and a second silicon dioxide support layer with a thickness of 0.01~0.5um;

Step 2-3, using the plasma enhanced chemical vapor deposition process to sputter a layer of polysilicon with a thickness of 0.1~5um on the upper surface of the second silicon dioxide support layer, and then using ion implantation and diffusion to dope to form an N-type polysilicon semiconductor , and then photolithographically patterned to form an N-type polysilicon lower thermocouple; then a silicon oxide layer with a thickness of 0.05~0.5um was made on the upper surface of the N-type polysilicon lower thermocouple, and finally photolithography was performed to form cold-side connection through holes and thermal terminal connection through hole;

Step 2-4, perform metal magnetron sputtering on the upper surface of the silicon oxide layer to deposit a layer of aluminum with a thickness of 0.01~10um, perform photolithography patterning to form a metal aluminum upper layer thermocouple, and conduct electrical connection at the same time to form a connecting wire structure and Electrode PAD, metal aluminum upper thermocouple and N-type polysilicon lower thermocouple are connected by hot side connection vias near the hot side, N-type polysilicon lower thermocouple and metal aluminum upper thermocouple of adjacent thermocouple pairs are connected by cold side near the cold side. The terminal is connected to the through hole connection; then a layer of silicon oxide with a thickness of 0.01~10um is deposited by plasma enhanced chemical vapor deposition as the top oxide layer; then the top oxide layer is photoetched at the hot end to the upper metal aluminum thermocouple, Form thermal conduction vias at the hot end;

Step 2-5, perform plasma enhanced chemical vapor deposition on the top to deposit a silicon nitride absorption passivation layer with a thickness of 0.01~10um, and cover the thermal conduction through holes, so that the silicon nitride absorption passivation layer on the top and the heat The ends are connected to form a thermal conduction layer; then spin coating on the upper surface of the silicon nitride absorption passivation layer to form a black photoresist light absorption layer with a thickness of 0.5-3um, and use photolithography patterning to absorb the black photoresist light. The layer is etched to form a black light-absorbing layer only on the hot end; the electrode PAD is exposed;

Step 2-6, use reactive ion etching to roughen the black light absorbing layer to form a surface roughened black light absorbing layer, and finally use deep silicon etching to perform back cavity etching on the substrate to form a back surface at the center hot end of the chip body Release cavity, the back side of the release cavity is etched and rounded on the four sides of the pattern.

Further, the step 3 specifically includes:

Step 3-1. Perform ultra-precision polishing on the cemented surface of the micro-convex lens and the chip body. The cemented surface of the micro-convex lens is the opposite side of the lens surface, and the cemented surface of the chip body is the heat-sensitive surface;

Step 3-2, perform constant temperature treatment on the microconvex lens and the chip body;

Step 3-3, clean the micro-convex lens and the chip body;

Step 3-4, combine the microconvex lens and the chip body by optical adhesive, and then coat a thin layer of photosensitive adhesive on the outside of the contact edge of the adhesive surface.

The beneficial effects of the present invention are:

1. The present invention realizes the system chip-level integration by integrating the micro-convex lens and the NDIR gas sensor chip in the chip manufacturing process, overcomes the deviation caused by the coupling in the device assembly stage, and enables the micro-convex lens to converge well The energy of the infrared light is in the sensitive area of the infrared detection chip, which improves the output of the chip, thereby improving the gas detection sensitivity of the entire sensor.

2. The present invention directly connects the silicon nitride absorption passivation layer with the upper metal aluminum thermocouple by setting a thermal conduction through hole near the hot end to form a thermal conduction layer, which increases the chip's effect on infrared light radiation energy. Absorption improves the output performance of the chip and further improves the gas detection sensitivity of the entire sensor.

3. The present invention further improves the absorption of infrared radiation energy by the chip, improves the output performance of the chip, and improves the gas detection of the entire sensor by arranging a black light-absorbing layer on the top of the chip body and the position of the hot end and roughening it. sensitivity.

4. The present invention can effectively prevent the bottom support layer from wrinkling, avoid damage to internal sensitive components, and improve product quality by performing rounding treatment on the four sides of the etching pattern in the back release cavity.

Description of drawings

1 is a schematic cross-sectional view of the overall structure of the present invention;

FIG. 2 is a schematic cross-sectional view of the product structure after steps 1-2 of the preparation method of the present invention are completed;

FIG. 3 is a schematic cross-sectional view of the product structure after steps 1-3 of the preparation method of the present invention are completed;

Figure 4 is a schematic cross-sectional view of the product structure after steps 1-4 of the preparation method of the present invention are completed;

Figure 5 is a schematic cross-sectional view of the product structure after steps 1-5 of the preparation method of the present invention are completed;

Figure 6 is a schematic cross-sectional view of the product structure after steps 1-6 of the preparation method of the present invention are completed;

FIG. 7 is a schematic cross-sectional view of the product structure after step 2-2 of the preparation method of the present invention is completed;

FIG. 8 is a schematic cross-sectional view of the product structure after steps 2-3 of the preparation method of the present invention are completed;

Figure 9 is a schematic cross-sectional view of the product structure after steps 2-4 of the preparation method of the present invention are completed;

10 is a schematic cross-sectional view of the product structure after steps 2-5 of the preparation method of the present invention are completed;

11 is a schematic cross-sectional view of the product structure after steps 2-6 of the preparation method of the present invention are completed;

12 is a schematic diagram of the infrared light incident effect of the product of the present invention;

13 is a schematic top view of the chip body in the present invention;

14 is a schematic structural diagram of one end of the middle and lower layer thermocouples of the present invention;

FIG. 15 is a schematic structural diagram of one end of the upper-layer thermocouple in the present invention.

Detailed ways

The present invention will be further described below in conjunction with the embodiments.

The following examples are used to illustrate the present invention, but cannot be used to limit the protection scope of the present invention. Conditions in the examples can be further adjusted according to specific conditions, and simple improvements to the method of the present invention under the premise of the concept of the present invention all belong to the scope of protection of the present invention.

As shown in FIG. 1, a gas sensor chip suitable for NDIR principle includes a chip body 2 and a micro-convex lens 1. The chip body 2 and the micro-convex lens 1 are fixed together by an optical adhesive 3. The circular shape of the micro-convex lens 1 is The arc surface 11 is located above the black light absorbing layer 21 of the chip body 2 .

The chip body 2 includes a substrate 22 , and a support layer 231 is provided on the upper surface of the substrate 22 . The support layer 231 includes a first silicon oxide support layer 23 , a silicon nitride support layer 24 and a second silicon dioxide support layer 25 in order from bottom to top.

As shown in FIG. 13 , a thermocouple stack 272 and an electrode PAD 26 are disposed on the support layer 231 ; the thermocouple stack 272 includes several thermocouple pairs 271 . As shown in FIG. 1 , each of the thermocouple pairs 271 includes a metal aluminum upper thermocouple 27 , a silicon oxide layer 28 and an N-type polysilicon lower thermocouple 29 in sequence from top to bottom. 1, 13, 14 and 15, the N-type polysilicon lower-layer thermocouple 29 and the metal aluminum upper-layer thermocouple 27 of the adjacent thermocouple pair are connected through the cold end connecting through hole 210 close to the cold end, In the same thermocouple pair 271, the metal aluminum upper layer thermocouple 27 and the N-type polysilicon lower layer thermocouple 29 are connected through the hot end connecting through hole 211 close to the hot end. The cold end is the end of the thermocouple pair 271 away from the center of the chip body 2 , and the hot end is the end of the thermocouple pair 271 close to the center of the chip body 2 .

As shown in FIG. 1 , a top oxide layer 212 is provided on the upper surface of the thermocouple stack, and a silicon nitride absorption passivation layer 213 is provided on the upper surface of the top oxide layer 212 , and the silicon nitride absorption passivation layer 213 It is connected with the metal aluminum upper layer thermocouple 27 through the thermal conduction through hole 214 near the hot end.

The upper surface of the silicon nitride absorption passivation layer 213 is provided with a black light absorption layer 21 at the hot end.

The upper surface of the electrode PAD26 is exposed.

The surface of the black light-absorbing layer 21 is roughened to form a surface-roughened black light-absorbing layer 216 .

The substrate 22 is provided with a backside release cavity 215 at the hot end, and the backside release cavity 215 performs rounding processing on the four sides of the etched pattern. The rear relief cavity 215 and rounded corners 217 are shown in FIG. 13 .

The present invention also provides a preparation method of a gas sensor chip suitable for the NDIR principle, comprising the following steps:

Step 1, prepare microconvex lens 1;

Step 2, preparing the chip body 2;

Step 3, integrating the chip body 2 and the microconvex lens 1 .

Further, the step 1 specifically includes:

Step 1-1. As shown in Figure 2, the P-type double-polished silicon wafer is cleaned and thinned to a thickness of 150-250um; Put it into acetone, absolute ethanol, the first mixed solution, and deionized water for ultrasonic cleaning, respectively, ultrasonically treat it for 10-60 minutes, and finally put the silicon wafer 12 on a hot plate and heat it at 100 ° C for half an hour for cleaning treatment. The first mixed solution is formed by mixing the concentrated sulfuric acid with a mass concentration of 1.84g/ml and hydrogen peroxide with a mass concentration of 1.1g/ml according to a volume ratio of 3:1;

Step 1-2, as shown in FIG. 2, spin-coating a layer of photoresist 13 with a thickness of 1-50um on the upper surface of the silicon wafer 12;

Steps 1-3, as shown in FIG. 3, under the constraint of the circular hole photolithography mask 14, through the exposure and development process, regularly arranged tiny cylindrical photoresist 15 is formed on the surface of the silicon wafer 12;

Steps 1-4, as shown in FIG. 4, the above-mentioned silicon wafer 12 is turned upside down, and the silicon wafer 12 is fixed on the heating plate 17 by the support frame 16 for baking. The adhesion of the cylindrical photoresist 15 (the tiny cylindrical photoresist 15, as shown in FIG. 3) is maintained within a certain range, so that the above-mentioned tiny cylindrical photoresist 15 is automatically hot-melted under the action of surface tension Flow to form a microlens structure 151 with an arc or near-arc profile, the baking temperature range: 100-250°C, time: 0.5-3h; during the hot-melting process, if the temperature is too low, the "resistance" of the photoresist is not reached. If the temperature is too high, the photoresist will be easily decomposed, carbonized or contain air bubbles; because the viscosity of the photoresist increases with the temperature The temperature is slightly higher than the glass transition temperature during reflow, which is beneficial to the full reflow of the photoresist pattern.

Steps 1-5, as shown in FIG. 5, complete the transfer of the silicon microlens pattern by reactive ion etching to form the microlens array structure 18; this step is carried out under the unreacted mixed gas _SF6 and _O2 , and the reactive ion dry method The etching machine is set with a pressure of 100-300mtor and a power of 50-150W and a flow rate of _SF6 of 100-200sccm/min and a flow of _O2 of 10-100sccm/min;

Steps 1-6, as shown in FIG. 6 , the backside of the silicon wafer 12 is formed with a back cavity microlens array structure 19 after photolithography and dry etching.

Further, the step 2 specifically includes:

In step 2-1, the P-type double-polished silicon wafer is cleaned and thinned to a thickness of 300-500um; the cleaning treatment is in accordance with the cleaning process standard of the wafer foundry, which is the same as in the above step 1-1;

Step 2-2, as shown in FIG. 7, the silicon wafer in step 2-1 is used as the substrate 22, and a thermal oxygen process is performed on the upper surface of the substrate to deposit a first silicon oxide support layer 23 with a thickness of 0.1~5um, Then, on the upper surface of the first silicon oxide support layer 23, a layer of silicon nitride support layer 24 with a thickness of 0.01~0.5um and a second silicon dioxide support layer 25 with a thickness of 0.01~0.5um are deposited by front low pressure chemical vapor deposition; By reversing the stress of silicon nitride and silicon oxide, three support layers are prepared to improve the stress of the support film;

Step 2-3, as shown in FIG. 8, a layer of polysilicon with a thickness of 0.1-5um is sputtered on the upper surface of the second silicon dioxide support layer 25 by using a plasma enhanced chemical vapor deposition process, and then ion implantation and diffusion are used. Doping to form N-type polysilicon semiconductor (here polysilicon and N-type polysilicon semiconductor are the structures in the preparation process, not marked in FIG. 8 ), and then photolithographically patterned to form an N-type polysilicon lower thermocouple 29; A layer of silicon oxide layer 28 with a thickness of 0.05~0.5um is formed on the upper surface of the polysilicon lower thermocouple 29, and finally photolithography is performed to form the cold end connecting through holes 210 and the hot end connecting through holes 211 respectively;

Step 2-4, as shown in FIG. 9 , perform metal magnetron sputtering on the upper surface of the silicon oxide layer 28 to deposit a layer of aluminum with a thickness of 0.01-10um (here aluminum is the structure in the preparation process, not shown in FIG. 9 ). mark), photolithography patterning is performed to form a metal aluminum upper layer thermocouple 27, and at the same time, an electrical connection is performed to form a connecting wire structure and an electrode PAD26. The wire structure is as follows: as shown in FIG. 1 , FIG. 9 , FIG. 13 , FIG. 14 and FIG. 15 , the metal aluminum upper layer thermocouple 27 and the N-type polysilicon lower layer thermocouple 29 are connected through the hot end connection through hole 211 close to the hot end. , the N-type polysilicon lower layer thermocouple 29 and the metal aluminum upper layer thermocouple 27 of the adjacent thermocouple pair are connected through the cold end connecting through hole 210 close to the cold end; then a plasma enhanced chemical vapor deposition method is performed to deposit a layer thickness of 0.01~ 10um of silicon oxide is used as the top oxide layer 212; then the top oxide layer 212 is photoetched at the hot end to the upper metal aluminum thermocouple 27, and a thermal conduction through hole 214 is formed at the hot end;

Step 2-5, as shown in FIG. 10, perform plasma enhanced chemical vapor deposition on the top oxide layer 212 to deposit a silicon nitride absorption passivation layer 213 with a thickness of 0.01-10um, and cover the thermal conduction via 214, so that The silicon nitride absorption passivation layer 213 on the top is connected with the hot end to form a thermal conduction layer, which increases the absorption of infrared light radiation energy by the chip and improves the output performance of the chip; Perform spin coating to form a black photoresist light-absorbing layer with a thickness of 0.5-3um (here the black photoresist light-absorbing layer is the structure in the preparation process, not marked in Figure 10), and use photolithography to pattern the black light. The photoresist light-absorbing layer is etched to form a black light-absorbing layer 21 only on the hot end, so that the heat is concentrated and evenly distributed in the hot end part; the electrode PAD26 is exposed, which is convenient for packaging and wiring;

Step 2-6, as shown in FIG. 11 , the black light-absorbing layer 21 is roughened by reactive ion etching to form a surface-roughened black light-absorbing layer 216 to improve the surface absorptivity, and finally the substrate 22 is processed by deep silicon etching. In the back cavity etching, a back release cavity 215 is formed at the center hot end of the chip body 2. The back release cavity 215 etches the four sides of the pattern and rounds the corners, which can effectively prevent the bottom support layer from wrinkling and prevent the bottom from damaging the internal sensitive components.

Further, the step 3 specifically includes:

Step 3-1. Perform ultra-precision polishing on the cemented surface of the micro-convex lens 1 and the chip body 2. The cemented surface of the micro-convex lens 1 is the opposite side of the lens surface, and the cemented surface of the chip body 2 is the heat-sensitive surface;

Step 3-2, perform constant temperature treatment on the micro-convex lens 1 and the chip body 2; place the micro-convex lens 1 and the chip body 2 in an environment of 50-100°C, and keep the temperature constant for about 3 hours, so that the device temperature is uniform, which is conducive to the firmness of the optical glue;

Step 3-3, clean the microconvex lens 1 and the chip body 2; use a soft material in the same environment to clean the glossy rubber surface, and cover it with a dust-free glass cover after cleaning;

Step 3-4. As shown in Figure 1, by applying a certain pressure on the microconvex lens 1 and the chip body 2, the microconvex lens 1 and the chip body 2 are combined by the optical adhesive 3, and then coated on the outside of the contact edge of the adhesive surface A thin layer of photosensitive adhesive (here photosensitive adhesive is not indicated in Figure 1) to strengthen the photosensitive adhesive effect.

As shown in FIG. 12, the present invention realizes the system chip level integration by integrating the microconvex lens and the NDIR infrared gas sensor chip in the chip manufacturing process, so that the energy of the infrared light 4 emitted by the infrared light source is concentrated on the hot end as much as possible , the micro-convex lens can well gather the energy of the infrared light 4 in the sensitive area of the infrared detection chip, improve the output of the chip, and further improve the gas detection sensitivity of the entire sensor.

Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, and substitutions can be made in these embodiments without departing from the principle and spirit of the invention and modifications, the scope of the present invention is defined by the appended claims and their equivalents.

Claims (10)

1. A gas sensor chip adapted to NDIR principle, characterized by: the chip comprises a chip body and a micro convex lens, wherein the chip body and the micro convex lens are fixed together through an optical adhesive, and the arc surface of the micro convex lens is positioned above a black light absorption layer of the chip body.

2. A gas sensor chip adapted to NDIR principles according to claim 1, wherein: the chip body comprises a substrate, and a supporting layer is arranged on the upper surface of the substrate;

the support layer is provided with a thermocouple stack and an electrode PAD; the thermocouple stack comprises a plurality of thermocouple pairs, each thermocouple pair sequentially comprises an upper metal aluminum thermocouple, a silicon oxide layer and a lower N-type polycrystalline silicon thermocouple from top to bottom, the lower N-type polycrystalline silicon thermocouple and the upper metal aluminum thermocouple of the adjacent thermocouple pair are connected through a cold end connecting through hole close to a cold end, and the upper metal aluminum thermocouple and the lower N-type polycrystalline silicon thermocouple of the same thermocouple pair are connected through a hot end connecting through hole close to a hot end;

the upper surface of the thermocouple stack is provided with a top oxidation layer, the upper surface of the top oxidation layer is provided with a silicon nitride absorption passivation layer, and the silicon nitride absorption passivation layer is connected with the metal aluminum upper thermocouple through a heat conduction through hole close to the hot end;

and a black light absorption layer is arranged on the upper surface of the silicon nitride absorption passivation layer at the hot end.

3. A gas sensor chip adapted to NDIR principles according to claim 2, wherein: the supporting layer sequentially comprises a first silicon oxide supporting layer, a silicon nitride supporting layer and a second silicon oxide supporting layer from bottom to top.

4. A gas sensor chip adapted to NDIR principles according to claim 2, wherein: the upper surface of the electrode PAD is uncovered.

5. A gas sensor chip adapted to NDIR principles according to claim 2, wherein: the surface of the black light absorbing layer is roughened to form a roughened surface black light absorbing layer.

6. A gas sensor chip adapted to NDIR principles according to claim 2, wherein: the substrate is provided with a back surface release cavity at the hot end, and four sides of an etched graph of the back surface release cavity are subjected to fillet treatment.

7. A method of manufacturing a gas sensor chip adapted to the NDIR principle according to any one of claims 1 to 6, characterised in that: comprises the following steps of (a) carrying out,

step 1, preparing a micro convex lens;

step 2, preparing a chip body;

and step 3, integrating the chip body and the micro convex lens.

8. A method of manufacturing a gas sensor chip adapted to the NDIR principle according to claim 7, characterised in that: the step 1 specifically comprises:

step 1-1, cleaning a P-type double polished silicon wafer, and thinning the P-type double polished silicon wafer;

step 1-2, spin-coating a layer of photoresist on the upper surface of the silicon wafer;

step 1-3, forming a tiny cylindrical photoresist on the surface of a silicon wafer through exposure and development processes under the constraint of a circular hole photoetching mask plate;

step 1-4, inverting the silicon wafer, fixing the silicon wafer above a heating plate through a support frame, and baking to enable the micro cylindrical photoresist to automatically melt and flow under the action of surface tension to form a micro lens structure with an arc or a nearly arc outline;

1-5, completing pattern transfer of the silicon micro-lens by reactive ion etching to form a micro-lens array structure;

and 1-6, forming a micro-lens array structure with a back cavity on the back of the silicon wafer through photoetching and dry etching processes.

9. A method of manufacturing a gas sensor chip adapted to the NDIR principle according to claim 7, characterised in that: the step 2 specifically comprises:

2-1, cleaning the P-type double polished silicon wafer, and thinning;

2-2, taking the silicon wafer as a substrate, depositing a first silicon oxide supporting layer on the upper surface of the substrate, and depositing a silicon nitride supporting layer and a second silicon oxide supporting layer on the upper surface of the first silicon oxide supporting layer;

step 2-3, sputtering a layer of polycrystalline silicon on the upper surface of the second silicon dioxide supporting layer, doping to form an N-type polycrystalline silicon semiconductor, and performing photoetching and patterning to form an N-type polycrystalline silicon lower-layer thermocouple; manufacturing a silicon oxide layer on the upper surface of the lower thermocouple of the N-type polycrystalline silicon, and finally photoetching to form a cold end connecting through hole and a hot end connecting through hole respectively;

step 2-4, sputtering and depositing a layer of aluminum on the upper surface of the silicon oxide layer, carrying out photoetching and patterning to form a metal aluminum upper-layer thermocouple, and simultaneously carrying out electric connection to form a connecting lead structure and an electrode PAD, wherein the metal aluminum upper-layer thermocouple and the N-type polycrystalline silicon lower-layer thermocouple are connected through a hot end connecting through hole close to a hot end, and the N-type polycrystalline silicon lower-layer thermocouple and the metal aluminum upper-layer thermocouple of the adjacent thermocouple pair are connected through a cold end connecting through hole close to a cold end; depositing a layer of silicon oxide as a top oxide layer; then, photoetching the top oxide layer at the hot end until the thermocouple on the upper layer of the metal aluminum is formed, and forming a heat conduction through hole;

2-5, depositing a silicon nitride absorption passivation layer on the top, covering the thermal conduction through hole, and communicating the silicon nitride absorption passivation layer on the top with the hot end to form a thermal conduction layer; spin coating the upper surface of the silicon nitride absorption passivation layer to form a black photoresist light absorption layer, and etching the black photoresist light absorption layer by utilizing photoetching patterning to only form the black light absorption layer in a hot end distribution manner; leaking the electrode PAD;

and 2-6, roughening the black light absorption layer to form a roughened black light absorption layer on the surface, finally, carrying out back cavity etching on the substrate, forming a back release cavity at the position of the central hot end of the chip body, and carrying out fillet treatment on four sides of an etched pattern of the back release cavity.

10. A method of manufacturing a gas sensor chip adapted to NDIR principles according to claim 7, characterised in that: the step 3 specifically includes:

step 3-1, ultra-precision polishing is carried out on the bonding surfaces of the micro convex lens and the chip body, wherein the bonding surface of the micro convex lens is the reverse surface relative to the lens surface, and the bonding surface of the chip body is a heat-sensitive surface;

step 3-2, carrying out constant temperature treatment on the micro convex lens and the chip body;

step 3-3, cleaning the micro convex lens and the chip body;

and 3-4, combining the micro convex lens and the chip body through an optical adhesive, and then coating a thin layer of photosensitive adhesive on the outer side of the contact edge of the bonding surface.

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