CN115172551A - Epitaxial wafer and manufacturing method thereof - Google Patents
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Abstract
本申请公开了一种外延片和外延片制造方法,该外延片包括生长准备层、生长于生长准备层上的量子垒层以及生长于量子垒层上的量子阱层,量子阱层和生长准备层的晶格常数满足(a‑c)/c大于1.3%,量子垒层的厚度设置成使得量子垒层和量子阱层的平均应力表征系数的范围介于(‑0.00216)‑(‑0.00732),其中a为量子阱层的晶格常数,c为生长准备层的晶格常数。本申请通过设置量子垒层的厚度,以使量子垒层和量子阱层的平均应力表征系数在预设范围内,具体介于(‑0.00216)‑(‑0.00732),以解决长波长LED的量子阱层和生长准备层存在严重的晶格失配,而导致In析出和相分离的问题。
The present application discloses an epitaxial wafer and a method for manufacturing the epitaxial wafer. The epitaxial wafer includes a growth preparation layer, a quantum barrier layer grown on the growth preparation layer, and a quantum well layer grown on the quantum barrier layer, the quantum well layer and the growth preparation layer. The lattice constant of the layer satisfies (a-c)/c is greater than 1.3%, and the thickness of the quantum barrier layer is set so that the average stress characterization coefficient of the quantum barrier layer and the quantum well layer ranges from (‑0.00216)‑(‑0.00732) , where a is the lattice constant of the quantum well layer, and c is the lattice constant of the growth preparation layer. In this application, the thickness of the quantum barrier layer is set so that the average stress characterization coefficient of the quantum barrier layer and the quantum well layer is within a preset range, specifically between (‑0.00216)‑(‑0.00732), to solve the quantum problem of long-wavelength LEDs There is a serious lattice mismatch between the well layer and the growth preparation layer, which leads to the problems of In precipitation and phase separation.
Description
技术领域technical field
本申请涉及半导体外延生长制造器件技术领域,特别是涉及一种外延片和外延片制造方法。The present application relates to the technical field of semiconductor epitaxial growth and fabrication of devices, and in particular, to an epitaxial wafer and an epitaxial wafer fabrication method.
背景技术Background technique
目前,GaN基LED(Light Emitting Diode,发光二极管)已经大量应用于固态照明领域以及显示领域,相比于已经实现商业化应用的蓝光GaN基LED,发光波长更长的GaN基LED的发光效率会快速地下降,且随着波长增加,下降更加明显,这大大限制了Mini和MicroLED的进一步发展。具体地,LED有源区的MQW(multiple quantum well)层为两种不同的半导体材料薄层交替生长形成的多层结构,其中一种半导体材料薄层为量子阱层,另一种半导体材料薄层为量子垒层。现有MQW层中的量子阱层由InGaN制成,量子垒层通常由不掺杂的GaN制成。其中,对于长波长的LED来说,高In组分含量使得MQW层与生长外延片的衬底之间存在严重的晶格失配,造成相分离及In析出的问题,致使晶体质量下降,非辐射复合效率大幅增加,影响发光效率。At present, GaN-based LEDs (Light Emitting Diodes, light-emitting diodes) have been widely used in the field of solid-state lighting and display. Compared with the blue GaN-based LEDs that have been commercialized, the luminous efficiency of GaN-based LEDs with longer emission wavelengths will be higher. It drops rapidly and becomes more pronounced as the wavelength increases, which greatly limits the further development of Mini and MicroLED. Specifically, the MQW (multiple quantum well) layer of the LED active region is a multi-layer structure formed by alternate growth of two different semiconductor material thin layers, one of which is a quantum well layer, and the other semiconductor material thin layer. layer is a quantum barrier layer. The quantum well layers in existing MQW layers are made of InGaN, and the quantum barrier layers are usually made of undoped GaN. Among them, for long-wavelength LEDs, the high In composition content causes a serious lattice mismatch between the MQW layer and the substrate on which the epitaxial wafer is grown, resulting in phase separation and In precipitation problems, resulting in a decrease in crystal quality and a The radiative recombination efficiency is greatly increased, which affects the luminous efficiency.
发明内容SUMMARY OF THE INVENTION
本申请至少提供一种外延片和外延片制造方法,以解决现有技术钟长波长LED的量子阱层和生长准备层存在严重的晶格失配,而导致In析出和相分离的问题。The present application provides at least an epitaxial wafer and an epitaxial wafer manufacturing method to solve the problem of In precipitation and phase separation caused by serious lattice mismatch between the quantum well layer and the growth preparation layer of the long-wavelength LED in the prior art.
本申请第一方面提供一种外延片,该外延片包括生长准备层、生长于生长准备层上的量子垒层以及生长于量子垒层上的量子阱层,量子阱层和生长准备层的晶格常数满足(a-c)/c大于1.3%,量子阱层和量子垒层的厚度设置成使得量子垒层和量子阱层的平均应力表征系数的范围介于(-0.00216)-(-0.00732),其中a为量子阱层的晶格常数,c为生长准备层的晶格常数。A first aspect of the present application provides an epitaxial wafer, the epitaxial wafer includes a growth preparation layer, a quantum barrier layer grown on the growth preparation layer, and a quantum well layer grown on the quantum barrier layer, a crystal of the quantum well layer and the growth preparation layer. The lattice constant satisfies that (a-c)/c is greater than 1.3%, the thicknesses of the quantum well layer and the quantum barrier layer are set so that the average stress characterizing coefficient of the quantum barrier layer and the quantum well layer ranges from (-0.00216)-(-0.00732), where a is the lattice constant of the quantum well layer, and c is the lattice constant of the growth preparation layer.
可选地,(a-c)/c进一步大于2.8%。Optionally, (a-c)/c is further greater than 2.8%.
可选地,量子垒层和生长准备层的晶格常数满足(b-c)/c大于0.01%。Optionally, the lattice constants of the quantum barrier layer and the growth preparation layer satisfy (b-c)/c greater than 0.01%.
可选地,量子阱层为InGaN材料或者InGaAlN材料,其中量子阱层中的In组分的摩尔百分比含量不小于20%,量子垒层的厚度不小于10nm。Optionally, the quantum well layer is an InGaN material or an InGaAlN material, wherein the molar percentage content of the In component in the quantum well layer is not less than 20%, and the thickness of the quantum barrier layer is not less than 10 nm.
可选地,量子阱层为InGaN材料或者InGaAlN材料,其中量子阱层中的In组分的摩尔百分比含量不小于32%,量子垒层的厚度不小于20nm。Optionally, the quantum well layer is an InGaN material or an InGaAlN material, wherein the molar percentage content of the In component in the quantum well layer is not less than 32%, and the thickness of the quantum barrier layer is not less than 20 nm.
可选地,量子垒层为GaN材料或InGaAlN材料。Optionally, the quantum barrier layer is a GaN material or an InGaAlN material.
可选地,生长准备层为GaN材料或InGaAlN材料。Optionally, the growth preparation layer is GaN material or InGaAlN material.
可选地,外延片包括多个量子垒层和多个量子阱层,交替层叠的量子阱层及量子垒层的周期数为2-1000周期。Optionally, the epitaxial wafer includes a plurality of quantum barrier layers and a plurality of quantum well layers, and the number of cycles of the alternately stacked quantum well layers and quantum barrier layers is 2-1000 cycles.
本申请第二方面提供一种外延片制造方法,该外延片制造方法包括:A second aspect of the present application provides a method for manufacturing an epitaxial wafer, and the method for manufacturing an epitaxial wafer includes:
获取预设平均应力表征系数;Obtain the preset mean stress characterization coefficient;
获取外延片的预设参数,预测参数包括生成准备层的晶格常数、量子垒层的晶格常数,以及量子阱层的晶格常数和厚度;Acquire the preset parameters of the epitaxial wafer, and the predicted parameters include the lattice constant of the preparation layer, the lattice constant of the quantum barrier layer, and the lattice constant and thickness of the quantum well layer;
基于预设平均应力表征系数和预设参数计算量子垒层的厚度;Calculate the thickness of the quantum barrier layer based on the preset average stress characterization coefficient and preset parameters;
基于量子垒层的厚度制造外延片。Epitaxial wafers are fabricated based on the thickness of the quantum barrier layer.
可选地,基于预设平均应力表征系数和预设参数计算量子垒层的厚度的具体计算公式为:Optionally, the specific calculation formula for calculating the thickness of the quantum barrier layer based on the preset average stress characterization coefficient and preset parameters is:
Sc={[(c-b)/c]×Lb+[(c-a)/c]×La}/(Lb+La);Sc={[(c-b)/c]×Lb+[(c-a)/c]×La}/(Lb+La);
其中,Sc为预设平均应力表征系数,a为量子阱层的晶格常数,b为量子垒层的晶格常数,c为生长准备层的晶格常数,La为量子阱层的厚度,Lb为量子垒层的厚度。where Sc is the preset average stress characterization coefficient, a is the lattice constant of the quantum well layer, b is the lattice constant of the quantum barrier layer, c is the lattice constant of the growth preparation layer, La is the thickness of the quantum well layer, Lb is the thickness of the quantum barrier layer.
区别于现有技术,本申请通过设置量子垒层的厚度,以使量子垒层和量子阱层的平均应力表征系数在预设范围内,具体介于(-0.00216)-(-0.00732),进而解决长波长LED的量子阱层和生长准备层存在严重的晶格失配,而导致In析出和相分离的问题。Different from the prior art, the present application sets the thickness of the quantum barrier layer so that the average stress characterization coefficient of the quantum barrier layer and the quantum well layer is within a preset range, specifically between (-0.00216)-(-0.00732), and then Solve the problem of In precipitation and phase separation caused by the serious lattice mismatch between the quantum well layer and the growth preparation layer of the long-wavelength LED.
应当理解的是,以上的一般描述和后文的细节描述仅是示例性和解释性的,而非限制本申请。It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
附图说明Description of drawings
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to illustrate the technical solutions in the embodiments of the present application more clearly, the following briefly introduces the drawings that are used in the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative effort.
图1是本申请外延片一实施例的结构示意图;1 is a schematic structural diagram of an embodiment of an epitaxial wafer of the present application;
图2是本申请量子垒层厚度与波长的关系示意图;2 is a schematic diagram of the relationship between the quantum barrier layer thickness and wavelength of the present application;
图3是本申请外延片的光致发光光谱示意图;Fig. 3 is the photoluminescence spectrum schematic diagram of the epitaxial wafer of the present application;
图4是本申请外延片的相对光功率示意图;4 is a schematic diagram of the relative optical power of the epitaxial wafer of the present application;
图5是本申请外延片制造方法一实施例的流程示意图。FIG. 5 is a schematic flowchart of an embodiment of an epitaxial wafer manufacturing method of the present application.
具体实施方式Detailed ways
为使本领域的技术人员更好地理解本申请的技术方案,下面结合附图和具体实施方式对本申请所提供的外延片和外延片制造方法做进一步详细描述。可以理解的是,所描述的实施例仅仅是本申请一部分实施例,而不是全部实施例。基于本申请中的实施例,本领域普通技术人员在没有做出创造性的劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。In order to make those skilled in the art better understand the technical solutions of the present application, the epitaxial wafer and the manufacturing method of the epitaxial wafer provided by the present application are further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.
本申请中的术语“第一”、“第二”等是用于区别不同对象,而不是用于描述特定顺序。此外,术语“包括”和“具有”以及它们任何变形,意图在于覆盖不排他的包含。例如包含了一系列步骤或单元的过程、方法、系统、产品或设备没有限定于已列出的步骤或单元,而是可选地还包括没有列出的步骤或单元,或可选地还包括对于这些过程、方法、产品或设备固有的其他步骤或单元。The terms "first", "second", etc. in this application are used to distinguish different objects, rather than to describe a specific order. Furthermore, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but optionally also includes unlisted steps or units, or optionally also includes For other steps or units inherent to these processes, methods, products or devices.
本申请提供一种外延片,以解决现有技术中长波长LED由于In组分过高导致多量子阱层和生长准备层之间存在严重的晶格失配,进而导致In析出和相分离的问题,最终导致影响LED发光效率的问题。The present application provides an epitaxial wafer to solve the problem of serious lattice mismatch between the multiple quantum well layer and the growth preparation layer caused by the high In composition of long-wavelength LEDs in the prior art, which in turn leads to In precipitation and phase separation problems, which eventually lead to problems affecting the luminous efficiency of LEDs.
请参阅图1,图1是本申请外延片第一实施例的结构示意图。如图1所示,外延片10包括生长准备层11、量子垒层12以及量子阱层13。其中,量子垒层12生长于生长准备层11,量子阱层13生长于量子垒层12。Please refer to FIG. 1 , which is a schematic structural diagram of a first embodiment of an epitaxial wafer of the present application. As shown in FIG. 1 , the
其中,在本实施例中,生长准备层11具体可包括用于生长半导体层的衬底和缓冲层。可选地,衬底可为双抛蓝宝石衬底、c面蓝宝石衬底、m面蓝宝石衬底、硅衬底或类硅衬底中的至少一种。Wherein, in this embodiment, the
具体地,量子阱层13的晶格常数与生长准备层11的晶格常数相差较大,使得量子垒层12以及量子阱层13所形成的多量子阱(MQW,Multiple Quantum Well)层与生长准备层11之间存在严重的晶格失配,进而导致量子阱层13与生长准备层11之间存在较大的应力。当外延片10释放应力时,容易导致量子阱层13产生缺陷,进而导致影响量子阱层13的发光效率。Specifically, the lattice constant of the
可选地,可通过改变生长准备层11的厚度或晶格常数、量子阱层13的厚度或晶格常数,或者量子垒层12的厚度或晶格常数,以使外延片10处于亚稳态,即处于不释放应力的状态,进而减少外延片10释放的应力。Alternatively, the
其中,本实施例将量子阱层13和生长准备层11的晶格常数设置为满足(a-c)/c大于1.3%,并将量子垒层12的厚度设置成使得量子垒层12和量子阱层13的平均应力表征系数的范围介于(-0.00216)-(-0.00732)。其中,a为量子阱层13的晶格常数,c为生长准备层11的晶格常数。In this embodiment, the lattice constants of the
可选地,本实施例可进一步将量子阱层13和生长准备层11的晶格常数设置为满足(a-c)/c大于1.7%,并可进一步将量子阱层13和生长准备层11的晶格常数设置为满足(a-c)/c大于2.8%。同时将量子垒层12的厚度设置成使得量子垒层12和量子阱层13的平均应力表征系数的范围介于(-0.00216)-(-0.00732)。Optionally, in this embodiment, the lattice constants of the
可选地,本实施可通过公式一计算量子垒层12和量子阱层13的平均应力表征系数,计算公式具体如下式所示:Optionally, in this implementation, the average stress characterization coefficient of the
Sc={[(c-b)/c]×Lb+[(c-a)/c]×La}/(Lb+La) (1)Sc={[(c-b)/c]×Lb+[(c-a)/c]×La}/(Lb+La) (1)
其中,Sc为平均应力表征系数,a为量子阱层13的晶格常数,b为量子垒层12的晶格常数,c为生长准备层11的晶格常数,La为量子阱层13的厚度,Lb为量子垒层12的厚度。进一步地,[(c-b)/c]用于表征量子垒层12的应变,[(c-a)/c]用于表征量子阱层13的应变。Wherein, Sc is the average stress characterization coefficient, a is the lattice constant of the
可选地,在本实施例中,量子垒层12和生长准备层11的晶格常数满足(b-c)/c大于0.01%。具体地,量子垒层12和生长准备层11可由相同材料制成,则量子垒层12和生长准备层11的晶格常数相差较小,且量子垒层12和量子阱层13的晶格常数相差较大,即可得到量子阱层13和生长准备层11的晶格常数相差较大。Optionally, in this embodiment, the lattice constants of the
具体地,由公式一可知,在量子阱层13和生长准备层11的生长材料确定,且量子阱层13掺杂浓度一定时,即量子阱层13和生长准备层11的晶格常数确定时,可通过改变量子垒层12的厚度,使量子垒层12和量子阱层13的平均应力表征系数满足预设条件,即量子垒层12和量子阱层13的平均应力表征系数的范围介于(-0.00216)-(-0.00732)。Specifically, it can be seen from formula 1 that when the growth materials of the
可选地,在本实施例中,量子垒层12与生长准备层11均可为GaN材料。具体地,量子垒层12可为掺杂或非掺杂GaN,具体可为InGaAlN材料。Optionally, in this embodiment, both the
可选地,在本实施例中,可调节量子垒层12的厚度,以使量子垒层12的厚度不大于80nm。进一步地,本实施例可调节量子垒层12的厚度,以使量子垒层12的厚度不大于45nm。Optionally, in this embodiment, the thickness of the
可选地,量子阱层13的厚度和量子垒层12的厚度相对于生长准备层11的厚度非常薄,具体地,生长准备层11的厚度可为量子阱层13的厚度和量子垒层12的厚度的5000倍。Optionally, the thickness of the
其中,本实施例外延片10可用于产生红光、绿光或红外光等长波长的光线。具体地,在现有技术中,处于亚稳态的蓝光LED的多量子阱层与衬底的平均应力表征系数在预设范围内,具体介于(-0.00216)-(-0.00732),该蓝光LED的量子垒层为GaN材料,量子阱层为InGaN材料,量子阱层厚3nm,且量子阱层的In组分的摩尔百分比含量为12%。本实施例在保持与蓝光LED的量子垒层材料、量子阱层材料以及量子阱层厚度不变的情况下,通过公式一计算得到用于输出不同波长光线的外延片10处于亚稳态的最小量子垒层厚度,具体可如图2所示。Wherein, the
结合图1,进一步参阅图2,图2是本申请量子垒层厚度与波长的关系示意图。如图2所示,当外延片10所产生的光线的波长越大,则对应的量子垒层12的最小厚度越大。具体地,当外延片10所产生的光线的波长介于400nm-420nm时,量子垒层12的最小厚度介于5nm-10nm;当外延片10所产生的光线的波长介于450nm-500nm时,量子垒层12的最小厚度介于15nm-20nm;当外延片10所产生的光线的波长介于540nm-560nm时,量子垒层12的最小厚度介于28nm-32nm;当外延片10所产生的光线的波长介于640nm-660nm时,量子垒层12的最小厚度介于35nm-40nm。Referring to FIG. 2 in conjunction with FIG. 1 , FIG. 2 is a schematic diagram of the relationship between the thickness of the quantum barrier layer and the wavelength of the present application. As shown in FIG. 2 , when the wavelength of the light generated by the
当本实施例外延片10用于产生红光,量子阱层13为InGaN材料或者InGaAlN材料,且量子阱层13中的In组分的摩尔百分比含量不小于20%,量子垒层12的厚度不小于10nm。进一步地,量子阱层13中的In组分的摩尔百分比含量不小于32%,量子垒层12的厚度不小于20nm。可选地,量子垒层12的厚度可为20nm-80nm。可选地,量子垒层12的厚度还可为20nm-30nm、30nm-50nm或50nm-70nm。When the
具体地,本实施例提供第一实施例,在本实施例中,生长准备层11为GaN材料,量子垒层12为GaN材料,量子阱层13为InGaN材料,其中,量子阱层13中的In组分的摩尔百分比含量为40%,且量子阱层13厚3nm,通过公式一计算得到量子垒层12的厚度为20nm-80nm。Specifically, this embodiment provides the first embodiment. In this embodiment, the
本实施例提供第二实施例,在本实施例中,生长准备层11为GaN材料,量子垒层12为GaN材料,量子阱层13为InGaN材料,其中,量子阱层13中的In组分的摩尔百分比含量为25%,且量子阱层13厚3nm,通过公式一计算得到量子垒层12的厚度可为10nm-45nm。This embodiment provides a second embodiment. In this embodiment, the
结合图1,进一步参阅图3,图3是本申请外延片的光致发光光谱示意图。如图3所示,曲线S1、曲线S2以及曲线S3分别对应具有相同In组分的摩尔百分比含量的量子阱层13,与不同量子垒层12厚度的外延片10所产生的光致发光光谱。Referring to FIG. 3 in conjunction with FIG. 1 , FIG. 3 is a schematic diagram of the photoluminescence spectrum of the epitaxial wafer of the present application. As shown in FIG. 3 , the curves S1 , S2 and S3 correspond to the photoluminescence spectra generated by the
具体地,外延片10所产生光线的中心波长为550nm-600nm,即外延片10所产生光线为绿光。其中,曲线S1所对应的外延片10的量子垒层12厚度为2.0x,曲线S2所对应的外延片10的量子垒层12厚度为1.5x,曲线S3所对应的外延片10的量子垒层12厚度为x。Specifically, the center wavelength of the light generated by the
如图3所示,曲线S1所对应的外延片10所产生的光线的光强度大于曲线S2所对应的外延片10所产生的光线的光强度,曲线S2所对应的外延片10所产生的光线的光强度大于曲线S3所对应的外延片10所产生的光线的光强度。As shown in FIG. 3 , the light intensity of the light generated by the
具体由图3可知,量子阱层13的In组分的摩尔百分比含量相同时,量子垒层12厚度越大,量子垒层12和量子阱层13的平均应力表征系数越小,也就是说,量子阱层13与生长准备层11之间的应力越小,能够稀释外延片10释放的应力,减小应力释放所产生的量子阱层13的缺陷,以使外延片10所产生的光线的光强度越大,即提高外延片10的发光效率。Specifically, it can be seen from FIG. 3 that when the molar percentage content of the In component of the
可选地,本实施例x可为7nm-12nm中的任意一个数,即当x为7nm-12nm中的任意一个数时,所得到的外延片10的光致发光光谱均如图3所示。Optionally, in this embodiment, x can be any number from 7 nm to 12 nm, that is, when x is any number from 7 nm to 12 nm, the obtained photoluminescence spectrum of the
其中,相对光功率也是衡量外延片10的发光效率的一个参数,结合图1和图3,进一步参阅图4,图4是本申请外延片的相对光功率示意图。如图4所示,曲线S4、曲线S5以及曲线S6所表示的外延片10分别对应图3所示的曲线S1、曲线S2以及曲线S3所表示的外延片10。其中,外延片10所产生的光线的相对光功率与施加于外延片10的电流密度以及量子垒层12的厚度相关。The relative optical power is also a parameter to measure the luminous efficiency of the
具体如图4所示,量子阱层13的In组分的摩尔百分比含量相同时,外延片10的量子垒层12厚度越大,量子垒层12和量子阱层13的平均应力表征系数越小,量子阱层13与生长准备层11之间的应力越小,外延片10释放的应力越小,在相同的电流密度下,外延片10所产生的光线的相对光功率越大,即能够有效提高外延片10的发光效率。即,曲线S4所对应的外延片10所产生的光线的相对光功率大于曲线S5所对应的外延片10所产生的光线的相对光功率,曲线S5所对应的外延片10所产生的光线的相对光功率大于曲线S6所对应的外延片10所产生的光线的相对光功率。Specifically, as shown in FIG. 4 , when the molar percentage of the In component of the
同时,外延片10的量子垒层12厚度相同时,施加于外延片10的电流密度越大,外延片10所产生的光线的相对光功率越大。并且,随着量子垒层12的厚度越大,外延片10所产生的光线的相对光功率随着电流密度增加而增加的数值越大。Meanwhile, when the quantum barrier layers 12 of the
可选地,在其他实施例中,单个量子阱层13及单个量子垒层12形成一个周期,外延片10可交替层叠设置多个周期。可选地,交替层叠的量子阱层13及量子垒层12的周期数可为2-1000周期。Optionally, in other embodiments, a single
可选地,在其他实施例中,量子垒层12还可包括层叠设置的至少两个子量子垒层。其中,至少两个子量子垒层的InGaAlN成分不同。Optionally, in other embodiments, the
其中,至少两个子量子垒层可为非掺杂GaN层、InyGa1-yN层、AlfGa1-fN层以及Si掺杂GaN层的至少两层的任意结合,其中0<y<0.15,0<f<0.3。具体地,Si掺杂GaN层的Si掺杂浓度取值范围为1×1016-1×1019atoms/cm3。Wherein, the at least two sub-quantum barrier layers can be any combination of at least two layers of an undoped GaN layer, an InyGa1 -yN layer , an AlfGa1 - fN layer and a Si-doped GaN layer, where 0<y<0.15,0<f<0.3. Specifically, the Si doping concentration of the Si-doped GaN layer ranges from 1×10 16 to 1×10 19 atoms/cm 3 .
可选地,在一实施例中,至少两个子量子垒层包括InyGa1-yN层和GaN层,且InyGa1-yN层和GaN层层叠设置。Optionally, in one embodiment, the at least two sub-quantum barrier layers include an InyGa1 -yN layer and a GaN layer, and the InyGa1 -yN layer and the GaN layer are stacked.
可选地,在一实施例中,至少两个子量子垒层包括AlfGa1-fN层和InyGa1-yN层,且AlfGa1-fN层和InyGa1-yN层层叠设置。Optionally, in an embodiment, the at least two sub-quantum barrier layers include an AlfGa1 - fN layer and an InyGa1 -yN layer , and an AlfGa1 - fN layer and an InyGa1- y N layer stacking setup.
可选地,在其他实施例中,至少两个子量子垒层还可为InGaAlN层与非掺杂GaN层、InyGa1-yN层、AlfGa1-fN层以及Si掺杂GaN层的至少一层的任意结合。例如,至少两个子量子垒层包括非掺杂GaN层和InGaAlN层,且非掺杂GaN层和InGaAlN层层叠设置。Optionally, in other embodiments, the at least two sub-quantum barrier layers may also be an InGaAlN layer and an undoped GaN layer, an InyGa1 -yN layer , an AlfGa1 - fN layer, and a Si-doped GaN layer Any combination of at least one of the layers. For example, the at least two sub-quantum barrier layers include an undoped GaN layer and an InGaAlN layer, and the undoped GaN layer and the InGaAlN layer are stacked.
本申请通过调整量子垒层12的厚度,使得用于产生长波长光线的外延片10中的量子垒层12和量子阱层13的平均应力表征系数的范围在预设范围内,且具体介于(-0.00216)-(-0.00732),在满足外延片10中量子阱层13具有高In组分的摩尔百分比含量的同时,能够有效提高量子阱层13与生长准备层11的晶格适配,以解决现有技术中长波长LED的量子阱层和量子垒层存在严重的晶格失配的问题,并解决现有技术中长波长LED所存在In析出和相分离的问题。In the present application, the thickness of the
本申请还提供一种外延片制造方法,用于制造如图1所示的外延片10,其流程示意图如图5所示。请参阅图5,图5是本申请外延片制造方法一实施例的流程示意图。具体而言,本实施例的外延片制造方法可以包括以下步骤:The present application also provides a method for manufacturing an epitaxial wafer, which is used for manufacturing the
步骤S11:获取预设平均应力表征系数。Step S11: Obtain a preset average stress characterization coefficient.
其中,为了实现长波长LED处于亚稳态,即不释放应力,需要获取预设平均应力表征系数,该预设平均应力表征系数可为现有技术蓝光LED的量子阱层和量子垒层的平均应力表征系数,具体介于(-0.00216)-(-0.00732)。当设置外延片10的量子阱层13和量子垒层12的平均应力表征系数为预设平均应力表征系数,则外延片10即可处于亚稳态。Among them, in order to realize that the long-wavelength LED is in a metastable state, that is, the stress is not released, a preset average stress characterization coefficient needs to be obtained, and the preset average stress characterization coefficient can be the average of the quantum well layer and the quantum barrier layer of the blue LED in the prior art. Stress characterization coefficient, specifically between (-0.00216)-(-0.00732). When the average stress characterization coefficients of the
步骤S12:获取外延片的预设参数。Step S12: Acquire preset parameters of the epitaxial wafer.
其中,预测参数包括生成准备层11的晶格常数、量子垒层12的晶格常数,以及量子阱层13的晶格常数和厚度。具体地,晶格常数由基底和其掺杂的成分及比例相关,通过确定对应的基底和其掺杂的成分及比例,即可得到对应的晶格常数。The prediction parameters include the lattice constant of the
在本实施例中,生成准备层11为GaN材料,量子垒层12为GaN材料,量子阱层13为InGaN材料,量子阱层13的厚度为3nm。具体地,当制造的外延片10用于产生红光时,且量子阱层13的In组分的摩尔百分比含量为40%;当制造的外延片10用于产生绿光时,且量子阱层13的In组分的摩尔百分比含量为25%。In this embodiment, the
步骤S13:基于预设平均应力表征系数和预设参数计算量子垒层的厚度。Step S13: Calculate the thickness of the quantum barrier layer based on the preset average stress characterization coefficient and preset parameters.
其中,本实施例将预设平均应力表征系数和预设参数输入公式一,即可计算得到对应的外延片10的量子垒层12的厚度,如量子阱层13的In组分的摩尔百分比含量为40%,则量子垒层12的厚度为20nm-80nm;量子阱层13的In组分的摩尔百分比含量为25%,则量子垒层12的厚度为10nm-45nm。In this embodiment, the preset average stress characterization coefficient and preset parameters are input into Formula 1, and the thickness of the corresponding
步骤S14:基于量子垒层的厚度制造外延片。Step S14 : manufacturing an epitaxial wafer based on the thickness of the quantum barrier layer.
其中,通过步骤S12以及步骤S13获取外延片10的生成准备层11的晶格常数、量子垒层12的晶格常数和厚度,以及量子阱层13的晶格常数和厚度,则可制造外延片10。The epitaxial wafer can be fabricated by obtaining the lattice constant of the
以上仅为本申请的实施例,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。The above are only the embodiments of the present application, and are not intended to limit the scope of the patent of the present application. Any equivalent structure or equivalent process transformation made by using the contents of the description and drawings of the present application, or directly or indirectly applied in other related technical fields, All the same are included in the scope of patent protection of the present application.
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