[go: up one dir, main page]

CN115204356A - Data processing method and device based on pulse rearrangement deep residual neural network - Google Patents

Data processing method and device based on pulse rearrangement deep residual neural network Download PDF

Info

Publication number
CN115204356A
CN115204356A CN202210520896.0A CN202210520896A CN115204356A CN 115204356 A CN115204356 A CN 115204356A CN 202210520896 A CN202210520896 A CN 202210520896A CN 115204356 A CN115204356 A CN 115204356A
Authority
CN
China
Prior art keywords
rearrangement
pulse
layer
processing
neural network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202210520896.0A
Other languages
Chinese (zh)
Other versions
CN115204356B (en
Inventor
田永鸿
方维
余肇飞
陈彦骐
黄铁军
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Peking University
Original Assignee
Peking University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Peking University filed Critical Peking University
Priority to CN202210520896.0A priority Critical patent/CN115204356B/en
Publication of CN115204356A publication Critical patent/CN115204356A/en
Application granted granted Critical
Publication of CN115204356B publication Critical patent/CN115204356B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/049Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/08Learning methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • General Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • Computational Linguistics (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Evolutionary Computation (AREA)
  • Artificial Intelligence (AREA)
  • Molecular Biology (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Health & Medical Sciences (AREA)
  • Image Analysis (AREA)

Abstract

The present application relates to the field of pulse neural networks and data processing technologies, and more particularly, to a data processing method and apparatus based on a pulse rearrangement depth residual error neural network. The method comprises the following steps: configuring a plurality of immediately adjacent pulse rearrangement residual modules in a pulse rearrangement-based depth residual neural network; taking the pulse rearrangement-based depth residual error neural network after the pulse rearrangement residual block is configured as a first pulse rearrangement model; training the first pulse rearrangement model; and inputting the target data into the trained first pulse rearrangement model for processing to obtain a target processing result. The rearrangement processing greatly reduces the number of parameters, reduces the over-fitting risk, also reduces the storage and calculation overhead, and further improves the data processing efficiency. Meanwhile, the method and the device can obtain the category corresponding to the target data, and can obtain a regression sequence or a regression single vector, so that the method and the device are suitable for various application scenarios.

Description

基于脉冲重排深度残差神经网络的数据处理方法与装置Data processing method and device based on pulse rearrangement deep residual neural network

技术领域technical field

本申请涉及脉冲神经网络与数据处理技术领域,更为具体来说,本申请涉及基于脉冲重排深度残差神经网络的数据处理方法与装置。The present application relates to the technical field of spiking neural networks and data processing, and more particularly, the present application relates to a data processing method and apparatus based on a spiking rearrangement deep residual neural network.

背景技术Background technique

人工神经网络(Artificial Neural Network,ANN)在诸多领域取得突破性进展,归功于深度学习。网络深度对于网络的性能影响非常大,更深的网络结构也被相继提出,并拥有比浅层网络更好的性能。在深度ANN中,最为常见的结构是残差连接(residualconnections),成功解决了深度ANN的训练问题。Artificial Neural Network (ANN) has made breakthroughs in many fields thanks to deep learning. The network depth has a great impact on the performance of the network, and deeper network structures have also been proposed one after another, and have better performance than shallow networks. In deep ANN, the most common structure is residual connections, which successfully solves the training problem of deep ANN.

脉冲神经网络(Spiking Neural Network,SNN)被誉为第三代神经网络,具有事件驱动、低功耗的优势。但由于SNN使用离散的脉冲进行通讯,信息损失较大。为了提升SNN的性能,一个很自然的想法是使用类似残差网络的结构,通过增加深度而获取性能增益。然而直接使用传统的ANN中残差网络结构,获得的SNN性能仍然很差。Spiking Neural Network (SNN) is known as the third-generation neural network, which has the advantages of event-driven and low power consumption. However, since SNN uses discrete pulses for communication, the loss of information is relatively large. To improve the performance of SNNs, a natural idea is to use a residual network-like structure to gain performance gains by increasing depth. However, directly using the traditional residual network structure in ANN, the obtained SNN performance is still poor.

发明内容SUMMARY OF THE INVENTION

基于上述技术问题,本发明旨在通过基于脉冲重排深度残差神经网络配置多个紧邻的脉冲重排残差模块,将配置脉冲重排残差块后的基于脉冲重排深度残差神经网络作为第一脉冲重排模型,采用第一脉冲重排模型处理目标数据。Based on the above technical problems, the present invention aims to configure a plurality of adjacent pulse rearrangement residual modules based on the pulse rearrangement deep residual neural network, and configure the pulse rearrangement based deep residual neural network after configuring the pulse rearrangement residual block. As the first pulse rearrangement model, the target data is processed using the first pulse rearrangement model.

本发明第一方面提供了一种基于脉冲重排深度残差神经网络的数据处理方法,所述方法包括:A first aspect of the present invention provides a data processing method based on a pulse rearrangement deep residual neural network, the method comprising:

在基于脉冲重排深度残差神经网络中配置多个紧邻的脉冲重排残差模块;Configure multiple adjacent pulse rearrangement residual modules in a deep residual neural network based on pulse rearrangement;

将配置脉冲重排残差块后的基于脉冲重排深度残差神经网络作为第一脉冲重排模型;Using the pulse rearrangement-based deep residual neural network after configuring the pulse rearrangement residual block as the first pulse rearrangement model;

训练所述第一脉冲重排模型;training the first pulse rearrangement model;

将目标数据输入训练好的第一脉冲重排模型中进行处理,得到目标处理结果。Input the target data into the trained first pulse rearrangement model for processing, and obtain the target processing result.

在本发明的一些实施例中,所述第一脉冲重排模型还设置有第一卷积层、池化层和全连接层;将目标数据输入训练好的第一脉冲重排模型中进行处理包括:In some embodiments of the present invention, the first pulse rearrangement model is further provided with a first convolution layer, a pooling layer and a fully connected layer; the target data is input into the trained first pulse rearrangement model for processing include:

将目标数据输入所述第一卷积层进行下采样;input the target data into the first convolutional layer for downsampling;

将下采样后的目标数据输入所述多个紧邻的脉冲重排残差模块进行脉冲重排残差处理,得到第一处理结果;inputting the down-sampled target data into the plurality of adjacent pulse rearrangement residual modules to perform pulse rearrangement residual processing to obtain a first processing result;

将所述第一处理结果依次输入所述池化层和全连接层,得到第二处理结果。The first processing result is sequentially input to the pooling layer and the fully connected layer to obtain a second processing result.

在本发明的一些实施例中,所述得到目标处理结果,包括:In some embodiments of the present invention, the obtaining the target processing result includes:

根据所述第二处理结果获取所述目标数据对应的类别;Obtain the category corresponding to the target data according to the second processing result;

基于所述第二处理结果获得回归序列和/或回归单个向量;obtaining a regression sequence and/or a regression single vector based on the second processing result;

将所述目标数据对应的类别、所述回归序列和/或所述回归单个向量作为目标处理结果。The category corresponding to the target data, the regression sequence and/or the regression single vector are used as the target processing result.

在本发明的一些实施例中,所述脉冲重排残差模块依次配置有脉冲重排层、第二卷积层、规范化层、脉冲神经元层和脉冲反重排层;所述将下采样后的目标数据输入所述多个紧邻的脉冲重排残差模块进行脉冲重排残差处理,得到第一处理结果,包括:In some embodiments of the present invention, the spike rearrangement residual module is sequentially configured with a spike rearrangement layer, a second convolution layer, a normalization layer, a spike neuron layer, and a spike anti-rearrangement layer; the downsampling The latter target data is input into the plurality of adjacent pulse rearrangement residual modules for pulse rearrangement residual processing, and a first processing result is obtained, including:

将下采样后的目标数据输入脉冲重排层,得到脉冲重排结果;Input the down-sampled target data into the pulse rearrangement layer to obtain the pulse rearrangement result;

将所述脉冲重排结果依次通过第二卷积层、规范化层、脉冲神经元层和脉冲反重排层的处理,得到第一处理结果。The pulse rearrangement result is sequentially processed by the second convolution layer, the normalization layer, the spiking neuron layer and the pulse anti-rearrangement layer to obtain the first processing result.

在本发明的一些实施例中,所述将下采样后的目标数据输入脉冲重排层,得到脉冲重排结果,公式为:In some embodiments of the present invention, the down-sampled target data is input into the pulse rearrangement layer to obtain a pulse rearrangement result, and the formula is:

Figure BDA0003643331460000031
Figure BDA0003643331460000031

其中,Y表示脉冲重排层所进行的重排操作,X表示下采样后的目标数据;n,z,y,x依次表示下采样后的目标数据的批量大小、通道序数、高度和宽度;M表示总通道数,r表示重排系数,%表示求余,

Figure BDA0003643331460000032
表示向下取整。Among them, Y represents the rearrangement operation performed by the pulse rearrangement layer, X represents the down-sampled target data; n, z, y, and x represent the batch size, channel number, height and width of the down-sampled target data in turn; M represents the total number of channels, r represents the rearrangement coefficient, % represents the remainder,
Figure BDA0003643331460000032
Indicates rounded down.

在本发明的一些实施例中,所述多个紧邻的脉冲重排残差模块中的第一个脉冲重排残差模块还配置有下采样功能。In some embodiments of the present invention, the first pulse rearrangement residual module in the plurality of immediately adjacent pulse rearrangement residual modules is further configured with a downsampling function.

在本发明的一些实施例中,在所述将目标数据输入训练好的第一脉冲重排模型中进行处理,得到目标处理结果之前,还包括:In some embodiments of the present invention, before the target data is input into the trained first pulse rearrangement model for processing and the target processing result is obtained, the method further includes:

获取欲输入数据;Get the data to be entered;

若欲输入数据为单个数字时,将该单个数字重复预设次得到长度为预设长的序列;若欲输入数据为多个数字组成的长度为T的序列,其中T大于1,则不需要进行重复;If the input data is a single number, repeat the single number for a preset number of times to obtain a sequence with a preset length; if the input data is a sequence with a length of T composed of multiple numbers, where T is greater than 1, no need to repeat;

将所述长度为预设长的序列和所述长度为T的序列作为目标数据。The sequence with the preset length and the sequence with the length T are used as target data.

本发明第二方面提供了一种基于脉冲重排深度残差神经网络的数据处理装置,所述装置包括:A second aspect of the present invention provides a data processing device based on a pulse rearrangement deep residual neural network, the device comprising:

配置模块,用于在基于脉冲重排深度残差神经网络中配置多个紧邻的脉冲重排残差模块;a configuration module for configuring a plurality of adjacent pulse rearrangement residual modules in a deep residual neural network based on pulse rearrangement;

重排模块,用于将配置脉冲重排残差块后的基于脉冲重排深度残差神经网络作为第一脉冲重排模型;The rearrangement module is used to use the pulse rearrangement-based deep residual neural network after configuring the pulse rearrangement residual block as the first pulse rearrangement model;

训练模块,用于训练所述第一脉冲重排模型;a training module for training the first pulse rearrangement model;

处理模块,用于将目标数据输入训练好的第一脉冲重排模型中进行处理,得到目标处理结果。The processing module is used for inputting the target data into the trained first pulse rearrangement model for processing to obtain the target processing result.

本发明第三方面提供了一种电子设备,包括存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序,所述处理器运行所述计算机程序以实现以下步骤:A third aspect of the present invention provides an electronic device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor running the computer program to implement the following steps :

在基于脉冲重排深度残差神经网络中配置多个紧邻的脉冲重排残差模块;Configure multiple adjacent pulse rearrangement residual modules in a deep residual neural network based on pulse rearrangement;

将配置脉冲重排残差块后的基于脉冲重排深度残差神经网络作为第一脉冲重排模型;Using the pulse rearrangement-based deep residual neural network after configuring the pulse rearrangement residual block as the first pulse rearrangement model;

训练所述第一脉冲重排模型;training the first pulse rearrangement model;

将目标数据输入训练好的第一脉冲重排模型中进行处理,得到目标处理结果。Input the target data into the trained first pulse rearrangement model for processing, and obtain the target processing result.

本发明第四方面提供了一种计算机可读存储介质,其上存储有计算机程序,该计算机程序被处理器执行时实现以下步骤:A fourth aspect of the present invention provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

在基于脉冲重排深度残差神经网络中配置多个紧邻的脉冲重排残差模块;Configure multiple adjacent pulse rearrangement residual modules in a deep residual neural network based on pulse rearrangement;

将配置脉冲重排残差块后的基于脉冲重排深度残差神经网络作为第一脉冲重排模型;Using the pulse rearrangement-based deep residual neural network after configuring the pulse rearrangement residual block as the first pulse rearrangement model;

训练所述第一脉冲重排模型;training the first pulse rearrangement model;

将目标数据输入训练好的第一脉冲重排模型中进行处理,得到目标处理结果。Input the target data into the trained first pulse rearrangement model for processing, and obtain the target processing result.

本申请实施例中提供的技术方案,至少具有如下技术效果或优点:The technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:

本申请先在基于脉冲重排深度残差神经网络中配置多个紧邻的脉冲重排残差模块,将配置脉冲重排残差块后的基于脉冲重排深度残差神经网络作为第一脉冲重排模型,训练所述第一脉冲重排模型,将目标数据输入训练好的第一脉冲重排模型中进行处理,得到目标处理结果,重排处理使得参数量大为减少,降低了过拟合风险,也减轻了存储和计算开销,进而提升了数据处理的效率。同时,本申请可以获取所述目标数据对应的类别,可以获得回归序列或回归单个向量,从而适用于多种应用场景。In this application, a plurality of adjacent pulse rearrangement residual modules are first configured in the pulse rearrangement-based deep residual neural network, and the pulse rearrangement-based deep residual neural network after configuring the pulse rearrangement residual blocks is used as the first pulse rearrangement. Arrangement model, train the first pulse rearrangement model, input the target data into the trained first pulse rearrangement model for processing, and obtain the target processing result, and the rearrangement processing greatly reduces the amount of parameters and reduces overfitting It also reduces the storage and computing overhead, thereby improving the efficiency of data processing. At the same time, the present application can obtain the category corresponding to the target data, and obtain a regression sequence or a single regression vector, which is suitable for various application scenarios.

应当理解的是,以上的一般描述和后文的细节描述仅是示例性和解释性的,并不能限制本发明。It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention.

附图说明Description of drawings

通过阅读下文优选实施方式的详细描述,各种其他的优点和益处对于本领域普通技术人员将变得清楚明了。附图仅用于示出优选实施方式的目的,而并不认为是对本申请的限制。而且在整个附图中,用相同的参考符号表示相同的部件。在附图中:Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are for purposes of illustrating preferred embodiments only and are not to be considered limiting of the application. Also, the same components are denoted by the same reference numerals throughout the drawings. In the attached image:

图1示出了本申请一示例性实施例中的基于脉冲重排深度残差神经网络的数据处理方法步骤示意图;1 shows a schematic diagram of steps of a data processing method based on a pulse rearrangement deep residual neural network in an exemplary embodiment of the present application;

图2示出了本申请一示例性实施例中的基于脉冲重排深度残差神经网络的数据处理方法流程图;FIG. 2 shows a flowchart of a data processing method based on a pulse rearrangement deep residual neural network in an exemplary embodiment of the present application;

图3示出了本申请一示例性实施例中的脉冲矩阵重排和反重排过程示意图;FIG. 3 shows a schematic diagram of the pulse matrix rearrangement and anti-rearrangement process in an exemplary embodiment of the present application;

图4示出了本申请一示例性实施例中的基于脉冲重排深度残差神经网络的数据处理装置结构示意图;FIG. 4 shows a schematic structural diagram of a data processing apparatus based on a pulse rearrangement deep residual neural network in an exemplary embodiment of the present application;

图5示出了本申请一示例性实施例所提供的一种计算机设备的结构示意图;FIG. 5 shows a schematic structural diagram of a computer device provided by an exemplary embodiment of the present application;

图6示出了本申请一示例性实施例所提供的一种存储介质的示意图。FIG. 6 shows a schematic diagram of a storage medium provided by an exemplary embodiment of the present application.

具体实施方式Detailed ways

以下,将参照附图来描述本申请的实施例。但是应该理解的是,这些描述只是示例性的,而并非要限制本申请的范围。此外,在以下说明中,省略了对公知结构和技术的描述,以避免不必要地混淆本申请的概念。对于本领域技术人员来说显而易见的是,本申请可以无需一个或多个这些细节而得以实施。在其他的例子中,为了避免与本申请发生混淆,对于本领域公知的一些技术特征未进行描述。Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the application. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present application. It will be apparent to those skilled in the art that the present application may be practiced without one or more of these details. In other instances, some technical features known in the art have not been described in order to avoid confusion with the present application.

应予以注意的是,这里所使用的术语仅是为了描述具体实施例,而非意图限制根据本申请的示例性实施例。如在这里所使用的,除非上下文另外明确指出,否则单数形式也意图包括复数形式。此外,还应当理解的是,当在本说明书中使用术语“包含”和/或“包括”时,其指明存在所述特征、整体、步骤、操作、元件和/或组件,但不排除存在或附加一个或多个其他特征、整体、步骤、操作、元件、组件和/或它们的组合。It should be noted that the terminology used herein is for the purpose of describing specific embodiments only, and is not intended to limit the exemplary embodiments in accordance with the present application. As used herein, the singular forms are also intended to include the plural forms unless the context clearly dictates otherwise. Furthermore, it should also be understood that when the terms "comprising" and/or "comprising" are used in this specification, they indicate the presence of stated features, integers, steps, operations, elements and/or components, but do not exclude the presence or Addition of one or more other features, integers, steps, operations, elements, components and/or combinations thereof.

现在,将参照附图更详细地描述根据本申请的示例性实施例。然而,这些示例性实施例可以多种不同的形式来实施,并且不应当被解释为只限于这里所阐述的实施例。附图并非是按比例绘制的,其中为了清楚表达的目的,可能放大了某些细节,并且可能省略了某些细节。图中所示出的各种区域、层的形状以及它们之间的相对大小、位置关系仅是示例性的,实际中可能由于制造公差或技术限制而有所偏差,并且本领域技术人员根据实际所需可以另外设计具有不同形状、大小、相对位置的区域/层。Now, exemplary embodiments according to the present application will be described in more detail with reference to the accompanying drawings. These exemplary embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. The drawings are not to scale, some details may be exaggerated and some details may be omitted for clarity. The shapes of the various regions and layers shown in the figures, as well as their relative sizes and positional relationships are only exemplary, and in practice, there may be deviations due to manufacturing tolerances or technical limitations, and those skilled in the art should Regions/layers with different shapes, sizes, relative positions can be additionally designed as desired.

下面结合说明书附图1-附图6给出几个实施例来描述根据本申请的示例性实施方式。需要注意的是,下述应用场景仅是为了便于理解本申请的精神和原理而示出,本申请的实施方式在此方面不受任何限制。相反,本申请的实施方式可以应用于适用的任何场景。Exemplary embodiments according to the present application are described below with reference to the accompanying drawings 1 to 6 of the specification. It should be noted that the following application scenarios are only shown to facilitate understanding of the spirit and principles of the present application, and the embodiments of the present application are not limited in this respect. Rather, the embodiments of the present application can be applied to any scenario where applicable.

实施例1:Example 1:

本实施例提供了一种基于脉冲重排深度残差神经网络的数据处理方法,如图1所示,所述方法包括:This embodiment provides a data processing method based on a pulse rearrangement deep residual neural network, as shown in FIG. 1 , the method includes:

S1、在基于脉冲重排深度残差神经网络中配置多个紧邻的脉冲重排残差模块;S1. Configure a plurality of adjacent pulse rearrangement residual modules in a deep residual neural network based on pulse rearrangement;

S2、将配置脉冲重排残差块后的基于脉冲重排深度残差神经网络作为第一脉冲重排模型;S2, using the pulse rearrangement-based deep residual neural network after configuring the pulse rearrangement residual block as the first pulse rearrangement model;

S3、训练所述第一脉冲重排模型;S3, training the first pulse rearrangement model;

S4、将目标数据输入训练好的第一脉冲重排模型中进行处理,得到目标处理结果。S4, input the target data into the trained first pulse rearrangement model for processing, and obtain the target processing result.

在一种具体的实现方式中,参考图2,第一脉冲重排模型还设置有第一卷积层、池化层和全连接层;将目标数据输入训练好的第一脉冲重排模型中进行处理包括:将目标数据输入第一卷积层进行下采样;将下采样后的目标数据输入多个紧邻的脉冲重排残差模块进行脉冲重排残差处理,得到第一处理结果;将第一处理结果依次输入池化层和全连接层,得到第二处理结果。In a specific implementation, referring to FIG. 2 , the first pulse rearrangement model is further provided with a first convolution layer, a pooling layer and a fully connected layer; the target data is input into the trained first pulse rearrangement model. The processing includes: inputting the target data into the first convolutional layer for downsampling; inputting the downsampled target data into a plurality of adjacent pulse rearrangement residual modules for pulse rearrangement residual processing to obtain a first processing result; The first processing result is sequentially input to the pooling layer and the fully connected layer to obtain the second processing result.

在一种具体的实现方式中,得到目标处理结果,包括:根据第二处理结果获取目标数据对应的类别;基于第二处理结果获得回归序列和/或回归单个向量;将目标数据对应的类别、回归序列和/或回归单个向量作为目标处理结果。In a specific implementation manner, obtaining the target processing result includes: obtaining a category corresponding to the target data according to the second processing result; obtaining a regression sequence and/or a regression single vector based on the second processing result; Regress a sequence and/or regress a single vector as the target processing result.

在一种具体的实现方式中,脉冲重排残差模块依次配置有脉冲重排层、第二卷积层、规范化层、脉冲神经元层和脉冲反重排层;将下采样后的目标数据输入多个紧邻的脉冲重排残差模块进行脉冲重排残差处理,得到第一处理结果,包括:将下采样后的目标数据输入脉冲重排层,得到脉冲重排结果;将脉冲重排结果依次通过第二卷积层、规范化层、脉冲神经元层和脉冲反重排层的处理,得到第一处理结果。In a specific implementation manner, the pulse rearrangement residual module is sequentially configured with a pulse rearrangement layer, a second convolution layer, a normalization layer, a pulse neuron layer and a pulse anti-rearrangement layer; the down-sampled target data is Inputting a plurality of adjacent pulse rearrangement residual modules to perform pulse rearrangement residual processing to obtain a first processing result, including: inputting the down-sampled target data into the pulse rearrangement layer to obtain a pulse rearrangement result; The result is sequentially processed by the second convolution layer, the normalization layer, the spiking neuron layer and the spiking anti-rearrangement layer to obtain the first processing result.

在一种具体的实现方式中,将下采样后的目标数据输入脉冲重排层,得到脉冲重排结果,由公式(1)表示:In a specific implementation manner, the down-sampled target data is input into the pulse rearrangement layer, and the pulse rearrangement result is obtained, which is represented by formula (1):

Figure BDA0003643331460000091
Figure BDA0003643331460000091

其中,Y表示脉冲重排层所进行的重排操作,X表示下采样后的目标数据;n,z,y,x依次表示下采样后的目标数据的批量大小、通道序数、高度和宽度;M表示总通道数,r表示重排系数,%表示求余,

Figure BDA0003643331460000092
表示向下取整。Among them, Y represents the rearrangement operation performed by the pulse rearrangement layer, X represents the down-sampled target data; n, z, y, and x represent the batch size, channel number, height and width of the down-sampled target data in turn; M represents the total number of channels, r represents the rearrangement coefficient, % represents the remainder,
Figure BDA0003643331460000092
Indicates rounded down.

在一种具体的实现方式中,多个紧邻的脉冲重排残差模块中的第一个脉冲重排残差模块还配置有下采样功能。In a specific implementation manner, the first pulse rearrangement residual module among the plurality of immediately adjacent pulse rearrangement residual modules is further configured with a downsampling function.

在一种具体的实现方式中,在将目标数据输入训练好的第一脉冲重排模型中进行处理,得到目标处理结果之前,还包括:获取欲输入数据;若欲输入数据为单个数字时,将该单个数字重复预设次得到长度为预设长的序列;若欲输入数据为多个数字组成的长度为T的序列,其中T大于1,则不需要进行重复;将长度为预设长的序列和长度为T的序列作为目标数据。In a specific implementation manner, before inputting the target data into the trained first pulse rearrangement model for processing, and obtaining the target processing result, the method further includes: acquiring the data to be input; if the data to be input is a single number, Repeat the single number for a preset number of times to obtain a sequence with a preset length; if the input data is a sequence with a length of T composed of multiple numbers, where T is greater than 1, there is no need to repeat; set the length to the preset length A sequence of and a sequence of length T are used as target data.

实施例2:Example 2:

本实施例提供了一种基于脉冲重排深度残差神经网络的数据处理方法,下面对所述方法包含的步骤进行详细说明。This embodiment provides a data processing method based on a pulse rearrangement deep residual neural network, and the steps included in the method are described in detail below.

第一步,在基于脉冲重排深度残差神经网络中配置多个紧邻的脉冲重排残差模块。The first step is to configure multiple adjacent pulse rearrangement residual modules in the deep residual neural network based on pulse rearrangement.

在一种具体的实现方式中,如图2所示,基于脉冲重排深度残差神经网络设置有第一卷积层、池化层和全连接层,池化层是池化到1*1尺寸,再通过全连接层进行全连接。脉冲重排残差模块(图2中称为脉冲重排逐元素残差块)依次配置有脉冲重排层、第二卷积层、规范化层、脉冲神经元层和脉冲反重排层,脉冲重排层、第二卷积层、规范化层、脉冲神经元层和脉冲反重排层可以看作是堆叠放置。这里的第一卷积层和第二卷积层结构没有本质区别,只是为了区分不同位置的卷积。多个脉冲重排残差模块紧邻设置作为一个阶段,整个的基于脉冲重排深度残差神经网络可以配置i(i>0)个阶段。多个脉冲重排残差模块紧邻设置的结构可以表示为:In a specific implementation, as shown in Figure 2, a deep residual neural network based on pulse rearrangement is provided with a first convolution layer, a pooling layer and a fully connected layer, and the pooling layer is pooled to 1*1 size, and then fully connected through the fully connected layer. The spike rearrangement residual module (referred to as the spike rearrangement element-wise residual block in Figure 2) is sequentially configured with a spike rearrangement layer, a second convolutional layer, a normalization layer, a spike neuron layer, and a spike anti-rearrangement layer. The rearrangement layer, the second convolutional layer, the normalization layer, the spiking neuron layer, and the spiking anti-rearrangement layer can be viewed as stacked. There is no essential difference between the first convolutional layer and the second convolutional layer structure here, just to distinguish the convolutions at different positions. Multiple pulse-rearranged residual modules are set up next to each other as a stage, and the entire pulse-rearranged-based deep residual neural network can be configured with i (i>0) stages. The structure in which multiple pulse rearrangement residual modules are placed next to each other can be expressed as:

Figure BDA0003643331460000101
Figure BDA0003643331460000101

其中,S[t]是整个脉冲重排残差模块在t时间步的输入,

Figure BDA0003643331460000102
是第i个{脉冲重排-卷积-规范化-脉冲神经元层-脉冲反重排}堆叠;此处的n是堆叠的总数量(不同于第四步中的n)。公式(2)中的
Figure BDA0003643331460000103
即为经过多个{脉冲重排-卷积-规范化-脉冲神经元层-脉冲反重排}作用后得到的输出,与原始的输入S[t]一起,经过连接函数g的作用,得到输出O[t]。连接函数g的完整形式为so=g(sa,sb),本质上是一个逐元素的逻辑函数。为了加以区分,用so的取值组成的二进制转换为十进制来表示对应的g。例如表1所示的示例中,so分别取值为1,0,1,1,转换为十进制为11,因此对应的g记作g11。where S[t] is the input of the entire pulse rearrangement residual module at time step t,
Figure BDA0003643331460000102
is the ith {spike rearrangement-convolution-normalization-spike neuron layer-spike anti-rearrangement} stack; n here is the total number of stacks (different from n in step 4). in formula (2)
Figure BDA0003643331460000103
That is, the output obtained after multiple actions of {pulse rearrangement-convolution-normalization-spike neuron layer-pulse anti-rearrangement}, together with the original input S[t], through the action of the connection function g, the output is obtained O[t]. The full form of the connection function g is s o =g(s a ,s b ), which is essentially an element-wise logistic function. In order to distinguish, the binary conversion composed of the values of s o is converted to decimal to represent the corresponding g. For example, in the example shown in Table 1, the values of s o are 1, 0, 1, and 1 respectively, which are converted to 11 in decimal, so the corresponding g is denoted as g 11 .

表1逐元素的逻辑函数取值对应表Table 1 Element-by-element logical function value corresponding table

Figure BDA0003643331460000104
Figure BDA0003643331460000104

Figure BDA0003643331460000111
Figure BDA0003643331460000111

根据(sa,sb,so)组成的真值表,可以取16种逻辑函数,对应的g为{g0,g1,…,g15}。此处需要说明的是,在后边第三步的训练网络时,g的梯度可以用数值梯度来定义。例如使用表1中的g11,若要求解

Figure BDA0003643331460000112
可以使用
Figure BDA0003643331460000113
来求解。According to the truth table composed of (s a , s b , s o ), 16 logical functions can be taken, and the corresponding g is {g 0 , g 1 ,…,g 15 }. It should be noted here that when training the network in the third step, the gradient of g can be defined by numerical gradient. For example, using g 11 in Table 1, if you want to solve
Figure BDA0003643331460000112
can use
Figure BDA0003643331460000113
to solve.

第二步,将配置脉冲重排残差块后的基于脉冲重排深度残差神经网络作为第一脉冲重排模型。In the second step, the deep residual neural network based on pulse rearrangement after configuring the pulse rearrangement residual block is used as the first pulse rearrangement model.

第三步,训练所述第一脉冲重排模型。The third step is to train the first pulse rearrangement model.

具体训练时,参数为学习率∈,网络

Figure BDA0003643331460000114
及其参数θ,含有N个数据的训练集D,损失函数
Figure BDA0003643331460000115
训练总轮数E。During specific training, the parameter is the learning rate ∈, the network
Figure BDA0003643331460000114
and its parameter θ, the training set D containing N data, the loss function
Figure BDA0003643331460000115
The total number of training rounds E.

[1]令e=1[1] Let e=1

[2]令i=1[2] Let i=1

[3]从数据集中取出(X,Y)=D[i],获取输入序列的长度为T[3] Take out (X, Y)=D[i] from the data set, and obtain the length of the input sequence as T

[4]令t=1[4] Let t=1

[5]将X[t]输入网络,得到

Figure BDA0003643331460000116
[5] Input X[t] into the network, get
Figure BDA0003643331460000116

[6]令t=t+1[6] Let t=t+1

[7]若t>,则进入[8];否则回到[5][7] If t>, enter [8]; otherwise, return to [5]

[8]计算损失

Figure BDA0003643331460000117
[8] Calculate the loss
Figure BDA0003643331460000117

[9]反向传播,梯度下降,更新参数

Figure BDA0003643331460000118
[9] Backpropagation, Gradient Descent, Updating Parameters
Figure BDA0003643331460000118

[10]令i=i+1[10] Let i=i+1

[11]若i>,则进入[12];否则回到[3][11] If i>, enter [12]; otherwise, go back to [3]

[12]令e=e+1[12] Let e=e+1

[13]若e>,则退出;否则回到[2][13] If e>, exit; otherwise, return to [2]

若为数据分类任务,当真实类别为j时,对任意的t,Y[t][j]=1;而对任意的k≠j,Y[t][k]=0。损失函数可以为均方误差

Figure BDA0003643331460000121
或交叉熵
Figure BDA0003643331460000122
或者是其他度量距离的损失。若为数据回归任务,当回归目标是一个序列时,损失函数可以直接是
Figure BDA0003643331460000123
当回归目标是单个元素Y时,损失函数需要根据输出的类型做相应的更改。当使用所有时刻的平均值作为回归结果时,损失函数可以为
Figure BDA0003643331460000124
当使用最后一个时刻的输出或最后一层脉冲神经元在最后一个时刻的膜电位作为回归结果,损失损失函数可以为
Figure BDA0003643331460000125
If it is a data classification task, when the real class is j, for any t, Y[t][j]=1; and for any k≠j, Y[t][k]=0. The loss function can be the mean squared error
Figure BDA0003643331460000121
or cross entropy
Figure BDA0003643331460000122
Or the loss of other metric distances. For data regression tasks, when the regression target is a sequence, the loss function can be directly
Figure BDA0003643331460000123
When the regression target is a single element Y, the loss function needs to be changed according to the type of output. When using the mean of all moments as the regression result, the loss function can be
Figure BDA0003643331460000124
When using the output of the last moment or the membrane potential of the last layer of spiking neurons at the last moment as the regression result, the loss loss function can be
Figure BDA0003643331460000125

第四步,将目标数据输入训练好的第一脉冲重排模型中进行处理,得到目标处理结果。In the fourth step, the target data is input into the trained first pulse rearrangement model for processing, and the target processing result is obtained.

在一种的实现方式中,将目标数据输入训练好的第一脉冲重排模型包括:将目标数据输入第一卷积层进行下采样;将下采样后的目标数据输入多个紧邻的脉冲重排残差模块进行脉冲重排残差处理,得到第一处理结果;将第一处理结果依次输入池化层和全连接层,得到第二处理结果。脉冲重排残差模块依次配置有脉冲重排层、第二卷积层、规范化层、脉冲神经元层和脉冲反重排层;将下采样后的目标数据输入多个紧邻的脉冲重排残差模块进行脉冲重排残差处理,得到第一处理结果,包括:将下采样后的目标数据输入脉冲重排层,得到脉冲重排结果;将脉冲重排结果依次通过第二卷积层、规范化层、脉冲神经元层和脉冲反重排层的处理,得到第一处理结果。In an implementation manner, inputting the target data into the trained first pulse rearrangement model includes: inputting the target data into the first convolutional layer for downsampling; inputting the downsampled target data into a plurality of adjacent pulse rearrangements The row residual module performs pulse rearrangement residual processing to obtain the first processing result; the first processing result is input into the pooling layer and the fully connected layer in turn to obtain the second processing result. The pulse rearrangement residual module is sequentially configured with a pulse rearrangement layer, a second convolution layer, a normalization layer, a pulse neuron layer and a pulse anti-rearrangement layer; the down-sampled target data is input into multiple adjacent pulse rearrangement residuals. The difference module performs pulse rearrangement residual processing to obtain the first processing result, including: inputting the down-sampled target data into the pulse rearrangement layer to obtain the pulse rearrangement result; passing the pulse rearrangement result through the second convolution layer, The normalization layer, the spiking neuron layer and the spiking anti-rearrangement layer are processed to obtain the first processing result.

在一种具体的实现方式中,将下采样后的目标数据输入脉冲重排层,得到脉冲重排结果,由公式(1)表示:In a specific implementation manner, the down-sampled target data is input into the pulse rearrangement layer, and the pulse rearrangement result is obtained, which is represented by formula (1):

Figure BDA0003643331460000131
Figure BDA0003643331460000131

其中,Y表示脉冲重排层所进行的重排操作,X表示下采样后的目标数据;n,z,y,x依次表示下采样后的目标数据的批量大小、通道序数、高度和宽度;M表示总通道数,r表示重排系数,%表示求余,

Figure BDA0003643331460000132
表示向下取整。Among them, Y represents the rearrangement operation performed by the pulse rearrangement layer, X represents the down-sampled target data; n, z, y, and x represent the batch size, channel number, height and width of the down-sampled target data in turn; M represents the total number of channels, r represents the rearrangement coefficient, % represents the remainder,
Figure BDA0003643331460000132
Indicates rounded down.

脉冲重排指的是将脉冲在通道上的数据按顺序拆分到宽和高上,而脉冲反重排则是逆操作,是一种特殊的尺寸变换,例如尺寸为[N,M,H,W]的输入脉冲矩阵(其中N是批量大小,M是通道数,H是高度,W是宽度),重排系数为r2(其中r是正整数),则将其更改形状为

Figure BDA0003643331460000133
脉冲反重排则是做逆向操作,将[N,M,H,W]的形状重塑为
Figure BDA0003643331460000134
在这里参考图3,目标数据为四个脉冲矩阵,分别是a,b,c,d,尺寸为2x2的脉冲矩阵组成的4通道脉冲矩阵,形状为[4,2,2];经过脉冲重排后得到一个大的4x4的脉冲矩阵,尺寸为[1,4,4]。将[1,4,4]的大脉冲矩阵拆分成4通道得到[4,2,2]的4通道脉冲矩阵,即为脉冲反重排。作为可变换的实施方式,若目标数据为图像,则经过脉冲重排残差模块,会经过像素重排处理,再经卷积处理、规范化处理、脉冲神经元层处理后是像素反重排处理,最后再池化和全连接。另外,若欲输入数据为单个数字时,将该单个数字重复预设次得到长度为预设长的序列;若欲输入数据为多个数字组成的长度为T的序列,其中T大于1,则不需要进行重复;将长度为预设长的序列和长度为T的序列作为目标数据。Pulse rearrangement refers to splitting the pulse data on the channel into width and height in sequence, while pulse reverse rearrangement is an inverse operation, which is a special size transformation. For example, the size is [N, M, H ,W] (where N is the batch size, M is the number of channels, H is the height, and W is the width), and the rearrangement coefficient is r 2 (where r is a positive integer), then change its shape to
Figure BDA0003643331460000133
Pulse anti-rearrangement is to do the reverse operation and reshape the shape of [N, M, H, W] as
Figure BDA0003643331460000134
Referring to Figure 3 here, the target data is four pulse matrices, namely a, b, c, d, a 4-channel pulse matrix composed of pulse matrices with a size of 2x2, and the shape is [4, 2, 2]; After rowing, we get a large 4x4 impulse matrix of size [1, 4, 4]. The large pulse matrix of [1,4,4] is divided into 4 channels to obtain the 4-channel pulse matrix of [4,2,2], which is the pulse anti-rearrangement. As a transformable embodiment, if the target data is an image, it will undergo pixel rearrangement processing through the pulse rearrangement residual module, and then undergo pixel reverse rearrangement processing after convolution processing, normalization processing, and pulse neuron layer processing. , and finally pooled and fully connected. In addition, if the data to be input is a single number, repeat the single number a preset number of times to obtain a sequence with a preset length; if the data to be input is a sequence of length T composed of multiple numbers, where T is greater than 1, then There is no need to repeat; the sequence of the preset length and the sequence of length T are used as the target data.

上述规范化层功能是完成批量规范化或层规范化,若使用批量规范化,可以将批量规范化的参数与卷积层合并,以减少网络参数量,增加计算速度。具体方式为,记卷积的权重为Wconv,偏置一般设置为0,因为批量规范化自带偏置;记批量规范化的权重为Wbn,偏置项为Bbn,统计的数据均值Xm,方差Xv,则合并后的卷积的权重和偏置分别为:The above normalization layer function is to complete batch normalization or layer normalization. If batch normalization is used, the parameters of batch normalization can be combined with the convolution layer to reduce the amount of network parameters and increase the calculation speed. Specifically, the weight of the convolution is written as W conv , and the bias is generally set to 0, because batch normalization has its own bias; the weight of batch normalization is written as W bn , the bias term is B bn , and the statistical data mean X m , the variance X v , the weights and biases of the combined convolution are:

Figure BDA0003643331460000141
Figure BDA0003643331460000141

脉冲神经元层指的是由脉冲神经元组成的层。可以使用充电、放电、重置3个方程来描述脉冲神经元层的行为。公式(3)表示第一个方程为充电方程:A spiking neuron layer refers to a layer composed of spiking neurons. The behavior of the spiking neuron layer can be described using the charge, discharge, reset 3 equations. Equation (3) indicates that the first equation is the charging equation:

H[t]=f(V[t-1],X[t]) (3)H[t]=f(V[t-1],X[t]) (3)

其中,X[t]是t时刻的输入。为了避免混淆,使用H[t]表示充电后的电压,V[t]表示放电后的电压。其中f表示充电方程,不同神经元有不同的充电方程。充电方程是由连续时间微分方程离散化得到的。例如对使用连续时间微分方程描述的LIF神经元的阈下动态由公式(4)表示:where X[t] is the input at time t. To avoid confusion, use H[t] to denote the voltage after charging and V[t] to denote the voltage after discharge. where f represents the charging equation, and different neurons have different charging equations. The charging equation is obtained by discretizing the continuous-time differential equation. For example, the subthreshold dynamics for LIF neurons described using continuous-time differential equations is represented by equation (4):

Figure BDA0003643331460000142
Figure BDA0003643331460000142

进行离散化,得到阈下离散时间差分方程即为充电方程由公式(5)表示:After discretization, the subthreshold discrete time difference equation is obtained, which is the charging equation, which is represented by formula (5):

Figure BDA0003643331460000151
Figure BDA0003643331460000151

其中Vrest是静息电位,τ是膜时间常数。第二个方程为放电方程,由公式(6)表示:where Vrest is the resting potential and τ is the membrane time constant. The second equation is the discharge equation, expressed by Equation (6):

S[t]=Θ(H[t]-Vth) (6)S[t]=Θ(H[t]-V th ) (6)

S[t]是神经元释放的脉冲,Θ(x)是Heaviside阶跃函数,当且仅当x≥0输出1,否则输出0。放电方程表示神经元充电后的电压超过阈值Vth时,就会释放脉冲1,否则输出0。第三个方程为重置方程由公式(7)表示:S[t] is the impulse released by the neuron, and Θ(x) is the Heaviside step function that outputs 1 if and only if x ≥ 0, and 0 otherwise. The discharge equation states that when the charged voltage of the neuron exceeds the threshold V th , it will release a pulse of 1, otherwise it will output a 0. The third equation is the reset equation expressed by equation (7):

Figure BDA0003643331460000152
Figure BDA0003643331460000152

其中,Vreset表示重置电位。Hard reset表示硬重置,是神经元释放脉冲后电压被直接重置为Vreset。而Soft reset表示软重置,是神经元释放脉冲后,电压会减少VthAmong them, V reset represents the reset potential. Hard reset means hard reset, which means that the voltage is directly reset to V reset after the neuron releases the pulse. Soft reset means soft reset, which means that after the neuron releases the pulse, the voltage will decrease V th .

需要注意的是,放电方程中的Θ(x)导数,在x=0时无穷大,而x≠0时为0。这样的导数直接用来梯度下降,会使得网络无法训练。为了解决这一问题,使用梯度替代法,在前向传播时仍然使用Θ(x),确保脉冲神经元输出的是脉冲;而在反向传播时使用替代函数σ(x)的导数σ′(x)。σ(x)通常选取为一个值域在(0,1)的连续函数,例如常见的sigmoid函数。It should be noted that the derivative of Θ(x) in the discharge equation is infinite when x=0, and 0 when x≠0. Such derivatives are directly used for gradient descent, which will make the network unable to train. In order to solve this problem, the gradient substitution method is used, and Θ(x) is still used in the forward propagation to ensure that the output of the spiking neuron is a pulse; and the derivative σ' of the substitution function σ(x) is used in the backward propagation ( x). σ(x) is usually selected as a continuous function whose value range is (0,1), such as the common sigmoid function.

在一种具体实现方式中,再参考图2,所述得到目标处理结果,包括:根据所述第二处理结果获取所述目标数据对应的类别;基于所述第二处理结果获得回归序列和/或回归单个向量;将所述目标数据对应的类别、所述回归序列和/或所述回归单个向量作为目标处理结果。其中,如图2所示,模型最后一个时刻的输出或最后一层脉冲神经元最后时刻的膜电位可以作为回归的单个向量。可见,本申请所述方法适用于多种应用场景。In a specific implementation manner, referring to FIG. 2 again, the obtaining of the target processing result includes: obtaining a category corresponding to the target data according to the second processing result; obtaining a regression sequence and/or a regression sequence based on the second processing result Or regress a single vector; take the category corresponding to the target data, the regression sequence and/or the regression single vector as the target processing result. Among them, as shown in Figure 2, the output of the model at the last moment or the membrane potential of the last layer of spiking neurons at the last moment can be used as a single vector for regression. It can be seen that the method described in this application is suitable for various application scenarios.

本申请与不使用脉冲重排和反重排的普通卷积相比,参数量从Min·Mout·Kh·Kw降低为

Figure BDA0003643331460000161
参数量大为减少,降低了过拟合风险,也减轻了存储和计算开销。Compared with ordinary convolution without pulse rearrangement and anti-rearrangement in this application, the amount of parameters is reduced from M in · M out · K h · K w to
Figure BDA0003643331460000161
The number of parameters is greatly reduced, the risk of overfitting is reduced, and the storage and computational overhead is also reduced.

应当理解的是,以上的一般描述和后文的细节描述仅是示例性和解释性的,并不能限制本发明。It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention.

实施例3:Example 3:

本实施例提供了一种基于脉冲重排深度残差神经网络的数据处理装置,如图4所示,所述装置包括:This embodiment provides a data processing apparatus based on a pulse rearrangement deep residual neural network. As shown in FIG. 4 , the apparatus includes:

配置模块401,用于在基于脉冲重排深度残差神经网络中配置多个紧邻的脉冲重排残差模块;A configuration module 401 is used to configure a plurality of adjacent pulse rearrangement residual modules in the pulse rearrangement-based deep residual neural network;

重排模块402,用于将配置脉冲重排残差块后的基于脉冲重排深度残差神经网络作为第一脉冲重排模型;The rearrangement module 402 is configured to use the pulse rearrangement-based deep residual neural network after configuring the pulse rearrangement residual block as the first pulse rearrangement model;

训练模块403,用于训练所述第一脉冲重排模型;A training module 403, configured to train the first pulse rearrangement model;

处理模块404,用于将目标数据输入训练好的第一脉冲重排模型中进行处理,得到目标处理结果。The processing module 404 is configured to input the target data into the trained first pulse rearrangement model for processing to obtain the target processing result.

应当理解的是,以上的一般描述和后文的细节描述仅是示例性和解释性的,并不能限制本发明。It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention.

还需要强调的是,本申请实施例中提供的系统可以基于人工智能技术对相关的数据进行获取和处理。其中,人工智能(Artificial Intelligence,AI)是利用数字计算机或者数字计算机控制的机器模拟、延伸和扩展人的智能,感知环境、获取知识并使用知识获得最佳结果的理论、方法、技术及应用系统。人工智能基础技术一般包括如传感器、专用人工智能芯片、云计算、分布式存储、大数据处理技术、操作/交互系统、机电一体化等技术。人工智能软件技术主要包括计算机视觉技术、机器人技术、生物识别技术、语音处理技术、自然语言处理技术以及机器学习/深度学习等几大方向。It should also be emphasized that the system provided in the embodiments of the present application can acquire and process related data based on artificial intelligence technology. Among them, artificial intelligence (AI) is a theory, method, technology and application system that uses digital computers or machines controlled by digital computers to simulate, extend and expand human intelligence, perceive the environment, acquire knowledge and use knowledge to obtain the best results. . The basic technologies of artificial intelligence generally include technologies such as sensors, special artificial intelligence chips, cloud computing, distributed storage, big data processing technology, operation/interaction systems, and mechatronics. Artificial intelligence software technology mainly includes computer vision technology, robotics technology, biometrics technology, speech processing technology, natural language processing technology, and machine learning/deep learning.

下面请参考图5,其示出了本申请的一些实施方式所提供的一种计算机设备的示意图。如图5所示,所述计算机设备2包括:处理器200,存储器201,总线202和通信接口203,所述处理器200、通信接口203和存储器201通过总线202连接;所述存储器201中存储有可在所述处理器200上运行的计算机程序,所述处理器200运行所述计算机程序时执行本申请前述任一实施方式所提供的基于脉冲重排深度残差神经网络的数据处理方法。Please refer to FIG. 5 below, which shows a schematic diagram of a computer device provided by some embodiments of the present application. As shown in FIG. 5 , the computer device 2 includes: a processor 200 , a memory 201 , a bus 202 and a communication interface 203 , and the processor 200 , the communication interface 203 and the memory 201 are connected through the bus 202 ; There is a computer program that can be run on the processor 200. When the processor 200 runs the computer program, the data processing method based on the pulse rearrangement deep residual neural network provided by any of the foregoing embodiments of the present application is executed.

其中,存储器201可能包含高速随机存取存储器(RAM:Random Access Memory),也可能还包括非不稳定的存储器(non-volatile memory),例如至少一个磁盘存储器。通过至少一个通信接口203(可以是有线或者无线)实现该系统网元与至少一个其他网元之间的通信连接,可以使用互联网、广域网、本地网、城域网等。The memory 201 may include a high-speed random access memory (RAM: Random Access Memory), and may also include a non-volatile memory (non-volatile memory), such as at least one disk memory. The communication connection between the network element of the system and at least one other network element is realized through at least one communication interface 203 (which may be wired or wireless), which may use the Internet, a wide area network, a local network, a metropolitan area network, and the like.

总线202可以是ISA总线、PCI总线或EISA总线等。所述总线可以分为地址总线、数据总线、控制总线等。其中,存储器201用于存储程序,所述处理器200在接收到执行指令后,执行所述程序,前述本申请实施例任一实施方式揭示的所述基于脉冲重排深度残差神经网络的数据处理方法可以应用于处理器200中,或者由处理器200实现。The bus 202 may be an ISA bus, a PCI bus, an EISA bus, or the like. The bus can be divided into an address bus, a data bus, a control bus, and the like. The memory 201 is used to store a program, and the processor 200 executes the program after receiving the execution instruction, and the data of the pulse rearrangement-based deep residual neural network disclosed in any of the foregoing embodiments of the present application The processing method may be applied in the processor 200 or implemented by the processor 200 .

处理器200可能是一种集成电路芯片,具有信号的处理能力。在实现过程中,上述方法的各步骤可以通过处理器200中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器200可以是通用处理器,包括中央处理器(Central Processing Unit,简称CPU)、网络处理器(Network Processor,简称NP)等;还可以是数字信号处理器(DSP)、专用集成电路(ASIC)、现成可编程门阵列(FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。可以实现或者执行本申请实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合本申请实施例所公开的方法的步骤可以直接体现为硬件译码处理器执行完成,或者用译码处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存储器,闪存、只读存储器,可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器201,处理器200读取存储器201中的信息,结合其硬件完成上述方法的步骤。The processor 200 may be an integrated circuit chip with signal processing capability. In the implementation process, each step of the above-mentioned method can be completed by an integrated logic circuit of hardware in the processor 200 or an instruction in the form of software. The above-mentioned processor 200 may be a general-purpose processor, including a central processing unit (Central Processing Unit, CPU for short), a network processor (Network Processor, NP for short), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), off-the-shelf programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware component. The methods, steps, and logic block diagrams disclosed in the embodiments of this application can be implemented or executed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in conjunction with the embodiments of the present application may be directly embodied as executed by a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules may be located in random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, registers and other storage media mature in the art. The storage medium is located in the memory 201, and the processor 200 reads the information in the memory 201, and completes the steps of the above method in combination with its hardware.

本申请实施方式还提供一种与前述实施方式所提供的基于脉冲重排深度残差神经网络的数据处理方法对应的计算机可读存储介质,请参考图6,图6示出的计算机可读存储介质为光盘30,其上存储有计算机程序(即程序产品),所述计算机程序在被处理器运行时,会执行前述任意实施方式所提供的基于脉冲重排深度残差神经网络的数据处理方法。The embodiments of the present application also provide a computer-readable storage medium corresponding to the data processing method based on the pulse rearrangement deep residual neural network provided by the foregoing embodiments, please refer to FIG. 6 , the computer-readable storage medium shown in FIG. 6 The medium is an optical disc 30, on which a computer program (ie, a program product) is stored. When the computer program is run by the processor, the computer program will execute the data processing method based on the pulse rearrangement deep residual neural network provided by any of the foregoing embodiments. .

另外,所述计算机可读存储介质的例子还可以包括,但不限于相变内存(PRAM)、静态随机存取存储器(SRAM)、动态随机存取存储器(DRAM)、其他类型的随机存取存储器(RAM)、只读存储器(ROM)、电可擦除可编程只读存储器(EEPROM)、快闪记忆体或其他光学、磁性存储介质,在此不再一一赘述。In addition, examples of the computer-readable storage medium may also include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read only memory (ROM), electrically erasable programmable read only memory (EEPROM), flash memory or other optical and magnetic storage media, which will not be described in detail here.

本申请的上述实施例提供的计算机可读存储介质与本申请实施例提供的空分复用光网络中量子密钥分发信道分配方法出于相同的发明构思,具有与其存储的应用程序所采用、运行或实现的方法相同的有益效果。The computer-readable storage medium provided by the above-mentioned embodiments of the present application and the quantum key distribution channel allocation method in the space-division multiplexing optical network provided by the embodiments of the present application are based on the same inventive concept, and have the same inventive concept as the application program stored in the computer-readable storage medium. run or achieve the same beneficial effect as the method.

本申请实施方式还提供一种计算机程序产品,包括计算机程序,该计算机程序被处理器执行时实现前述任意实施方式所提供的基于脉冲重排深度残差神经网络的数据处理方法的步骤,包括:在基于脉冲重排深度残差神经网络中配置多个紧邻的脉冲重排残差模块;将配置脉冲重排残差块后的基于脉冲重排深度残差神经网络作为第一脉冲重排模型;训练所述第一脉冲重排模型;将目标数据输入训练好的第一脉冲重排模型中进行处理,得到目标处理结果。Embodiments of the present application further provide a computer program product, including a computer program, when the computer program is executed by a processor, the computer program implements the steps of the data processing method based on the pulse rearrangement deep residual neural network provided by any of the foregoing embodiments, including: Configure a plurality of adjacent pulse rearrangement residual modules in the pulse rearrangement-based deep residual neural network; use the pulse rearrangement-based deep residual neural network after configuring the pulse rearrangement residual block as the first pulse rearrangement model; The first pulse rearrangement model is trained; the target data is input into the trained first pulse rearrangement model for processing, and the target processing result is obtained.

需要说明的是:在此提供的算法和显示不与任何特定计算机、虚拟装置或者其它设备有固有相关。各种通用装置也可以与基于在此的示教一起使用。根据上面的描述,构造这类装置所要求的结构是显而易见的。此外,本申请也不针对任何特定编程语言。应当明白,可以利用各种编程语言实现在此描述的本申请的内容,并且上面对特定语言所做的描述是为了披露本申请的最佳实施方式。在此处所提供的说明书中,说明了大量具体细节。然而,能够理解,本申请的实施例可以在没有这些具体细节的情况下实践。在一些实例中,并未详细示出公知的方法、结构和技术,以便不模糊对本说明书的理解。It should be noted that the algorithms and displays provided herein are not inherently related to any particular computer, virtual appliance or other device. Various general-purpose devices can also be used with the teachings based on this. The structure required to construct such a device is apparent from the above description. Furthermore, this application is not directed to any particular programming language. It should be understood that the content of the application described herein can be implemented using a variety of programming languages and that the descriptions of specific languages above are intended to disclose the best mode of the application. In the description provided herein, numerous specific details are set forth. It will be understood, however, that the embodiments of the present application may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.

类似地,应当理解,为了精简本申请并帮助理解各个发明方面中的一个或多个,在上面对本申请的示例性实施例的描述中,本申请的各个特征有时被一起分组到单个实施例、图或者对其的描述中。然而,并不应将该公开的方法解释成反映如下意图:即所要求保护的本申请要求比在每个权利要求中所明确记载的特征更多的特征。更确切地说,如下面的权利要求书所反映的那样,发明方面在于少于前面公开的单个实施例的所有特征。因此,遵循具体实施方式的权利要求书由此明确地并入该具体实施方式,其中每个权利要求本身都作为本申请的单独实施例。Similarly, it is to be understood that in the above description of exemplary embodiments of the present application, various features of the present application are sometimes grouped together into a single embodiment, figure or its description. This disclosure, however, should not be interpreted as reflecting an intention that the claimed application requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the Detailed Description are hereby expressly incorporated into this Detailed Description, with each claim standing on its own as a separate embodiment of this application.

本领域那些技术人员可以理解,可以对实施例中的设备中的模块进行自适应性地改变并且把它们设置在与该实施例不同的一个或多个设备中。可以把实施例中的模块或单元或组件组合成一个模块或单元或组件,以及此外可以把它们分成多个子模块或子单元或子组件。除了这样的特征和/或过程或者单元中的至少一些是相互排斥之外,可以采用任何组合对本说明书中公开的所有特征以及如此公开的任何方法或者设备的所有过程或单元进行组合。除非另外明确陈述,本说明书中公开的每个特征可以由提供相同、等同或相似目的的替代特征来代替。Those skilled in the art will understand that the modules in the device in the embodiment can be adaptively changed and arranged in one or more devices different from the embodiment. The modules or units or components in the embodiments may be combined into one module or unit or component, and further they may be divided into multiple sub-modules or sub-units or sub-assemblies. All features disclosed in this specification and all processes or elements of any method or apparatus so disclosed may be combined in any combination, except that at least some of such features and/or procedures or elements are mutually exclusive. Unless expressly stated otherwise, each feature disclosed in this specification may be replaced by alternative features serving the same, equivalent or similar purpose.

本申请的各个部件实施例可以以硬件实现,或者以在一个或者多个处理器上运行的软件模块实现,或者以它们的组合实现。本领域的技术人员应当理解,可以在实践中使用微处理器或者数字信号处理器(DSP)来实现根据本申请实施例的虚拟机的创建装置中的一些或者全部部件的一些或者全部功能。本申请还可以实现为用于执行这里所描述的方法的一部分或者全部的设备或者装置程序。实现本申请的程序可以存储在计算机可读介质上,或者可以具有一个或者多个信号的形式。这样的信号可以从因特网网站上下载得到,或者在载体信号上提供,或者以任何其他形式提供。Various component embodiments of the present application may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art should understand that, in practice, a microprocessor or a digital signal processor (DSP) may be used to implement some or all functions of some or all components in the apparatus for creating a virtual machine according to the embodiments of the present application. The present application can also be implemented as an apparatus or apparatus program for performing part or all of the methods described herein. A program implementing the present application may be stored on a computer-readable medium, or may be in the form of one or more signals. Such signals may be downloaded from Internet sites, or provided on carrier signals, or in any other form.

以上所述,仅为本申请较佳的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到的变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以所述权利要求的保护范围为准。The above description is only a preferred embodiment of the present application, but the protection scope of the present application is not limited to this. Substitutions should be covered within the protection scope of this application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims (10)

1. A data processing method based on a pulse rearrangement depth residual error neural network is characterized by comprising the following steps:
configuring a plurality of immediately adjacent pulse rearrangement residual modules in a pulse rearrangement based depth residual neural network;
taking the pulse rearrangement-based depth residual error neural network after the pulse rearrangement residual block is configured as a first pulse rearrangement model;
training the first pulse rearrangement model;
and inputting the target data into the trained first pulse rearrangement model for processing to obtain a target processing result.
2. The data processing method based on the pulse rearrangement depth residual neural network according to claim 1, characterized in that the first pulse rearrangement model is further provided with a first convolution layer, a pooling layer and a full-link layer; inputting the target data into the trained first pulse rearrangement model for processing, wherein the processing comprises the following steps:
inputting target data into the first convolution layer for down-sampling;
inputting the down-sampled target data into the plurality of adjacent pulse rearrangement residual modules for pulse rearrangement residual processing to obtain a first processing result;
and inputting the first processing result into the pooling layer and the full-connection layer in sequence to obtain a second processing result.
3. The method according to claim 2, wherein the obtaining the target processing result comprises:
obtaining the category corresponding to the target data according to the second processing result;
obtaining a regression sequence and/or a regression single vector based on the second processing result;
and taking the category corresponding to the target data, the regression sequence and/or the regression single vector as a target processing result.
4. The data processing method based on the pulse rearrangement depth residual neural network according to claim 2, wherein the pulse rearrangement residual module is configured with a pulse rearrangement layer, a second convolution layer, a normalization layer, a pulse neuron layer and a pulse rearrangement layer in sequence; the step of inputting the downsampled target data into the plurality of adjacent pulse rearrangement residual error modules to perform pulse rearrangement residual error processing to obtain a first processing result includes:
inputting the target data after down sampling into a pulse rearrangement layer to obtain a pulse rearrangement result;
and processing the pulse rearrangement result by a second convolution layer, a normalization layer, a pulse neuron layer and a pulse reverse rearrangement layer in sequence to obtain a first processing result.
5. The data processing method based on the pulse rearrangement depth residual neural network of claim 4, wherein the target data after down-sampling is input into a pulse rearrangement layer to obtain a pulse rearrangement result, and the formula is as follows:
Figure FDA0003643331450000021
wherein, Y represents the rearrangement operation performed by the pulse rearrangement layer, and X represents the target data after down sampling; n, z, y and x sequentially represent the batch size, channel number, height and width of the target data after down-sampling; m represents the total number of channels, r represents the rearrangement coefficient,% represents the remainder,
Figure FDA0003643331450000022
indicating a rounding down.
6. The method of claim 2, wherein a first of the plurality of immediately adjacent pulse rearrangement residual modules is further configured with a downsampling function.
7. The data processing method based on the pulse rearrangement deep residual error neural network of claim 1, wherein before the target data is input into the trained first pulse rearrangement model for processing, and a target processing result is obtained, the method further comprises:
acquiring data to be input;
if the data to be input is a single number, repeating the single number for a preset time to obtain a sequence with a preset length; if the data to be input is a sequence with the length of T and formed by a plurality of numbers, wherein T is more than 1, the data does not need to be repeated;
and taking the sequence with the length being a preset length and the sequence with the length being T as target data.
8. A data processing apparatus based on a pulse rearrangement depth residual neural network, the apparatus comprising:
a configuration module for configuring a plurality of immediately adjacent pulse rearrangement residual modules in a pulse rearrangement-based depth residual neural network;
the rearrangement module is used for taking the pulse rearrangement-depth-based residual error neural network after the pulse rearrangement residual block is configured as a first pulse rearrangement model;
a training module for training the first pulse rearrangement model;
and the processing module is used for inputting the target data into the trained first pulse rearrangement model for processing to obtain a target processing result.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the method according to any of claims 1-7.
10. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 7.
CN202210520896.0A 2022-05-13 2022-05-13 Data processing method and device based on pulse rearrangement depth residual error neural network Active CN115204356B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210520896.0A CN115204356B (en) 2022-05-13 2022-05-13 Data processing method and device based on pulse rearrangement depth residual error neural network

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210520896.0A CN115204356B (en) 2022-05-13 2022-05-13 Data processing method and device based on pulse rearrangement depth residual error neural network

Publications (2)

Publication Number Publication Date
CN115204356A true CN115204356A (en) 2022-10-18
CN115204356B CN115204356B (en) 2025-07-22

Family

ID=83575059

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210520896.0A Active CN115204356B (en) 2022-05-13 2022-05-13 Data processing method and device based on pulse rearrangement depth residual error neural network

Country Status (1)

Country Link
CN (1) CN115204356B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117574968A (en) * 2023-11-30 2024-02-20 中国海洋大学 Quantum-derived impulse convolutional neural network, image processing method and system
CN118690014A (en) * 2024-06-04 2024-09-24 人工智能与数字经济广东省实验室(深圳) A text emotion recognition method, device, equipment and storage medium

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100030130A1 (en) * 2001-11-09 2010-02-04 Cochlear Limited Pharmaceutical intervention for modulation of neural plasticity
CN108985252A (en) * 2018-07-27 2018-12-11 陕西师范大学 The image classification method of improved pulse deep neural network
US20200401876A1 (en) * 2019-06-24 2020-12-24 Washington University Method for designing scalable and energy-efficient analog neuromorphic processors
CN112633497A (en) * 2020-12-21 2021-04-09 中山大学 Convolutional pulse neural network training method based on reweighted membrane voltage
WO2022048582A1 (en) * 2020-09-02 2022-03-10 北京灵汐科技有限公司 Method and device for optical flow information prediction, electronic device, and storage medium

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100030130A1 (en) * 2001-11-09 2010-02-04 Cochlear Limited Pharmaceutical intervention for modulation of neural plasticity
CN108985252A (en) * 2018-07-27 2018-12-11 陕西师范大学 The image classification method of improved pulse deep neural network
US20200401876A1 (en) * 2019-06-24 2020-12-24 Washington University Method for designing scalable and energy-efficient analog neuromorphic processors
WO2022048582A1 (en) * 2020-09-02 2022-03-10 北京灵汐科技有限公司 Method and device for optical flow information prediction, electronic device, and storage medium
CN112633497A (en) * 2020-12-21 2021-04-09 中山大学 Convolutional pulse neural network training method based on reweighted membrane voltage

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117574968A (en) * 2023-11-30 2024-02-20 中国海洋大学 Quantum-derived impulse convolutional neural network, image processing method and system
CN118690014A (en) * 2024-06-04 2024-09-24 人工智能与数字经济广东省实验室(深圳) A text emotion recognition method, device, equipment and storage medium

Also Published As

Publication number Publication date
CN115204356B (en) 2025-07-22

Similar Documents

Publication Publication Date Title
CN108805270B (en) Convolutional neural network system based on memory
US11657257B2 (en) Spiking neural network
CN112561027B (en) Neural network architecture search method, image processing method, device and storage medium
CN107153873B (en) A kind of two-value convolutional neural networks processor and its application method
CN111882031B (en) A neural network distillation method and device
US11915128B2 (en) Neural network circuit device, neural network processing method, and neural network execution program
EP3564866A1 (en) Computation method
US9563840B2 (en) System and method for parallelizing convolutional neural networks
US20220138542A1 (en) Brain-like computing chip and computing device
EP3407266A1 (en) Artificial neural network calculating device and method for sparse connection
CN114600126B (en) Convolution operation circuit and convolution operation method
CN106485317A (en) A kind of neutral net accelerator and the implementation method of neural network model
CN111582451B (en) Image recognition interlayer parallel pipeline type binary convolution neural network array architecture
CN103620624A (en) Method and apparatus for locally competitive learning rules leading to sparse connectivity
CN115204356A (en) Data processing method and device based on pulse rearrangement deep residual neural network
US20200349424A1 (en) Memory layouts and conversion to improve neural network inference performance
Hu et al. Quantized STDP-based online-learning spiking neural network
CN111045644A (en) Parallel memory access and computation in memory devices
CN115204355A (en) Neural processing unit capable of reusing data and method therefor
CN114821058A (en) An image semantic segmentation method, device, electronic device and storage medium
CN113837350A (en) Neuromorphic devices and methods of training neural networks for image recognition
CN116802646A (en) Data processing methods and devices
Gao et al. Natural scene recognition based on convolutional neural networks and deep Boltzmannn machines
CN114861859A (en) Training method, data processing method and device for neural network model
WO2023116923A1 (en) Storage and calculation integrated device and calculation method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant