CN115347096B - GaN-based light-emitting diode epitaxial wafer and preparation method thereof - Google Patents

Abstract

The invention relates to the technical field of semiconductors, and particularly discloses a GaN-based light-emitting diode epitaxial wafer and a preparation method thereof, wherein the GaN-based light-emitting diode epitaxial wafer comprises a Si substrate, a buffer layer and an epitaxial layer which are sequentially arranged, and the buffer layer comprises an AlN layer and an Al layer which are sequentially deposited along the epitaxial growth direction _{1‑ x} Sc _x N layer and high temperature Al _i Ga _1‑i N layer, the high temperature Al _i Ga _1‑i The Al component content of the N layer gradually decreases along the epitaxial growth direction. The invention uses AlN layer and Al in buffer layer _1‑x Sc _x N layer and high temperature Al _i Ga _1‑i The N layers are matched with each other, so that the diffusion of Si atoms formed on the surface of the Si substrate is effectively reduced, the lattice matching with the epitaxial layer is increased, the problem of lattice mismatch between the Si substrate and the GaN material in the prior art is effectively solved, the epitaxial layer has high lattice quality, few defects, good surface flatness and high antistatic capability.

Description

GaN-based light-emitting diode epitaxial wafer and preparation method thereof

technical field

The invention relates to the technical field of semiconductors, in particular to a GaN-based light-emitting diode epitaxial wafer and a preparation method thereof.

Background technique

At present, due to the lack of natural GaN bulk single crystal materials in nature, GaN-based materials and devices are mainly realized by epitaxial growth on heterogeneous substrates. Currently, commonly used heterogeneous substrates are sapphire, SiC and Si. Among them, the Si substrate has the advantages of large size, low cost, good thermal conductivity, and can be integrated with GaN-based materials and devices. As a substrate material for GaN-based materials and device epitaxial growth, it can realize 6-inch, 8-inch and 12-inch and other large-scale epitaxy, and the substrate is relatively easy to peel off, which can reduce production costs and has great market competitiveness.

However, there is a serious lattice mismatch between the Si substrate and the GaN material, which leads to defects such as poor surface flatness and poor antistatic ability of the Si substrate light-emitting diode epitaxial wafer. In the prior art, in order to solve the lattice mismatch and thermal Mismatch problem, usually a buffer layer is deposited on the Si substrate first, such as GaN buffer layer or AlN buffer layer, but it can only alleviate the lattice mismatch and thermal mismatch to a certain extent, and the surface flatness of the epitaxial layer is poor , The problem of poor antistatic ability still exists.

Contents of the invention

The object of the present invention is to provide a GaN-based light-emitting diode epitaxial wafer with good surface flatness and strong antistatic ability and a preparation method thereof in view of the existing technical status.

To achieve the above object, the present invention adopts the following technical solutions:

A GaN-based light-emitting diode epitaxial wafer, comprising a Si substrate, a buffer layer, and an epitaxial layer arranged in sequence, the buffer layer including an AlN layer, an Al _1-x Sc _x N layer, and a high-temperature Al _i In the Ga _1-i N layer, the Al composition content of the high-temperature _Ali Ga _1-i N layer decreases gradually along the epitaxial growth direction.

In some embodiments, in the Al _1-x Sc _x N layer, x is 0.1≤x≤0.3.

In some embodiments, in the high-temperature Al _i Ga _1-i N layer, i gradually decreases from 0.1-2 to 0-0.01 along the epitaxial growth direction.

In some embodiments, the growth temperature of the high-temperature Al _i Ga _1-i N layer is 800-1000°C.

In some embodiments, the thickness of the AlN layer is 10-20 nm; the thickness of the Al _1-x Sc _x N layer is 5-40 nm; the thickness of the high-temperature Al _i Ga _1-i N layer is 5-20 nm. 20nm.

In some embodiments, both the AlN layer and the Al _1-x Sc _x N layer are prepared by magnetron sputtering, and the high-temperature Al _i Ga _1-i N layer is prepared by MOCVD.

In some embodiments, the epitaxial layer includes an undoped U-GaN layer, an N-type semiconductor layer, a multi-quantum well layer, an electron blocking layer, and a P-type semiconductor layer deposited sequentially along the epitaxial growth direction.

In some embodiments, the electron blocking layer includes _{AlyGa 1-y} N sub-layers and In _z Ga _1-z N sub-layers which are periodically and alternately grown in sequence, y is 0.05≤y≤0.2, z is 0.1≤ z≤0.5, the period number of the electron blocking layer is 3~15, and the thickness is 20~50nm.

The present invention also provides a method for preparing GaN-based light-emitting diode epitaxial wafers, including:

Provide Si substrate;

On the Si substrate, a buffer layer and an epitaxial layer are sequentially grown;

The growth step of described buffer layer comprises:

Deposit AlN layer, Al _1-x Sc _x N layer and high temperature Al _i Ga _1-i N layer in sequence;

During the growth process of the high-temperature Al _i Ga _1-i N layer, the flow rate of the Al source is controlled to decrease gradually.

In some embodiments, the step of growing the buffer layer includes: sequentially depositing an AlN layer and an Al _1-x Sc _x N layer on a Si substrate by magnetron sputtering, the deposition pressure is 5-10 mTorr, and the deposition temperature is The temperature is 200-1000° C., the deposition voltage is 150-400 V, and the sputtering target of the Al _1-x Sc _x N layer is a ScAl alloy target.

The beneficial effects of the present invention are:

The present invention effectively reduces the diffusion of Si atoms formed on the surface of the Si substrate through the cooperation among the AlN layer, the Al _1-x Sc _x N layer and the high-temperature Al _i Ga _1-i N layer in the buffer layer, and increases the The lattice matching between the epitaxial layers effectively solves the problem of lattice mismatch between the Si substrate and the GaN material in the prior art. The epitaxial layer has high lattice quality, less defects, good surface flatness, and antistatic ability high.

Description of drawings

FIG. 1 is a schematic structural view of a GaN-based light-emitting diode epitaxial wafer of the present invention.

FIG. 2 is another structural schematic diagram of the GaN-based light-emitting diode epitaxial wafer of the present invention.

Fig. 3 is a flow chart of a method for preparing a GaN-based light-emitting diode epitaxial wafer according to the present invention.

Fig. 4 is a specific flow chart of the method for preparing a GaN-based light-emitting diode epitaxial wafer according to the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below.

Referring to Fig. 1, a GaN-based light-emitting diode epitaxial wafer includes a Si substrate 1, a buffer layer 2 and an epitaxial layer arranged in sequence, wherein the epitaxial layer is an epitaxial layer of a GaN-based material, and the buffer layer 2 includes an epitaxial layer along the epitaxial growth direction. The AlN layer 21, the Al _1-x Sc _x N layer 22 and the high temperature Ali _{Ga 1-i} N layer 23 are deposited sequentially, and the Al component content of the high temperature Ali _{Ga 1-i} N layer 23 decreases gradually along the epitaxial growth direction.

In the present invention, the buffer layer 2 between the Si substrate 1 and the epitaxial layer is improved. Specifically, first, the AlN layer 21 is deposited on the Si substrate 1. The AlN layer 21 has good compactness, which can effectively reduce the Si lining Diffusion of Si atoms in the bottom 1, so as to avoid the leakage of the buffer layer 2 caused by the diffusion and the degradation of the lattice quality of the epitaxial layer, thereby enhancing the lattice quality of the epitaxial layer, improving the antistatic ability, and improving the surface flatness of the epitaxial layer ; Since there is a 2.5% lattice mismatch between AlN and GaN, if the GaN-based material epitaxial layer is directly epitaxial in the AlN layer 21, the continuous improvement of the subsequent GaN lattice quality will be limited. Therefore, in the present invention, in the AlN layer 21 Al _1-x Sc x N layer 22 is deposited on Al 1-x Sc _x N layer 22, by adding Sc element in AlN, make it lattice expansion, thereby effectively reduce the lattice mismatch between buffer layer 2 and GaN; Finally, in Al _1-x A high-temperature Al _i Ga _1-i N layer 23 is deposited on the Sc _x N layer 22. On the one hand, a high-temperature growth method is adopted to avoid defects caused by low-temperature growth. On the other hand, the Al component content is controlled to gradually decrease along the epitaxial growth direction. As a result, there is a gradual transition between the Al _1-x Sc _x N layer 22 and the subsequently grown GaN-based epitaxial layer, which further increases the lattice matching and reduces defects in the epitaxial layer.

Thus, the present invention can effectively reduce the Si formed on the surface of the Si substrate 1 through the cooperation between the AlN layer 21, the Al _1-x Sc _x N layer 22 and the high-temperature Al _i Ga _1-i N layer 23 in the buffer layer 2. Diffusion of atoms, and increased lattice matching with the epitaxial layer, effectively solving the problem of lattice mismatch between the Si substrate 1 and the GaN material in the prior art, the epitaxial layer has high lattice quality and few defects , good surface flatness, high antistatic ability.

Wherein, in the Al _1-x Sc _x N layer 22, x is 0.1≤x≤0.3. Exemplarily, x is 0.1, 0.15, 0.20, 0.25 or 0.3, but not limited thereto. When x<0.1, the lattice Insufficient expansion. When x>0.3, the lattice expansion is excessive. According to experiments, when the content of Sc is controlled at 10-30%, the lattice matching between the Al _1-x Sc _x N layer 22 and GaN is better, and more Preferably, x is 0.15≤x≤0.3. When the content of Sc is controlled to be 15-30%, the lattice matching between the Al _1-x Sc _x N layer 22 and GaN is higher, further reducing the buffer layer 2 and the lattice mismatch between epitaxial layers of GaN-based materials.

Wherein, in the high-temperature Al _i Ga _1-i N layer 23, i (that is, the content of the Al component) gradually decreases from 0.1 to 2 along the epitaxial growth direction to 0 to 0.01, and in some embodiments, i (that is, the content of the Al component content) gradually decreases from 0.1 to 2 along the direction of epitaxial growth to 0, in some embodiments, i (ie, the content of the Al component) gradually decreases from 0.1 to 2 to 0.01 along the direction of epitaxial growth, in some embodiments, i (that is, the content of the Al component) decreases gradually from 0.1 to 2 along the epitaxial growth direction to 0.001. Exemplarily, the content of the Al component decreases gradually from 0.1, 0.6, 1, 1.2, 1.8 or 2 along the epitaxial growth direction to 0, 0.001 or 0.01, but not limited thereto, by controlling i (that is, the content of the Al component) to gradually decrease from the original value when the high-temperature Al _i Ga _1-i N layer 23 begins to grow to zero or zero, forming a gradual change transition, further increasing lattice matching and reducing defects.

Wherein, the growth temperature of the high-temperature Al _i Ga _1-i N layer 23 is 800-1000° C., further, the growth temperature of the high-temperature Al _i Ga _1-i N layer 23 is 800-900° C. Exemplarily, the growth temperature is 800°C, 820°C, 840°C, 860°C, 880°C, 900°C, 950°C or 1000°C, but not limited thereto.

The thickness of the AlN layer 21 is 10-20nm. Exemplarily, the thickness of the AlN layer 21 is 10nm, 13nm, 16nm, 18nm or 20nm, but not limited thereto. If the AlN layer 21 is too thin, it will lead to insufficient compactness. 1 The barrier effect of diffused Si atoms is not good, and the AlN layer 21 is too thick to provide a good nucleation surface for the epitaxial layer of GaN-based materials; the thickness of the Al _1-x Sc _x N layer 22 is 5-40nm, for example Specifically, the thickness of the Al _1-x Sc _x N layer 22 is 5nm, 10nm, 15nm, 20nm, 25nm, 30nm, 35nm or 40nm, but not limited thereto, the Al _1-x Sc _x N layer 22 is too thin or too thick, Al _1-x Sc _x N layer 22 has a weak influence on lattice matching; the thickness of high-temperature Al _i Ga _{1- i} N layer 23 is 5-20 nm, exemplary, high-temperature Al _i Ga _1-i N layer 23 The thickness of Al is 10nm, 15nm or 20nm, but not limited thereto. Within this range, the Al component has a more appropriate gradual reduction rate, which has a better transition effect and better lattice matching.

Among them, the AlN layer 21 and the Al _1-x Sc _x N layer 22 are both made by magnetron sputtering, and the high-temperature Al _i Ga _1-i N layer 23 is made by MOCVD. By using the magnetron sputtering method, it can be A small thickness can obtain an AlN layer 21 with good density and uniform thickness, which is conducive to the uniform expansion of the lattice of the Al _1-x Sc _x N layer 22, thereby effectively improving the effects of the AlN layer 21 and the Al _1-x Sc _x N layer 22 Effect, the surface flatness of the epitaxial layer is better, and the antistatic ability is better. At the same time, the magnetron sputtering method can realize low-temperature deposition, which is beneficial to suppress the diffusion problem of the Si substrate 1. In addition, the magnetron sputtering method can be used in large A material layer with a uniform thickness can be obtained on the Si substrate 1 of the same size, which is more conducive to the preparation of large-sized epitaxial wafers.

Wherein, as shown in FIG. 2, the epitaxial layer includes an undoped U-GaN layer 3, an N-type semiconductor layer 4, a multi-quantum well layer 5, an electron blocking layer 6, and a P-type semiconductor layer 7 deposited sequentially along the epitaxial growth direction. .

Specifically, the thickness of the undoped U-GaN layer 3 is 300~800nm, exemplarily, the thickness is 300nm, 400nm, 500nm, 600nm, 700nm or 800nm, but not limited thereto; the growth temperature is 1100~1150°C, Exemplarily, the growth temperature is 1100°C, 1120°C, 1140°C or 1150°C, but not limited thereto; the growth pressure is 100-500 Torr, and exemplary, the growth pressure is 100 Torr, 200 Torr, 300 Torr, 400 Torr or 500 Torr.

The N-type semiconductor layer 4 mainly provides electrons, and has a thickness of 1-3 μm. Exemplarily, the thickness is 1 μm, 1.5 μm, 2 μm or 2.8 μm, but not limited thereto; the Si doping concentration is 5×10 ¹⁸ ~1×10 ¹⁹ cm ^-3 , for example, the Si doping concentration is 5×10 ¹⁸ cm ^-3 , 7×10 ¹⁸ cm ^-3 , 8×10 ¹⁸ cm ^-3 or 9×10 ¹⁸ cm ^-3 , but not limited thereto; The growth temperature is 1100~1150°C, and the growth pressure is 100~500Torr.

The multi-quantum well layer 5 is a periodic structure in which InGaN quantum well layers and GaN quantum barrier layers are alternately stacked, and the number of periods is 3-15. Exemplarily, the number of periods is 3, 8, 11, 13 or 15, but not limited to Among them, the In composition in the InGaN quantum well layer accounts for a molar ratio of 10% to 35%. If the In composition is too low, the electron mobility is low, and if the In composition is too high, it is easy to cause the InGaN quantum well layer and the GaN quantum barrier The increase of lattice mismatch between layers will increase dislocation defects, and at the same time, phase separation of In is prone to occur, resulting in a decrease in lattice quality and antistatic ability; in each cycle, the thickness of the InGaN quantum well layer is 2~5nm, Exemplary, the thickness of the InGaN quantum well layer is 2nm, 3nm, 4nm or 5nm, but not limited thereto; the thickness of the GaN quantum barrier layer is 3~15nm, exemplary, the thickness of the GaN quantum barrier layer is 3nm, 5nm, 10nm or 15nm, but not limited to this, when the InGaN quantum well layer is too thin, the carriers are easy to leak, when the InGaN quantum well layer is too thick, the polarization effect will lead to a decrease in luminous efficiency, the thickness of the GaN quantum barrier layer is preferably greater than that of InGaN Quantum well layer to suppress carrier leakage and further improve antistatic performance; the growth temperature of InGaN quantum well layer is 700~800°C, the growth temperature of GaN quantum barrier layer is 800~1000°C, and the growth temperature of multi-quantum well layer 5 The pressure is 100~500Torr.

The thickness of the P-type semiconductor layer 7 is 200~300nm. Exemplarily, the thickness is 200nm, 230nm, 260nm or 290nm, but not limited thereto. The doping concentration of Mg is 5×10 ¹⁷ ~1×10 ²⁰ cm- ³ Example Specifically, the doping concentration of Mg is 5×10 ¹⁷ cm- ³ , 5×10 ¹⁸ cm- ³ , 9×10 ¹⁸ cm- ³ or 6×10 ¹⁹ cm- ³ , but not limited thereto.

The electron blocking layer 6 includes Al _y Ga _1-y N sub-layers and In _z Ga _1-z N sub-layers which are grown alternately periodically and sequentially, y is 0.05≤y≤0.2, for example, y is 0.05, 0.08, 0.1 , 0.13, 0.18 or 2, but not limited thereto; z is 0.1≤z≤0.5, exemplary, z is 0.1, 0.2, 0.3, 0.4 or 0.5, but not limited thereto; the period number of the electron blocking layer 6 is 3 ~15, exemplary, the number of periods is 3, 5, 8, 12 or 15, but not limited thereto; thickness is 20~50nm, exemplary, the thickness is 20nm, 30nm, 40nm, 45nm or 50nm, but not limited to this.

In the present invention, the _{AlyGa1 -yN} / _{InzGa1 -zN} superlattice is used as the electronic barrier layer, which can effectively suppress dislocation propagation, improve the crystal quality of the subsequent P-type semiconductor layer 7, and help reduce leakage current , Improve antistatic performance.

The present invention also provides a method for preparing GaN-based light-emitting diode epitaxial wafers, including:

providing a Si substrate 1;

Depositing a buffer layer 2 and an epitaxial layer on the Si substrate 1;

The growth steps of buffer layer 2 include:

sequentially depositing an AlN layer 21, an Al _1-x Sc _x N layer 22 and a high-temperature Al _i Ga _1-i N layer 23;

During the growth process of the high-temperature Al _i Ga _1-i N layer 23, the flow rate of the Al source is controlled to decrease gradually.

The growth step of the buffer layer 2 includes: sequentially depositing an AlN layer 21 and an Al _{1- x} Sc _x N layer 22 on the Si substrate 1 by magnetron sputtering, with a deposition pressure of 5-10 mTorr. Exemplarily, the deposition pressure is 5mTorr, 7mTorr or 9mTorr, but not limited thereto; the deposition temperature is 200~1000°C, for example, the deposition temperature is 200°C, 350°C, 550°C, 800°C or 1000°C, but not limited thereto, low temperature deposition is used, It is beneficial to suppress the diffusion problem of the Si substrate 1; the deposition voltage is 150-400V, exemplary, the deposition voltage is 150V, 250V, 300V, 330V or 400V, but not limited thereto; the sputtering of the Al _1-x Sc _x N layer 22 The shooting target is ScAl alloy target.

Below in conjunction with accompanying drawing and embodiment the present invention will be further described:

Example 1

Referring to Fig. 1 and Fig. 2, the present embodiment provides a GaN-based light-emitting diode epitaxial wafer, including a Si substrate 1, a buffer layer 2, and an epitaxial layer arranged in sequence, wherein the epitaxial layer includes an epitaxial layer deposited sequentially along the epitaxial growth direction. Undoped U-GaN layer 3, N-type semiconductor layer 4, multi-quantum well layer 5, electron blocking layer 6 and P-type semiconductor layer 7, buffer layer 2 includes AlN layer 21, Al ₁ deposited in sequence along the epitaxial growth direction _-x Sc _x N layer 22 and high temperature Al _i Ga _1-i N layer 23, in the high temperature Al _i Ga _1-i N layer 23, i gradually decreases from 0.15 to 0 along the epitaxial growth direction.

In the Al _1-x Sc _x N layer 22, x is 0.3.

The growth temperature of the high temperature Al _i Ga _1-i N layer 23 is 850°C.

The thickness of the AlN layer 21 is 15 nm, the thickness of the Al _1-x Sc _x N layer 22 is 35 nm, and the thickness of the high-temperature Al _i Ga _1-i N layer 23 is 15 nm.

Both the AlN layer 21 and the Al _1-x Sc _x N layer 22 are produced by magnetron sputtering, and the high-temperature Al _i Ga _1-i N layer 23 is produced by MOCVD.

The electron blocking layer 6 includes Al _0.1 Ga _0.9 N sub-layers and In _0.3 Ga _0.7 N sub-layers which are alternately grown periodically and sequentially. The number of periods of the electron blocking layer 6 is 8, and the thickness is 40 nm.

Referring to Fig. 3 and shown in Fig. 4, the preparation method of above-mentioned epitaxial wafer comprises:

S10. providing a Si substrate 1;

S20. Depositing a buffer layer 2 on the Si substrate 1, the specific steps are as follows:

S21. Depositing an AlN layer 21 on the Si substrate 1:

Put the Si substrate 1 into the magnetron sputtering equipment, the deposition pressure is 5mTorr, the deposition temperature is 300°C, Ar is used as the carrier gas, _N2 is used as the reaction gas, the deposition voltage is 200V, and an AlN layer with a thickness of 15nm is deposited by sputtering twenty one.

S22. Depositing an Al _1-x Sc _x N layer 22 on the AlN layer 21:

The deposition pressure is 8mTorr, the deposition temperature is 400°C, Ar is used as the carrier gas, N ₂ is used as the reaction gas, the deposition voltage is 300V, the sputtering target is ScAl alloy target, and Al _1-x Sc _x with a thickness of 35nm is deposited by sputtering N layer 22.

S23. Transfer to MOCVD equipment, and deposit a high-temperature Al _i Ga _1-i N layer 23 on the Al _1-x Sc _x N layer 22:

Introduce N ₂ as the carrier gas, NH ₃ as the N source, set the pressure of the reaction chamber to 400 Torr, set the temperature of the reaction chamber to 850°C, inject TMGa as the Ga source, and inject TMAl as the Al source, where the flow rate of Al is from The first flow rate was ramped down to 0 and a 15nm thick ALGaN layer was deposited.

S30. Depositing an epitaxial layer on the buffer layer 2, the specific steps are as follows:

S31. Depositing an undoped U-GaN layer 3 on the buffer layer 2:

The growth temperature is controlled at 1100°C, the growth pressure is controlled at 200Torr, NH ₃ is introduced as the N source, N ₂ and H ₂ are used as the carrier gas, TMGa is used as the Ga source, and a GaN layer with a thickness of 400nm is grown.

S32. Depositing an N-type semiconductor layer 4 on the undoped U-GaN layer 3:

Control the growth temperature of the reaction chamber at 1120°C and the growth pressure at 200 Torr; feed NH ₃ as the N source, N ₂ and H ₂ as the carrier gas, TMGa as the Ga source, grow a GaN layer with a thickness of 2 μm, and feed SiH ₄ As N-type doping, the Si doping concentration is 5×10 ¹⁸ cm ^-3 .

S33. Depositing a multi-quantum well layer 5 on the N-type semiconductor layer 4:

1) Growth of InGaN quantum well layer: Control the growth temperature of the reaction chamber to 700°C, the carrier gas is N ₂ , feed NH ₃ as the N source, TEGa as the Ga source, TMIn as the In source, and grow an InGaN quantum well with a thickness of 3nm layer;

2) Growth of GaN quantum barrier layer: Control the growth temperature of the reaction chamber to 800°C, turn off the In source, use N ₂ and H ₂ as carrier gas, and feed TEGa as Ga source, and grow a GaN quantum barrier layer with a thickness of 10nm;

The InGaN quantum well layer and the GaN quantum barrier layer are repeatedly stacked and grown periodically, and the number of periods is 10.

S34. Growing an electron blocking layer 6 on the multiple quantum well layer 5:

The growth temperature of the reaction chamber is controlled at 900°C, the growth pressure is controlled at 200Torr, and NH ₃ is introduced as the N source, TMGa as the Ga source, TMAl as the Al source, and TMIn as the In source, and alternately grow Al _0.1 Ga _0.9 N with a thickness of 3nm. The sublayer and the In _0.3 Ga _0.7 N sublayer with a thickness of 2nm have a period number of 8.

S35. Depositing a P-type semiconductor layer 7 on the electron blocking layer 6:

The growth temperature of the reaction chamber is controlled at 900°C, the growth pressure is controlled at 200 Torr, NH ₃ is introduced as the N source, TMGa is used as the Ga source, CP ₂ Mg is used as the P-type dopant, and the doping concentration of Mg is 5×10 ¹⁸ , The growth thickness is 200nm.

Example 2

This embodiment provides a GaN-based light-emitting diode epitaxial wafer, including a Si substrate 1, a buffer layer 2, and an epitaxial layer arranged in sequence, wherein the epitaxial layer includes an undoped U-GaN layer 3 sequentially deposited along the epitaxial growth direction , N-type semiconductor layer 4, multiple quantum well layer 5, electron blocking layer 6 and P-type semiconductor layer 7, buffer layer 2 includes AlN layer 21, Al _1-x Sc _x N layer 22 and high temperature In the Al _i Ga _1-i N layer 23, in the high temperature Ali _{Ga 1-i} N layer 23, i gradually decreases from 0.15 to 0 along the epitaxial growth direction.

In the Al _1-x Sc _x N layer 22, x is 0.3.

The growth temperature of the high temperature Al _i Ga _1-i N layer 23 is 850°C.

The thickness of the AlN layer 21 is 20 nm, the thickness of the Al _1-x Sc _x N layer 22 is 10 nm, and the thickness of the high-temperature Al _i Ga _1-i N layer 23 is 5 nm.

Both the AlN layer 21 and the Al _1-x Sc _x N layer 22 are produced by magnetron sputtering, and the high-temperature Al _i Ga _1-i N layer 23 is produced by MOCVD.

The electron blocking layer 6 includes Al _0.1 Ga _0.9 N sub-layers and In _0.3 Ga _0.7 N sub-layers which are alternately grown periodically and sequentially. The number of periods of the electron blocking layer 6 is 8, and the thickness is 40 nm.

The preparation method of above-mentioned epitaxial wafer, comprises:

S10. providing a Si substrate 1;

S20. Depositing a buffer layer 2 on the Si substrate 1, the specific steps are as follows:

S21. Depositing an AlN layer 21 on the Si substrate 1:

Put the Si substrate 1 into the magnetron sputtering equipment, the deposition pressure is 5mTorr, the deposition temperature is 300°C, Ar is used as the carrier gas, _N2 is used as the reaction gas, the deposition voltage is 200V, and an AlN layer with a thickness of 20nm is deposited by sputtering twenty one.

S22. Depositing an Al _1-x Sc _x N layer 22 on the AlN layer 21:

The deposition pressure is 8mTorr, the deposition temperature is 400°C, Ar is used as the carrier gas, N ₂ is used as the reaction gas, the deposition voltage is 300V, the sputtering target is ScAl alloy target, and Al _1-x Sc _x with a thickness of 10nm is sputtered N layer 22.

S23. Transfer to MOCVD equipment, and deposit a high-temperature Al _i Ga _1-i N layer 23 on the Al _1-x Sc _x N layer 22:

Introduce N ₂ as the carrier gas, NH ₃ as the N source, set the pressure of the reaction chamber to 400 Torr, set the temperature of the reaction chamber to 850°C, inject TMGa as the Ga source, and inject TMAl as the Al source, where the flow rate of Al is from The first flow rate is ramped down to 0, and a 5nm thick ALGaN layer is deposited.

S30. Depositing an epitaxial layer on the buffer layer 2, the specific steps are as follows:

S31. Depositing an undoped U-GaN layer 3 on the buffer layer 2:

The growth temperature is controlled at 1100°C, the growth pressure is controlled at 200Torr, NH ₃ is introduced as the N source, N ₂ and H ₂ are used as the carrier gas, TMGa is used as the Ga source, and a GaN layer with a thickness of 400nm is grown.

S32. Depositing an N-type semiconductor layer 4 on the undoped U-GaN layer 3:

Control the growth temperature of the reaction chamber at 1120°C and the growth pressure at 200 Torr; feed NH ₃ as the N source, N ₂ and H ₂ as the carrier gas, TMGa as the Ga source, grow a GaN layer with a thickness of 2 μm, and feed SiH ₄ As N-type doping, the Si doping concentration is 5×10 ¹⁸ cm ^-3 .

S33. Depositing a multi-quantum well layer 5 on the N-type semiconductor layer 4:

1) Growth of InGaN quantum well layer: Control the growth temperature of the reaction chamber to 700°C, the carrier gas is N ₂ , feed NH ₃ as the N source, TEGa as the Ga source, TMIn as the In source, and grow an InGaN quantum well with a thickness of 3nm layer;

2) Growth of GaN quantum barrier layer: Control the growth temperature of the reaction chamber to 800°C, turn off the In source, use N ₂ and H ₂ as carrier gas, and feed TEGa as Ga source, and grow a GaN quantum barrier layer with a thickness of 10nm;

The InGaN quantum well layer and the GaN quantum barrier layer are repeatedly stacked and grown periodically, and the number of periods is 10.

S34. Growing an electron blocking layer 6 on the multiple quantum well layer 5:

The growth temperature of the reaction chamber is controlled at 900°C, the growth pressure is controlled at 200Torr, and NH ₃ is introduced as the N source, TMGa as the Ga source, TMAl as the Al source, and TMIn as the In source, and alternately grow Al _0.1 Ga _0.9 N with a thickness of 3nm. The sublayer and the In _0.3 Ga _0.7 N sublayer with a thickness of 2nm have a period number of 8.

S35. Depositing a P-type semiconductor layer 7 on the electron blocking layer 6:

The growth temperature of the reaction chamber is controlled at 900°C, the growth pressure is controlled at 200 Torr, NH ₃ is introduced as the N source, TMGa is used as the Ga source, CP ₂ Mg is used as the P-type dopant, and the doping concentration of Mg is 5×10 ¹⁸ , The growth thickness is 200nm.

Example 3

This embodiment provides a GaN-based light-emitting diode epitaxial wafer, including a Si substrate 1, a buffer layer 2, and an epitaxial layer arranged in sequence, wherein the epitaxial layer includes an undoped U-GaN layer 3 sequentially deposited along the epitaxial growth direction , N-type semiconductor layer 4, multiple quantum well layer 5, electron blocking layer 6 and P-type semiconductor layer 7, buffer layer 2 includes AlN layer 21, Al _1-x Sc _x N layer 22 and high temperature In the Al _i Ga _1-i N layer 23, in the high temperature Ali _{Ga 1-i} N layer 23, i gradually decreases from 0.15 to 0 along the epitaxial growth direction.

In the Al _1-x Sc _x N layer 22, x is 0.15.

The growth temperature of the high temperature Al _i Ga _1-i N layer 23 is 850°C.

The thickness of the AlN layer 21 is 15 nm, the thickness of the Al _1-x Sc _x N layer 22 is 35 nm, and the thickness of the high-temperature Al _i Ga _1-i N layer 23 is 15 nm.

Both the AlN layer 21 and the Al _1-x Sc _x N layer 22 are produced by magnetron sputtering, and the high-temperature Al _i Ga _1-i N layer 23 is produced by MOCVD.

The electron blocking layer 6 includes Al _0.1 Ga _0.9 N sub-layers and In _0.3 Ga _0.7 N sub-layers which are alternately grown periodically and sequentially. The number of periods of the electron blocking layer 6 is 8, and the thickness is 40 nm.

The preparation method of above-mentioned epitaxial wafer, comprises:

S10. providing a Si substrate 1;

S20. Depositing a buffer layer 2 on the Si substrate 1, the specific steps are as follows:

S21. Depositing an AlN layer 21 on the Si substrate 1:

Put the Si substrate 1 into the magnetron sputtering equipment, the deposition pressure is 5mTorr, the deposition temperature is 300°C, Ar is used as the carrier gas, _N2 is used as the reaction gas, the deposition voltage is 200V, and an AlN layer with a thickness of 15nm is deposited by sputtering twenty one.

S22. Depositing an Al _1-x Sc _x N layer 22 on the AlN layer 21:

The deposition pressure is 8mTorr, the deposition temperature is 400°C, Ar is used as the carrier gas, N ₂ is used as the reaction gas, the deposition voltage is 300V, the sputtering target is ScAl alloy target, and Al _1-x Sc _x with a thickness of 35nm is deposited by sputtering N layer 22.

S23. Transfer to MOCVD equipment, and deposit a high-temperature Al _i Ga _1-i N layer 23 on the Al _1-x Sc _x N layer 22:

Introduce N ₂ as the carrier gas, NH ₃ as the N source, set the pressure of the reaction chamber to 400 Torr, set the temperature of the reaction chamber to 850°C, inject TMGa as the Ga source, and inject TMAl as the Al source, where the flow rate of Al is from The first flow rate was ramped down to 0 and a 15nm thick ALGaN layer was deposited.

S30. Depositing an epitaxial layer on the buffer layer 2, the specific steps are as follows:

S31. Depositing an undoped U-GaN layer 3 on the buffer layer 2:

The growth temperature is controlled at 1100°C, the growth pressure is controlled at 200Torr, NH ₃ is introduced as the N source, N ₂ and H ₂ are used as the carrier gas, TMGa is used as the Ga source, and a GaN layer with a thickness of 400nm is grown.

S32. Depositing an N-type semiconductor layer 4 on the undoped U-GaN layer 3:

Control the growth temperature of the reaction chamber at 1120°C and the growth pressure at 200 Torr; feed NH ₃ as the N source, N ₂ and H ₂ as the carrier gas, TMGa as the Ga source, grow a GaN layer with a thickness of 2 μm, and feed SiH ₄ As N-type doping, the Si doping concentration is 5×10 ¹⁸ cm ^-3 .

S33. Depositing a multi-quantum well layer 5 on the N-type semiconductor layer 4:

1) Growth of InGaN quantum well layer: Control the growth temperature of the reaction chamber to 700°C, the carrier gas is N ₂ , feed NH ₃ as the N source, TEGa as the Ga source, TMIn as the In source, and grow an InGaN quantum well with a thickness of 3nm layer;

2) Growth of GaN quantum barrier layer: Control the growth temperature of the reaction chamber to 800°C, turn off the In source, use N ₂ and H ₂ as carrier gas, and feed TEGa as Ga source, and grow a GaN quantum barrier layer with a thickness of 10nm;

The InGaN quantum well layer and the GaN quantum barrier layer are repeatedly stacked and grown periodically, and the number of periods is 10.

S34. Growing an electron blocking layer 6 on the multiple quantum well layer 5:

The growth temperature of the reaction chamber is controlled at 900°C, the growth pressure is controlled at 200Torr, and NH ₃ is introduced as the N source, TMGa as the Ga source, TMAl as the Al source, and TMIn as the In source, and alternately grow Al _0.1 Ga _0.9 N with a thickness of 3nm. The sublayer and the In _0.3 Ga _0.7 N sublayer with a thickness of 2nm have a period number of 8.

S35. Depositing a P-type semiconductor layer 7 on the electron blocking layer 6:

The growth temperature of the reaction chamber is controlled at 900°C, the growth pressure is controlled at 200 Torr, NH ₃ is introduced as the N source, TMGa is used as the Ga source, CP ₂ Mg is used as the P-type dopant, and the doping concentration of Mg is 5×10 ¹⁸ , The growth thickness is 200nm.

Example 4

This embodiment provides a GaN-based light-emitting diode epitaxial wafer, including a Si substrate 1, a buffer layer 2, and an epitaxial layer arranged in sequence, wherein the epitaxial layer includes an undoped U-GaN layer 3 sequentially deposited along the epitaxial growth direction , N-type semiconductor layer 4, multiple quantum well layer 5, electron blocking layer 6 and P-type semiconductor layer 7, buffer layer 2 includes AlN layer 21, Al _1-x Sc _x N layer 22 and high temperature In the Al _i Ga _1-i N layer 23, in the high-temperature Ali _{Ga 1-i} N layer 23, i gradually decreases from 0.15 to 0.01 along the epitaxial growth direction.

In the Al _1-x Sc _x N layer 22, x is 0.3.

The growth temperature of the high temperature Al _i Ga _1-i N layer 23 is 900°C.

The thickness of the AlN layer 21 is 15 nm, the thickness of the Al _1-x Sc _x N layer 22 is 35 nm, and the thickness of the high-temperature Al _i Ga _1-i N layer 23 is 15 nm.

Both the AlN layer 21 and the Al _1-x Sc _x N layer 22 are produced by magnetron sputtering, and the high-temperature Al _i Ga _1-i N layer 23 is produced by MOCVD.

The electron blocking layer 6 includes Al _0.1 Ga _0.9 N sub-layers and In _0.3 Ga _0.7 N sub-layers which are alternately grown periodically and sequentially. The number of periods of the electron blocking layer 6 is 8, and the thickness is 40 nm.

Referring to Fig. 3 and shown in Fig. 4, the preparation method of above-mentioned epitaxial wafer comprises:

S10. providing a Si substrate 1;

S20. Depositing a buffer layer 2 on the Si substrate 1, the specific steps are as follows:

S21. Depositing an AlN layer 21 on the Si substrate 1:

Put the Si substrate 1 into the magnetron sputtering equipment, the deposition pressure is 5mTorr, the deposition temperature is 300°C, Ar is used as the carrier gas, _N2 is used as the reaction gas, the deposition voltage is 200V, and an AlN layer with a thickness of 15nm is deposited by sputtering twenty one.

S22. Depositing an Al _1-x Sc _x N layer 22 on the AlN layer 21:

The deposition pressure is 8mTorr, the deposition temperature is 400°C, Ar is used as the carrier gas, N ₂ is used as the reaction gas, the deposition voltage is 300V, the sputtering target is ScAl alloy target, and Al _1-x Sc _x with a thickness of 35nm is deposited by sputtering N layer 22.

S23. Transfer to MOCVD equipment, and deposit a high-temperature Al _i Ga _1-i N layer 23 on the Al _1-x Sc _x N layer 22:

Introduce N ₂ as the carrier gas, NH ₃ as the N source, set the reaction chamber pressure to 400 Torr, set the reaction chamber temperature to 900°C, feed TMGa as the Ga source, and TMAl as the Al source, where the flow rate of Al is from The first flow rate was ramped down to 0 and a 15nm thick ALGaN layer was deposited.

S30. Depositing an epitaxial layer on the buffer layer 2, the specific steps are as follows:

S31. Depositing an undoped U-GaN layer 3 on the buffer layer 2:

The growth temperature is controlled at 1100°C, the growth pressure is controlled at 200Torr, NH ₃ is introduced as the N source, N ₂ and H ₂ are used as the carrier gas, TMGa is used as the Ga source, and a GaN layer with a thickness of 400nm is grown.

S32. Depositing an N-type semiconductor layer 4 on the undoped U-GaN layer 3:

Control the growth temperature of the reaction chamber at 1120°C and the growth pressure at 200 Torr; feed NH ₃ as the N source, N ₂ and H ₂ as the carrier gas, TMGa as the Ga source, grow a GaN layer with a thickness of 2 μm, and feed SiH ₄ As N-type doping, the Si doping concentration is 5×10 ¹⁸ cm ^-3 .

S33. Depositing a multi-quantum well layer 5 on the N-type semiconductor layer 4:

1) Growth of InGaN quantum well layer: Control the growth temperature of the reaction chamber to 700°C, the carrier gas is N ₂ , feed NH ₃ as the N source, TEGa as the Ga source, TMIn as the In source, and grow an InGaN quantum well with a thickness of 3nm layer;

2) Growth of GaN quantum barrier layer: Control the growth temperature of the reaction chamber to 800°C, turn off the In source, use N ₂ and H ₂ as carrier gas, and feed TEGa as Ga source, and grow a GaN quantum barrier layer with a thickness of 10nm;

The InGaN quantum well layer and the GaN quantum barrier layer are repeatedly stacked and grown periodically, and the number of periods is 10.

S34. Growing an electron blocking layer 6 on the multiple quantum well layer 5:

The growth temperature of the reaction chamber is controlled at 900°C, the growth pressure is controlled at 200Torr, and NH ₃ is introduced as the N source, TMGa as the Ga source, TMAl as the Al source, and TMIn as the In source, and alternately grow Al _0.1 Ga _0.9 N with a thickness of 3nm. The sublayer and the In _0.3 Ga _0.7 N sublayer with a thickness of 2nm have a period number of 8.

S35. Depositing a P-type semiconductor layer 7 on the electron blocking layer 6:

The growth temperature of the reaction chamber is controlled at 900°C, the growth pressure is controlled at 200 Torr, NH ₃ is introduced as the N source, TMGa is used as the Ga source, CP ₂ Mg is used as the P-type dopant, and the doping concentration of Mg is 5×10 ¹⁸ , The growth thickness is 200nm.

Comparative example 1

The difference between this comparative example and Example 1 is that in the high-temperature Al _i Ga _1-i N layer of this comparative example, i is from 0.15 in the direction of epitaxial growth.

Comparative example 2

The difference between this comparative example and Example 1 is: in the Al _1-x Sc _x N layer of this comparative example, x is 0.

Comparative example 3

The difference between this comparative example and Example 1 is that the buffer layer in this comparative example does not have an Al _1-x Sc _x N layer and a high-temperature Al _i Ga _1-i N layer.

Comparative example 4

The difference between this comparative example and Embodiment 1 is that the buffer layer in this comparative example is a GaN buffer layer.

Antistatic ability test and surface roughness test are carried out to the epitaxial wafer that embodiment 1～4 and comparative example 1～4 make, test result is as follows:

The above descriptions are only preferred embodiments of the present invention, and do not limit the present invention in any form. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Anyone familiar with the technology of this patent Without departing from the scope of the technical solution of the present invention, personnel can use the technical content of the above prompts to make some changes or modify them into equivalent embodiments with equivalent changes. In essence, any simple modifications, equivalent changes and modifications made to the above embodiments still fall within the scope of the solutions of the present invention.

Claims (7)

1. A GaN-based light-emitting diode epitaxial wafer comprises a Si substrate, a buffer layer and an epitaxial layer which are sequentially arranged, and is characterized in that the buffer layer comprises an AlN layer and an Al layer which are sequentially deposited along the epitaxial growth direction _1-x Sc _x N layer and high temperature Al _i Ga _1-i N layer, the high temperature Al _i Ga _1-i The Al component content of the N layer is gradually reduced along the epitaxial growth direction;

the AlN layer and the Al _1-x Sc _x The N layers are prepared by magnetron sputtering, and the high-temperature Al is prepared by the following steps of _i Ga _1-i The N layer is prepared by adopting an MOCVD method;

the high temperature Al _i Ga _1-i The growth temperature of the N layer is 800-1000 ℃; the AlN layer and the Al _1-x Sc _x The deposition temperature of the N layer is 200-1000 ℃;

the Al is _1-x Sc _x In the N layer, x is 0.3.

2. The GaN based light emitting diode epitaxial wafer of claim 1, wherein the high temperature Al _i Ga _1-i In the N layer, i gradually decreases from 0.1 to 2 to 0.01 along the epitaxial growth direction.

3. The GaN-based light emitting diode epitaxial wafer of claim 1, wherein the thickness of the AlN layer is 10-20 nm; the Al is _1-x Sc _x The thickness of the N layer is 5-40 nm; the high temperature Al _i Ga _1-i The thickness of the N layer is 5-20 nm.

4. The GaN based light emitting diode epitaxial wafer of claim 1, wherein the epitaxial layer comprises an undoped U-GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer and a P-type semiconductor layer sequentially deposited along an epitaxial growth direction.

5. The GaN based light emitting diode epitaxial wafer of claim 4 wherein the electron blocking layer comprises periodically and sequentially alternately grown Al _y Ga _1-y N sub-layer and In _z Ga _1-z And the N sub-layer is provided with y being more than or equal to 0.05 and less than or equal to 0.2, z is more than or equal to 0.1 and less than or equal to 0.5, the cycle number of the electron blocking layer is 3-15, and the thickness is 20-50 nm.

6. A method for preparing a GaN-based light emitting diode epitaxial wafer, which is used for preparing the GaN-based light emitting diode epitaxial wafer according to any one of claims 1 to 5, and is characterized by comprising:

providing a Si substrate;

sequentially growing a buffer layer and an epitaxial layer on the Si substrate;

the growth step of the buffer layer comprises the following steps:

sequentially depositing AlN layer and Al _1-x Sc _x N layer and high temperature Al _i Ga _1-i An N layer; the Al is _1-x Sc _x In the N layer, x is 0.3;

the AlN layer and the Al _1-x Sc _x The N layers are prepared by magnetron sputtering, and the AlN layer and the Al layer are prepared by magnetron sputtering _1-x Sc _x The deposition temperature of the N layer is 200-1000 ℃;

the high temperature Al _i Ga _1-i The N layer is prepared by MOCVD method, and the high temperature Al _i Ga _1-i The growth temperature of the N layer is 800-1000 ℃; in the growth process, the inflow rate of the Al source is controlled to gradually decrease.

7. The method of manufacturing according to claim 6, wherein the step of growing the buffer layer comprises: deposition of AlN layer and Al _1-x Sc _x When the layer is N, the deposition pressure is 5-10 mTorr, the deposition voltage is 150-400V, the Al _1-x Sc _x The sputtering target material of the N layers is a ScAl alloy target material.