Disclosure of Invention
The invention provides an amplifier capable of testing broadband and an amplifier testing method, which solve at least one technical problem existing in the prior art.
The invention provides a technical scheme that the amplifier capable of testing broadband comprises a current pulse generation module and an amplifying module, wherein the current pulse generation module is connected with the amplifying module and can generate a current pulse signal to simulate a signal generated by a semiconductor detector;
The current pulse generation module comprises a voltage division circuit and a coupling circuit, wherein the output end of the voltage division circuit is connected with the input end of the coupling circuit, the output end of the coupling circuit is connected with the amplifying module, the input end of the voltage division circuit inputs a pulse voltage signal, and the input end of the voltage division circuit is connected with the pulse signal generator.
Further, the voltage dividing circuit comprises a first voltage dividing resistor and a second voltage dividing resistor, one end of the first voltage dividing resistor is connected with one end of the second voltage dividing resistor, the other end of the first voltage dividing resistor inputs a pulse voltage signal, and the other end of the second voltage dividing resistor is connected with signal ground.
Further, the coupling circuit comprises a precision resistor and a coupling capacitor, one end of the precision resistor is connected with the output end of the voltage dividing circuit, the other end of the precision resistor is connected with one end of the coupling capacitor, and the other end of the coupling capacitor is connected with the input end of the amplifying module.
Further, the amplifying module comprises a pre-amplifying circuit, a pole zero cancellation circuit and a filtering forming circuit, wherein the input end of the pre-amplifying circuit is connected with the output end of the current pulse generating module, the input end of the pole zero cancellation circuit is connected with the output end of the pre-amplifying circuit, and the input end of the filtering forming circuit is connected with the output end of the pole zero cancellation circuit;
The pre-amplifying circuit can amplify the current pulse signal once;
The zero-pole cancellation circuit can restore the baseline of the amplified current pulse signal;
The filtering forming circuit can perform secondary amplification and filtering on the current pulse signal after the baseline recovery.
Further, the pre-amplifying circuit comprises a first amplifier, a bleeder resistor and an integrating capacitor, wherein the negative input end of the first amplifier is connected with one end of the bleeder resistor and one end of the integrating capacitor respectively, the other end of the bleeder resistor and the other end of the integrating capacitor are connected with the output end of the first amplifier, and the positive input end of the first amplifier is connected with signal ground.
Further, the pole zero cancellation circuit comprises a first resistor and a first capacitor, one end of the first resistor is connected with one end of the first capacitor, the other end of the first resistor is connected with the other end of the first capacitor, one end of the first capacitor is connected with the output end of the pre-amplification circuit, and the other end of the first capacitor is connected with the input end of the filter forming circuit.
Further, the filter forming circuit comprises a second amplifier, a third amplifier, a second resistor, a third resistor, a second capacitor, a fourth resistor and a fifth resistor, wherein the positive input end of the second amplifier is connected with one end of the third resistor, the negative input end of the second amplifier is respectively connected with one end of the second resistor and one end of the second capacitor, the other end of the second resistor and the other end of the second capacitor are respectively connected with the output end of the second amplifier, the positive input end of the third amplifier is connected with the output end of the second amplifier, the negative input end of the third amplifier is respectively connected with one end of the fourth resistor and one end of the fifth resistor, the other end of the fourth resistor is connected with the signal ground, and the other end of the fifth resistor is connected with the output end of the third amplifier.
Further, the first amplifier, the second amplifier and the third amplifier all adopt AD8066 chips.
Another technical solution of the present invention provides an amplifier testing method, applied to any one of the above-mentioned wideband-testable amplifiers, including:
s10, acquiring ray charge quantity of rays, and adjusting pulse voltage and pulse width of a pulse signal sent by a pulse signal generator to enable the charge quantity of a signal output by a current pulse generation module to be equal to the ray charge quantity;
S20, adjusting pulse width of pulse signals sent by a pulse signal generator to generate pulse signals with different pulse widths, and respectively testing;
s30, inputting pulse signals with the same charge quantity and different pulse widths into the amplifier, and respectively recording the voltage amplitude and the waveform pulse width of the output waveform of the amplifier.
Further, the step S10 also comprises the step of calculating the carried input charge quantity of the rays according to the formula in the test energy range,
Where E is the energy of the input signal, w e is the average ionization energy required to generate electron-hole pairs, and E - is the charge of one electron.
The invention has the beneficial effects that the design of the invention adds the current pulse generating module to generate the current pulse signal so as to simulate the signal generated by the semiconductor detector, thereby carrying out real-time test on the broadband pre-amplifying circuit and avoiding redesigning the special test circuit board. Meanwhile, the current pulse width information of the actual signal can be directly simulated and tested. The amplification module directly adopts the design of the double-path broadband low-noise amplification chip, realizes the integrated design of an amplification circuit and a filter forming circuit, simplifies the circuit structure, is convenient for miniaturization design, and simultaneously meets the measurement requirements of high gain broadband and low noise of the detector.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described in the following with reference to the accompanying drawings, in which the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
In an embodiment of the present invention, fig. 1 is a block diagram of a structure provided by a testable broadband amplifier according to the present invention, fig. 2 is a schematic diagram of a decoupling strand provided by a current pulse generating module, and fig. 3 is a schematic diagram of a structure provided by an amplifying module. As shown in fig. 1, the invention specifically comprises two parts, namely a current pulse generating module 1 and an amplifying module 2, wherein the output end of the current pulse generating module 1 is connected with the input end of the amplifying module 2, and the current pulse generating module 1 can generate a current pulse signal according to a pulse voltage signal sent by a pulse signal generator 3 so as to simulate a signal generated by a semiconductor detector.
Specifically, as shown in fig. 2, the current pulse generating module 1 includes a voltage dividing circuit and a coupling circuit, wherein an output end of the voltage dividing circuit is connected with an input end of the coupling circuit, an output end of the coupling circuit is connected with the amplifying module 2, and an input end of the voltage dividing circuit is connected with the pulse signal generator 3 to input a pulse voltage signal. The voltage dividing circuit is used for reducing the pulse voltage signal emitted by the pulse signal generator 3 so that the voltage of the pulse voltage signal is equal to the signal generated by the semiconductor detector. The coupling circuit is used for coupling and connecting the voltage dividing circuit with the amplifying module 2, so that the connection stability is improved.
In one embodiment of the present invention, the voltage dividing circuit includes a first voltage dividing resistor R1 and a second voltage dividing resistor R2, one end of the first voltage dividing resistor R1 is connected to one end of the second voltage dividing resistor R2, the other end of the first voltage dividing resistor R1 inputs a pulse voltage signal, and the other end of the second voltage dividing resistor R2 is connected to signal ground.
In one embodiment of the present invention, the coupling circuit includes a precision resistor R3 and a coupling capacitor C1, one end of the precision resistor R3 is connected to the output end of the voltage dividing circuit, the other end of the precision resistor R3 is connected to one end of the coupling capacitor C1, and the other end of the coupling capacitor C1 is connected to the input end of the amplifying module 2. The current pulse generation module 1 is connected with the voltage dividing circuit and the precision resistor in sequence after passing through the pulse voltage signal generated by the pulse signal generator 3, and is connected with the signal input end of the amplifying module 2 through the AC coupling capacitor for directly simulating the current pulse signal generated by the semiconductor detector.
In one embodiment of the present invention, as shown in fig. 3, the amplifying module 2 includes a pre-amplifying circuit, a zero-pole cancellation circuit, and a filtering forming circuit, where an input end of the pre-amplifying circuit is connected to an output end of the current pulse generating module 1, an input end of the zero-pole cancellation circuit is connected to an output end of the pre-amplifying circuit, an input end of the filtering forming circuit is connected to an output end of the zero-pole cancellation circuit, the pre-amplifying circuit is capable of amplifying a current pulse signal once, the zero-pole cancellation circuit is capable of recovering a baseline of the amplified current pulse signal, and the filtering forming circuit is capable of secondarily amplifying and filtering the current pulse signal after recovering the baseline.
Specifically, the pre-amplifying circuit comprises a first amplifier A1, a bleeder resistor Rf and an integrating capacitor Cf, wherein the negative input end of the first amplifier A1 is respectively connected with one end of the bleeder resistor Rf and one end of the integrating capacitor Cf, the other end of the bleeder resistor Rf and the other end of the integrating capacitor Cf are both connected with the output end of the first amplifier A1, and the positive input end of the first amplifier A1 is connected with signal ground. The positive input end of the pre-amplifying circuit is grounded, and the output end of the pre-amplifying circuit is connected with the filter forming circuit. The pre-amplifying circuit consists of a first amplifier A1, an integrating capacitor Cf and a bleeder resistor Rf, and can be used for primarily amplifying an input signal.
The pole zero cancellation circuit comprises a first resistor Rp and a first capacitor C0, one end of the first resistor Rp is connected with one end of the first capacitor C0, the other end of the first resistor Rp is connected with the other end of the first capacitor C0, one end of the first capacitor C0 is connected with the output end of the pre-amplifying circuit, and the other end of the first capacitor C0 is connected with the input end of the filtering forming circuit. The zero-pole cancellation circuit is composed of a first resistor Rp and a first capacitor C0 and is used for restoring an output signal baseline.
The filter forming circuit comprises a second amplifier A2, a third amplifier A3, a second resistor RS, a third resistor R0, a second capacitor CS, a fourth resistor R4 and a fifth resistor R5, wherein the positive input end of the second amplifier A2 is connected with one end of the third resistor R0, the negative input end of the second amplifier A2 is respectively connected with one end of the second resistor RS and one end of the second capacitor CS, the other end of the second resistor RS and the other end of the second capacitor CS are both connected with the output end of the second amplifier A2, the positive input end of the third amplifier A3 is connected with the output end of the second amplifier A2, the negative input end of the third amplifier A3 is respectively connected with one end of the fourth resistor R4 and one end of the fifth resistor R5, the other end of the fourth resistor R4 is connected with signal ground, and the other end of the fifth resistor R5 is connected with the output end of the third amplifier A3. The filter forming circuit is used for suppressing noise and stabilizing waveforms, and simultaneously carrying out secondary amplification on signals.
The first amplifier A1, the second amplifier A2 and the third amplifier A3 all adopt AD8066 chips. The first amplifier A1 and the second amplifier A2 adopt a dual-channel chip AD8066, so that a pre-amplifying circuit and a filtering forming circuit are integrated.
In another aspect of the present invention, an amplifier testing method is provided, which is applied to any one of the above-mentioned wideband-testable amplifiers, and fig. 7 is a flowchart provided by a flow according to the present invention.
S10, acquiring the ray charge quantity of rays, and adjusting the pulse voltage and the pulse width of a pulse signal sent by the pulse signal generator 3 so that the charge quantity of the output signal of the current pulse generation module 1 is equal to the ray charge quantity.
The method specifically comprises the following steps:
S101, determining the ray charge quantity of rays.
The amount of input charge carried by the ray converted according to equation 1, in the range of the test energy,
Where E is the energy of the input signal, w e is the average ionization energy required to generate electron-hole pairs, and E - is the charge of one electron.
S102, determining the charge quantity of the test input.
According to equation 2, a set of charge amounts is determined by adjusting the signal generator parameters, and the obtained set of charge amounts is made the same as the set of charge amounts obtained in step 1.
Wherein V test is the voltage pulse amplitude of the signal generator, R3 is a precision resistor, R1 and R2 are voltage dividing resistors, and t w is the voltage pulse width of the signal generator.
S20, adjusting the pulse width of the pulse signal sent by the pulse signal generator 3 to generate pulse signals with different pulse widths, and respectively testing;
the voltage pulse amplitude of the signal generator is adjusted under the same set of input charge quantity to respectively carry out circuit test on test signals with different pulse widths t w.
S30, inputting pulse signals with the same charge quantity and different pulse widths into the amplifier, and respectively recording the voltage amplitude and the waveform pulse width of the output waveform of the amplifier.
After the voltage pulse amplitude and the pulse width of the signal generator are determined, the output voltage signal of the pulse generator passes through the precision resistor R3, so that the voltage pulse signal is converted into a current pulse signal, and the current pulse signal is connected into the reverse input end of the pre-amplifying circuit. And under the same group of input charge quantity, the voltage pulse amplitude of the signal generator is regulated to respectively carry out circuit test on test signals with different pulse widths tw, and an oscilloscope is used for respectively observing and recording the output waveform voltage amplitude and waveform pulse width of the pre-amplifying circuit and the filtering forming circuit.
The output signal of the semiconductor detector can be regarded as a weak current pulse signal i with the maximum width tw, and the carried charge quantity Qi can be expressed by means of a formula:
the magnitude of the charge quantity Qi is proportional to the energy of the incident particle loss. Therefore, the energy of the incident particle can be represented by the magnitude of the charge quantity Qi. Taking the Si-PIN detector as an example, when measuring its output signal, it is necessary to analyze the range of the amount of charge Qi and the signal current pulse width tw carried by its output. Considering that the Si-PIN semiconductor detector is mainly applied to gamma ray detection at room temperature, the electric charge Qi carried by gamma ray with the energy input range of 10 keV-2 MeV can be obtained according to the formula 1.
Where E is the energy of the input signal/eV, we is the average ionization energy required to generate electron-hole pairs/eV, and E-is the charge of one electron.
Considering that the average ionization energy of the silicon semiconductor detector is 3.62eV, it is known from equation 1 that the input charge of the silicon semiconductor detector circuit signal ranges from about 0.5fC to about 88 fC.
The pulse width tw of the signal current is mainly determined by the charge collection time of the signal received by the silicon semiconductor detector, i.e., the rising time of the input signal. Wherein the charge collection times of electrons and holes are represented by formula 3 and formula 4, respectively.
Where x is the distance from the n+ electrode at the point of absorption of the radiation, w is the detector depletion layer thickness, μn is the mobility of electrons, μp is the mobility of holes, and Eg is the electric field strength.
For a silicon semiconductor detector, the velocity after saturation of the electron-hole pairs is 107cm/s when the electric field strength is strong enough. The Si-PIN semiconductor detector used in this example had a depletion layer thickness of 300um, and a saturation collection time tmax of 3ns was obtained. The detector reverse bias voltage is low, resulting in an actual collection time tmax in the order of tens to hundreds of ns, given the low power requirements of the detection system. Meanwhile, regarding the charge input range of the silicon semiconductor detector circuit signal, taking tw as 30ns as an example, the range of the average current ip within the signal collection time can be obtained by the formula 5 to be about 14.4na to 4.27 μa.
According to the above, the actual charge collection time tmax is approximately in the range of several tens to several hundreds ns when the measurement is carried out in the present invention. Taking tw as 30ns as an example, when collecting an input signal with average current ip in the time range of 14.4 na-4.27 μa, the bandwidth of the selected amplifier should be greater than 33MHz, and the current noise of the selected operational amplifier should be in the pA level in order to reduce the interference of the current noise of the amplifier. After comprehensive consideration, the invention selects to directly adopt a high-speed low-noise two-way operational amplifier chip AD8066 to form a pre-amplifying circuit, the input end of the chip adopts JFET input, the input bias current is only 2pA, the input offset voltage is only 400 mu V, the gain bandwidth reaches 145MHz, the circuit structure is simplified, and the high-gain broadband and low-noise measurement requirements of the Si-PIN semiconductor detector are met.
Then, for circuit consistency, the filter forming circuit takes AD8066 as a core operational amplifier chip, wherein the chip double-channel design is utilized, so that the first-stage amplifying circuit and the filter forming circuit are integrated, and the volume of the detection device is further reduced.
Next, the present invention directly simulates the test pulse current signal input according to the circuit shown in fig. 2. And respectively carrying out simulation tests on the input of the 241Am source 59.5keV gamma rays and the 137Cs source 662keV gamma rays by combining the formula 1 and the formula 2, and then observing the waveform of the output voltage Vout of the secondary amplifying circuit by using an oscilloscope.
Fig. 4 shows the background waveforms of the amplifier of the present invention, and as shown in fig. 5, the background noise of the wideband preamplifier and the output waveforms of the secondary amplifying circuit of the 241Am source and the 137Cs source in this embodiment, respectively. The root mean square of the noise floor of the test circuit was about 3.35mV and the electronic equivalent noise charge was about 0.15fC under room temperature operating conditions. It is shown by fig. 6 that the waveform shaping time of the output waveforms of the analog test Am source and the Cs source is about 2.5 μs. Therefore, the testable broadband semiconductor probe circuit of the invention has low noise and rapid responsiveness.
Next, a set of input charge amounts, in this example, 0.5fC, 1fC, 3fC, 5fC, 10fC, 20fC, 50fC, 70fC, and 100fC, respectively, are selected according to the input charge range of the silicon semiconductor detector obtained in equation 2.
Next, depending on the saturation collection time of the Si-PIN semiconductor detector used, the signal generator voltage pulse amplitude is adjusted to test signals having tw of 10ns, 30ns, and 100ns pulse widths, respectively, at the same set of input charge amounts.
The test data fitting results obtained are shown in fig. 6. In the input charge range of 0.5-100fC, the test pulse width signals of 10ns, 30ns and 100ns show higher linear fitting degree reaching 0.999, and the amplification gain is stable and is about 24V/pC, which indicates that the testable circuit can directly test signals with different current pulse widths, and the time response speed of the tested broadband pre-amplification circuit can reach 10ns.
In conclusion, the testability broadband pre-amplifying circuit and the testing method provide a feasible technical scheme. The pre-amplifying circuit adopts the design of the two-way broadband low-noise amplifier AD8066, so that the circuit structure is simplified, and the design of a narrow space is realized. Meanwhile, the addition of the testable circuit enables the broadband pre-amplifying circuit to directly simulate the test current pulse width information. The circuit bandwidth test shows that the time response speed of the pre-amplifying circuit can reach 10ns, and the pre-amplifying circuit has higher gain stability in the input charge range of 0.5-100fC, and has good application prospect.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Finally, it should be noted that the above-mentioned embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same, and although the present invention has been described in detail with reference to examples, it should be understood by those skilled in the art that modifications and equivalents may be made to the technical solution of the present invention without departing from the spirit and scope of the technical solution of the present invention, and all such modifications and equivalents are intended to be encompassed in the scope of the claims of the present invention.