CN115514325B - An L-band monolithic integrated power amplifier - Google Patents
An L-band monolithic integrated power amplifier Download PDFInfo
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- CN115514325B CN115514325B CN202211048611.4A CN202211048611A CN115514325B CN 115514325 B CN115514325 B CN 115514325B CN 202211048611 A CN202211048611 A CN 202211048611A CN 115514325 B CN115514325 B CN 115514325B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
- H03F1/565—Modifications of input or output impedances, not otherwise provided for using inductive elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/193—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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Abstract
The invention belongs to the technical field of semiconductors, and particularly relates to an L-band monolithic integrated power amplifier. The power amplifier comprises an input matching network unit, a transistor unit and an output matching network unit, wherein the impedance matching of the input and output of the transistor unit under the GAN process is realized through the special circuit structures of the input matching network unit and the output matching network unit, the matching between off-chip inductance and off-chip capacitance is not needed, and the problems of high cost, low efficiency, small bandwidth, large size and the like in the prior art when the power amplifier is applied to an L-band power amplifier are solved.
Description
Technical Field
The invention relates to a power amplifier integrated circuit, in particular to an L-band monolithic integrated power amplifier, and belongs to the technical field of semiconductors.
Background
With the continuous development of radar technology, phased array radar is increasingly used. The phased array radar has a plurality of transceiver components integrated inside, each transceiver component comprises a plurality of transceiver channels, and the power amplifier is used as one of the most core devices in the transceiver components, so that the size and the performance of the power amplifier have great influence on the improvement, especially the miniaturization, of the performance of the whole phased array radar. Compared with a hybrid integrated circuit, the single-chip power amplifier circuit can provide smaller size and better chip consistency, the power amplifier consumes most of the energy of the system, the high-efficiency power amplifier can reduce the management requirement on a heat dissipation system, the service life of the device is prolonged, and the efficiency is significant. Therefore, research into a high-efficiency power amplifier is very necessary.
In the current semiconductor process, the CMOS process is not suitable for being applied to a 5-10W power level power amplifier due to the poor power density, efficiency and other aspects, the 5-10W power level is more based on the GaAs process and the GaN process, but because the GaAs process has the power density limit (about 0.8W/mm), if the power amplifier is realized in an L wave band, more than 5W power amplifier is necessarily required to be subjected to power synthesis, the inductance used in the L wave band tends to have larger inductance value, the multiple synthesis network also increases loss, the chip size is very large, and compared with the GaAs process and the CMOS process, the GaN process has the power density of more than 5W/mm, and is more convenient for realizing monolithic integration. However, in practical applications, due to the matching factor of the input and output impedance of the transistors of the power amplifier, the bandwidth of the high-efficiency power amplifier in the current industry L-band is often between 200-600 MHz, for example, the working frequency WFPN012014-P48 of the product of the medium power 55 is 1.2-1.4GHz, the bandwidth is 200MHz, the efficiency of the single-chip integrated power amplifier product capable of covering the working bandwidth of 1-2 GHz is lower than 50%, for example, the working frequency WFDN008020-P48 of the product of the medium power 55 is 0.8-2.0GHz, the bandwidth is 1.2GHz but the efficiency is only 45%, and many wideband products all need to be matched with off-chip inductance and off-chip capacitance, so that the size of a transceiving channel is increased, for example, the BW 0 working frequency of the product of the medium power 13 is 0.2-1.8GHz, the efficiency is 54%, but the drain off-chip inductance is required to work, which is unfavorable for miniaturized design, and the consistency between the channels is poor due to the additional factors introduced by assembly, so that the transceiver channel cannot adapt to the L-band wideband phased array radar assembly.
Therefore, research on an L-band high-efficiency monolithic integrated power amplifier covering 1-2GHz band based on GaN technology has positive significance.
Disclosure of Invention
Aiming at the improvement demand in the prior art, the invention provides an L-band monolithic integrated power amplifier, the working frequency range of which is 1-2 GHz, the whole L-band is covered, the integration of all semiconductor devices is realized in a chip, and the L-band monolithic integrated power amplifier has the advantages of low cost, high efficiency, wide bandwidth, small size and the like of a transmitting channel and is suitable for an L-band broadband phased array radar receiving and transmitting assembly.
The invention adopts the technical scheme that:
an L-band monolithic integrated power amplifier comprises an input matching network unit, a transistor unit and an output matching network unit;
The input matching network unit comprises a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, an inductor L1, an inductor L2 and an inductor L3, wherein a first end of the resistor R1 is connected with a first end of the capacitor C4 and then is respectively connected with a first end of the inductor L2 and a first end of the inductor L3, a second end of the resistor R1 is connected with a second end of the capacitor C4 and then is used as an output of the input matching network unit to be connected with the transistor unit, a second end of the inductor L2 is connected with a radio frequency input signal RFin through the capacitor C2, a second end of the inductor L3 is respectively connected with a first end of the resistor R3 and a first end of the capacitor C3 after passing through the resistor R2, a second end of the resistor R3 is connected with an external grid bias voltage signal VG, a second end of the capacitor C3 is grounded, a first end of the inductor L1 is connected with the first end of the inductor L1 and a first end of the capacitor C2 is connected with the radio frequency input signal RFin, and the other end is grounded;
The transistor unit comprises a transistor DM1 and a transistor DM2, wherein the grid electrode of the transistor DM1 and the grid electrode of the transistor DM2 are both connected to a signal node N1 and used for receiving radio frequency signals provided by an input stage matching unit, the source electrode of the transistor DM1 and the source electrode of the transistor DM2 are both grounded, the drain electrode of the transistor DM1 is used as a first output end of the transistor unit to be connected with a first input port of an output matching network unit, and the drain electrode of the transistor DM2 is used as a second output end of the transistor unit to be connected with a second input port of the output matching network unit;
The output matching network unit comprises a transmission line T1, a transmission line T2, a transmission line T3, a transmission line T4, a capacitor C5, a capacitor C6, a capacitor C7, an inductor L6 and a resistor R4, wherein the first end of the transmission line T1 is used as a first input port of the output matching network unit to be connected with a first output end of a crystal unit, the second end of the transmission line T1 is connected with the second end of the transmission line T2 and then connected with the first end of the transmission line T3, the first end of the transmission line T2 is used as a second input port of the output matching network unit to be connected with a second output end of the crystal unit, the second end of the transmission line T3 is respectively connected with the first end of the transmission line T4 and the first end of the capacitor C7, the second end of the transmission line T4 is respectively connected with the first end of the capacitor C5 and the first end of the inductor L6, the second end of the capacitor C5 is grounded, the second end of the inductor L6 is respectively connected with an external drain bias VD and the first end of the capacitor C6, the second end of the capacitor C6 is grounded, the second end of the capacitor C7 is used as an output port of the output matching network unit, and the second end of the resistor R4 is used as a first end of the transmission line T2 to be connected with the balance.
Furthermore, the input matching network unit, the transistor unit and the output matching network unit adopt a GaN-HEMT technology to realize on-chip integration.
Further, each component in the input matching network unit and the output matching network unit is a passive semiconductor device, and the transistor DM1 and the transistor DM2 are depletion type high electron mobility transistors.
After the technical scheme is adopted, the invention has the following advantages:
1. According to the invention, through the special circuit structures of the input matching network unit and the output matching network unit, the impedance matching of the input and output of the transistor unit under the GAN process is realized, the matching between off-chip inductance and off-chip capacitance is not needed, and the problems of high cost, low efficiency, small bandwidth, large size and the like applied to the L-band power amplifier in the prior art are solved.
2. In the output matching network unit, the additionally arranged inductor L6 can be used as a load end, and meanwhile, the gain of the device can be further improved.
3. Under the synergistic effect of the special input matching network unit, the crystal unit and the output matching network unit, the working frequency of the invention covers 1-2 GHz, the working bandwidth is 1GHz, the typical linear gain reaches 17dB under the condition of adopting only a primary amplifying structure, the saturated output power is more than 6W (38 dBm), and the typical value of the saturated output additional efficiency reaches 60%.
Drawings
Fig. 1 shows a schematic diagram of a circuit structure of an L-band monolithically integrated power amplifier according to the present invention;
FIG. 2 shows a linear gain plot of an L-band monolithically integrated power amplifier according to the present invention;
FIG. 3 shows an input port return loss plot for an L-band monolithically integrated power amplifier according to the present invention;
FIG. 4 shows a saturated output power graph of an L-band monolithically integrated power amplifier according to the present invention;
FIG. 5 shows a saturated output additional efficiency plot for an L-band monolithically integrated power amplifier according to the present invention;
Reference numerals:
1. The input matching network unit, 2, the transistor unit, 3, the output matching network unit.
Detailed Description
In order that the advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to specific embodiments that are illustrated in the appended drawings. Those skilled in the art of integrated circuits will appreciate that the invention is intended to cover a broad range of applications, not just the circuit configuration described, and that the scope of application is also extended.
Fig. 1 shows a schematic diagram of a circuit structure of an L-band monolithic integrated power amplifier according to the present invention, and as shown in fig. 1, the circuit of the L-band monolithic integrated power amplifier includes an input matching network unit, a transistor unit, and an output matching network unit. The input of the input matching network unit is connected with the input of the radio frequency input signal RFin, the output of the input matching network unit is connected with the input of the transistor unit, 50-ohm input matching of the radio frequency input signal Rfin is completed, and the input radio frequency voltage signal is converted into a radio frequency current signal. The transistor unit is a signal amplifying unit, and the output of the transistor unit is connected with the input of the output matching network unit and is used for amplifying and outputting the received radio frequency current signal. The output matching network unit performs impedance matching on the amplified radio frequency current signal and outputs a radio frequency signal Rfout.
The input matching network unit comprises a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, an inductor L1, an inductor L2 and an inductor L3, wherein a first end of the resistor R1 is connected with a first end of the capacitor C4 and then is respectively connected with a first end of the inductor L2 and a first end of the inductor L3, a second end of the resistor R1 is connected with a second end of the capacitor C4 and then is used as an output of the input matching network unit to be connected with the transistor unit, a second end of the inductor L2 is connected with a radio frequency input signal RFin through the capacitor C2, a second end of the inductor L3 is respectively connected with a first end of the resistor R3 and a first end of the capacitor C3 after passing through the resistor R2, a second end of the resistor R3 is connected with an external grid bias voltage signal VG, a second end of the capacitor C3 is grounded, a first end of the inductor L1 is connected with the first end of the inductor L1 and a first end of the capacitor C2 is respectively connected with a radio frequency input signal RFin, and the other end is grounded.
The transistor unit comprises a transistor DM1 and a transistor DM2, wherein the grid electrode of the transistor DM1 and the grid electrode of the transistor DM2 are both connected to a signal node N1 and used for receiving radio frequency signals provided by the input stage matching unit, the source electrode of the transistor DM1 and the source electrode of the transistor DM2 are both grounded, the drain electrode of the transistor DM1 is used as a first output end of the transistor unit to be connected with a first input port of the output matching network unit, and the drain electrode of the transistor DM2 is used as a second output end of the transistor unit to be connected with a second input port of the output matching network unit. The output matching network unit comprises a transmission line T1, a transmission line T2, a transmission line T3, a transmission line T4, a capacitor C5, a capacitor C6, a capacitor C7, an inductor L6 and a resistor R4, wherein the first end of the transmission line T1 is used as a first input port of the output matching network unit to be connected with a first output end of a crystal unit, the second end of the transmission line T1 is connected with a second end of the transmission line T2 and then connected with the first end of the transmission line T3, the first end of the transmission line T2 is used as a second input port of the output matching network unit to be connected with a second output end of the crystal unit, the second end of the transmission line T3 is respectively connected with the first end of the transmission line T4 and the first end of the capacitor C7, the second end of the transmission line T4 is respectively connected with the first end of the capacitor C5 and the first end of the inductor L6, the second end of the capacitor C5 is grounded, the second end of the inductor L6 is respectively connected with an external drain bias of a chip and the first end of the capacitor C6, the second end of the capacitor C6 is grounded, the second end of the capacitor C7 is used as an output port of the output matching network unit, and the second end of the resistor R4 is used as an output port of the output matching network unit to be connected with the first end of the resistor T2, and used for preventing the output from being amplified.
When in use, the units are matched with each other to convert the input radio frequency signal Rfin into a radio frequency signal Rfout for output. In the input matching network unit, a capacitor C2 is used as a blocking capacitor of the input matching unit and also participates in 50 ohm impedance matching, a resistor R2 is used for reducing the Q value of the input matching network, a capacitor C3 is used as an on-chip filter capacitor of an external grid bias port of a chip, the value of the resistor R3 connected with an external grid bias voltage signal VG is-2V, and the stability of the whole device is improved by matching the capacitor C2, the resistor R2, the capacitor C3 and the resistor R3 with a resistor R1 and a capacitor C4 which are arranged in parallel. In the crystal unit, the two transistors are GaN-HEMT and have the same size, and the power amplification is realized by adopting a parallel connection mode. In the output matching network unit, according to the microwave network matching principle, the value ranges of a transmission line T4, a capacitor C5 and an inductor L6 are set, impedance tuning is realized through the set value ranges of the transmission line T4, the capacitor C5 and the inductor L6, drain emission efficiency is improved, a second port of the inductor L6 is connected with a first port of the capacitor C6 and is simultaneously connected with drain bias VD outside a chip, the value of VD is 28V, the second port of the capacitor C6 is grounded, the filter effect of the drain bias port of the chip is achieved, and the capacitor C7 serves as a blocking capacitor, and the stability of a device is enhanced at an output end.
Fig. 2 shows a linear gain profile of an L-band monolithically integrated power amplifier according to the present invention. As can be seen from fig. 2, the power amplifier of the present embodiment has a linear gain of about 28dB in the operating frequency band and exhibits a positive slope gain characteristic.
Fig. 3 shows an input port return loss plot for an L-band monolithically integrated power amplifier according to the present invention. As can be seen from fig. 3, the standing wave ratio of the input port in the operating band is about 1.1, which indicates that the input port is well matched.
Fig. 4 shows a saturated output power graph of an L-band monolithically integrated power amplifier according to the present invention. As can be seen from fig. 4, the saturated output power is greater than 27dBm and exhibits a positive slope power output characteristic in the operating band.
Fig. 5 shows a saturated output additional efficiency graph of an L-band monolithically integrated power amplifier according to the present invention. As can be seen from fig. 5, the saturation output additional efficiency is greater than 45% in the operating frequency band, which is suitable for most radar transmitting channels.
In summary, the invention solves the application problems of a plurality of core indexes such as bandwidth, efficiency, size and the like of the L-band power amplifier, realizes low cost and miniaturization through the on-chip integrated inductor and the single-stage amplifying structure, is suitable for being used as a final power amplifier in an L-band broadband phased array radar transceiver component and being used as a penultimate power driving stage in the L-band broadband phased array radar transceiver component, only needs drain voltage bias and grid voltage bias outside a chip, and is extremely simple and convenient to apply in a primary component in a single-chip integrated mode.
The foregoing embodiments are merely illustrative of specific examples of the present invention and are not intended to be limiting of the embodiments of the present invention, and other extensions of different forms may be made by those skilled in the art of semiconductors based on the foregoing description, and it is not intended to be exhaustive of all the embodiments, and all obvious variations or modifications of the extensions are within the scope of the present invention.
Claims (3)
1. An L-band monolithic integrated power amplifier comprises an input matching network unit, a transistor unit and an output matching network unit, and is characterized in that:
The input matching network unit comprises a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, an inductor L1, an inductor L2 and an inductor L3, wherein a first end of the resistor R1 is connected with a first end of the capacitor C4 and then is respectively connected with a first end of the inductor L2 and a first end of the inductor L3, a second end of the resistor R1 is connected with a second end of the capacitor C4 and then is used as an output of the input matching network unit to be connected with the transistor unit, a second end of the inductor L2 is connected with a radio frequency input signal RFin through the capacitor C2, a second end of the inductor L3 is respectively connected with a first end of the resistor R3 and a first end of the capacitor C3 after passing through the resistor R2, a second end of the resistor R3 is connected with an external grid bias voltage signal VG, a second end of the capacitor C3 is grounded, a first end of the inductor L1 is connected with the first end of the inductor L1 and a first end of the capacitor C2 is connected with the radio frequency input signal RFin, and the other end is grounded;
The transistor unit comprises a transistor DM1 and a transistor DM2, wherein the grid electrode of the transistor DM1 and the grid electrode of the transistor DM2 are both connected to a signal node N1 and used for receiving radio frequency signals provided by an input stage matching unit, the source electrode of the transistor DM1 and the source electrode of the transistor DM2 are both grounded, the drain electrode of the transistor DM1 is used as a first output end of the transistor unit to be connected with a first input port of an output matching network unit, and the drain electrode of the transistor DM2 is used as a second output end of the transistor unit to be connected with a second input port of the output matching network unit;
The output matching network unit comprises a transmission line T1, a transmission line T2, a transmission line T3, a transmission line T4, a capacitor C5, a capacitor C6, a capacitor C7, an inductor L6 and a resistor R4, wherein the first end of the transmission line T1 is used as a first input port of the output matching network unit to be connected with a first output end of a crystal unit, the second end of the transmission line T1 is connected with the second end of the transmission line T2 and then connected with the first end of the transmission line T3, the first end of the transmission line T2 is used as a second input port of the output matching network unit to be connected with a second output end of the crystal unit, the second end of the transmission line T3 is respectively connected with the first end of the transmission line T4 and the first end of the capacitor C7, the second end of the transmission line T4 is respectively connected with the first end of the capacitor C5 and the first end of the inductor L6, the second end of the capacitor C5 is grounded, the second end of the inductor L6 is respectively connected with an external drain bias VD and the first end of the capacitor C6, the second end of the capacitor C6 is grounded, the second end of the capacitor C7 is used as an output port of the output matching network unit, and the second end of the resistor R4 is used as a first end of the transmission line T2 to be connected with the balance.
2. The L-band monolithically integrated power amplifier of claim 1, wherein the input matching network unit, the transistor unit, and the output matching network unit are integrated on-chip using a GaN-HEMT process.
3. The L-band monolithically integrated power amplifier of claim 1, wherein each of the components in the input matching network unit and the output matching network unit is a passive semiconductor device, and the transistors DM1 and DM2 are depletion mode high electron mobility transistors.
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| CN107293521A (en) * | 2017-05-27 | 2017-10-24 | 中国电子科技集团公司第十三研究所 | The method for realizing the Ω impedance matchings of L-band device 50 |
| CN107493082A (en) * | 2017-08-31 | 2017-12-19 | 电子科技大学 | A kind of dual-passband amplifier |
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| CN107293521A (en) * | 2017-05-27 | 2017-10-24 | 中国电子科技集团公司第十三研究所 | The method for realizing the Ω impedance matchings of L-band device 50 |
| CN107493082A (en) * | 2017-08-31 | 2017-12-19 | 电子科技大学 | A kind of dual-passband amplifier |
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