Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
It should be noted that the terms "comprising" and "having" and any variations thereof in the embodiments of the present application and the accompanying drawings are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Currently, short-wave communication-based electronic devices have strict requirements for power consumption. Low power consumption is a necessary trend in the development of electronic devices. In order to reduce the power consumption of the electronic device, it is necessary to increase the working efficiency of the power amplifier, so that the transmitter of the electronic device has lower input power consumption on the premise of the same output power. The short wave power amplifier (hereinafter referred to as power amplifier or power amplifier) is a core component of the short wave transmitting link, and the performance of the power amplifier has a significant influence on the overall effect, intermodulation distortion and other indexes of the electronic equipment.
In order to increase the efficiency of power amplification, it is often required that the power amplifier of the transmitter operate in a near saturated state. Although the output power of the electronic equipment can be increased under the condition of the same input power, when the power amplifier works near the saturation point, the nonlinear characteristic of the power amplifier is stronger, and the nonlinear distortion of the power amplifier output signal is larger. The nonlinear distortion of the signal not only can generate in-band distortion to influence the error rate of the signal, but also can generate out-of-band distortion to cause interference to the adjacent frequency channel.
Therefore, in short-wave communication, very high requirements are put on the linearity of the power amplifier of the electronic device, and it is very important to improve the linearity of the power amplifier on the premise of keeping high efficiency as much as possible. The power amplifier linearization technique is known as a key technique in short wave communication systems.
In order to improve the linearity of the power amplifier, the traditional method is power withdrawal, namely, the input power of the power amplifier is backed back by a few dB from a 1dB compression point, so that the power amplifier works in a region far away from the 1dB compression point, and the power amplifier works in a linear amplification region.
However, the power backoff method reduces the efficiency of the power amplifier and increases heat dissipation, and this method of sacrificing the efficiency of the power amplifier in exchange for linearity is obviously not preferable. Moreover, the linearity of the power amplifier cannot be changed when the power is backed off to a certain extent. Therefore, the power backoff method is not suitable for a short-wave communication system with high requirements on the degree of power amplification and efficiency.
In addition, there are other power amplification techniques in the industry, such as Doherty (Doherty) power amplification, feedforward techniques, digital predistortion techniques, and the like. Among them, the Doherty power amplifier technology requires additional hardware overhead. The characteristic parameters of the feedforward technology circuit are affected by device aging, temperature change and the like, the performance is unstable, the efficiency of the feedforward technology is low, generally about 10%, and the design and the debugging are complex. The digital predistortion technology can improve the nonlinearity of the power amplifier by changing the waveform of the baseband signal on the premise of not reducing the working efficiency of the short-wave power amplifier.
Based on the above, the embodiment of the application provides a short wave communication method, a device, an electronic device and a readable storage medium based on a closed loop based on a digital predistortion theory, which utilize a closed loop feedback mechanism to compensate nonlinearity of a power amplifier and simultaneously ensure efficiency of the power amplifier.
The scheme is suitable for scenes with complex and changeable use scenes and needing tracking compensation for the power amplifier. This solution requires that the transmitter of the electronic device be provided with a feedback loop and that the field programmable gate array (Field Programmable GATE ARRAY, FPGA) be resource-efficient. Therefore, the nonlinear condition of the power amplifier can be tracked to a great extent, and the nonlinearity of the power amplifier is compensated.
Fig. 1A is a schematic diagram of an AM-AM characteristic of a short-wave power amplifier of an electronic device for performing the method provided by an embodiment of the present application. Referring to fig. 1A, the abscissa indicates the input amplitude modulation (amplitude modulation, AM), and the ordinate indicates the output AM, which are nonlinear.
Fig. 1B is a schematic diagram of an AM-PM characteristic of a short-wave power amplifier of an electronic device for performing the method provided by an embodiment of the application. Referring to fig. 1A, the abscissa indicates an input AM, and the ordinate indicates an output Phase Modulation (PM), and the input AM and the output PM are nonlinear.
The technical idea of the embodiment of the application is to construct a Digital Predistortion (DPD) model which is inverse to the characteristics of the short wave power amplifier, and the digital predistortion model is also called predistortion model or DPD model. After the baseband signal is input into the predistortion model, the predistortion model enables the baseband signal to be changed into a distorted signal, and then the distorted signal is input into the short-wave power amplifier, so that the output signal of the short-wave power amplifier and the original baseband signal form a linear relation. Wherein the predistortion model may also be referred to as a predistorter.
Ideally, the cascade system formed by the predistortion-power amplifier exhibits linear characteristics. For example, please refer to fig. 2.
Fig. 2 is a basic schematic diagram of a short-wave communication method based on closed loop according to an embodiment of the present application. Referring to fig. 2, the upper left-hand coordinate system represents the characteristic curve of the predistortion model, i.e., the DPD model, whose input (V i) and output (V d) are nonlinear. The upper right hand corner frame represents the Power Amplifier (PA) characteristic curve, which is also nonlinear in input (V d) and output (V 0).
The lowest coordinate system represents the characteristics of the predistortion model and the cascade model formed by the PA. The characteristic curve has a linear relationship between the input (V i) and the output (V 0).
Based on fig. 1A, fig. 1B and fig. 2, in order to solve the problem of nonlinearity of the power amplifier, under the basic theory based on predistortion, an embodiment of the present application is to provide a short wave communication method, apparatus, electronic device and readable storage medium based on closed loop. Short wave communication device based on closed loop can be flexibly built in the short wave digital channel unit of electronic equipment, and the installation is convenient and easy to realize. Moreover, by adopting the method of the embodiment of the application, after adopting the predistortion processing technology, the third-order intermodulation index (2 MHz-30 MHz) of the transmitter of the electronic equipment is improved to be more than-40 dB from the original-20 dB, and the spectrum quality of the transmitter is also greatly improved.
Fig. 3 is a schematic diagram of a connection structure of a transmitter and a predistortion-related part of an electronic device for performing a closed-loop based short wave communication method. Referring to fig. 3, the connection structure includes a digital domain and an analog domain. The baseband signals transmitted by the transmitter of the electronic device in two adjacent times are referred to as a first baseband signal and a second baseband signal. When the first baseband signal x (n) is transmitted, the predistortion model is a first predistortion model, and predistortion coefficients of the first predistortion model are called first predistortion coefficients. And in the signal transmitting process, the first baseband signal x (n) is subjected to predistortion processing by using a first predistortion model, so as to obtain a first distorted signal z (n). Then, an update parameter, namely a second predistortion coefficient, is determined according to the first distortion signal z (n), and the first predistortion model is updated by using the second predistortion coefficient so as to obtain a second predistortion model. In the process of determining the second predistortion coefficient, the first distortion signal is up-converted to radio frequency to obtain a radio frequency signal. The radio frequency signal is sent out after a series of processes such as digital-to-analog conversion, power amplification and the like are carried out in an analog domain, meanwhile, a part of signals are fed back to a digital domain through a coupling loop in the analog domain, and a second predistortion coefficient is determined in the digital domain according to the feedback signals and the first distortion signals so as to update the first predistortion model.
And when the second baseband signal is transmitted, the electronic equipment performs predistortion processing on the second baseband signal by using a second predistortion model to obtain a second distorted signal. And continuously determining a new predistortion coefficient and updating a predistortion model by using the distortion signal, so that the nonlinear condition of the power amplifier is tracked to a great extent, and the nonlinear condition of the power amplifier is compensated.
The short-wave communication method based on the closed loop according to the embodiment of the present application will be described in detail based on the basic principle shown in fig. 2 and the connection structure shown in fig. 3. For example, please refer to fig. 4.
Fig. 4 is a flowchart of a short wave communication method based on closed loop according to an embodiment of the present application. The execution subject of the embodiment is an electronic device that performs communication using short waves, and the method includes the steps of:
401. And carrying out predistortion processing on the first baseband signal by using the first predistortion model to obtain a first distorted signal.
In the embodiment of the application, the first baseband signal is a first baseband signal sent by the emitter of the electronic device, and the second baseband signal is a signal sent by the electronic device after the first baseband signal is sent. The first baseband signal may be a baseband signal sent for the first time after the electronic device is started, and at this time, the second baseband signal is a signal sent for the second time by the electronic device. In addition, the first baseband signal may not be the first transmitted signal, for example, the first baseband signal is the 49 th transmitted signal after the electronic device is started, and the second baseband signal is the 50 th transmitted signal after the electronic device is started.
The predistortion coefficient of the first predistortion model is the first predistortion coefficient, and the electronic equipment performs predistortion compensation on the first baseband signal by using the first predistortion model to obtain a first distorted signal.
402. Updating the first predistortion model according to the first distortion signal to obtain a second predistortion model.
For example, referring to fig. 1, the electronic device determines a second predistortion coefficient according to the first distortion signal, and updates the first predistortion model by using the second predistortion coefficient to obtain a second predistortion model. In the process of determining the second predistortion coefficient, the first distortion signal is up-converted to radio frequency to obtain a radio frequency signal. The radio frequency signal is sent out after a series of processes such as digital-to-analog conversion, power amplification and the like are carried out in an analog domain, meanwhile, a part of signals are fed back to a digital domain through a coupling loop in the analog domain, and a second predistortion coefficient is determined in the digital domain according to the feedback signals and the first distortion signals so as to update the first predistortion model.
403. And carrying out predistortion processing on the second baseband signal by using the second predistortion model to obtain a second distorted signal, wherein the first baseband signal and the second baseband signal are signals transmitted by a transmitter of the electronic equipment twice in sequence.
And when the electronic equipment sends the second baseband signal, the updated predistortion model, namely the second predistortion model, is utilized to carry out predistortion processing on the second baseband signal so as to obtain a second distorted signal.
404. And carrying out short-wave communication according to the second distortion signal.
After the electronic device obtains the second distortion signal, up-conversion, digital-to-analog conversion, power amplification, harmonic filtering and the like are performed on the second distortion signal and output. And simultaneously, obtaining a new feedback signal according to the second distortion signal, and continuously updating the second predistortion model by using the feedback signal so as to process the baseband signal by using the updated predistortion model when the baseband signal is transmitted next time.
According to the short wave communication method based on the closed loop, when the electronic equipment transmits the baseband signal, the current predistortion model is utilized to carry out predistortion processing on the baseband information to obtain a distorted signal, the predistortion coefficient is determined by the distorted signal, and the current predistortion model is updated to obtain a new predistortion model, so that predistortion compensation is carried out on the baseband signal when the new baseband signal is transmitted next time. By adopting the scheme, for the electronic equipment with a feedback loop and abundant FPGA resources, the nonlinear condition of the short wave power amplifier can be tracked to a great extent by updating the predistortion model in real time, and the nonlinearity of the power amplifier can be compensated in time.
Optionally, in the foregoing embodiment, in updating the first predistortion model according to the first distortion signal to obtain the second predistortion model by the electronic device, first, a feedback signal is determined according to the first distortion signal. Then, a correlation coefficient is determined from the first baseband signal and the feedback signal. And when the correlation coefficient is larger than a preset threshold value, updating the first predistortion model according to the first distortion signal to obtain a second predistortion model.
The electronic device up-converts the first distortion signal to radio frequency to obtain a radio frequency signal. And performing digital-to-analog conversion, power amplification, harmonic filtering and other processing on the radio frequency signals in an analog domain and outputting the radio frequency signals. Meanwhile, the partially processed radio frequency signal is subjected to down-conversion processing to obtain a down-converted baseband signal, which is also called a feedback signal. The electronic device then determines whether to update the first predistortion model based on the first baseband signal and the feedback signal. If the first predistortion model is updated, a second predistortion coefficient needs to be determined, and the first predistortion model is updated by using the second predistortion coefficient so as to obtain the second predistortion model. If the first predistortion model is not updated, the first predistortion model is not required to be updated, and the first predistortion model is continuously used in the process of transmitting the second baseband signal.
And when the electronic equipment determines whether to update the first predistortion model according to the first baseband signal and the feedback signal, determining a correlation coefficient according to the first baseband signal and the feedback signal. And if the correlation coefficient is smaller than or equal to the preset threshold value, the first predistortion model is continuously used when the second baseband signal is sent.
By adopting the scheme, the nonlinearity of the first predistortion signal subjected to predistortion supplementation of the first predistortion model is evaluated through the feedback signal, whether the first predistortion model is updated or not is determined according to the evaluation result, and therefore the calculation complexity can be effectively reduced, and the calculation time can be saved.
Fig. 5 is another flowchart of a short wave communication method based on closed loop according to an embodiment of the present application. The execution subject of the present embodiment is an electronic device that performs communication using short waves. Referring to fig. 3, fig. 5 includes the following steps:
501. and carrying out predistortion processing on the first baseband signal by using the first predistortion model to obtain a first distorted signal.
The electronic device obtains a first predistortion coefficient in advance, and obtains a first predistortion model based on the first predistortion coefficient in advance. For example, when the electronic device is initially started, the first predistortion coefficient is 0. For another example, if the first electronic device further transmits other baseband signals before transmitting the first baseband signal, the first predistortion coefficient is determined by the electronic device according to feedback signals corresponding to the other baseband signals.
When the first baseband signal is transmitted, the electronic equipment uses a first predistortion coefficient and a first predistortion model which are obtained in advance to carry out predistortion compensation on the first baseband signal, so as to obtain a first distortion signal.
And then, the electronic equipment updates the first predistortion model according to the first distortion signal so as to obtain a second predistortion model. During the updating process, a feedback signal is determined from the first distorted signal, see steps 502-505 in detail. The electronic device then aligns the first distortion signal with the feedback signal, see step 506 in detail, and then calculates the correlation coefficient, see step 507 below in detail. And when the correlation coefficient is larger than a preset threshold value, updating the first predistortion model according to the first distortion signal to obtain a second predistortion model.
The process of the electronic device determining the feedback signal according to the first distortion signal is shown in step 502 below.
502. And up-converting the first distortion signal to an radio frequency domain to obtain a radio frequency signal.
Referring to fig. 3, the electronic device sends the baseband signal subjected to predistortion compensation, i.e., the first distortion signal, to a digital up-conversion (Digital Up Converter, DUC) module, so as to up-convert the first baseband signal subjected to predistortion compensation into an rf domain. That is, after the first distortion signal passes through the up-conversion module, a radio frequency signal is obtained. The radio frequency signal is also referred to as a radio frequency digital signal. The first distorted signal after distortion is up-converted to a radio frequency band required by short waves, and the obtained radio frequency signal can be transmitted in the atmosphere.
503. And D, performing digital-to-analog conversion on the radio frequency signal to obtain an analog signal, and amplifying the power of the analog signal to obtain an amplified signal.
For example, referring to fig. 3, a digital-analog (DA) conversion module, a power amplifier, a harmonic filter, a directional coupler, an analog-to-digital (a/d) conversion module, etc. are provided in the analog domain.
The electronic equipment converts the radio frequency signals subjected to up-conversion into analog signals through a digital-to-analog conversion module. And then, the electronic equipment sends the analog signal obtained through digital-to-analog conversion into a power amplifier to carry out power amplification, so that an amplified signal is obtained.
504. And carrying out harmonic filtering on the amplified signal to obtain a filtered signal.
The electronic equipment sends the amplified signal obtained after the power amplifier into a harmonic filter to filter harmonic distortion at a harmonic position generated by the power amplifier so as to reduce nonlinear influence of the harmonic distortion on the radio frequency signal. The harmonic wave is filtered to obtain a filtered signal, which is also referred to as a filtered radio frequency signal.
505. The filtered radio frequency signals are used as the output of the power amplifier through the output port of the directional coupler, and the forward coupling port of the directional coupler outputs the radio frequency signals for down-conversion to baseband signals.
Illustratively, a part of the filtered signals are output by a directional coupler as a power amplifier, and the other part of the filtered signals are analog-to-digital converted to obtain baseband signals through a digital down-conversion (Digital Down Converters, DDC) module, wherein the baseband signals obtained through down-conversion are also called feedback signals.
In the specific implementation process, the directional coupler is used for dividing the input filtering signals into power according to a certain percentage, and taking most of the filtering signals as the output of the power amplifier, so that the filtering signals are less coupled and sent into the candidate analog-to-digital conversion module. The coupling ratio of the directional coupler is, for example, 999:1, 998:2, 990:10, etc., and the embodiment of the application is not limited.
506. The electronic device aligns the feedback signal with the first distortion signal.
Referring to fig. 3, the input of the delay alignment module includes a feedback signal and a first distortion signal, and the electronic device aligns the feedback signal obtained by the down-conversion and the first distortion signal by using the delay alignment module, so as to remove the influence of the distortion caused by the signal delay.
507. Determining a correlation coefficient between the first baseband signal and the feedback signal, comparing the correlation coefficient with a preset threshold, executing step 508 if the correlation coefficient is greater than the preset threshold, and executing step 510 if the correlation coefficient is less than or equal to the preset threshold.
Referring to fig. 3, the digital domain is provided with a coefficient update control module, and the coefficient update control module calculates correlation coefficients of the first baseband signal and the feedback signal. In addition, the coefficient updating control module also transmits the feedback signal and the distortion signal after fractional alignment to the LS estimation module.
The coefficient updating control module integrates nonlinear parameters required by the power amplifier according to a certain weight and a certain score, combines the nonlinear parameters into a correlation coefficient, and compares the correlation coefficient with a preset threshold. And when the correlation coefficient is larger than a preset threshold value, enabling the LS estimation module to calculate a second predistortion coefficient.
508. And the electronic equipment determines a predistortion coefficient of the second predistortion model according to the aligned first predistortion signal and feedback signal, and updates the first predistortion model by using the predistortion coefficient so as to obtain the second predistortion model.
For example, referring to fig. 3, the digital domain is provided with a least squares (leastsqaure, LS) estimation module, the input of which includes an enable signal, an aligned first predistortion signal and a feedback signal. If the enabling signal is 1 and the correlation coefficient is larger than the preset threshold, the LS module carries out LS estimation on the aligned first predistortion signal and the feedback signal, so that a predistortion coefficient of a second predistortion model is obtained, the predistortion coefficient is input to the predistortion module, and the predistortion coefficient is used for updating the first predistortion model, so that the second predistortion model is obtained.
509. And pre-distorting the second baseband signal by using a second pre-distortion model.
Illustratively, after the second predistortion model is obtained, the baseband signal input subsequently, that is, the second baseband signal, will be predistortion-compensated based on the second predistortion model.
510. And performing predistortion processing on the second baseband signal by using the first predistortion model.
For example, if the correlation coefficient is less than or equal to the preset threshold value when the enable signal is 0, the first predistortion model is not required to be updated, and the first predistortion model is continuously utilized to compensate the second baseband signal.
By adopting the scheme, the electronic equipment outputs the first distortion signal through up-conversion, digital-to-analog conversion, amplification, harmonic filtering and the like, and obtains the feedback signal, so that the feedback signal is obtained while the output power is ensured, and preparation is made for updating the first predistortion model subsequently.
Optionally, in the embodiment shown in fig. 5, in step 501, the expression of the first predistortion model is shown in the following formula (1):
Where x (n) represents the first baseband signal, i.e. the input signal of the first predistortion model. a denotes a predistortion coefficient of the first predistortion model. n represents the sampling sequence number of the signal, M is a memory polynomial used for representing the memory characteristic of the power amplifier, and represents that the output of the power amplifier is related to the first M symbols of the input signal. K is the nonlinear characteristic of the memory polynomial characterization. Considering that the short wave power amplifier may have memory characteristics in addition to the ubiquitous nonlinear characteristics, the first predistortion model needs to compensate for the memory characteristics of the power amplifier, thereby increasing the memory term. The orders of M and K are preset, all a mk are initialized to 0 when M >0, K >0, and a 00 =1 when m=0, k=0.
Writing the formula (1) into a matrix mode to obtain the following formula (2):
z=xa formula (2)
In the formula (2), X represents an input vector matrix of the first predistortion model, and a represents a predistortion coefficient matrix of the first predistortion model.
X, A is expressed as the following formula (3):
Z=[z(n),...,z(n)|z(n)|K,…,z(n-M),…,z(n-M)|z(n-M)|K]
a= [ a 00,…,a0K,…,aM0,…,aMK ] formula (3)
Fig. 6 is a schematic structural diagram of a first predistortion model in an electronic device for performing a short-wave communication method based on closed loop according to an embodiment of the present application.
Referring to fig. 6, the first predistortion model is a model of 5 orders, and the input of the model includes predistortion coefficients and the first baseband signal. The predistortion coefficients are coefficients in the graph, the first baseband signal is divided into two paths of signals, and one path of signals is delayed by one clock period, so that the first predistortion model obtains a memory term. Wherein the delay is shown as Z -1 and the memory term is shown as M 1. The expansion of the other signal to M 0,M0 is shown in the right polynomial model.
The input of the polynomial model is a first baseband signal and a predistortion coefficient, and after the input first baseband signal takes an absolute value, the 1 st power of the absolute value, the 2 nd power of the absolute value, the 3 rd power of the absolute value and the 4 th power of the absolute value are calculated to obtain 4 th powers. Then, each obtained 'power' is multiplied by the input first baseband signal to obtain a plurality of products, and the plurality of products and the first baseband signal are 5 paths of data. After obtaining 5 paths of data, each path of data is multiplied by a predistortion coefficient to obtain the output of M 0.
The input of M 1 is delayed by one period compared to M 0, the predistortion coefficients of M 1 are another set of coefficients, and the sum of the output of M 0 and the output of M 1 constitutes the output of the predistortion model.
In fig. 8, the predistortion coefficient is denoted as [ a 0,a1,a2,a3,a4 ]. For M 0, the predistortion coefficient is, for example, [ a 00,a01,a02,a03,a04]、M1 ] and [ a 10,a11,a12,a13,a14 ].
Optionally, in an embodiment of the present application, the delay alignment in step 506 includes integer alignment and fractional alignment. That is, in the step 506, when the electronic device aligns the first predistortion signal and the feedback signal, the feedback signal is first used as a reference signal, and integer delay alignment is performed on the first distortion signal to obtain an integer aligned distortion signal. And then, the electronic equipment takes the feedback signal as a reference signal and performs fractional delay alignment on the integer aligned distortion signal to obtain a fractional aligned distortion signal.
In the integer alignment process, the electronic device performs a shift operation on one signal as a reference, where the minimum unit of the shift operation is the sampling period of the signal, on another signal to be aligned. For example, the electronic device uses the feedback signal f (n) as a base station signal and the first distortion signal z (n) as a signal to be aligned. In the alignment process, the electronic device takes the correlation operation of the two signals and obtains the label corresponding to the maximum value. The expression of the integer alignment is shown in the following formula (4):
In the formula (4), N represents the total number of signal points, P represents the integer delay amount, and the superscript "×" represents the conjugate operation. After obtaining the value of the integer delay amount P, performing a shift operation on the first distortion signal z (n) to obtain an integer aligned distortion signal z', as shown in the following formula (5):
z' = [ z (N-P: N), z (1:N-P-1) ] formula (5)
Since the first distortion signal and the feedback signal cannot be aligned to a satisfactory degree by performing only integer alignment, a delay error of undersampling unit time remains. Therefore, in the embodiment of the application, the fractional alignment is performed on the basis of the integer alignment, and a fractional level alignment operation is also required.
In the fractional alignment process, after the integer aligned distortion signal z 'is subjected to fourier transformation, the phase of the distortion signal z' is aligned in the frequency domain, as shown in the following formula (6):
in the formula (6), the range of q is shown in the following formula (7):
Where Q represents the fractional delay amount, F *(ejw) represents the expression of the conjugate of the feedback signal F (n) in the frequency domain after fourier transformation, Z '(e jw) represents the expression of Z' in the frequency domain after fourier transformation, fac represents the fractional delay precision, and represents the total number of fractional delay shifts in one time unit.
After the fractional delay amount is obtained according to the formula (7), performing corresponding shift operation on the integer aligned distortion signal z ', so as to obtain data for establishing a second predistortion model, namely the fractional aligned distortion signal z', as shown in the following formula (8):
Fig. 7 is a characteristic diagram of a short wave communication method based on closed loop according to an embodiment of the present application after fractional alignment and without fractional alignment.
Referring to fig. 7, gray represents a characteristic curve of the first distortion signal subjected to only integer alignment, and black represents a characteristic curve of the first distortion signal subjected to fractional alignment added on the basis of the integer alignment. According to fig. 7, it can be seen that after delay alignment, the divergence degree of the characteristic curve can be reduced, so that the complexity of obtaining the second predistortion model is reduced.
Optionally, in step 507, the electronic device determines the predistortion coefficient of the second predistortion model using an LS algorithm. In the determining process, the electronic device determines a first matrix transpose of the feedback signal and a second matrix transpose of the fractional-aligned distortion signal, as shown in the following formula (9):
Wherein f on the left of the equal sign represents a first matrix transpose of the feedback signal, z' on the left of the equal sign represents a second matrix transpose of the fractional aligned distortion signal, the superscript "T" represents the matrix transpose, and N represents the number of points of the test signal. The second predistortion model takes a polynomial model as an example (the memory polynomial model can be used for expanding memory terms on the basis), an input signal matrix of the second predistortion model is shown in the following formula (10), and predistortion coefficients of the second predistortion model are shown in the following formula (11):
f= [ F, f|f|, f|f| 2,…,f|f|K-1]T formula (10)
A= [ a 0,a1,a2,…,aK-1]T formula (11)
After determining the first transpose matrix and the second transpose matrix, the electronic device determines an expression of the second predistortion model according to the first transpose matrix and the second transpose matrix, where the expression is shown in the following formula (12):
z' =fa formula (12)
And then, the electronic equipment processes the expression by using a least square method to determine the predistortion coefficient of the second predistortion model, and determines the second predistortion model according to the expression of the second predistortion model and the predistortion coefficient of the second predistortion model.
Optionally, when the electronic device processes the expression by using the least square method, the number of sampling points N of the signal and the number of parameters K of the second predistortion model generally satisfy N > > K. Thus, equation (12) has a unique least squares solution. According to the LS algorithm, the least squares solution is shown in equation (13) below:
A= (F HF)-1FH z″ formula (13)
Wherein, "H" represents conjugate transpose operation, "-1" represents traditional matrix inversion operation, (F HF)-1FH is also called generalized inverse matrix of matrix F, i.e. left inverse matrix, and a is the predistortion coefficient of the second predistortion model obtained by LS algorithm.
By adopting the scheme, the predistortion model coefficient is calculated and updated by adopting a least square algorithm, so that the risk of non-convergence of the traditional iterative algorithm is avoided.
Optionally, in the foregoing embodiment, when the electronic device processes the expression by using a least square method to determine the predistortion coefficient of the second predistortion model, the electronic device processes the expression by using a method of using orthogonal triangular decomposition and/or Given rotation to determine the predistortion coefficient of the second predistortion model.
Illustratively, in step 507, the electronic device uses the matrix inversion in the LS algorithm to calculate the orthogonal triangle QR. In the QR-based calculation process, any one matrix may be expressed in terms of an orthogonal matrix and an upper triangular matrix performance, as described in the following equation (14):
B=q×r formula (14)
Wherein, B represents any matrix, Q represents an orthogonal matrix, the inverse matrix of the orthogonal matrix is the conjugate transpose of the matrix, and R represents an upper triangular matrix. The following equation (15) can be obtained by inverting the arbitrary matrix B according to equation (14):
b= (Q x R) -1=R-1*Q-1=R-1*QH formula (15)
QR decomposition adopts a Given rotation mode. When the FPGA realizes the Given rotation, the rotation is completed through a Cordic rotation algorithm. Taking a 3×3 matrix as an example, the expression of Givens for QR decomposition is shown in the following formula (16):
Wherein, The MATLAB algorithm for the elements representing the changes in Givens rotation is as follows:
In the embodiment of the application, the QR decomposition adopts a Givens rotation mode, which can also be simply called a Given QR decomposition algorithm, and can finish inversion operation on a large matrix. Because the Given QR decomposition algorithm uses a loop iteration method to carry out matrix solving operation, the FPGA can further optimize the operation process of the Given QR decomposition in a pipeline mode. Under the condition of ensuring that the FPGA resource occupation condition can be received, the operation efficiency of matrix inversion is improved.
Optionally, in the above embodiment, the evaluation formula of the correlation coefficient in step 507 is shown in formula (17):
Wherein, S represents a correlation coefficient, w n represents a weight factor of the nth item, S n represents a scoring result of the nth item, N represents the number of total nonlinear evaluation items, and the distribution of the weight values is required to be evaluated according to the characteristics of a specific power amplifier and cannot be approximate.
Preferably, the optional nonlinear evaluation terms are 1dB compression point, third-order AC coefficient, adjacent channel power ratio, error vector magnitude and normalized mean square error. Finally, when S > P, the LS estimation module is enabled to calculate the second predistortion coefficients. P represents a preset threshold.
Optionally, in the above embodiment, the electronic device performs step 506 delay alignment for estimating the accurate second predistortion coefficient. In the delay alignment process, delay estimation needs to be performed on the first predistortion signal z (n) and the feedback signal f (n), and the integer alignment method is a correlation operation, as shown in the following formula (18):
wherein N represents the number of samples sampled when performing delay estimation operation, N represents the sampling sequence number, p represents the delay time sequence, and p corresponding to the maximum modulus of R (p) is the loop delay time, i.e. the integer delay amount. The integer delay amount is calculated as shown in formula (19):
The specific way of fractional alignment is to align the phases of the signals in the frequency domain after fourier transformation, as shown in the above formula (6).
In the formula (6), the range of q is shown in the following formula (7):
Where Q represents the fractional delay amount, F *(ejw) represents the expression of the conjugate of the feedback signal F (n) in the frequency domain after fourier transformation, Z '(e jw) represents the expression of Z' in the frequency domain after fourier transformation, fac represents the fractional delay precision, and represents the total number of fractional delay shifts in one time unit.
The electronic equipment calculates a loop delay value with fractional order, namely, after fractional delay amount, N aligned sequences z "(N) and f (N) are obtained, and normalization processing is carried out on signals. Normalized z "(n) is shown in the following formula (20), and normalized f (n) is shown in the following formula (21):
z "(n) =z" (n)/max (|z "(n) |formula (20)
F (n) =f (n)/max (|f (n) |) formula (21)
In the formula (20), z "(n) on the left of the equal sign represents z" (n) after normalization, and in the formula (21), f (n) on the left of the equal sign represents f (n) after normalization.
In step 507, the signal after normalization is processed, and the predistortion coefficient is solved according to the LS algorithm, as shown in the following formula (13):
A= (F HF)-1FH z″ formula (13)
The meaning of each parameter in formula (13) can be found in the above description, and will not be described here.
In the formula (13), a is a predistortion coefficient vector, F is a predistortion model input matrix, z "is a predistortion model output vector, taking a predistortion model selection polynomial as an example, the expressions of a, F and z" are as follows formula (22), formula (10) and formula (23):
a= [ a 0,a1,a2,a3,…,aK-1 ] formula (22)
F= [ F, f|f|, f|f| 2,…,f|f|K-1]T formula (10)
Z "= [ z" (1), z "(2),. Z" (N) ] T formula (23)
Where K represents the nonlinear order of the second predistortion model, the choice of K value is related to the power amplifier nonlinear characteristics, usually 5 or 7, and the specific choice is related to the actual power amplifier characteristics. The superscript "T" indicates a transposed operation of the matrix, f= [ f (1), f (2), f (3), and..f (N) ], where N is the number of samples calculated from the predistortion coefficients, and is the same as the number of signal samples.
In the process of solving the predistortion coefficient, the inverse matrix of F H F is needed to be solved, and because F H F is a large matrix with an order of N, if the direct inversion algorithm is used for solving the inverse matrix, the calculated amount is very large. Meanwhile, errors caused by data precision are likely to be introduced in the data fixed-point calculation process, so that the conventional LS algorithm is not suitable for the condition of online updating of the predistortion coefficient. The conventional LS algorithm is, for example, a calculation method for offline predistortion coefficients.
In order to solve the difficulty of large matrix inversion, the embodiment of the application introduces a QR decomposition algorithm to perform matrix inversion, so that the calculation process and the calculation amount of matrix inversion operation can be simplified under the condition of ensuring the calculation precision, and the QR decomposition is utilized for simplification.
First, define B as a large matrix to be subjected to matrix inversion operation, as shown in the following formula (24):
B=f H ×f formula (24)
From knowledge of matrix theory, any one matrix can be expressed as a product of a positive matrix and an upper triangular matrix, as shown in formula (14):
B=q×r formula (14).
Wherein, B represents any matrix, Q represents an orthogonal matrix, the inverse matrix of the orthogonal matrix is the conjugate transpose of the matrix, and R represents an upper triangular matrix. The following equation (15) can be obtained by inverting the arbitrary matrix B according to equation (14):
b= (Q x R) -1=R-1*Q-1=R-1*QH formula (15)
QR decomposition adopts a Given rotation mode. When the FPGA realizes the Given rotation, the rotation is completed through a Cordic rotation algorithm.
And (3) obtaining an inverse matrix of B according to the matrix inversion algorithm, and then carrying out formula (13) to obtain the predistortion coefficient A.
A= (F HF)-1FH z″ formula (13)
And solving according to the steps to obtain a predistortion coefficient A of the second predistortion model, and updating the first predistortion model according to the second predistortion coefficient to obtain the second predistortion model.
Assuming that the second baseband signal is represented by x (n), the second baseband signal x (n) is subjected to predistortion processing by using a second predistortion model, so as to obtain a second predistortion signal z (n), as shown in the following formula (25):
The above is a process of updating the predistortion coefficient once, and the above processes are repeated in turn, so that the next update of the predistortion coefficient can be completed on the basis of the current predistortion state.
The closed loop predistortion is suitable for the scenes with complex and changeable transmitter use scenes and signal feedback loops.
Fig. 8 is a block diagram of an internal structure of an FPGA in a short-wave communication method based on closed loop according to an embodiment of the present application. Referring to fig. 8, in a block diagram of a closed loop predistortion architecture within an FPGA, an input signal represents a digital baseband signal prior to up-conversion, i.e., the first baseband signal described above. The feedback signal represents a signal after the first baseband signal passes through the predistortion module, the up-conversion module, the digital-to-analog conversion module, the power amplifier, the harmonic filter, the directional coupler, the analog-to-digital conversion module and the down-conversion module.
The control interface is used for finishing the setting of the working state of the whole predistortion module, comprises the comparison of the correlation coefficient of the current feedback signal and a preset threshold value and the switching of the enabling state, and the predistortion state interface is used for identifying the working state of predistortion.
The output signal represents the baseband signal after predistortion treatment, and the latter stage is sent to the digital up-conversion module to complete the optimization process of the predistortion technology.
Fig. 9 is an effect diagram of a short wave communication method based on closed loop according to an embodiment of the present application. Referring to fig. 9, the broken line indicates that the predistortion process is not performed, and the solid line indicates that the predistortion process is performed. Therefore, after the predistortion treatment technology is used, the third-order intermodulation index (2 MHz-30 MHz) of the transmitter is improved to be more than-40 dB from the original-20 dB, and the spectrum quality of the transmitter is also greatly improved.
The following are examples of the apparatus of the present application that may be used to perform the method embodiments of the present application. For details not disclosed in the embodiments of the apparatus of the present application, please refer to the embodiments of the method of the present application.
Fig. 10 is a schematic structural diagram of a short-wave communication device based on closed loop according to an embodiment of the present application. The short wave communication device 1000 based on the closed loop comprises a predistortion module 1001, an updating module 1002 and a communication module 1003.
A predistortion module 1001, configured to perform predistortion processing on the first baseband signal by using a first predistortion model to obtain a first distorted signal;
An updating module 1002, configured to update the first predistortion model according to the first distortion signal to obtain a second predistortion model;
The predistortion module 1001 is further configured to perform predistortion processing on a second baseband signal by using the second predistortion model to obtain a second distorted signal, where the first baseband signal and the second baseband signal are signals transmitted by a transmitter of the electronic device twice in succession;
And a communication module 1003, configured to perform short-wave communication according to the second distortion signal.
In a possible implementation manner, the updating module 1002 is configured to determine a feedback signal according to the first distortion signal, determine a correlation coefficient according to the first baseband signal and the feedback signal, and update the first predistortion model according to the first distortion signal to obtain a second predistortion model when the correlation coefficient is greater than a preset threshold.
In a possible implementation manner, when the updating module 1002 determines a feedback signal according to the first distortion signal, it is configured to up-convert the first distortion signal to a radio frequency domain to obtain a radio frequency signal, perform digital-to-analog conversion on the radio frequency signal to obtain an analog signal, amplify the power of the analog signal to obtain an amplified signal, perform harmonic filtering on the amplified signal to obtain a filtered signal, and determine the feedback signal according to the filtered signal.
In a possible implementation manner, when the correlation coefficient is greater than a preset threshold, the updating module 1002 is configured to update the first predistortion model according to the first distortion signal to obtain a second predistortion model, and use the feedback signal as a reference signal, perform integer delay alignment on the first distortion signal to obtain an integer aligned distortion signal, use the feedback signal as the reference signal, perform fractional delay alignment on the integer aligned distortion signal to obtain a fractional aligned distortion signal, determine a predistortion coefficient according to the fractional aligned distortion signal and the feedback signal, and update the first predistortion model according to the predistortion coefficient to obtain the second predistortion model.
In a possible implementation manner, when determining a predistortion coefficient according to the fractional aligned distortion signal and the feedback signal, the updating module 1002 is configured to determine a first matrix transposition of the feedback signal and a second matrix transposition of the fractional aligned distortion signal, determine an expression of the second predistortion model according to the first matrix transposition and the second matrix transposition, and process the expression by using a least square method to determine the predistortion coefficient of the second predistortion model.
In a possible implementation, the updating module 1002 processes the expression using a least squares method to determine the predistortion coefficients of the second predistortion model, and is configured to process the expression using the least squares method using an orthogonal triangular decomposition and/or Given rotation to determine the predistortion coefficients of the second predistortion model.
In a possible implementation, when the correlation coefficient is less than or equal to a preset threshold, the predistortion coefficient of the second predistortion model is equal to the predistortion coefficient of the first predistortion model.
The short-wave communication device based on the closed loop provided by the embodiment of the application can execute the actions of the electronic equipment in the embodiment, and the implementation principle and the technical effect are similar, and are not repeated here.
Fig. 11 is a schematic structural diagram of an electronic device according to an embodiment of the present application. As shown in fig. 11, the electronic device 1100 includes:
A processor 1101 and a memory 1102;
the memory 1102 stores computer instructions;
The processor 1101 executes the computer instructions stored by the memory 1102, causing the processor 1101 to perform the closed-loop based short wave communication method as described above.
The specific implementation process of the processor 1101 may be referred to the above method embodiment, and its implementation principle and technical effects are similar, which is not described herein.
Optionally, the electronic device 11000 further comprises a communication component 1103. The processor 1101, the memory 1102, and the communication section 1103 may be connected via a bus 1104.
Embodiments of the present application also provide a computer readable storage medium having stored therein computer instructions which, when executed by a processor, are configured to implement a closed loop based short wave communication method as above.
Embodiments of the present application also provide a computer program product comprising a computer program which, when executed by a processor, implements a closed-loop based short wave communication method as above.
Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the application pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.
It is to be understood that the application is not limited to the precise arrangements and instrumentalities shown in the drawings, which have been described above, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the application is limited only by the appended claims.