CN115548042A - Method for manufacturing semiconductor element - Google Patents
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- CN115548042A CN115548042A CN202211303585.5A CN202211303585A CN115548042A CN 115548042 A CN115548042 A CN 115548042A CN 202211303585 A CN202211303585 A CN 202211303585A CN 115548042 A CN115548042 A CN 115548042A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/805—Coatings
- H10F39/8057—Optical shielding
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/80—Constructional details of image sensors
- H10F39/806—Optical elements or arrangements associated with the image sensors
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Abstract
Description
本申请是2018年05月11日所提出的申请号为201810449833.4、发明名称为《半导体元件的制造方法》的发明专利申请的分案申请。This application is a divisional application of the invention patent application with the application number 201810449833.4 and the invention name "Method for Manufacturing Semiconductor Element" filed on May 11, 2018.
技术领域technical field
本发明涉及一种半导体,且特别是涉及一种半导体元件。The present invention relates to a semiconductor, and in particular to a semiconductor element.
背景技术Background technique
目前,在与光相关的半导体元件的制作工艺中,会进行挡光结构的制作。举例来说,在影像感测器的制作工艺中,会先制作接垫,再制作挡光结构(如,金属栅格(metalgrid))。如此一来,用于形成挡光结构的制作工艺(如,蚀刻制作工艺)容易对接垫造成损害。At present, in the fabrication process of light-related semiconductor elements, light-shielding structures are fabricated. For example, in the manufacturing process of the image sensor, the pads are fabricated first, and then the light-shielding structure (eg, metal grid) is fabricated. As a result, the manufacturing process (eg, etching process) used to form the light-shielding structure is likely to cause damage to the pads.
发明内容Contents of the invention
本发明提出一种半导体元件,其可防止用于形成挡光结构的制作工艺对接垫层造成损害。The invention provides a semiconductor element, which can prevent the damage to the pad layer caused by the manufacturing process used to form the light-shielding structure.
本发明提供一种半导体元件,包括基底、第一介电层结构、第二介电层结构、第一挡光结构、第二挡光结构、介电层以及接垫层。基底具有第一面、相对于第一面的第二面以及第一开口。第一介电层结构设置于第一面上且具有导体层与第二开口。第二开口暴露出导体层且连接第一开口。第二介电层结构设置于第二面上且具有第三开口。第三开口暴露出基底的一部分且连接第一开口。第一挡光结构设置于第二介电层结构上。第二挡光结构设置于第三开口的侧壁上。介电层设置于挡光结构上与第三开口中,且具有连接第一开口的第四开口。接垫层设置于介电层上与第四开口中,且电连接至导体层。The invention provides a semiconductor element, which includes a substrate, a first dielectric layer structure, a second dielectric layer structure, a first light-shielding structure, a second light-shielding structure, a dielectric layer and a pad layer. The base has a first surface, a second surface opposite to the first surface, and a first opening. The first dielectric layer structure is disposed on the first surface and has a conductive layer and a second opening. The second opening exposes the conductor layer and is connected to the first opening. The second dielectric layer structure is disposed on the second surface and has a third opening. The third opening exposes a portion of the base and is connected to the first opening. The first light blocking structure is disposed on the second dielectric layer structure. The second light blocking structure is disposed on the sidewall of the third opening. The dielectric layer is disposed on the light-shielding structure and in the third opening, and has a fourth opening connected to the first opening. The pad layer is disposed on the dielectric layer and in the fourth opening, and is electrically connected to the conductor layer.
依照本发明的一实施例所述,在上述半导体元件中,第一挡光结构未连接第二挡光结构。According to an embodiment of the present invention, in the above semiconductor device, the first light blocking structure is not connected to the second light blocking structure.
依照本发明的一实施例所述,在上述半导体元件中,第一挡光结构与第二挡光结构为金属栅格。According to an embodiment of the present invention, in the above semiconductor device, the first light blocking structure and the second light blocking structure are metal grids.
依照本发明的一实施例所述,在上述半导体元件中,第二挡光结构与接垫层彼此分离。According to an embodiment of the present invention, in the above semiconductor device, the second light blocking structure and the pad layer are separated from each other.
依照本发明的一实施例所述,在上述半导体元件中,第二挡光结构与介电层设置于基底的一部分上。According to an embodiment of the present invention, in the above semiconductor device, the second light-shielding structure and the dielectric layer are disposed on a part of the substrate.
依照本发明的一实施例所述,在上述半导体元件中,第三开口中的介电层覆盖第二挡光结构。According to an embodiment of the present invention, in the above semiconductor device, the dielectric layer in the third opening covers the second light blocking structure.
依照本发明的一实施例所述,在上述半导体元件中,接垫层还设置于第一开口中与第二开口中。According to an embodiment of the present invention, in the above semiconductor device, the pad layer is further disposed in the first opening and the second opening.
依照本发明的一实施例所述,在上述半导体元件中,第二介电层结构还具有第五开口。第五开口暴露出部分的基底。半导体组件还包括第三挡光结构。第三挡光结构设置于第五开口中。According to an embodiment of the present invention, in the above semiconductor device, the second dielectric layer structure further has a fifth opening. The fifth opening exposes a portion of the base. The semiconductor component also includes a third light blocking structure. The third light blocking structure is disposed in the fifth opening.
依照本发明的一实施例所述,在上述半导体元件中,第一挡光结构连接第三挡光结构。According to an embodiment of the present invention, in the above semiconductor element, the first light blocking structure is connected to the third light blocking structure.
基于上述,在本发明的半导体元件中,由于是在形成挡光结构之后,才形成接垫层,因此可防止用于形成挡光结构的制作工艺对接垫层造成损害。此外,光掩模通过本发明的半导体元件的制造方法,可降地半导体元件的制作工艺所需使用的光掩模数量,进而可降低生产成本。Based on the above, in the semiconductor device of the present invention, since the pad layer is formed after the light-shielding structure is formed, damage to the pad layer due to the fabrication process for forming the light-shielding structure can be prevented. In addition, the photomask can reduce the number of photomasks used in the manufacturing process of the semiconductor element by the method for manufacturing the semiconductor element of the present invention, thereby reducing the production cost.
为让本发明的上述特征和优点能更明显易懂,下文特举实施例,并配合所附的附图作详细说明如下。In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.
附图说明Description of drawings
图1A至图1E为本发明一实施例的半导体元件的制造流程剖视图;1A to 1E are cross-sectional views of the manufacturing process of a semiconductor device according to an embodiment of the present invention;
图2A至图2G为本发明另一实施例的半导体元件的制造流程剖视图。2A to 2G are cross-sectional views of a manufacturing process of a semiconductor device according to another embodiment of the present invention.
符号说明Symbol Description
100、200:基底100, 200: base
102、104、202、204:介电层结构102, 104, 202, 204: dielectric layer structure
106、206:导体层106, 206: conductor layer
108、110、116、208、212、218:开口108, 110, 116, 208, 212, 218: opening
112、214:挡光结构112, 214: light blocking structure
114、216:介电层114, 216: dielectric layer
118、220:接垫层118, 220: pad layer
210:图案化光致抗蚀剂层210: Patterned photoresist layer
S1、S3:第一面S1, S3: the first side
S2、S4:第一面S2, S4: the first side
W1、W2:宽度W1, W2: Width
具体实施方式detailed description
图1A至图1E为本发明一实施例的半导体元件的制造流程剖视图。1A to 1E are cross-sectional views of a manufacturing process of a semiconductor device according to an embodiment of the present invention.
请参照图1A,提供基底100。基底100例如是半导体基底,如硅基底。基底100可具有感光元件(未示出),如光二极管。在基底100的第一面S1上具有介电层结构102,在基底100的相对于第一面S1的第二面S2上具有介电层结构104,且在介电层结构102中具有导体层106。在此实施例中,第一面S1是以基底100的正面为例,且第二面S2是以基底100的背面为例,但本发明并不以此为限。Referring to FIG. 1A , a
介电层结构102、104可为多层结构或单层结构。介电层结构102、104的材料例如是氧化硅、氮化硅、高介电常数材料(如,氧化铪(HfO)或氧化钽(TaO))或其组合。所属技术领域具有通常知识者可依照产品需求来选择介电层结构的层数与材料。The
此外,虽然仅绘示出介电层结构102中的导体层106,但介电层结构102仍可包括其他内连线结构。导体层106可为内连线结构中最接近基底100的内连线结构。导体层106的材料例如是金属,如铝、钨或铜。In addition, although only the
在介电层结构104中形成暴露出基底100且位于导体层106上方的开口108。开口108例如是光掩模通过使用光刻蚀刻制作工艺而形成。此外,可在介电层结构104中形成暴露出基底100的开口110。开口110与开口108可由同一道光刻蚀刻制作工艺形成。An
请参照图1B,在介电层结构104上形成挡光结构112。挡光结构112例如是金属栅格。此外,挡光结构112还可形成在开口108的侧壁上与开口110中。挡光结构112的材料例如是金属,如钨或铝。挡光结构112的形成方法例如是先光掩模通过沉积制作工艺在介电层结构104上形成挡光材料层(未示出),再光掩模通过光刻蚀刻制作工艺对挡光材料层进行图案化。Referring to FIG. 1B , a
请参照图1C,形成覆盖挡光结构112且填入开口108的介电层114。介电层114的材料例如是氧化硅。介电层114的形成方法例如是化学气相沉积法。此外,可对介电层114进行平坦化制作工艺,如化学机械研磨制作工艺。Referring to FIG. 1C , a
请参照图1D,在介电层114与基底100中形成暴露出导体层106的开口116。此外,开口116还可延伸至介电层结构102中。开口108例如是光掩模通过光刻蚀刻制作工艺所形成。开口116与开口108(图1A)可光掩模通过相同或不同光掩模形成。在此实施例中,开口116与开口108是以光掩模通过不同光掩模形成为例,但本发明并不以此为限。Referring to FIG. 1D , an
在另一实施例中,在开口116与开口108光掩模通过相同光掩模形成的情况下,在形成开口116的蚀刻制作工艺中,会同时在开口110的位置进行蚀刻。此时,挡光结构112的材料以选择对此蚀刻制作工艺具有高抗蚀刻能力的材料(如,铝)为佳,以避免挡光结构112在此蚀刻制作工艺中受损。In another embodiment, in the case that the
请参照图1E,在开口116中形成电连接至导体层106的接垫层118。接垫层118的材料例如是金属,如铝、钨或铜。接垫层118的形成方法例如是先光掩模通过沉积制作工艺在介电层114上形成填入开口116的接垫材料层(未示出),再光掩模通过光刻蚀刻制作工艺对接垫材料层进行图案化。Referring to FIG. 1E , a
基于上述实施例可知,在上述半导体元件的制造方法中,由于是在形成挡光结构112之后,才形成接垫层118,因此可防止用于形成挡光结构112的制作工艺(如,蚀刻制作工艺)对接垫层118造成损害。此外,光掩模通过上述实施例的半导体元件的制造方法,可降地半导体元件的制作工艺所需使用的光掩模数量,进而可生产降低成本。Based on the foregoing embodiments, it can be known that, in the above-mentioned manufacturing method of the semiconductor element, since the
图2A至图2G为本发明另一实施例的半导体元件的制造流程剖视图。2A to 2G are cross-sectional views of a manufacturing process of a semiconductor device according to another embodiment of the present invention.
请参照图2A,提供基底200。在基底200的第一面S3上具有介电层结构202,在基底200的相对于第一面S3的第二面S4上具有介电层结构204,且在介电层结构202中具有导体层206。关于基底200、介电层结构202、介电层结构204与导体层206的相关内容可参考图1A中对于基底100、介电层结构102、介电层结构104与导体层106的说明,于此不再重复说明。Referring to FIG. 2A , a
在介电层结构204上形成具有开口208的图案化光致抗蚀剂层210。开口208可具有宽度W1。图案化光致抗蚀剂层210例如是光掩模通过光刻制作工艺所形成。A patterned
请参照图2B,可对图案化光致抗蚀剂层210进行修剪制作工艺,以将开口208的宽度W1扩大为宽度W2,而有助于扩大后续所形成的接垫层的关键尺寸(critical dimension,CD)。修剪制作工艺例如是化学修剪制作工艺(chemical trim process)与电浆修剪制作工艺(plasma trim process)Referring to FIG. 2B , the patterned
请参照图2C,以图案化光致抗蚀剂层210作为掩模,移除部分介电层结构204,而在介电层结构204中形成暴露出基底200且位于导体层206上方的开口212。在此实施例中,在开口212的形成方法中,并未同时形成如同图1A中的开口110。2C, using the patterned
接着,移除图案化光致抗蚀剂层210。图案化光致抗蚀剂层210的移除方法例如是干式去光致抗蚀剂法或湿式去光致抗蚀剂法。Next, the patterned
请参照图2D,在介电层结构204上形成挡光结构214。挡光结构214例如是金属栅格。此外,挡光结构214还可形成在开口212的侧壁上。挡光结构214的材料例如是金属,如钨或铝。挡光结构214的形成方法例如是先光掩模通过沉积制作工艺在介电层结构204上形成挡光材料层(未示出),再光掩模通过光刻蚀刻制作工艺对挡光材料层进行图案化。Referring to FIG. 2D , a
请参照图2E,形成覆盖挡光结构214且填入开口212的介电层216。介电层216的材料例如是氧化硅。介电层216的形成方法例如是化学气相沉积法。此外,可对介电层216进行平坦化制作工艺,如化学机械研磨制作工艺。Referring to FIG. 2E , a
请参照图2F,在介电层216与基底200中形成暴露出导体层206的开口218。此外,开口218还可延伸至介电层结构202中。开口212例如是光掩模通过光刻蚀刻制作工艺所形成。开口218与开口212(图2C)可光掩模通过相同或不同光掩模形成。在此实施例中,开口218与开口212是以光掩模通过相同光掩模形成为例,但本发明并不以此为限。Referring to FIG. 2F , an
请参照图2G,在开口218中形成电连接至导体层206的接垫层220。接垫层220的材料例如是金属,如铝、钨或铜。接垫层220的形成方法例如是先光掩模通过沉积制作工艺在介电层216上形成填入开口218的接垫材料层(未示出),再光掩模通过光刻蚀刻制作工艺对接垫材料层进行图案化。Referring to FIG. 2G , a
基于上述实施例可知,在上述半导体元件的制造方法中,由于是在形成挡光结构214之后,才形成接垫层220,因此可防止用于形成挡光结构214的制作工艺(如,蚀刻制作工艺)对接垫层220造成损害。此外,光掩模通过上述实施例的半导体元件的制造方法,可降地半导体元件的制作工艺所需使用的光掩模数量,进而可生产降低成本。Based on the above-mentioned embodiment, it can be seen that in the above-mentioned manufacturing method of the semiconductor element, since the
此外,上述实施例中的半导体元件是以背面照射式(back side illumination)影像感测元件为例来进行说明,但本发明并不以此为限。上述半导体元件的制造方法也可应用于制作正面照射式(front side illumination)影像感测元件。正面照射式影像感测元件与背面照射式影像感测元件的差异如下。在正面照射式影像感测元件中,接垫层所连接的导体层可为位于基底的正面上的最上层导体层。In addition, the semiconductor device in the above embodiments is described by taking a back side illumination image sensing device as an example, but the present invention is not limited thereto. The above-mentioned method for manufacturing a semiconductor device can also be applied to making a front side illumination image sensor device. The differences between the front-illuminated image sensor and the back-illuminated image sensor are as follows. In the front-illuminated image sensor device, the conductor layer connected to the pad layer may be the uppermost conductor layer on the front surface of the substrate.
举例来说,在半导体元件为正面照射式影像感测元件的实施例中,半导体元件的制造方法包括以下步骤。提供基底。在基底上具有介电层结构,且在介电层结构中具有导体层(如,最上层导体层)。在介电层结构中形成暴露出导体层的第一开口。在介电层结构上形成挡光结构。形成覆盖挡光结构且填入第一开口的介电层。在介电层中形成暴露出导体层的第二开口。在第二开口中形成电连接至导体层的接垫层。For example, in an embodiment where the semiconductor device is a front-side illuminated image sensor device, the manufacturing method of the semiconductor device includes the following steps. Provide the base. There is a dielectric layer structure on the substrate, and a conductive layer (eg, an uppermost conductive layer) in the dielectric layer structure. A first opening exposing the conductor layer is formed in the dielectric layer structure. A light blocking structure is formed on the dielectric layer structure. A dielectric layer covering the light-shielding structure and filling the first opening is formed. A second opening exposing the conductor layer is formed in the dielectric layer. A pad layer electrically connected to the conductor layer is formed in the second opening.
综上所述,在上述实施例的半导体元件的制造方法中,由于是在形成挡光结构之后,才形成接垫层,因此可防止用于形成挡光结构的制作工艺对接垫层造成损害。此外,光掩模通过上述实施例的半导体元件的制造方法,可降地半导体元件的制作工艺所需使用的光掩模数量,进而可降低生产成本。To sum up, in the manufacturing method of the semiconductor element in the above embodiment, since the pad layer is formed after the light blocking structure is formed, damage to the pad layer due to the fabrication process for forming the light blocking structure can be prevented. In addition, the photomask can reduce the number of photomasks required for the manufacturing process of the semiconductor element by using the method for manufacturing the semiconductor element in the above embodiment, thereby reducing the production cost.
虽然结合以上实施例公开了本发明,然而其并非用以限定本发明,任何所属技术领域中具有通常知识者,在不脱离本发明的精神和范围内,可作些许的更动与润饰,故本发明的保护范围应当以附上的权利要求所界定的为准。Although the present invention has been disclosed in conjunction with the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention should be defined by the appended claims.
Claims (9)
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