CN115550579B - Image sensor reading method and image sensor - Google Patents
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Abstract
The invention discloses a reading method of an image sensor and the image sensor, which are used for realizing quick establishment of bias signals. The image sensor comprises a pixel array formed by n groups of pixel units and used for generating image signals; tail current is generated by a tail current source module comprising n tail current source tubes; the reference source generates a reference signal, a first reference current, and a second reference current. The first bias source converts the first reference current into a first bias voltage and outputs the first bias voltage to the analog-to-digital conversion unit, the second bias source converts the second reference current into a second bias voltage and outputs the second bias voltage to the analog-to-digital conversion unit, and the first bias source and the second bias source jointly drive tail current sources configured by each group of the pixel array; the pixel array outputs pixel unit output signals of each group. The analog-to-digital conversion unit quantizes the pixel unit output signals of each group based on the reference signals, and the quantized digital quantity is output to the output signal processing system for subsequent data processing.
Description
Technical Field
The present invention relates to the field of integrated circuit design technology, and in particular, to an image sensor reading method and an image sensor.
Background
Currently, CMOS image sensors (CMOS image sensor, CIS) have been widely used in imaging fields such as video, monitoring, industrial manufacturing, automobiles, home appliances, and the like. The CIS is required to have higher resolution and frame rate under reasonable power consumption in various current applications, so that the pixel reading period is required to be shortened, and various bias signals required by pixel operation and analog-to-digital conversion are required to have shorter set-up time. When the resolution of the CIS is larger, parasitic resistance and capacitance of the bias signal line are distributed more, the time RC constant is larger, the larger driving capacity is obtained only by increasing the bias current to realize the faster establishment speed, the power consumption cost is large, and the noise contributed by the bias signal source is increased. The conventional method is that a single-side bias source provides bias to each group of tail current tubes, when the pixel array is larger, the number of groups is larger, and the time constant of a tail current bias signal line is larger, so that the driving capability of the bias source needs to be increased, and the power consumption is larger due to the increase of current.
For this reason, it is desirable to provide a new image sensor readout scheme to ameliorate the above problems.
Disclosure of Invention
The embodiment of the invention provides an image sensor reading method and an image sensor, which are used for shortening the time constant of a bias signal line and realizing the quick establishment of a bias signal on the premise of ensuring the accuracy of a pixel output signal.
In a first aspect, the present invention provides an image sensor comprising: a pixel array composed of n groups of pixel units for generating image signals; the tail current source module comprises n tail current source tubes, and each tail current source corresponds to each group of the pixel array one by one; the tail current source is used for generating tail current; a reference source for generating a reference signal, and for generating a first reference current and a second reference current; a first bias source for converting the first reference current into a first bias voltage and outputting the first bias voltage to an analog-to-digital conversion unit, the first bias source being for driving each set of configured tail current sources of the pixel array; a second bias source for converting the second reference current into a second bias voltage and outputting the second bias voltage to an analog-to-digital conversion unit for commonly driving each set of configured tail current sources of the pixel array; the pixel array is used for outputting pixel unit output signals of each group under the action of the bias signals of the tail current source tubes corresponding to each group of the pixel array; and the analog-to-digital conversion unit is used for quantizing the pixel unit output signals of each group based on the reference signals, and outputting the quantized digital quantity to the output signal processing system for subsequent data processing. And n is a positive integer, the first bias source and the second bias source are bias sources with the same specification, and the first reference current and the second reference current are the same.
The image sensor provided by the invention has the beneficial effects that: the invention provides another bias source at the other side of the pixel array, and the two bias sources drive the pixel tail current tube together, compared with the traditional bias circuit, the connection has the advantages that the time constant of the bias signal line is reduced to 1/4 of the original time constant, the setup time and the anti-interference stable recovery time are greatly shortened, the self-driving requirement of the bias source is reduced, and the large driving current is not needed, so the power consumption of the bias source can be reduced.
In a possible implementation, the bias signal setup time constant of the last group of pixel cells is at most:wherein R is parasitic resistance between adjacent groups of pixel units, and C is parasitic capacitance between adjacent groups of pixel units.
In a second aspect, the present invention provides a readout method of an image sensor, the method comprising: in the reset phase, the control strobe signal SEL is set to a low level, and the reset signal RX and the transmission signal TX are both set to a high level, so that the transmission tube Mtg, the reset tube Mrst and the amplifying tube Msf are all turned on, and the pixel unit is reset;
when the pixel unit is reset, the transmission signal TX is controlled to be switched from a high level to a low level, so that the transmission tube Mtg is disconnected;
in the exposure stage, the gate signal SEL is kept at a low level, the transmission signal TX is kept at a low level, the reset signal RX is controlled to be switched from a high level to a low level, so that the reset tube Mrst and the transmission tube Mtg are disconnected, the gate tube Msel is turned on, and the photodiode PD starts to expose and accumulate electrons;
before a signal reading stage, a control signal of a switch is set to be high level, and a first bias source and a second bias source jointly drive tail current sources configured by each group of the pixel array;
in a signal reading stage, a control signal of a switch is switched from a high level to a low level, a first bias source drives each group of tail current sources configured in the pixel array, the connection between a second bias source and the tail current sources is disconnected, a control reset signal RX is switched from the low level to the high level, so that a reset tube Mrst is conducted, a floating diffusion region FD point is reset, and a reset potential VRST is read; then, the control transmission signal TX is switched from low to high, so that the transmission tube Mtg is turned on, and the exposure integrated signal VSIG is read.
The image sensor reading method provided by the invention has the beneficial effects that: the first bias source and the second bias source jointly drive tail current tubes of all groups so as to realize quick establishment, the proposed bias control mode can meet the requirements of high resolution and high frame rate, and the power consumption of the bias source is controlled in a reasonable range.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic circuit diagram of a CIS standard four-tube pixel unit provided in the prior art;
FIG. 2 is a schematic flow chart of a timing control method for a four-pipe pixel unit according to the prior art;
fig. 3 is a schematic diagram of a CIS readout circuit architecture provided in the prior art;
FIG. 4 is a prior art pixel tail current source bias circuit;
FIG. 5 is a schematic structural diagram of an improved image sensor according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of an improved bias circuit for a tail current source of a pixel according to an embodiment of the present invention;
fig. 7 is a schematic flow chart of a readout method of an image sensor according to an embodiment of the present invention;
fig. 8 is a timing diagram of an improved readout circuit according to an embodiment of the present invention.
Detailed Description
Fig. 1 is a typical CIS architecture including a pixel array, analog-to-Digital Converter (ADC), reference source, timing control, decoding drive, and output signal processing. The pixel array is composed of a plurality of pixel units "P" as shown in fig. 1. The pixel distribution of the pixel array is divided into two directions, a first direction is defined as a ROW direction, a second direction is defined as a column direction, the pixel array is divided into k ROWs and n columns, the pixel array is read OUT in a ROW-by-ROW mode, a specific sequence is ROW (0), ROW (1), … … ROW (k-1) and ROW (k), each column of the pixel array is provided with an output bus which is respectively PIX_OUT (0), PIX_OUT (1), … PIX_OUT (n-1) and PIX_OUT (n), each column is provided with a current source tube which is respectively Mcs (0), mcs (1) and … Mcs (n) and is used for generating a pixel output voltage signal PIX_OUT with certain driving capability, and a reference current IREF generated by a reference source is used for generating a pixel tail current tube bias voltage VB through a bias source. The pixel output voltage signal pix_out is output to the ADC. The ADC quantizes the pixel output based on the reference signal, and the quantized digital quantity is output to a system for data processing, so that the pixel outputs PIX_OUT (0), PIX_OUT (1) and … PIX_OUT (n) are voltage signals.
Fig. 2 is a circuit structure of a CIS standard four-tube pixel unit, which is commonly applied to a line exposure CIS, and is composed of a photodiode PD, a charge transfer tube Mtg, a reset tube Mrst, an amplifying tube Msf, and a gate tube Msel. The photodiode PD senses light and generates photoelectrons proportional to the intensity of the light. The charge transfer tube Mtg is used for transferring photoelectrons in the photodiode PD, and when the transfer signal TX is high, the charge transfer tube Mtg is turned on to transfer photoelectrons in the photodiode PD to the floating diffusion FD. The reset tube Mrst functions to reset the floating diffusion FD when the reset signal RX is at a high potential. When the gate signal SEL is a high-potential gate tube Msel, the amplifying tube Msf and the gate tube Msel form a channel with a current source Mcs to the ground, and at this time, the amplifying tube Msf is essentially a source follower, follows the change of the FD potential of the floating diffusion region and is finally output by a pixel output voltage signal pix_out, and is input to the column ADC for analog-to-digital conversion.
Fig. 3 shows operation timings of four-tube pixel units, which are divided into reset (Rst), exposure (Exp), and signal Read (Read). In the reset phase, the transfer signal TX, the reset signal RX are at high level, the charge transfer tube Mtg and the reset tube Mrst are both turned on, the floating diffusion FD is reset and its potential is pulled up to the power supply voltage VDD. After that, the reset signal RX and the transfer signal TX are low, and enter the exposure stage, and the floating diffusion PD senses light and accumulates electrons. In the signal reading stage, the strobe signal SEL is at a high level, the reset signal RX resets the floating diffusion FD at a high level, the reset signal RX is pulled to a low level again, the transmission signal TX is kept at a low level, and at this time, the amplifying tube Msf is controlled by the FD potential of the floating diffusion and outputs the reset potential VRST through the pixel output voltage signal pix_out. Then, the transfer signal TX pulls high to transfer electrons on the photodiode PD to the floating diffusion FD, and the amplifying transistor Msf is controlled by the floating diffusion FD and outputs the photo signal potential VSIG via the pixel output voltage signal pix_out. The reset potential VRST and the photosensitive signal potential VSIG are converted into digital quantities by an ADC circuit and subtracted to obtain the digital quantities actually corresponding to photoelectrons on the photodiode PD. If the ADC is 12 bits, the ADC reference voltage range is VREF, the final output is DOUT= (VRST-VSIG) ×2 12 /VREF。
Fig. 4 is a conventional pixel tail current bias circuit, with bias current ISC generating bias voltage VB via Mcsm for driving the tail current source tubes of the column pixels (Mcs (0), mcs (1), … Mcs (n)). With each column tail current tube bias, pixel output signals pix_out (0), pix_out (1), … pix_out (n). When the CIS resolution is high, the number of columns and rows increases, so that the VB bias line path is long, and parasitic resistance and parasitic capacitance to ground exist in the VB wiring between each column (the parasitic resistance capacitance of the wiring from the first column to the last column is R0/C0, R1/C1, … Rn/Cn respectively), and the time constant for establishing the bias signal of the last column is the maximum:
τn=R0×C0+(R1+R2)×C1+…+(R1+R2+…+Rn)×Cn
since the spacing between each column is the same, it can be approximately regarded as r0=r1= … =rn=r, c0=c1= … =cn=c. The time constant can be written as:
when the CIS resolution is large, for example 4000 ten thousand, the number of columns will reach 8000 ten thousand, if the VBN routing resistor r=1Ω of each column, the capacitance c=10ff, the time constant τn will reach 640ns, that is, when the driving capability of the bias source is infinite, the bias signal establishment can be completed in 640ns, but in the actual case, the bias source also has an establishment process, so the actual establishment time will reach approximately 1 μs. In the case of high resolution frame rates, this is not satisfactory, for example 4000 tens of thousands of pixels are mapped at 30 frames per second, a line read period of 6 mus, if the frame rate reaches 60 frames, the period is only 3 mus, the offset signal will be disturbed by other signals when the frame switches, the settling needs to be achieved quickly, and recovery time on the order of 640ns to 1 mus is certainly not satisfactory. Therefore, the conventional method is that the single-side bias source provides bias to each column of tail current tube, when the pixel array is larger, the column number is more, the tail current bias signal line time constant is larger, the driving capability of the bias source needs to be increased, and the power consumption is larger due to the increase of current.
For this reason, the present invention proposes to provide a second bias source of the same specification on the other side of the pixel array to provide bias for the pixel tail current tube together, as shown in fig. 5, the image sensor provided by the present invention includes: the pixel array, the tail current source module, the reference source, the first bias source, the second bias source, the pixel array, the analog-to-digital conversion unit, the output signal processing system, the decoding driver, the timing controller and the like.
The pixel array comprises n groups of pixel units, wherein n is a positive integer, and the pixel units are used for generating image signals; the tail current source module comprises n tail current source tubes, such as Mcs (0), mcs (1) and … Mcs (n) shown in fig. 5, and each tail current source corresponds to each group of the pixel array one by one; the tail current source is used for generating tail current. Assuming that the pixel distribution of the pixel array in this embodiment is also divided into two directions, the first direction is defined as a row direction and the second direction is defined as a column direction, n groups of pixel units can be understood as n columns of pixel units.
A reference source for generating a reference signal VREF, and generating a first reference current IREF1 and a second reference current IREF2.
A first bias source for converting the first reference current IREF1 into a first bias voltage VB1 and outputting the first bias voltage VB1 to an analog-to-digital conversion unit, the first bias source being for driving each set of configured tail current sources of the pixel array.
And a second bias source for converting the second reference current IREF2 into a second bias voltage VB2 and outputting the second bias voltage VB2 to an analog-to-digital conversion unit for commonly driving each set of configured tail current sources of the pixel array. Wherein the first bias source and the second bias source are bias sources of the same specification, and the first reference current IREF1 and the second reference current IREF2 are the same.
The pixel array is used for outputting pixel unit output signals of each group under the action of the bias signals of the tail current source tubes corresponding to each group of the pixel array.
The analog-to-digital conversion unit comprises n groups of analog-to-digital converters and is used for quantizing the pixel unit output signals of each group based on the reference signal VREF, and the quantized digital quantity is output to the output signal processing system for subsequent data processing.
Referring to fig. 6, the bias voltage VB traces between each group of pixel cells have parasitic resistances and parasitic capacitances to ground, such as the first to last groups of traces parasitic resistances and capacitances R0/C0, R1/C1, … Rn/Cn, respectively, assuming an approximate view of r0=r1= … =rn=r, c0=c1= … =cn=c, since the spacing between each group is the same. The time constant can be written as:it can be seen that the image sensor has a remarkable advantage in that since the tail current source modules are driven by two sides, according to the channelThe classical Elmore model shows that the equivalent resistance is reduced to 1/4 of that at normal times. Assuming that the CIS resolution is large according to the above parameters, for example 4000 ten thousand, the number of groups will reach 8000 ten thousand, if each group of VBN routing resistors r=1Ω and the capacitance c=10ff, it can be known that the time constant τn' =160ns, the time constant of the bias signal line is reduced to 1/4 of the original time constant, which greatly shortens the setup time and the stable recovery time of anti-interference, and besides, the driving requirement of the bias source is reduced without large driving current, so that the power consumption of the bias source can be reduced.
As shown in fig. 7, the present invention further provides a readout method of an image sensor, which may be applied to the image sensor, and specifically may include the following steps:
in the reset phase, the control strobe signal SEL is set to a low level, and the reset signal RX and the transmission signal TX are both set to a high level, so that the transmission tube Mtg, the reset tube Mrst and the amplifying tube Msf are all turned on, and the pixel unit is reset.
S702, after the pixel unit is reset, the transmission signal TX is controlled to switch from a high level to a low level, so that the transmission tube Mtg is turned off.
In the exposure stage, the gate signal SEL is kept at a low level, and the transfer signal TX is kept at a low level, and the reset signal RX is controlled to switch from a high level to a low level, so that the reset tube Mrst and the transfer tube Mtg are turned off, the gate tube Msel is turned on, and the photodiode PD starts exposure and accumulates electrons.
S704, before the signal reading stage, the control signal of the switch is set to a high level, and the first bias source and the second bias source jointly drive each set of configured tail current sources of the pixel array.
S705, in the signal reading stage, the control signal of the switch is switched from high level to low level, the first bias source drives each group of tail current sources configured in the pixel array, the connection between the second bias source and the tail current sources is disconnected, the control reset signal RX is switched from low level to high level, so that the reset tube Mrst is conducted, the floating diffusion region FD point is reset, and the reset potential VRST is read; then, the control transmission signal TX is switched from low to high, so that the transmission tube Mtg is turned on, and the exposure integrated signal VSIG is read.
In connection with fig. 6, the newly added second bias source Mcsm2 and the first bias source Mcsm1 are of the same specification, and the bias current isc1=isc2 flows, which ensures that the bias signal VB1 and the bias signal VB2 are the same. The control signal SKS of the switch Sk is turned on when it is at a high level and turned off when it is at a low level, as shown in fig. 8, which shows a switching timing of the control signal SKS of the switch Sk during the readout process, where the control signal SKS is at a high level before entering the read, and the first bias source and the second bias source jointly drive the tail current tubes of the group, so as to achieve fast establishment, and the "ts" duration only needs about 200 ns. After the read phase is entered, the switch Sk is turned off, the second bias source is turned off from the current source transistor array, and the first bias source continuously provides bias voltage to the tail current transistor array. The bias control mode can meet the requirements of high resolution and high frame rate, and the power consumption of the bias source is controlled within a reasonable range.
The readout method of the image sensor provided by the invention has the beneficial effects that: the first bias source and the second bias source jointly drive tail current tubes of all groups so as to realize quick establishment, the proposed bias control mode can meet the requirements of high resolution and high frame rate, and the power consumption of the bias source is controlled in a reasonable range.
The foregoing description is only of the preferred embodiments of the present invention, and the embodiments are not intended to limit the scope of the invention, so that all changes made in the equivalent structures of the present invention described in the specification and the drawings are included in the scope of the invention.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention.
Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (3)
1. An image sensor, comprising:
a pixel array including n groups of pixel units for generating image signals;
the tail current source module comprises n tail current source tubes, and each tail current source corresponds to each group of the pixel array one by one; the tail current source is used for generating tail current;
a reference source for generating a reference signal, and for generating a first reference current and a second reference current;
a first bias source for converting the first reference current into a first bias voltage and outputting the first bias voltage to an analog-to-digital conversion unit, the first bias source being for driving each set of configured tail current sources of the pixel array;
a second bias source for converting the second reference current into a second bias voltage and outputting the second bias voltage to an analog-to-digital conversion unit for commonly driving each set of configured tail current sources of the pixel array;
the pixel array is used for outputting pixel unit output signals of each group under the action of the bias signals of the tail current source tubes corresponding to each group of the pixel array;
the analog-to-digital conversion unit is used for quantizing the output signals of the pixel units of each group based on the reference signals, and outputting the quantized digital quantity to the output signal processing system for subsequent data processing;
and n is a positive integer, the first bias source and the second bias source are bias sources with the same specification, and the first reference current and the second reference current are the same.
2. According to claimThe image sensor of claim 1 wherein the bias signal setup time constant for the last group of pixel cells is at most:
wherein R is parasitic resistance between adjacent groups of pixel units, and C is parasitic capacitance between adjacent groups of pixel units.
3. A readout method of an image sensor, applicable to the image sensor according to claim 1 or 2, comprising:
in the reset phase, the control strobe signal SEL is set to a low level, and the reset signal RX and the transmission signal TX are both set to a high level, so that the transmission tube Mtg, the reset tube Mrst and the amplifying tube Msf are all turned on, and the pixel unit is reset;
when the pixel unit is reset, the transmission signal TX is controlled to be switched from a high level to a low level, so that the transmission tube Mtg is disconnected;
in the exposure stage, the gate signal SEL is kept at a low level, the transmission signal TX is kept at a low level, the reset signal RX is controlled to be switched from a high level to a low level, so that the reset tube Mrst and the transmission tube Mtg are disconnected, the gate tube Msel is turned on, and the photodiode PD starts to expose and accumulate electrons;
before a signal reading stage, a control signal of a switch is set to be high level, and a first bias source and a second bias source jointly drive tail current sources configured by each group of the pixel array;
in a signal reading stage, a control signal of a switch is switched from a high level to a low level, a first bias source drives each group of tail current sources configured in the pixel array, the connection between a second bias source and the tail current sources is disconnected, a control reset signal RX is switched from the low level to the high level, so that a reset tube Mrst is conducted, a floating diffusion region FD point is reset, and a reset potential VRST is read; then, the control transmission signal TX is switched from low to high, so that the transmission tube Mtg is turned on, and the exposure integrated signal VSIG is read.
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| CN101299797A (en) * | 2007-05-02 | 2008-11-05 | 佳能株式会社 | Solid-state image sensing device and image sensing system |
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