CN115581115A - Method for guiding chip or substrate to open hole, chip assembly and application thereof - Google Patents
Method for guiding chip or substrate to open hole, chip assembly and application thereof Download PDFInfo
- Publication number
- CN115581115A CN115581115A CN202211366944.1A CN202211366944A CN115581115A CN 115581115 A CN115581115 A CN 115581115A CN 202211366944 A CN202211366944 A CN 202211366944A CN 115581115 A CN115581115 A CN 115581115A
- Authority
- CN
- China
- Prior art keywords
- holes
- hole
- chip
- forbidden band
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
- G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Data Mining & Analysis (AREA)
- Evolutionary Computation (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computational Mathematics (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- Artificial Intelligence (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Abstract
The invention provides a method for guiding a chip or a substrate thereof to open a hole, a chip assembly and application thereof, wherein the method comprises the following steps: initializing through hole parameters, wherein the through holes are periodically distributed on a substrate or a chip and are equivalent to a photonic crystal structure, solving an energy band diagram according to a photonic crystal energy band theory, and finding a forbidden band of a corresponding frequency band from the energy band diagram; judging whether the forbidden band meets the requirement of the required forbidden band, if so, outputting an initialized through hole parameter, and opening a hole on the chip or the substrate of the chip according to the initialized through hole parameter; if not, changing the parameters of the initialized through hole until the obtained forbidden band meets the requirement of the required forbidden band; the method has universality and guiding significance, is a general method for opening the hole on the substrate of the superconducting quantum chip, can obviously change the forbidden band interval and improve the performance of the superconducting quantum chip.
Description
Technical Field
The invention belongs to the technical field of superconducting quantum, and relates to a method for guiding a chip or a substrate thereof to open a hole, a chip assembly and application thereof.
Background
The quantum computer can realize the calculation task which is difficult to be completed by a classical computer, and the quantum computer needs to realize the large-scale quantum calculation, and the research and development of high-performance and most quantum bits are the current primary task. With the continuous increase of the quantum bit quantity, the corresponding size of the superconducting quantum chip is continuously increased, the eigenmode resonant frequency of the superconducting quantum chip is gradually reduced, the forbidden band required by the operation of the superconducting quantum chip is gradually narrowed, and the narrowed forbidden band can seriously interfere with the operation of the superconducting quantum chip, so that the performance of the superconducting quantum chip is influenced.
The method for improving the performance of the chip disclosed in the prior art has poor universality, and if the structure of the quantum chip is changed, the performance of the quantum chip can be improved, but the method has no guiding significance, has no universality on chips with different sizes and the like, cannot change forbidden band intervals according to different requirements, and cannot be applied to different forbidden band design requirements.
Based on the above research, it is necessary to provide a method for guiding the opening of the chip or the substrate thereof, which can solve the problem of opening the chip during the packaging process, improve the eigen-mode resonant frequency of the chip, change the forbidden band interval, and have universality and guiding significance.
Disclosure of Invention
The invention aims to provide a method for guiding a chip or a substrate thereof to open a hole, a chip assembly and application thereof.
In order to achieve the purpose, the invention adopts the following technical scheme:
in a first aspect, the present invention provides a method of directing the opening of a chip or a substrate thereof, said method comprising the steps of:
(1) Initializing through hole parameters, wherein through holes are periodically distributed on a substrate or a chip and are equivalent to a photonic crystal structure, solving an energy band diagram according to a photonic crystal energy band theory, and finding a forbidden band of a corresponding frequency band from the energy band diagram;
(2) Judging whether the forbidden band obtained in the step (1) meets the requirement of the required forbidden band, if so, outputting an initialized through hole parameter, and opening a hole on the chip or the substrate of the chip according to the initialized through hole parameter;
if not, changing the initialized through hole parameters in the step (1) until the obtained forbidden band meets the requirement of the required forbidden band.
According to the invention, the through hole is formed on the substrate of the superconducting quantum chip, so that a forbidden band can be opened in a certain frequency range, the size of the open hole of the superconducting quantum chip can influence the forbidden band of the superconducting quantum chip, the forbidden bands required by different working frequency bands are different, and the open hole of the substrate needs to be determined according to the required forbidden band, so that different requirements are met, therefore, the open hole substrate is set to have the same structure as the photonic crystal structure, the forbidden band after the open hole is obtained by using the energy band diagram, and whether the required forbidden band requirement is met or not is judged, so that the open hole of the substrate is guided and optimized, the coherence and fidelity of the superconducting quantum chip can be guaranteed by the forbidden band in a specific frequency band range, the performance of the improved superconducting quantum chip is improved, and the development of the multi-bit superconducting quantum chip is promoted; the method for opening the hole on the substrate of the superconducting quantum chip is high in universality, can solve the problem of chip stray mode of the superconducting quantum chip in the packaging process and is a general method for opening the hole on the substrate of the superconducting quantum chip.
The forbidden band of the invention is as follows: when the elastic wave of some frequencies can not propagate, the elastic wave has no eigenmode in the frequency range and is represented as a forbidden band in an energy band diagram;
the photonic crystal energy band theory of the invention refers to that: an important approximation theory for the state of electrons and their motion in photonic scale crystals.
The parameters for initializing the through holes are not particularly limited, and can be reasonably selected by a person skilled in the art according to requirements.
Preferably, the through holes in step (1) are distributed in a periodic array at equal intervals, and the sizes of the adjacent through holes are the same.
Preferably, the substrate or chip after the hole is opened in the step (1) has the same structure as the two-dimensional flat-plate photonic crystal.
The through holes are holes penetrating through the upper surface and the lower surface of the substrate, when through hole parameters are initialized, the parameters of different through holes are the same and are distributed in a periodic array at equal intervals, so that the substrate or chip with the holes and the two-dimensional flat photonic crystal have the same structure (wherein the sizes of models in the X direction and the Y direction are infinite, and the size of the model in the Z direction is limited), and therefore, an energy band diagram can be calculated by using the two-dimensional flat photonic crystal model, and a forbidden band is obtained.
Preferably, the through hole parameters in step (1) include the size of a single through hole, the spacing between adjacent through holes and the distribution type of the through holes.
The distance between the adjacent through holes refers to the distance from the center of the through hole to the center of the adjacent through hole on the surface of the substrate.
Preferably, the distance between the adjacent through holes is the same as the distribution type of the through holes, and the larger the size of a single through hole is, the wider the first forbidden band is.
Preferably, the size of the single through hole is the same as the distribution type of the through holes, and the larger the distance between adjacent through holes is, the narrower the first forbidden band is.
Preferably, when the first forbidden band is not changed, the through holes are the same in distribution type, and the larger the distance between the adjacent through holes is, the larger the size of a single through hole is.
Preferably, the size of the single through hole is the same as the pitch of the adjacent through holes, and the wider the first forbidden band is when the distribution type of the through holes is a triangular array.
According to the invention, when the hole is opened, the larger the size of the through hole is, the other parameters are the same, the wider the first forbidden band is, the larger the distance between the adjacent through holes is, and the other parameters are the same, and only when the arrays are different, the wider the first forbidden band is obtained by the triangular array, and when the first forbidden band is not changed, the larger the distance between the adjacent through holes is, the larger the size of a single through hole is, the method can smoothly guide the opening, and when different forbidden bands are required, the initialization parameter of the opening can be guided to be selected according to the interval of the required forbidden band, so that a direction is provided for the selection of the initialization parameter.
Because the size of the opening can influence the number of forbidden bands and the width of the forbidden bands, the shape of the opening is not particularly limited, and a person skilled in the art can reasonably select the opening according to requirements; preferably, the shape of the through hole in the step (1) on the opening surface is any one of circular, rectangular, oval, triangular or hexagonal.
Preferably, the radius of the circle is 1 μm to 1cm, and may be, for example, 1 μm, 10 μm, 100 μm, 1mm, 10mm, 50mm or 1cm, but is not limited to the values recited, and other values not recited in the range of values are equally applicable, preferably 0.1mm to 0.3mm.
Preferably, the length and width of the rectangle are each independently 1 μm to 1cm, and may be, for example, 1 μm, 10 μm, 100 μm, 1mm, 10mm, 50mm or 1cm, but are not limited to the values recited, and other values not recited within the range of values are equally applicable, preferably 0.2mm to 0.6mm.
Preferably, the distance between adjacent through holes is 3mm to 5mm, and may be, for example, 3mm, 3.2mm, 3.4mm, 3.6mm, 3.8mm, 4mm, 4.2mm, 4.4mm, 4.6mm, 4.8mm or 5mm, but is not limited to the values recited, and other values not recited in the range of values are equally applicable.
Preferably, the length and width of the substrate in step (2) are each independently 24mm to 48mm, and may be, for example, 24mm, 28mm, 32mm, 36mm, 42mm, 46mm or 48mm, but are not limited to the recited values, and other values not recited in the range of values are equally applicable.
Due to the matching effect between the size of the through hole and the size of the substrate, in order to match the substrate with a specific size, the size of the through hole and the distance between adjacent through holes are preferably within a specific range, so that the forbidden band width is improved, and the requirement of the forbidden band required under many conditions is met to the greatest extent.
The thickness of the substrate is not particularly limited in the present invention, and can be appropriately selected by those skilled in the art according to the need.
Preferably, the step (2) further comprises a step of filling a material in the through hole after the hole is opened.
The kind of the filling material is not particularly limited in the present invention, and those skilled in the art can reasonably select the filling material according to the needs, and preferably includes a metallic material or a non-metallic material, such as any one or a combination of at least two of a superconducting material, a resin material or a non-superconducting metallic material.
The superconducting material includes: any one or at least two of aluminum, niobium, titanium oxide, niobium nitride, niobium-titanium alloy, titanium, tin, cadmium, molybdenum, tungsten, lead or indium;
the non-superconducting metal material includes: any one or a combination of at least two of copper, gold, or silver.
As a preferred technical scheme of the method, the method comprises the following steps:
(1) Initializing through hole parameters, wherein through holes are periodically distributed on a substrate or a chip and are equivalent to a two-dimensional flat plate photonic crystal structure, solving an energy band diagram according to a photonic crystal energy band theory, and finding a forbidden band of a corresponding frequency band from the energy band diagram;
the through holes are distributed in a periodic array at equal intervals, and the sizes of the adjacent through holes are the same;
the through hole parameters comprise the size of a single through hole, the space between adjacent through holes and the distribution type of the through holes, and the distribution type of the through holes comprises a square array or a triangular array;
(2) Judging whether the forbidden band obtained in the step (1) meets the requirement of the required forbidden band, if so, outputting an initialized through hole parameter, and opening a hole on the chip or the substrate thereof according to the initialized through hole parameter;
if not, changing the initialized through hole parameters in the step (1) until the obtained forbidden band meets the requirement of the required forbidden band;
the initialized through hole parameters in the changing step (1) are changed according to the following conditions as required: the distance between the adjacent through holes is the same as the distribution type of the through holes, and the larger the size of a single through hole is, the wider the first forbidden band is; the size of each through hole is the same as the distribution type of the through holes, the larger the distance between every two adjacent through holes is, the narrower the first forbidden band is;
when the first forbidden band is not changed, the distribution types of the through holes are the same, the larger the distance between the adjacent through holes is, the larger the size of a single through hole is; the size of the single through hole is the same as the distance between the adjacent through holes, and when the distribution type of the through holes is a triangular array, the first forbidden band is wider.
In a second aspect, the present invention provides a chip assembly comprising a substrate and at least one chip on the substrate.
The substrate and/or chip is obtained by opening the through hole by the method of the first aspect.
The number of chips on the substrate according to the invention is at least one, and may be, for example, 2, 3, 4, 5 or 6, but is not limited to the recited values, and other non-recited integer values within the range of values are equally applicable.
The sizes of different chips on the substrate are the same or different, and the chip with the largest size dominates the system forbidden band range of the whole superconducting quantum chip.
The chip covers the through holes or is distributed among the through holes, and the through holes are not covered.
Preferably, when the number of the chips is two or more, the chips are arranged in parallel and/or stacked.
Preferably, the size of the chip is determined according to a forbidden band, and the lowest mode resonant frequency of the chip is greater than the frequency in a required forbidden band frequency band.
Preferably, the method for determining the chip size includes: initializing the chip size, solving the lowest mode resonant frequency (a first forbidden band below the lowest mode resonant frequency) of the chip with the size, enabling the initialized chip size to be used if the lowest mode resonant frequency is higher than the frequency in the forbidden band frequency range required by the superconducting quantum chip, and changing the initialized chip size if the lowest mode resonant frequency is not higher than the frequency in the forbidden band frequency range required by the superconducting quantum chip until the obtained lowest mode resonant frequency is higher than the frequency in the forbidden band frequency range required by the superconducting quantum chip.
According to the method, after the parameters of the through hole of the substrate are determined by utilizing the forbidden band interval, the chip is arranged on the substrate, then the lowest eigenmode resonant frequency is obtained by carrying out simulation on the arranged chip, and the lowest eigenmode resonant frequency is higher than the frequency within the required forbidden band frequency range, so that the arranged chip is reasonable, and the superconducting quantum chip with excellent performance is obtained.
Preferably, the chip on the substrate is fixed by flip chip bonding.
In a third aspect, the present invention provides a use of a chip assembly as described in the second aspect, the use comprising for electrical connection.
In a fourth aspect, the present invention provides the use of a via in a chip assembly according to the second aspect, the use of the via comprising an electrical connection.
Compared with the prior art, the invention has the following beneficial effects:
the method guides the opening of the substrate of the superconducting quantum chip by utilizing a photonic crystal energy band theory, obtains the forbidden band after the opening by calculating an energy band diagram, adjusts the forbidden band interval, enables the size of the through hole to be adjusted to meet different required forbidden band requirements under different forbidden band requirements, guides and optimizes the opening of the substrate, ensures the coherence and the fidelity of the superconducting quantum chip, successfully improves the performance of the superconducting quantum chip, can not only guide the opening, but also determine the size of the chip on the substrate by utilizing the obtained forbidden band interval, and obtains a structure that a plurality of chips are distributed on the same substrate.
Drawings
FIG. 1 is a flow chart of the method of example 1 of the present invention;
FIG. 2 is a plot of size versus frequency for apertured and unapertured substrates of the present invention;
FIG. 3 is a band diagram obtained after the holes are opened in examples 2-4;
FIG. 4 is a band diagram obtained after opening holes in examples 5 to 8;
FIG. 5 is a band diagram obtained after opening holes in examples 9-12;
FIG. 6 is a band diagram obtained after opening holes in examples 9 to 16;
FIG. 7 is a top view of a substrate according to example 2 of the present invention;
FIG. 8 is a cross-sectional view of a substrate according to embodiment 2 of the present invention;
FIG. 9 is a top view of a substrate according to example 4 of the present invention;
fig. 10 is a top view of a superconducting quantum chip obtained by stacking chips on a substrate as described in example 2.
Wherein, 1-substrate, 2-circular hole, 3-square hole, and 4-chip.
Detailed Description
The technical solution of the present invention is further explained by the following embodiments. It should be understood by those skilled in the art that the examples are only for the understanding of the present invention and should not be construed as the specific limitation of the present invention.
In the following embodiments, the desired forbidden band ranges from 0 to 10GHz.
According to the invention, the range of the first forbidden band can be changed after the substrate is perforated, as shown in fig. 2 and table 1, the range of the first forbidden band is wider after the substrate is perforated than that of the first forbidden band without the substrate is perforated on the substrate with the length and the width both being x, x being more than or equal to 6mm and less than or equal to 48mm and the thickness being 0.5mm, so that the first forbidden band is widened after the substrates with different sizes are perforated; the hole of trompil is the radius and is 0.3mm, and the interval is the circular port of 3mm, and the hole distribution type is square array.
TABLE 1
Example 1
The embodiment provides a method for guiding the hole opening of a superconducting quantum chip substrate, a flow chart of the method is shown in fig. 1, and the method comprises the following steps:
(1) Initializing through hole parameters, determining that the through holes are round with the radius r of 0.3mm and the distance a of 3mm on the opening surface, wherein the distribution type of the through holes is a square array, enabling the substrate after opening to be equivalent to a two-dimensional flat photonic crystal structure, and solving an energy band diagram according to a photonic crystal energy band theory to obtain a forbidden band, wherein the forbidden band interval is between 0 and 10.84 GHz;
the through holes are distributed in a periodic array structure at equal intervals, and the sizes of the adjacent through holes are the same;
(2) Judging whether a forbidden band interval of 0-10.84GHz meets the required forbidden band requirement, if so, outputting the through hole parameters in the step (1), and opening a hole on a substrate of the superconducting quantum chip according to the initialized through hole parameters, wherein the substrate is a silicon substrate with a dielectric constant of 11.9 and the size of 48mm multiplied by 0.5mm;
if the forbidden band interval of 0-10.84GHz does not meet the requirement of the required forbidden band, changing the initialized through hole parameters in the step (1) until the obtained forbidden band meets the requirement of the required forbidden band;
the forbidden band interval required by the embodiment is within 0-10GHz, so that the forbidden band interval meets the requirement of the required forbidden band, and through holes are directly formed on the surface of the opening hole in a circular shape with the radius r of 0.3mm and the distance a of 3 mm;
the first forbidden band range and the first forbidden band width obtained in this embodiment are shown in table 2;
TABLE 2
Example 2
The embodiment provides a method for guiding the hole opening of a superconducting quantum chip substrate, which is different from the embodiment 1 only in that through holes are circular, the radius r is 1.1mm, the distance a between the through holes is 5mm, the distribution type of the through holes is the same as the embodiment 1 except that the through holes are square arrays;
a top view of the substrate 1 of this embodiment is shown in fig. 7, which is provided with a circular hole 2, and a cross-sectional view along the thickness direction is shown in fig. 8; fig. 10 shows a top view of a superconducting quantum chip obtained by stacking chips 4 on the substrate 1 after the hole is opened, wherein the substrate 1 is provided with a circular hole 2 and the chip 4.
Example 3
This example provides a method for guiding the opening of a superconducting quantum chip substrate, which is different from example 1 only in that the through holes are circular, the radius r is 1.1mm, the pitch a of the through holes is 5mm, the distribution type of the through holes is triangular array, and the rest is the same as example 1.
Example 4
The embodiment provides a method for guiding the opening of a superconducting quantum chip substrate, which is different from the embodiment 1 only in that through holes are square, the side length is 0.6mm, the distance a between the through holes is 4mm, the distribution type of the through holes is the same as that of the embodiment 1 except that the through holes are square arrays;
as shown in fig. 9, a top view of the substrate 1 of this embodiment has square holes 3.
The forbidden bands obtained in the examples 2-4 have the forbidden band range shown in table 3 and the energy band diagram shown in fig. 3; as can be seen from the embodiments 2 to 4, different punching results have different forbidden bands and different opening widths, so that appropriate punching parameters can be selected according to the required forbidden band requirements.
TABLE 3
Example 5
This example provides a method of directing the opening of a superconducting quantum chip substrate, which differs from example 1 only in that the radius r of the through hole is 0.01mm, the rest being the same as example 1.
Example 6
This example provides a method of directing the opening of a superconducting quantum chip substrate, which differs from example 1 only in that the radius r of the through hole is 0.1mm, the rest being the same as example 1.
Example 7
This example provides a method of directing the opening of a superconducting quantum chip substrate, which differs from example 1 only in that the radius r of the through hole is 0.2mm, the rest being the same as example 1.
Example 8
This example provides a method of directing the opening of a superconducting quantum chip substrate, which differs from example 1 only in that the radius r of the through hole is 0.6mm, the rest being the same as example 1.
The first forbidden band ranges and the first forbidden band widths obtained in examples 5 to 8 are shown in table 4, and the energy band diagrams are shown in fig. 4; from the comparison of the embodiments 5 to 8, it can be known that the distribution type of the through holes and the through hole pitch are the same, and the larger the radius of the through holes is, i.e. the larger the through hole occupation ratio is, the wider the first forbidden band is, so that the proper punching parameters can be selected according to the requirements of the required forbidden band.
TABLE 4
Example 9
This example provides a method of directing the opening of a superconducting quantum chip substrate, which differs from example 1 only in that the pitch a of the through holes is 1mm, the rest being the same as example 1.
Example 10
This example provides a method of directing the opening of a superconducting quantum chip substrate, which differs from example 1 only in that the pitch a of the through holes is 4mm, the rest being the same as example 1.
Example 11
This example provides a method of directing the opening of a superconducting quantum chip substrate, which differs from example 1 only in that the pitch a of the through holes is 5mm, the rest being the same as example 1.
Example 12
This example provides a method of directing the opening of a superconducting quantum chip substrate, which differs from example 1 only in that the pitch a of the through holes is 8mm, the rest being the same as example 1.
The first forbidden band ranges and the first forbidden band widths obtained in examples 9 to 12 are shown in table 5, and the energy band diagrams are shown in fig. 5; from the comparison of the embodiments 9 to 12, it can be seen that the distribution type of the through holes and the radius of the through holes are the same (i.e. the size of the through holes is the same), and the larger the distance between the through holes is, the narrower the first forbidden band is, so that the suitable drilling parameters can be selected according to the requirement of the required forbidden band.
TABLE 5
Example 13
This example provides a method for guiding the opening of a superconducting quantum chip substrate, which is different from example 9 only in that the distribution type of the through holes is a triangular array, and the rest is the same as example 1.
Example 14
This example provides a method for guiding the opening of a superconducting quantum chip substrate, which is different from example 10 only in that the distribution type of the through holes is triangular array, and the rest is the same as example 1.
Example 15
This example provides a method for guiding the opening of a superconducting quantum chip substrate, which is different from example 11 only in that the distribution type of the through holes is a triangular array, and the rest is the same as example 1.
Example 16
This example provides a method for guiding the opening of a superconducting quantum chip substrate, which is different from example 12 only in that the distribution type of the through holes is a triangular array, and the rest is the same as example 1.
The first forbidden band ranges and the first forbidden band widths of examples 13 to 16 are shown in table 6, and the energy band diagrams of examples 9 to 16 are shown in fig. 6; as can be seen from the comparison between examples 13 and 9, between examples 14 and 10, between examples 15 and 11, and between examples 16 and 12, the wider the first forbidden band is when the via hole distribution is triangular array, and therefore, in order to obtain a wider first forbidden band, the triangular array distribution is preferably used for the via holes.
TABLE 6
Example 17
The embodiment provides a method for guiding the hole opening of a superconducting quantum chip substrate, and the method is different from the embodiment 1 only in that the radius r of a through hole is 0.17mm, the distribution type of the through hole is triangular array distribution, and the rest is the same as the embodiment 1 except that a first forbidden band interval is fixed to be 0-10GHz.
Example 18
The embodiment provides a method for guiding the hole opening of a superconducting quantum chip substrate, and the method is different from the embodiment 1 only in that the distance a of through holes is 4mm, the radius r is 0.49mm, the distribution type of the through holes is triangular array distribution, the fixed first forbidden band interval is 0-10GHz, and the rest is the same as the embodiment 1.
Example 19
The embodiment provides a method for guiding the hole opening of a superconducting quantum chip substrate, which is different from the embodiment 1 only in that the distance a of through holes is 3mm, the radius r is 0.225mm, the fixed first forbidden band interval is 0-10GHz, and the rest is the same as the embodiment 1.
Example 20
The embodiment provides a method for guiding the hole opening of a superconducting quantum chip substrate, which is different from the embodiment 1 only in that the distance a of through holes is 4mm, the radius r is 0.61mm, the fixed first forbidden zone interval is 0-10GHz, and the rest is the same as the embodiment 1.
Table 7 shows the pitch of the through holes and the size of each through hole obtained in examples 17 to 20, which illustrates that when the first forbidden zone is constant, the distribution pattern of the through holes is the same, and the larger the pitch of the through holes is, the larger the size of each through hole is, so that the parameters of the through holes can be adjusted according to the fixed first forbidden zone.
TABLE 7
In summary, the invention provides a method for guiding the hole opening of the superconducting quantum chip substrate, the superconducting quantum chip and the application thereof, and the method has universality and guiding significance, can obviously change the forbidden band interval, and improves the performance of the superconducting quantum chip.
The above description is only for the specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto, and it should be understood by those skilled in the art that any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are within the protection scope and the disclosure of the present invention.
Claims (10)
1. A method of directing the opening of a chip or substrate thereof, comprising the steps of:
(1) Initializing through hole parameters, wherein through holes are periodically distributed on a substrate or a chip and are equivalent to a photonic crystal structure, solving an energy band diagram according to a photonic crystal energy band theory, and finding a forbidden band of a corresponding frequency band from the energy band diagram;
(2) Judging whether the forbidden band obtained in the step (1) meets the requirement of the required forbidden band, if so, outputting an initialized through hole parameter, and opening a hole on the chip or the substrate of the chip according to the initialized through hole parameter;
if not, changing the initialized through hole parameters in the step (1) until the obtained forbidden band meets the requirement of the required forbidden band.
2. The method of claim 1, wherein the through holes of step (1) are equidistantly distributed in a periodic array, and the sizes of adjacent through holes are the same;
and (2) the substrate or the chip with the hole in the step (1) has the same structure as the two-dimensional flat plate photonic crystal.
3. The method of claim 2, wherein the via parameters of step (1) include a size of a single via, a pitch of adjacent vias, and a via distribution type;
the distribution type of the through holes comprises a square array or a triangular array;
the distance between the adjacent through holes is the same as the distribution type of the through holes, and the larger the size of a single through hole is, the wider the first forbidden band is;
the size of the single through hole is the same as the distribution type of the through holes, the larger the distance between the adjacent through holes is, and the narrower the first forbidden band is.
4. The method of claim 3, wherein when the first forbidden band is unchanged, the through holes are the same in distribution type, and the larger the distance between adjacent through holes is, the larger the size of a single through hole is;
the size of the single through hole is the same as the distance between the adjacent through holes, and when the distribution type of the through holes is a triangular array, the first forbidden band is wider.
5. The method of claim 1, wherein the step (1) of shaping the via on the aperture side comprises: any one of circular, rectangular, elliptical, triangular or hexagonal;
the step (2) of filling a material in the through hole after the hole is opened, wherein the filling material comprises any one or a combination of at least two of a superconducting material, a resin material or a non-superconducting metal material;
the superconducting material comprises any one or combination of at least two of aluminum, niobium, titanium oxide, niobium nitride, niobium-titanium alloy, titanium, tin, cadmium, molybdenum, tungsten, lead or indium;
the non-superconducting metal material comprises any one or at least two of copper, gold or silver.
6. Method according to claim 1, characterized in that it comprises the following steps:
(1) Initializing through hole parameters, wherein the through holes are periodically distributed on a substrate or a chip and are equivalent to a photonic crystal structure, solving an energy band diagram according to a photonic crystal energy band theory, and finding a forbidden band of a corresponding frequency band from the energy band diagram;
the through holes are distributed in a periodic array at equal intervals, and the sizes of the adjacent through holes are the same;
the through hole parameters comprise the size of a single through hole, the space between adjacent through holes and the distribution type of the through holes, and the distribution type of the through holes comprises a square array or a triangular array;
(2) Judging whether the forbidden band obtained in the step (1) meets the requirement of the required forbidden band, if so, outputting an initialized through hole parameter, and opening a hole on the chip or the substrate of the chip according to the initialized through hole parameter;
if not, changing the initialized through hole parameters in the step (1) until the obtained forbidden band meets the requirement of the required forbidden band;
the initialized through hole parameters in the changing step (1) are changed according to the following conditions as required: the distance between the adjacent through holes is the same as the distribution type of the through holes, and the larger the size of a single through hole is, the wider the first forbidden band is; the size of each through hole is the same as the distribution type of the through holes, the larger the distance between every two adjacent through holes is, the narrower the first forbidden band is;
when the first forbidden band is not changed, the distribution types of the through holes are the same, the larger the distance between the adjacent through holes is, the larger the size of a single through hole is; the size of the single through hole is the same as the distance between the adjacent through holes, and when the distribution type of the through holes is a triangular array, the first forbidden band is wider.
7. A chip assembly, comprising a substrate and at least one chip on the substrate;
the substrate and/or chip is obtained by opening a via according to the method of any one of claims 1 to 6.
8. The chip assembly according to claim 7, wherein when the number of the chips is two or more, the chips are arranged in parallel and/or stacked;
the size of the chip is determined according to a forbidden band, and the lowest mode resonant frequency of the chip is larger than the frequency in a required forbidden band frequency range.
9. Use of the chip assembly according to claim 7 or 8, wherein the use comprises use in superconducting quantum computing.
10. Use of a via in a chip assembly according to claim 7 or 8, wherein the use of the via comprises an electrical connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211366944.1A CN115581115B (en) | 2022-11-03 | 2022-11-03 | Method for guiding chip or substrate to open hole, chip assembly and application thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211366944.1A CN115581115B (en) | 2022-11-03 | 2022-11-03 | Method for guiding chip or substrate to open hole, chip assembly and application thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115581115A true CN115581115A (en) | 2023-01-06 |
| CN115581115B CN115581115B (en) | 2023-03-07 |
Family
ID=84589391
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211366944.1A Active CN115581115B (en) | 2022-11-03 | 2022-11-03 | Method for guiding chip or substrate to open hole, chip assembly and application thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115581115B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060110116A1 (en) * | 2004-10-29 | 2006-05-25 | Atsushi Sakai | Optical control device |
| CN102375914A (en) * | 2011-11-22 | 2012-03-14 | 天津工业大学 | Method for improving C-wave band LED emergent light efficiency by using two-dimensional photon crystal |
| CN112747821A (en) * | 2020-12-23 | 2021-05-04 | 南京大学 | Terahertz detector integrated with silicon photonic crystal microcavity |
-
2022
- 2022-11-03 CN CN202211366944.1A patent/CN115581115B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060110116A1 (en) * | 2004-10-29 | 2006-05-25 | Atsushi Sakai | Optical control device |
| CN102375914A (en) * | 2011-11-22 | 2012-03-14 | 天津工业大学 | Method for improving C-wave band LED emergent light efficiency by using two-dimensional photon crystal |
| CN112747821A (en) * | 2020-12-23 | 2021-05-04 | 南京大学 | Terahertz detector integrated with silicon photonic crystal microcavity |
Also Published As
| Publication number | Publication date |
|---|---|
| CN115581115B (en) | 2023-03-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US12095164B2 (en) | Three dimensional antenna array module | |
| US20210280488A9 (en) | Semiconductor device, semiconductor chip and method of manufacturing semiconductor device | |
| CN108777343B (en) | Substrate integrated waveguide transmission structure, antenna structure and connection method | |
| CN108417995A (en) | Antenna element and array antenna for 5G mobile communication | |
| US11908814B2 (en) | Fabricated two-sided millimeter wave antenna using through-silicon-vias | |
| US12191571B2 (en) | Antenna with graded dielectirc and method of making the same | |
| TW202401900A (en) | Wideband millimeter-wave antenna device | |
| CN108232439A (en) | A kind of the linear array antenna and planar array antenna of chip integrated waveguide slot feed | |
| CN209641846U (en) | A kind of medium integrates the patch array antenna of waveguide transmission | |
| CN115581115B (en) | Method for guiding chip or substrate to open hole, chip assembly and application thereof | |
| TWM600485U (en) | Antenna module | |
| US7741696B2 (en) | Semiconductor integrated circuit including metal mesh structure | |
| CN209045777U (en) | Low-grating-lobe microstrip array antenna with electrically large-size characteristic | |
| US10980108B2 (en) | Multi-conductor interconnect structure for a microelectronic device | |
| CN116487875B (en) | Broadband millimeter wave antenna | |
| US10418720B1 (en) | Signal line conversion structure of antenna array | |
| CN112349664B (en) | Module liquid cooling heat dissipation structure and manufacturing method thereof | |
| US7358609B2 (en) | Semiconductor device | |
| WO2022272046A1 (en) | Tsv phase shifter | |
| CN208423182U (en) | Antenna element and array antenna for 5G mobile communication | |
| CN107732467A (en) | A kind of base station combination antenna for being used for 4G and being communicated with 5G suppressed with coupling | |
| US10847479B2 (en) | Antenna formation by integrated metal layer or redistribution layer | |
| CN207602784U (en) | A kind of the linear array antenna and planar array antenna of chip integrated waveguide slot feed | |
| US11251516B2 (en) | Semiconductor device with tunable antenna using wire bonds | |
| JP2000165138A (en) | Dielectric planar antenna |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |