CN115798336B - Display panel and display device - Google Patents

Abstract

The application provides a display panel and a display device, and relates to the technical field of display. The display panel comprises a substrate, a driving circuit layer, a display function layer and a light emitting layer. The driving circuit layer is positioned on the substrate and comprises a plurality of signal lines. The plurality of signal lines are located in the display area of the display panel, extend along a first direction, and are arranged in parallel at a first period in a second direction crossing the first direction. The display function layer is positioned on one side of the driving circuit layer, which is away from the substrate, and comprises a plurality of sub-pixels. The sub-pixels are arranged side by side in a second direction at a second period different from the first period, and each sub-pixel includes a reflective electrode disposed on the substrate. The reflective layer is arranged on the substrate and comprises a plurality of reflective blocks arranged in the second direction, and the reflective blocks are used for destroying the arrangement period of the effective reflective areas corresponding to the reflective electrodes in the second direction. In this way, the moire phenomenon generated in the display panel is effectively improved.

Description

Display panel and display device

Technical Field

The application relates to the technical field of display, in particular to a display panel and a display device with the display panel.

Background

With the development of display technology, people increasingly pursue the narrower frame of the display panel, and setting at least part of the compressed driving circuit wires in the display area of the display panel is one method for realizing the narrower frame of the display panel. However, in this method, the period of the array wiring of the compressed driving circuit is not matched with the period of the anode arrangement in the display panel, so that the problem of moire appearing in the screen body reflection pattern and the display pattern is caused.

Disclosure of Invention

A first aspect of the present application provides a display panel including a substrate, a driving circuit layer, a display function layer, and a light emitting layer. The driving circuit layer is positioned on the substrate and comprises a plurality of signal lines. The plurality of signal lines are located in the display area of the display panel, extend along a first direction, and are arranged in parallel at a first period in a second direction crossing the first direction. The display function layer is positioned on one side of the driving circuit layer, which is away from the substrate, and comprises a plurality of sub-pixels. The sub-pixels are arranged side by side in a second direction at a second period different from the first period, and each sub-pixel includes a reflective electrode disposed on the substrate. The reflective layer is arranged on the substrate and comprises a plurality of reflective blocks arranged in the second direction, and the reflective blocks are used for destroying the arrangement period of the effective reflective areas corresponding to the reflective electrodes in the second direction.

In the above scheme, the plurality of reflective blocks arranged in the display panel are matched with the reflective electrodes, so that the effective reflective area corresponding to the sub-pixels is changed, the periodicity of the arrangement of the sub-pixels in the second direction is damaged, and the moire phenomenon in the display panel is improved. Furthermore, the design of the reflective block can enable the sub-pixels not to be periodically arranged in the second direction, so that the moire phenomenon in the display panel is eliminated.

In combination with the first aspect, in some embodiments, the reflector block includes a first edge extending in the second direction, the first edge being shaped to present at least a portion of a sinusoidal or near sinusoidal curve.

In the above scheme, the area of the reflective area corresponding to the reflective block in the second direction periodically changes, and the period of arrangement of the sub-pixels in the second direction can be reduced or eliminated corresponding to the periodic change of the sub-pixels in the second direction.

In combination with the first aspect, in some embodiments, in the gaps of the sub-pixels, the portions corresponding to the first edges exhibit a shape of a trough. Further, a trough is arranged between every two adjacent sub-pixels, and the reflective area of the reflective block corresponding to the trough is minimum. Further, the valleys are disposed on the midplane of adjacent subpixels.

In the above scheme, the arrangement period of the sub-pixels in the second direction can be effectively destroyed by setting the position of the trough of the first edge of the reflective block relative to the sub-pixels.

In combination with the first aspect, in some embodiments, the reflector block further includes a second edge extending in a second direction, the second edge being shaped as a straight line or as an axisymmetric pattern with the first edge.

In the above-mentioned scheme, the design scheme of the second edge of the reflector block is mainly based on the consideration of reducing the design and processing difficulty of the reflector block.

In combination with the first aspect, in some embodiments, the light-reflecting blocks include first light-reflecting blocks and second light-reflecting blocks alternately arranged in the first direction, the second light-reflecting blocks being disposed at intervals from each other and located in the gaps of the sub-pixels.

In the scheme, the second light reflecting blocks arranged in the gaps of the sub-pixels are matched with the first light reflecting blocks, so that the light reflecting areas can be overlapped in the first direction, and the period of arrangement of the effective light reflecting areas of the sub-pixels in the second direction is more favorably damaged.

With reference to the first aspect, in some embodiments, in the second period, a portion of the first edge of the first reflector block located in the gap of the sub-pixel and a portion of the first edge of the second reflector block located in the gap of the sub-pixel are complementary patterns in the first direction, the complementary patterns being at least portions of one sinusoidal curve or an approximate sinusoidal curve. Further, the shape of the complementary pattern appears as a continuous sinusoid or approximately sinusoid.

In the scheme, the complementary patterns of the first reflecting block and the second reflecting block are continuous sinusoidal or approximate sinusoidal, so that the arrangement period of the sub-pixels can be effectively reduced or even eliminated.

With reference to the first aspect, in some embodiments, the shape of the first edge of the first reflector block exhibits a continuous sinusoidal or approximately sinusoidal shape. Further, the first light reflecting block is located between the display function layer and the substrate. Further, the first light reflecting block is located in the driving circuit layer.

In the scheme, the reflecting layer is arranged to be different from the reflecting electrode, so that the design and production difficulty of the first reflecting block is reduced.

With reference to the first aspect, in some embodiments, the first reflective blocks are disposed at intervals from each other and are located in gaps between the sub-pixels. Further, the first reflective block is co-layered with the reflective electrode.

In the above scheme, the first reflective blocks are arranged in an arrangement scheme with intervals, so that the influence of the reflective layer on the light-emitting efficiency of the display panel can be reduced to the greatest extent. In addition, the scheme that the first reflecting block and the reflecting electrode are arranged on the same layer is beneficial to realizing the light and thin display panel.

With reference to the first aspect, in some embodiments, the first reflector block and the second reflector block are co-layered.

In the scheme, the first reflecting block and the second reflecting block are arranged in the same layer, so that the production cost of the display panel is reduced.

With reference to the first aspect, in some embodiments, the plurality of sub-pixels are classified into a first sub-pixel emitting light of a first color, a second sub-pixel emitting light of a second color, and a third sub-pixel emitting light of a third color, and a pixel area of the first sub-pixel is larger than a pixel area of the second sub-pixel, a pixel area of the third sub-pixel is larger than a pixel area of the second sub-pixel, and the second reflective block is disposed at a periphery of the second sub-pixel.

With reference to the first aspect, in some embodiments, at least two columns of sub-pixels are arranged in a second period, and the sum of the effective reflective areas corresponding to the sub-pixels in each column is different.

In the scheme, the second reflective blocks are arranged on the periphery of the second sub-pixels, so that not only can the effective utilization of the residual space on the layout of the display panel be realized, the integration of the display panel is improved, but also the design and the preparation of the second reflective blocks are facilitated, and the production cost of the display panel is saved.

A second aspect of the present application provides a display device comprising the display panel of any one of the first aspects.

Drawings

Fig. 1 is a schematic plan view of a display panel according to an embodiment of the application.

Fig. 2 is a plan view of a display panel according to another embodiment of the present application.

Fig. 3 is a schematic plan view of a display panel according to an embodiment of the application.

Fig. 4 is a cross-sectional view of the display panel of fig. 3 in the direction M1N1 according to the present application.

Fig. 5 is a plan view of a display panel in an embodiment of the application.

Fig. 6 is a schematic plan view of a display panel according to an embodiment of the application.

Fig. 6a is a fourier transform curve of an arrangement period in a lateral direction of signal lines included in the display panel of fig. 6 according to the present application.

Fig. 6b is a fourier transform plot of the period of the anode arrangement in the lateral direction of the sub-pixels of the display panel of fig. 6 according to the present application.

Fig. 6c is a plot of the present application after combining the fourier transform curves of the arrangement cycle in the transverse direction of the signal line and anode in fig. 6.

Fig. 7 is a cross-sectional view of the display panel of fig. 6 in the M2N2 direction according to the present application.

Fig. 8 is a schematic plan view of a display panel according to another embodiment of the application.

Fig. 9 is a cross-sectional view of the display panel of fig. 8 in the M3N3 direction according to the present application.

Detailed Description

The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

Since there are various array traces, such as GIP circuits, data signal lines, scan signal lines, etc., at the edges of the display panel, these traces are generally located outside the display area of the display panel, i.e., at the bezel, the display panel is substantially incapable of achieving borderless display. However, as the demand for a narrow bezel of a display panel increases for consumers and end customers, how to further compress the bezel width of the display panel becomes an important research point. An improvement to this problem is proposed at present, in which the array layout of the display panel is compressed, and part of the array routing, such as a GIP circuit, is placed under the pixels of the display area of the display panel, so as to achieve narrowing of the bezel. However, as the array layout is compressed, the period of the array trace and the period of the sub-pixel of the display panel are mismatched, which results in the problem of moire in the screen reflection pattern and the display image.

Next, a structure of a display panel according to at least one embodiment of the present disclosure will be described with reference to the accompanying drawings. In these embodiments, a space rectangular coordinate system is established with reference to the display panel (e.g., the display surface thereof) to describe the positions of the respective structures of the display panel. In the rectangular space coordinate system, the X axis and the Y axis are parallel to the display panel, and the Z axis is perpendicular to the display panel.

First, the reason why moire is generated after the array wiring is compressed will be specifically described in connection with the layout design of the display panel.

For example, referring to the plan view of the display panel 10 of fig. 1, the display panel 10 includes a substrate 100, and a plurality of signal lines 210 disposed on the substrate 100 and extending along a first direction, i.e., a Y direction (also referred to as a longitudinal direction) and arranged in parallel along a second direction, i.e., an X direction (also referred to as a transverse direction), wherein the signal lines 210 may be power supply signal lines (Vdd) or display signal lines (Vdata). In addition, the display panel 10 further includes sub-pixels 310 disposed on the substrate 100 and periodically arranged, i.e., array-arranged, in the lateral and longitudinal directions, respectively. At this time, the array layout of the display panel 10 is not compressed, the arrangement period of the corresponding array routing, i.e., the signal lines in the second direction, i.e., the lateral direction, is t1=30.85 μm, and the arrangement period of the sub-pixels 310 in the lateral direction is t2=30.85 μm, i.e., the arrangement period of the anodes included in the sub-pixels in the lateral direction t3=t2=30.85 μm, which is the same as the arrangement period of the signal lines 210 in the lateral direction, and therefore, no moire occurs in the display pattern and the reflection pattern of the display panel 10.

In order to achieve the effect of the narrow frame, the arrangement period of the signal lines 210 of the display panel 10 is compressed to 90%, so that the display panel 10 shown in fig. 2 is obtained. The period of arrangement of the signal lines 210 in the lateral direction of the display panel 10 after compression is t4=27.77 μm, and the difference between the period T3 of arrangement of the anode 311 in the lateral direction is about 3 μm.

Specifically, referring to the calculation formula of the difference frequency, tdiff= |1/(1/T3-1/T4) |= (T3 x T4)/|t 3-T4| (Tdiff is the difference frequency period, T3 is the arrangement period of the anode, and T4 is the arrangement period of the signal lines), it is known that after the arrangement of the array wiring, i.e., the signal lines, is compressed by 90%, the difference frequency generated between the arrangement period of the anode in the second direction and the arrangement period of the signal lines in the second direction, i.e., tdiff= (30.85 x 27.77)/|30.85-27.77|=280 um, and the frequency of the difference frequency has reached the range recognizable by human eyes, so that moire appears in the display image and the reflection image of the display panel.

Based on this, the embodiment of the application provides a display panel and a display device with the display panel, and the reflective layer is arranged in the display panel to destroy the arrangement period of the effective reflective area corresponding to the sub-pixels in the second direction, so as to reduce or eliminate the difference frequency between the arrangement period in the transverse direction of the anode and the arrangement period in the transverse direction of the signal line, and further improve or eliminate the phenomenon of moire in the display image and the reflective image caused by the difference frequency between the two.

The embodiment of the application provides a display panel which comprises a substrate, a driving circuit layer and a display function layer. The driving circuit layer is positioned on the substrate and comprises a plurality of signal lines. The plurality of signal lines are located in the display area of the display panel, extend along a first direction, and are arranged in parallel at a first period in a second direction crossing the first direction. The display function layer is positioned on one side of the driving circuit layer, which is away from the substrate, and comprises a plurality of sub-pixels. The sub-pixels are arranged side by side in a second direction at a second period different from the first period, and each sub-pixel includes a reflective electrode disposed on the substrate. Importantly, considering that the arrangement period of the signal lines in the transverse direction is different from the arrangement period of the sub-pixels in the transverse direction, the problem of moire is caused, a reflective layer is further arranged on the substrate in the display panel, the reflective layer comprises a plurality of reflective blocks arranged in the second direction, and the reflective blocks are used for destroying the arrangement period of the effective reflective areas corresponding to the reflective electrodes in the second direction. Therefore, the plurality of reflecting blocks are matched with the reflecting electrode, so that the effective reflecting area corresponding to the sub-pixels is increased, the frequency of the arrangement period of the sub-pixels in the second direction is reduced, the difference frequency between the arrangement periods of the sub-pixels and the signal lines in the second direction is reduced, and the moire phenomenon in the display panel is improved. Furthermore, the design of the reflective block can also enable the sub-pixels not to be periodically arranged in the second direction, namely, the sub-pixels are not arranged in the period, so that the difference frequency of the arrangement period between the sub-pixels and the signal line in the second direction is not existed, and the moire phenomenon in the display panel is eliminated.

As an example, referring to a plan view of the display panel 10 of fig. 3 and a sectional view of fig. 4 at M1N1 in the display panel of fig. 3, the display panel 10 includes a substrate 100, a driving circuit layer 200, a display function layer 300, and a light reflecting layer 400. Referring to fig. 4, the display panel 10 includes a substrate having a display area AA, and the driving circuit layer 200 includes a plurality of signal lines 210 located in the display area AA. The plurality of signal lines 210 extend in a longitudinal direction, i.e., Y direction, and are arranged side by side in a lateral direction, i.e., X direction, the Y direction being perpendicular to the X direction. In the display area AA partitioned by the substrate 100, a plurality of sub-pixels 310 are arranged in a periodic array in the X-direction and the Y-direction, and as can be seen from fig. 4, each sub-pixel 310 includes an anode 311, a light emitting functional layer 312, and a cathode 313 on a substrate, and the anode 311 is a reflective electrode. In the display panel 10, the light-emitting functional layer 312 includes common layers such as a hole transporting layer, a hole injecting layer, an electron transporting layer, and an electron injecting layer between different sub-pixels 310, and the cathode 313 is also generally configured as a common electrode between different sub-pixels, so that it is the anode 311, i.e. the reflective electrode, corresponding to each sub-pixel 310 that determines the relevant parameters such as the surface area or the arrangement period of each sub-pixel 310. In the display panel 10, the light reflecting layer 400 is correspondingly disposed according to the arrangement period of the anode 311 in the lateral direction, depending on the reason that moire is generated in the display panel 10. The reflective layer 400 is disposed on the substrate 100 and includes a plurality of reflective blocks 410 arranged at intervals in a first direction, i.e., a Y direction, i.e., a longitudinal direction, and a plurality of reflective blocks 420 are disposed corresponding to the anodes 311 of different sub-pixels 310 arranged in a second direction, i.e., an X direction, i.e., a transverse direction, i.e., the plurality of reflective blocks 420 are arranged in the transverse direction, and after the reflective areas of the plurality of reflective blocks 420 are overlapped with the surface area of the reflective electrode, i.e., the reflective areas of the anodes 311 of all sub-pixels 310 in each longitudinal direction are overlapped with the effective reflective areas of all reflective blocks 420 corresponding to the longitudinal direction, the fluctuation of the overlapped effective reflective areas in the transverse direction in the whole is weakened, so that the arrangement period of the effective reflective areas corresponding to the plurality of anodes 310 in the transverse direction is destroyed.

It should be understood that the period of the arrangement of the effective light reflecting area, which destroys the correspondence of the anodes in the lateral direction, includes a reduction in the period of the arrangement of the anodes in the lateral direction and an elimination of the period of the arrangement of the anodes in the lateral direction, that is, the arrangement of the anodes in the lateral direction is irregular, so that the correspondence of the arrangement period thereof is infinity. Further, the effective light reflecting area of the anode means the sum of the surface area of the anode and the portion of the surface area of its corresponding light reflecting block where there is no spatial overlap with the anode.

Based on the concept that the reflective blocks are disposed in the display panel to destroy the arrangement periodicity of the effective reflective areas of the reflective electrodes in the second direction, the design scheme of the reflective blocks will be described in detail in this embodiment in combination with the arrangement situation of the sub-pixels in the display panel.

For example, in some embodiments, at least two columns of sub-pixels are arranged in a second period, and the sum of the effective reflective areas corresponding to the sub-pixels in each column is different.

Illustratively, as shown in fig. 3, the display panel includes a plurality of first sub-pixels 310a, a plurality of second sub-pixels 310b and a plurality of third sub-pixels 310c, the three sub-pixels 310 are arranged in an array, and the pixel areas corresponding to the sub-pixels 310 are different. Specifically, the first sub-pixel 310a is a sub-pixel R emitting red light, the second sub-pixel 310B is a sub-pixel G emitting green light, the third sub-pixel 310c is a sub-pixel B emitting blue light, and the pixel area of the sub-pixel R is larger than the pixel area of the sub-pixel B, while the pixel area of the sub-pixel B is larger than the pixel area of the sub-pixel G. In a second period (the dashed box in fig. 3 is a second period), three columns of sub-pixels are involved, and as is apparent from the figure, the sub-pixel G corresponds to the middle column, and the sub-pixel R and the sub-pixel B are disposed in each of the two columns, that is, the sum of the effective reflective areas corresponding to all the sub-pixels 310 in each two adjacent columns is unequal, that is, the sum of the surface areas of the anodes is unequal.

Based on the rule of setting the reflective blocks between the sub-pixels, the planar structure of the reflective blocks is also limited in the embodiment in combination with the layout design of the display panel, which is specifically as follows.

In some embodiments, the reflector block includes a first edge extending in the second direction, the first edge being shaped to present at least a portion of a sinusoidal or near sinusoidal curve. In this way, the edge of the reflective block extending in the second direction is set to be a periodically changing line, that is, the area periodic change of the reflective area corresponding to the reflective block in the second direction is limited, and the periodic change of the sub-pixels in the second direction is corresponding to the periodic change of the sub-pixels, so as to reduce the period of arrangement of the sub-pixels in the second direction or eliminate the period. Illustratively, as shown in fig. 5, a reflective block 410 disposed at the periphery of the sub-pixel 310 in the display panel 10 includes a first edge 413 extending in a lateral direction, and the first edge 413 presents a sinusoidal image.

It should be understood that the shape of the first edge mentioned in the above example is at least partially represented as a sine curve, and is represented in a rectangular coordinate system, where y=asin (ωx+Φ) +k is a point on the first edge, where sin is a sine symbol, x is a numerical value on the x axis of the rectangular coordinate system, y is a value of y corresponding to the function on the same rectangular coordinate system, k, ω and Φ are constants (k, ω, Φ∈r and ω+.0), and the corresponding parameters in the function can be calculated according to the arrangement period of the signal lines in the display panel in the transverse direction and the arrangement period of the anodes in the transverse direction, so that the corresponding parameters are obtained according to the actual requirement of the display panel, which will not be described herein.

The present embodiment will next specifically describe the sinusoidal relative subpixel plane distribution based on the design of the reflector block having a first edge with a sinusoidal shape corresponding to the arrangement period of the anodes in the lateral direction.

For example, in some embodiments, in the gaps of the sub-pixels, the portions corresponding to the first edges are shaped as valleys, and the reflective areas of the reflective blocks corresponding to the valleys are minimized. Therefore, the arrangement period of the sub-pixels in the second direction can be effectively destroyed by setting the position of the trough of the first edge of the reflecting block relative to the sub-pixels.

Meanwhile, based on the above scheme, in consideration of factors influencing the design of the display panel in actual production, such as product structure and performance requirements, processing technology, production cost and the like, the scheme of arranging the trough in the sub-pixel gap is further designed to reduce the design difficulty of the display panel.

For example, in at least one embodiment, a trough is disposed between each adjacent sub-pixel, and the reflective area of the reflective patch corresponding to the trough is minimal. For another example, in at least one embodiment, the valleys are disposed on a midpoint vertical line of adjacent subpixels. In this way, the effective area corresponding to the reflective layer, that is, the area where there is no spatial overlap with the anode is uniformly and symmetrically disposed in the middle of the sub-pixel, which can effectively destroy the periodicity of the arrangement of the effective reflective area of the sub-pixel in the lateral direction. In addition, in at least one embodiment, the reflector block further includes a second edge extending in a second direction, the second edge being shaped as a straight line or as an axisymmetric pattern with the first edge. Therefore, the design scheme that the second edge of the reflecting block is arranged to be a straight line or a pattern symmetrical to the first edge is beneficial to design and processing of the reflecting block, and production cost of the display panel is saved.

As can be seen by way of example with continued reference to fig. 5, the display device includes a plurality of sub-pixels 310 including a first sub-pixel 310a, a second sub-pixel 310b and a third sub-pixel 310c that respectively emit light of different colors. The light reflecting block 410 includes a second edge 414 opposite to the first edge 413, the second edge 414 extends in a lateral direction and is perpendicular to the extending direction of the signal line 210, and the shape of the second edge 414 is presented as a straight line. Meanwhile, there may or may not be an intersection point between the first edge 413 and the second edge 414, which is not limited herein. In addition, in the same row of the sub-pixels 310, the first edge 413 of the corresponding light reflecting block 410 in the gap between the adjacent first sub-pixel 310a and third sub-pixel 310c includes a trough, where the point on the first edge 413 is closest to the second edge 414, i.e. where the light reflecting area of the corresponding light reflecting block 410 is the smallest. Furthermore, the point corresponding to the trough falls on a midpoint vertical line connecting the midpoint of the adjacent first sub-pixel 310a and the midpoint of the third sub-pixel 310c.

As is clear from the above, the design of providing the reflective block in the display panel can effectively destroy the period in which the anodes are arranged in the lateral direction, but the design of the reflective block in the above-described scheme still has the problem of moire in the display panel, which is impaired but adversely affects the display effect of the display panel. Therefore, the reflective layer is further designed in this embodiment to further improve and even eliminate moire appearing in the display, as described below.

In some embodiments, the light-reflecting blocks include first light-reflecting blocks and second light-reflecting blocks alternately arranged in the first direction, the second light-reflecting blocks being disposed at intervals from each other and within the gaps of the sub-pixels. The second reflective blocks arranged in the gaps of the sub-pixels are matched with the first reflective blocks to overlap reflective areas in the first direction, so that the period of arrangement of effective reflective areas of the sub-pixels in the second direction is more facilitated to be damaged. And, in the same row, each second reflector block includes one first edge extending in the second direction, and the first edges of the different second reflector blocks are shaped to exhibit at least a portion of the same sinusoidal or nearly sinusoidal curve. So, the second reflector block and the first reflector block cooperation that set up in the subpixel clearance are about to carry out the stack in the longitudinal direction with the reflection of light area of first reflector block, can increase the effective reflection of light area that the reflector layer is used for destroying the horizontal cycle of arranging of positive pole to can destroy the positive pole more effectively and arrange the periodicity in horizontal.

As can be seen from the schematic plan view of the display panel 10 shown in fig. 7, in the display panel 10, the reflective blocks 410 include first reflective blocks 411 and second reflective blocks 412 cooperating with the first reflective blocks 411 to break the arrangement periodicity of the anode 311 in the transverse direction, wherein the second reflective blocks 412 and the first reflective blocks 411 are alternately arranged in the first direction, i.e. in the longitudinal direction, i.e. a row of the second reflective blocks 412 is arranged between two longitudinally adjacent rows of the first reflective blocks 411. And, based on the first light reflecting blocks 411 disposed in the gaps of the adjacent first and third sub-pixels 310a and 310c, second light reflecting blocks 412 are disposed in the longitudinal direction of the third sub-pixel 310c, and each of the second light reflecting blocks 412 includes a first edge 413b extending in the lateral direction, the first edge 413b having a shape exhibiting a sinusoidal or nearly sinusoidal portion. Importantly, the second reflector blocks 412 on the same row and even the first edges 413b of all the second reflector blocks 412 are shaped as the same or different portions of the same sinusoidal curve.

In the layout design of the display panel, it is important to consider whether the newly added structural film layer has an adverse effect on the light extraction efficiency and the light extraction effect of the display panel, so in this embodiment, the second reflective block is further designed based on this consideration.

For example, in some embodiments, during the second period, the portion of the first edge of the first reflector block that is within the gap of the sub-pixel and the portion of the first edge of the second reflector block that is within the gap of the sub-pixel are complementary patterns in the first direction that are at least portions of one sinusoid or approximately sinusoid. For another example, in at least one embodiment, the shape of the complementary pattern is presented as a continuous sinusoidal or near sinusoidal curve. Therefore, after the second reflective block is translated in the first direction, the first edge of the second reflective block and the first edge of the first reflective block form a continuous sinusoidal curve or an approximate sinusoidal curve, so that the frequency of pixel arrangement periods, namely the arrangement non-period of effective reflective areas corresponding to the sub-pixels in the second direction, can be effectively reduced or even eliminated. In addition, the design of the reflective layer by arranging the reflective layer into the repeating unit can be realized by matching the arrangement rule of the sub-pixels, so that the design scheme of the reflective layer can be simplified.

As can be seen from fig. 6, the first sub-pixel 310a, the second sub-pixel 310b and the third sub-pixel 310c form a pixel unit (the dashed line box in fig. 6 is a pixel unit), and all the pixel units are periodically arranged on the substrate 100. Accordingly, in each pixel unit, a first light reflecting block 411 between the first sub-pixel 310a and the third sub-pixel 310c and a second light reflecting block 412 cooperating with the first light reflecting block 411 are included. Meanwhile, in the same pixel unit, there is no spatial overlap of the second light reflecting block 412 and the first light reflecting block 411. For the sub-pixels 310 provided with the first reflective blocks 411, the portion of the image corresponding to the first edge 413a of the first reflective block 411 disposed between each two adjacent sub-pixels 310 is a trough of a sinusoidal curve, and the reflective area of the first reflective block 411 corresponding to the trough is the smallest. For the sub-pixels 310 provided with the second light reflecting blocks 412, the portion of the image corresponding to the first edge 413b of the second light reflecting block 412 provided between each two adjacent sub-pixels 310 is a trough of a sinusoidal curve, and the light reflecting area of the second light reflecting block 412 corresponding to the trough is the smallest. The first and second light reflecting blocks 411, 412 further include second edges 414a, 414b opposite to the first edges 413a, 413b thereof, respectively, and the second edges 414a, 414b present images as straight lines. More importantly, after the front projection of the second reflector block 412 on the substrate 100 moves in the longitudinal direction and is spliced with the front projection of the first reflector block 411 on the substrate 100, it is clear from the spliced graph that the first edge 413b of the second reflector block 412 and the first edge 413a of the first reflector block 411 form a continuous sinusoidal curve, that is, the sinusoidal curve corresponding to the first edge 413b of the second reflector block 412 and the sinusoidal curve corresponding to the first edge 413a of the first reflector block 411 are the same. In each longitudinal direction, after the reflective area of the anode 313 of the sub-pixel 310 is overlapped with the effective reflective areas of the corresponding first reflective block 411 and second reflective block 412, the fluctuation of the overlapped effective reflective areas of different columns in the transverse direction is effectively eliminated, which is more beneficial to eliminating the periodicity of the arrangement of the anode 313.

It should be appreciated that the shape of the first edge of the reflector block is not limited to the sinusoidal portion of the exemplary figures described above, but may also be approximately a positive selection curve such as a wavy line, a broken line. For example, in the case where the second edge is a straight line, the interface diagram of the minimum repeating unit composed of the first edge and the second edge may be triangular, approximately triangular, trapezoidal, approximately trapezoidal, or the like. In addition, the reflective areas of the second reflective blocks may be equal or different. The above can be designed according to the production process and requirements of the display panel, and will not be described herein.

From the viewpoint of simplifying the production process flow of the display panel, in some embodiments, the first light reflecting block and the second light reflecting block are layered. Therefore, the first reflecting block and the second reflecting block can be prepared simultaneously by adopting the same process, so that the production cost of the reflecting layer is saved.

In addition, there are various embodiments regarding the planar structure of the light-reflecting block and the position of the film layer in the thickness direction of the display panel, and these embodiments are described in detail below.

For example, in some embodiments, the shape of the first edge of the first reflector block appears as a continuous sinusoid or approximately sinusoid. In at least one embodiment, the first retroreflective segment is positioned between the display function layer and the substrate. Further, the first light reflecting block is located in the driving circuit layer. Therefore, under the condition that the reflecting layer and the reflecting electrode are arranged on different layers, the problem of avoiding the luminous area of the sub-pixel is not needed to be considered when the first reflecting block is designed, and the difficulty of design and production of the first reflecting block is reduced.

As can be seen from fig. 6, each first light reflecting block 411 has a continuous elongated shape corresponding to a plurality of columns of sub-pixels, and the shape of the first edge 413a of the first light reflecting block 411 is a continuous sinusoidal curve. And referring to fig. 7, it can be seen that the light reflecting layer 400 is located between the second electrode, i.e., the cathode 313, and the substrate 100. Specifically, the light reflecting layer 400 is located between the driving circuit layer 200 and the display function layer 300, or the light reflecting layer 400 is located in the driving circuit layer 200. In this way, in the case that the reflective layer 400 and the anode 311 are disposed in different layers, the problem of avoiding the sub-pixels is not required to be considered when designing the reflective block 410, so that the difficulty of designing and producing the reflective block 410 is reduced.

For another example, in other embodiments, the first reflective blocks are spaced apart from each other and are located in the gaps between the sub-pixels. In at least one embodiment, the first reflector block is co-layered with the reflective electrode. Therefore, the first light reflecting blocks are arranged in a mutually-spaced arrangement scheme, and the influence of the light reflecting layer on the light emitting efficiency of the display panel can be reduced to the greatest extent. In addition, the scheme that the first reflecting block and the reflecting electrode are arranged on the same layer is beneficial to realizing the light and thin display panel.

As can be seen by way of example with reference to fig. 8, each first light reflecting block 411 is spaced apart from each other, and each first light reflecting block 411 is positioned within the gap of the sub-pixel 310. Further, referring to fig. 9, the first light reflecting block 410 is formed on the same layer as the anode 311, which is the first electrode. Meanwhile, the reflective layer 400 and the anode 311 may be integrally formed by the same process and material, thereby saving the production cost of the display panel 10.

It should be understood that the above-mentioned scheme and the drawing are merely exemplary schemes for providing a reflective layer in a display panel, where the reflective layer has edges of sinusoidal tracks, and the shape, parameters and the number of corresponding troughs in the gaps between the sub-pixels of the sinusoidal tracks corresponding to the first reflective block and the second reflective block included in the reflective layer are not limited thereto, and these may be selected according to layout design and functional requirements of the display panel, which is not described herein.

Based on the above designs of the first light reflecting block and the second light reflecting block, the present embodiment will specifically introduce the layout designs of the first light reflecting block and the second light reflecting block in combination with the array arrangement of the sub-pixels in the display panel.

For example, in some embodiments, the display panel includes a plurality of sub-pixels classified into a first sub-pixel emitting light of a first color, a second sub-pixel emitting light of a second color, and a third sub-pixel emitting light of a third color, and the first sub-pixel has a pixel area larger than that of the second sub-pixel, the third sub-pixel has a pixel area larger than that of the second sub-pixel, and the second light reflecting block is disposed at a periphery of the second sub-pixel. Therefore, the second reflective blocks are arranged on the periphery of the second sub-pixels, so that not only can the effective utilization of the residual space on the layout of the display panel be realized, the integration of the display panel is improved, but also the design and the preparation of the second reflective blocks are facilitated, and the production cost of the display panel is saved.

Illustratively, as shown in fig. 6, the display panel 10 includes a first sub-pixel 310a emitting red light, a second sub-pixel 310b emitting green light, and a third sub-pixel 310c emitting blue light. Among the three sub-pixels 310 emitting light of three different wavelength ranges, the green light emitted from the second sub-pixel 310b, which is light having an emitted light wavelength in a middle range, is more easily recognized by the human eye with respect to the red light emitted from the first sub-pixel 310a and the blue light emitted from the third sub-pixel 310c, and thus the surface area of the second sub-pixel 310b may be set smaller than the surface areas of the first sub-pixel 310a and the third sub-pixel 310c without affecting the display effect of the display panel. Accordingly, the remaining space around the second sub-pixel 310b is also relatively large, and thus, the second light reflecting block 412 may be disposed around the second sub-pixel 310b, i.e., the green sub-pixel, specifically, within the gap of the adjacent green sub-pixels.

Based on the above-mentioned design scheme including the reflective block in the display panel, the present embodiment also uses fourier transform to process and analyze whether the moire problem occurs in the corresponding display panel. Specifically, as shown in fig. 6, the signal line 210 of the display panel 10 has been compressed by 90%, and the reflective layer 400 is further provided in the display base 10. Fourier transformation is performed on the arrangement period in the transverse direction of the signal lines 210 and the arrangement period in the transverse direction of the anodes of the sub-pixels 310 on the display panel 10, respectively, to obtain fig. 6a and 6b, respectively, wherein the horizontal axis represents frequency and the vertical axis represents signal intensity. After the two signals are superimposed, fourier transform is performed to obtain fig. 6c, and referring to fig. 6c, it can be seen that the signal intensity of the moire corresponds to a frequency signal of 0.44/T2. By analyzing the frequency domain information of different fourier curves, it can be determined that after the arrangement period of the signal line 210 is compressed, no frequency less than 1/T2 appears in the fourier transform result after the arrangement period of the sub-pixel 310 is superimposed, that is, no low frequency signal recognizable by human eyes appears, so that it is verified that the first reflective block 411 and the second reflective block 412 are provided so that the display panel does not appear moire in the display image and the reflective image.

The embodiment of the application also provides a display device, which comprises the display panel in any one of the above embodiments.

In at least one embodiment, the display device further includes a touch sensor, a touch chip, and a flexible circuit board for realizing touch. In order to realize the light and thin touch display device, the touch sensor is arranged in the packaging layer of the display device, the touch chip is arranged on the flexible circuit board, and signals are transmitted to the touch sensor through the touch signal line.

In at least one embodiment, the display device may be any product or component with display and touch functions, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, etc. The implementation of the display device can be referred to the embodiment of the display panel, and the repetition is not repeated.

The foregoing is merely illustrative of the embodiments of the present application, and the present application is not limited thereto, and any person skilled in the art will recognize that changes and substitutions are within the scope of the present application. Therefore, the protection scope of the application is subject to the protection scope of the claims.

Claims (18)

1. A display panel, comprising: substrate; a driving circuit layer, located on the substrate, comprising a plurality of signal lines, wherein the plurality of signal lines are located in a display area of the display panel, extend along a first direction, and are arranged in parallel with a first period in a second direction intersecting the first direction; a display function layer, located on a side of the driving circuit layer away from the substrate, and comprising a plurality of sub-pixels, wherein the sub-pixels are arranged in parallel in the second direction at a second period different from the first period, and each of the sub-pixels comprises a reflective electrode disposed on the substrate; and The reflective layer is arranged on the substrate and includes a plurality of reflective blocks arranged in the second direction, and the plurality of reflective blocks are used to destroy the arrangement period of the effective reflective areas corresponding to the plurality of reflective electrodes in the second direction. 2 . The display panel according to claim 1 , wherein the reflective block comprises a first edge extending in the second direction, and a shape of the first edge is a sine curve or at least a portion of a sine curve. 3 . The display panel according to claim 2 , wherein, in the gap between the sub-pixels, the portion corresponding to the first edge is in the shape of a valley. 4 . The display panel according to claim 3 , wherein a valley is provided between each of the adjacent sub-pixels, and the reflective area of the reflective block corresponding to the valley is the smallest. 5 . The display panel according to claim 4 , wherein the valleys are arranged on perpendicular midlines of adjacent sub-pixels. 6 . The display panel according to claim 2 , wherein the reflective block further comprises a second edge extending along the second direction, and the second edge is in the form of a straight line or a figure axially symmetrical with the first edge. 7. The display panel according to claim 2, wherein the reflective blocks include first reflective blocks and second reflective blocks alternately arranged in the first direction, and the second reflective blocks are spaced apart from each other and located in the gaps between the sub-pixels. 8. The display panel according to claim 7, characterized in that, during the second period, the portion of the first edge of the first reflective block located within the sub-pixel gap and the portion of the first edge of the second reflective block located within the sub-pixel gap are complementary figures in the first direction, and the complementary figures are at least a portion of the sine curve or an approximate sine curve. 9 . The display panel according to claim 8 , wherein the complementary pattern is in the form of a continuous sine curve or a near sine curve. 10 . The display panel according to claim 7 , wherein the shape of the first edge of the first reflective block is a continuous sine curve or a near sine curve. 11 . The display panel according to claim 7 , wherein the first reflective block is located between the display function layer and the substrate. 12 . The display panel according to claim 7 , wherein the first reflective block is located in the driving circuit layer. 13 . The display panel according to claim 7 , wherein the first light reflecting blocks are spaced apart from each other and located in gaps between the sub-pixels. 14 . The display panel according to claim 7 , wherein the first reflective block and the reflective electrode are in the same layer. 15. The display panel according to claim 7, wherein: The first reflective block and the second reflective block are in the same layer. 16. The display panel according to any one of claims 7 to 15, characterized in that the plurality of sub-pixels are classified into a first sub-pixel emitting light of a first color, a second sub-pixel emitting light of a second color, and a third sub-pixel emitting light of a third color, and the pixel area of the first sub-pixel is larger than the pixel area of the second sub-pixel, the pixel area of the third sub-pixel is larger than the pixel area of the second sub-pixel, and the second reflective block is arranged around the second sub-pixel. 17 . The display panel according to claim 1 , wherein at least two columns of the sub-pixels are arranged in one second period, and the sum of the effective light-reflecting areas corresponding to the sub-pixels in each column is different. 18. A display device, comprising: the display panel according to any one of claims 1 to 17.