CN115792363B - AC signal power measurement method, device, user terminal and medium - Google Patents
AC signal power measurement method, device, user terminal and mediumInfo
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- CN115792363B CN115792363B CN202211439978.9A CN202211439978A CN115792363B CN 115792363 B CN115792363 B CN 115792363B CN 202211439978 A CN202211439978 A CN 202211439978A CN 115792363 B CN115792363 B CN 115792363B
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Abstract
The application belongs to the technical field of alternating current signal measurement, and particularly relates to a power measurement method, a device, a user terminal and a medium of an alternating current signal, which comprise the steps of obtaining a frequency multiplication PWM pulse signal; when the count of the input timing clock source is in the first range, a high-level pulse segment signal is output, when the technique of the input timing clock source is not in the first range, a low-level pulse segment signal is output, a sampling pulse signal is generated according to the high-level pulse segment signal and the low-level pulse segment signal, a voltage test value and a current test value are acquired according to the sampling pulse signal, and the active power, the reactive power and the power factor of the alternating current signal are calculated according to the voltage test value and the current test value. The power measurement method is suitable for periodic continuous alternating current signal measurement and has the advantage of low cost implementation.
Description
Technical Field
The present application relates to the field of ac signal measurement technologies, and in particular, to a method and apparatus for measuring power of an ac signal, a user terminal, and a medium.
Background
In the related art, the power measurement device generally includes an ADC having a sampling frequency of not more than 100KHz/S, and when the frequency of the measurement signal is 45Hz to 65Hz and 256 points need to be sampled in one period, the sampling frequency of the period ADC is 11.52KHz (45 Hz by 256) to 16.64KHz (65 Hz by 256). In practical application, the applicant found that when the frequency of the measurement signal is 20kHz-100kHz, and 256 points need to be sampled in one period, the sampling frequency of the periodic ADC is 5.12MHz (20 kHz by 256) to 25.6MHz (100 kHz by 256), and the sampling frequency exceeds that of the conventional ADC, so that the ADC with the high-speed sampling frequency of more than 50MHz/S needs to be adopted and used with a high-speed FPGA and an MCU with the high-speed 1GHz, the peripheral hardware cost is high, and the power measurement cost is high.
It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not form the prior art that is already known to those of ordinary skill in the art.
Disclosure of Invention
In view of at least one of the above technical problems, the present application provides a power measurement method for an ac signal, which solves the problem that when the frequency of the measurement signal is 20kHz-100kHz and 256 points need to be sampled in one period, the sampling frequency of the period ADC is 5.12MHz (20 khz×256) to 25.6MHz (100 khz×256), and exceeds the sampling frequency of a conventional ADC, so that an ADC with a high-speed sampling frequency greater than 50MHz/S needs to be adopted and is used with a high-speed FPGA and a high-speed 1GHz MCU, and the peripheral hardware cost is high, resulting in high power measurement cost.
An embodiment of a first aspect of the present application provides a power measurement method of an ac signal, including:
acquiring a frequency multiplication PWM pulse signal, wherein the frequency multiplication PWM signal is configured as an input timing clock source of an external timer, and the counting mode is sawtooth wave counting;
outputting a high-level pulse segment signal when the count of the input timing clock source is within a first range;
Outputting a low-level pulse segment signal when the technique of inputting the timing clock source is not in the first range;
generating a sampling pulse signal according to the high-level pulse segment signal and the low-level pulse segment signal;
collecting a voltage test value and a current test value according to the sampling pulse signal;
And calculating the active power, reactive power and power factor of the alternating current signal according to the voltage test value and the current test value.
The power measuring method is suitable for the periodic continuous alternating current signal measurement and has the advantage of low cost implementation.
In one implementation, the first range is CC1< CNT≤CC0;
wherein CNT is a count value of an input timing clock source, CC0 is an initial count value, CCO is 256, CC1 is a set count value, and CC1 is 236.
In one implementation, the method further comprises:
And after a section of sampling pulse signal is generated, updating an initial count value according to the first mapping relation, and updating a set count value according to the second mapping relation.
In one implementation, updating the initial count value according to the first mapping relation, and updating the set count value according to the second mapping relation further includes:
when the initial count value is equal to zero, the initial count value and the set count value are restored.
In one implementation, the first mapping relationship is cc0=cc0-1;
The second mapping relationship is cc1=cc1-1.
In one implementation, the number of sampled pulse signals is 256 segments.
In one implementation, collecting the voltage test value and the current test value according to the sampling pulse signal includes:
sampling the voltage signal by adopting a first analog-to-digital converter to obtain a voltage test value;
and sampling the current signal by adopting a second analog-to-digital converter to obtain a current test value.
An embodiment of the second aspect of the present application provides a power measurement apparatus for an ac signal, including:
The counting module is used for acquiring a frequency multiplication PWM pulse signal, wherein the frequency multiplication PWM signal is configured as an input timing clock source of an external timer, and the counting mode is sawtooth wave counting;
The first judging module is used for outputting a high-level pulse segmentation signal when the count of the input timing clock source is in a first range;
The second judging module is used for outputting a low-level pulse segmentation signal when the technology of inputting the timing clock source is not in the first range;
The signal synthesis module is used for generating a sampling pulse signal according to the high-level pulse segment signal and the low-level pulse segment signal;
the acquisition module is used for acquiring a voltage test value and a current test value according to the sampling pulse signal;
and the calculation module is used for calculating the active power, the reactive power and the power factor of the alternating current signal according to the voltage test value and the current test value.
An embodiment of the third aspect of the present application provides a user terminal, including a memory and a processor, where the memory stores a computer program, and the processor implements the steps of the power measurement method provided by the embodiment of the first aspect of the present application when executing the computer program.
An embodiment of the fourth aspect of the present application provides a storage medium storing a computer program which, when executed by a processor, implements the steps of the power measurement method provided by the embodiment of the first aspect of the present application.
The invention will be further described with reference to the drawings and examples.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will briefly explain the embodiments or the drawings needed in the prior art, and it is obvious that the drawings in the following description are only some embodiments of the present invention and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a block diagram of hardware for implementing a power measurement method in an embodiment of the present application;
FIG. 2 is a first method flow diagram of a power measurement method in an embodiment of the application;
FIG. 3 is a second method flow diagram of a power measurement method in an embodiment of the application;
FIG. 4 is a waveform diagram of a sampling pulse signal in an embodiment of the present application;
fig. 5 is a waveform block diagram of a user terminal in an embodiment of the present application;
Detailed Description
In order that the above objects, features and advantages of the application will be readily understood, a more particular description of the application will be rendered by reference to the appended drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. The present application may be embodied in many other forms than described herein and similarly modified by those skilled in the art without departing from the spirit of the application, whereby the application is not limited to the specific embodiments disclosed below.
In the related art, the power measurement device generally includes an ADC having a sampling frequency of not more than 100KHz/S, and when the frequency of the measurement signal is 45Hz to 65Hz and 256 points need to be sampled in one period, the sampling frequency of the period ADC is 11.52KHz (45 Hz by 256) to 16.64KHz (65 Hz by 256). In practical application, the applicant found that when the frequency of the measurement signal is 20kHz-100kHz, and 256 points need to be sampled in one period, the sampling frequency of the periodic ADC is 5.12MHz (20 kHz by 256) to 25.6MHz (100 kHz by 256), and the sampling frequency exceeds that of the conventional ADC, so that the ADC with the high-speed sampling frequency of more than 50MHz/S needs to be adopted and used with a high-speed FPGA and an MCU with the high-speed 1GHz, the peripheral hardware cost is high, and the power measurement cost is high. The power measurement method is suitable for periodic continuous alternating current signal measurement and has the advantage of low cost implementation.
Referring to fig. 1 to 5, the present application provides a power measurement method of an ac signal, which is implemented by the following hardware, and specifically includes a microcontroller, a digital frequency synthesizer, a first analog-to-digital converter and a second analog-to-digital converter. The microcontroller is electrically connected with the digital frequency synthesizer, the first analog-to-digital converter and the second analog-to-digital converter respectively. The digital frequency synthesizer is used for outputting a high-precision signal frequency 256 frequency multiplication PWM pulse signal. The first analog-to-digital converter is used for collecting voltage signals, and the second analog-to-digital converter is used for collecting current signals.
The main frequency of the microcontroller is 64MHz, the sampling frequency of the first analog-to-digital converter and the second analog-to-digital converter is 100KHz, so that the high-frequency power measurement (20 KHz-100 KHz) can be realized by adopting the low-cost analog-to-digital converter and matching with the microcontroller, and the peripheral hardware cost is effectively reduced. In the related art, in order to realize high-frequency power measurement (20 KHz-100 KHz), an analog-to-digital converter with the sampling frequency of more than 50MHz/s is matched with a high-speed FPGA and an MCU with the main frequency of 1 GHz.
For the hardware implementing the power measurement method, the model of the digital frequency synthesizer is AD9835.
In addition, a microcontroller is preset, the frequency multiplication PWM pulse signal is configured as an input timing clock source of an external timer, the counting mode is sawtooth wave counting, the comparison output is set to be in a double-point mode, the initial counting value is set to be 256, and the setting counting value is set to be 236.
An embodiment of the first aspect of the present application provides a power measurement method of an ac signal, including steps 100 to 500, wherein:
step 100, obtaining a frequency multiplication PWM pulse signal, wherein the frequency multiplication PWM signal is configured as an input timing clock source of an external timer, and the counting mode is sawtooth wave counting;
in step 100, the multiplied PWM pulse signal is generated by a digital frequency synthesizer, which inputs the multiplied PWM pulse signal to the microcontroller, the period of the timer is 256, and the locator counts down, since the frequency of the multiplied PWM pulse signal is 25.6 MHz.
In particular, the timer is integrated in the microprocessor.
Step 200, outputting a high-level pulse segmentation signal when the count of the input timing clock source is in a first range;
In step 200, the input timing clock source is a double frequency PWM pulse signal, and the microcontroller starts counting according to the double frequency PWM pulse signal, and when the double frequency PWM pulse signal generates a sawtooth pulse, the timer counts one unit. When the count of the timer is within the first range, the microcontroller outputs a high level pulse segment signal.
Step 300, outputting a low-level pulse segment signal when the technique of inputting a timing clock source is not in a first range;
In step 300, the microcontroller outputs a low level pulse segment signal when the count of the timer is not within the first range.
400, Generating a sampling pulse signal according to the high-level pulse segment signal and the low-level pulse segment signal;
In step 400, the microcontroller generates a sampling pulse signal according to the high level pulse segment signal and the low level pulse segment signal, wherein the period of the sampling pulse signal is one period.
Specifically, the frequency multiplication PWM pulse signal is used as a clock source, so that the timer of the microcontroller is controlled to count down continuously, and 256 sections of sampling pulse signals can be generated.
Step 500, collecting a voltage test value and a current test value according to a sampling pulse signal;
In step 500, according to the 256-segment sampling pulse signal generated in step 400, the first analog-to-digital converter collects the voltage signal to obtain a voltage test value, the first analog-to-digital converter inputs the voltage test value into the microcontroller, and similarly, the second analog-to-digital converter collects the current signal to obtain a current test value, and the second analog-to-digital converter inputs the current test value into the microcontroller.
Specifically, one section of sampling pulse signal can collect one voltage test value and one current test value, so 256 sections of sampling pulse signals can collect 256 voltage test values and 256 current test values.
And 600, calculating the active power, reactive power and power factor of the alternating current signal according to the voltage test value and the current test value.
In step 600, the active power, reactive power and power factor of the ac signal are calculated according to the 256 voltage test values and the current test values collected in step 500.
Specifically, the effective voltage value is:
Wherein U is the effective voltage value, N is the number of voltage test values, N is 256, and U (N) represents the voltage test value.
Specifically, the effective value of the current is:
Wherein I is the effective current value, N is the number of current test values, N is 256, and I (N) represents the current test values.
Specifically, the active power is:
Wherein P is active power, u (N) represents a voltage test value, i (N) represents a current test value, and N is 256.
Specifically, the reactive power is:
wherein Q is reactive power, U is voltage effective value, I is current effective value, and P is active power.
Specifically, the power factor is:
Wherein P is active power, U is voltage effective value, and I is current effective value.
In some embodiments, the first range is CC1< CNT≤CC0;
wherein CNT is a count value of an input timing clock source, CC0 is an initial count value, CCO is 256, CC1 is a set count value, and CC1 is 236.
The method further comprises the steps of:
step 410, when a section of sampling pulse signal is generated, the initial count value is updated according to the first mapping relation, and the set count value is updated according to the second mapping relation.
Specifically, the first mapping relationship is cc0=cc0-1;
The second mapping relationship is cc1=cc1-1.
And 420, when the initial count value is greater than zero, updating the initial count value and the set count value according to the first mapping relation and the second mapping relation, and then inputting the count of the timing clock source to judge whether the count is in the new first range.
Updating the initial count value according to the first mapping relation, and updating the set count value according to the second mapping relation, and then further comprising:
and 430, when the initial count value is equal to zero, restoring the initial count value and setting the count value.
Specifically, the initial count value and the set count value may change with the period, i.e., the initial count value and the set count value are not fixed values.
Illustratively, in the first period, i.e., in the first segment of the sampling pulse signal, the initial count value CC0 is 256, and the count value CC1 is 236;
In the second period, i.e., in the second section of the sampling pulse signal, the initial count value CC0 is 255, and the count value CC1 is 235;
In the third period, i.e., in the third segment of the sampling pulse signal, the initial count value CC0 is 254, and the count value CC1 is 234;
In the second sixty-six period, that is, in the second sixty-six sampling pulse signal, the initial count value CC0 is 0, so that the initial count value and the set count value are restored, the initial count value is reset to 256, and the set count value is reset to 236.
Referring to fig. 4, a cycle256 is a period, i.e., a segment of a sampling pulse signal.
The Duty20 is a high-level pulse segment signal, and specifically, when the count of the input timing clock source is within a first range, outputs a high-level pulse segment signal, and the rest is a low-level pulse segment signal.
DELAYCYCLE is a phase offset portion.
In some embodiments, the number of sampled pulse signals is 256 segments.
In some embodiments, collecting the voltage test value and the current test value according to the sampling pulse signal includes:
sampling the voltage signal by adopting a first analog-to-digital converter to obtain a voltage test value;
and sampling the current signal by adopting a second analog-to-digital converter to obtain a current test value.
An embodiment of the second aspect of the present application provides a power measurement apparatus for an ac signal, including:
The counting module is used for acquiring a frequency multiplication PWM pulse signal, wherein the frequency multiplication PWM signal is configured as an input timing clock source of an external timer, and the counting mode is sawtooth wave counting;
The first judging module is used for outputting a high-level pulse segmentation signal when the count of the input timing clock source is in a first range;
The second judging module is used for outputting a low-level pulse segmentation signal when the technology of inputting the timing clock source is not in the first range;
The signal synthesis module is used for generating a sampling pulse signal according to the high-level pulse segment signal and the low-level pulse segment signal;
the acquisition module is used for acquiring a voltage test value and a current test value according to the sampling pulse signal;
and the calculation module is used for calculating the active power, the reactive power and the power factor of the alternating current signal according to the voltage test value and the current test value.
An embodiment of the third aspect of the present application provides a user terminal, including a memory and a processor, where the memory stores a computer program, and the processor implements the steps of the power measurement method provided by the embodiment of the first aspect of the present application when executing the computer program.
The user terminal according to the embodiment of the third aspect of the present application may be implemented with reference to the details of the embodiment according to the first aspect of the present application, and has similar advantages as the power measurement method according to the embodiment of the first aspect of the present application, which will not be described herein.
The user terminal 10 may be implemented as a general purpose computing device. The components of user terminal 10 may include, but are not limited to, one or more processors or processing units 11, a system memory 12, and a bus 13 that connects the various system components, including system memory 12 and processing units 11.
Bus 13 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor, and a local bus using any of a variety of bus architectures. By way of example, and not limitation, such architectures include industry Standard architecture (IndustryStandardArchitecture; hereinafter ISA) bus, micro channel architecture (Micro ChannelArchitecture; hereinafter MAC) bus, enhanced ISA bus, video electronics standards Association (VideoElectronicsStandardsAssociation; hereinafter VESA) local bus, and peripheral component interconnect (PeripheralComponentInterconnection; hereinafter PCI) bus.
The user terminal 10 typically includes a variety of computer system readable media. Such media can be any available media that is accessible by user terminal 10 and includes both volatile and nonvolatile media, removable and non-removable media.
The memory 12 may include computer system readable media in the form of volatile memory such as Random Access Memory (RAM) 14 and/or cache memory 15. The user terminal 10 may further include other removable/non-removable, volatile/nonvolatile computer-readable storage media. By way of example only, storage system 16 may be used to read from or write to non-removable, nonvolatile magnetic media (not shown in the figures, commonly referred to as a "hard disk drive"). Although not shown in fig. 5, a disk drive for reading from and writing to a removable nonvolatile magnetic disk (e.g., a "floppy disk"), and an optical disk drive for reading from or writing to a removable nonvolatile optical disk (e.g., a compact disk read only memory (CompactDiscReadOnlyMemory; hereinafter CD-ROM), digital versatile read only optical disk (DigitalVideoDiscReadOnlyMemory; hereinafter DVD-ROM), or other optical media) may be provided. In these cases, each drive may be coupled to bus 13 through one or more data medium interfaces. The memory may include at least one program product having a set (e.g., at least one) of program modules configured to carry out the functions of the various embodiments of the disclosure.
A program/utility 18 having a set (at least one) of program modules 17 may be stored in, for example, a memory, such program modules 17 including, but not limited to, an operating system, one or more application programs, other program modules 17, and program data, each or some combination of which may include an implementation of a network environment. Program modules 17 generally perform the functions and/or methods in the embodiments described in this disclosure.
The user terminal 10 may also communicate with one or more external devices 19 (e.g., keyboard, pointing device, display 20, etc.), one or more devices that enable a user to interact with the computer system/server, and/or any devices (e.g., network card, modem, etc.) that enable the computer system/server to communicate with one or more other user terminals 10. Such communication may be through an input/output (I/O) interface 21. Also, the user terminal 10 may communicate with one or more networks, such as a local area network (Local Area Network; hereinafter: LAN), a wide area network (Wide Area Network; hereinafter: WAN) and/or a public network, such as the Internet, through the network adapter 22. As shown, the network adapter 22 communicates with other modules of the user terminal 10 via the bus 13. It is noted that although not shown, other hardware and/or software modules may be used in connection with the user terminal 10, including, but not limited to, microcode, device drivers, redundant processing units 11, external disk drive arrays, RAID systems, tape drives, and data backup storage systems 16, among others.
The processing unit 11 executes various functional applications and data processing by running a program stored in the system memory 12, for example, implementing the method mentioned in the foregoing embodiment.
The user terminal 10 according to the embodiment of the present application may be a server or a limited-power terminal device.
An embodiment of the fourth aspect of the present application provides a storage medium storing a computer program which, when executed by a processor, implements the steps of the power measurement method provided by the embodiment of the first aspect of the present application.
In general, the computer instructions for carrying out the methods of the present invention may be carried in any combination of one or more computer-readable storage media. The non-transitory computer-readable storage medium may include any computer-readable medium, except the signal itself in temporary propagation.
The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium include an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM 14), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
Computer program code for carrying out operations of the present invention may be written in one or more programming languages, or combinations thereof, including an object oriented programming language such as Java, smalltalk, C ++ and conventional procedural programming languages, such as the "C" language or similar programming languages, particularly the Python language suitable for neural network computing and TensorFlow, pyTorch-based platform frameworks may be used. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider).
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above is merely a preferred embodiment of the present application, and is not intended to limit the present application in any way. Any person skilled in the art can make many possible variations and modifications to the technical solution of the present application or modifications to equivalent embodiments using the methods and technical contents disclosed above, without departing from the scope of the technical solution of the present application. Therefore, all equivalent changes according to the shape, structure and principle of the present application are covered in the protection scope of the present application.
Claims (9)
1. A method for measuring power of an ac signal, comprising:
acquiring a frequency multiplication PWM pulse signal, wherein the frequency multiplication PWM signal is configured as an input timing clock source of an external timer, and the counting mode is sawtooth wave counting;
outputting a high-level pulse segment signal when the count of the input timing clock source is within a first range;
Outputting a low-level pulse segment signal when the count of the input timing clock source is not within a first range;
Generating a sampling pulse signal according to the high-level pulse segment signal and the low-level pulse segment signal;
collecting a voltage test value and a current test value according to the sampling pulse signal;
According to the voltage test value and the current test value, calculating the active power, reactive power and power factor of the alternating current signal;
The first range is CC1< CNT is less than or equal to CC0, wherein CNT is the count value of the input timing clock source, CC0 is the initial count value, CC0 is 256, CC1 is the set count value, and CC1 is 236.
2. The method of power measurement of an ac signal according to claim 1, further comprising:
And after a section of sampling pulse signal is generated, updating an initial count value according to the first mapping relation, and updating a set count value according to the second mapping relation.
3. The method for measuring power of an ac signal according to claim 2, wherein the updating the initial count value according to the first mapping relation and the setting count value according to the second mapping relation further comprises:
and when the initial count value is equal to zero, restoring the initial count value and setting the count value.
4. The method for measuring power of an alternating current signal according to claim 2, the method is characterized in that the first mapping relation is that;
The second mapping relation is that。
5. The method for measuring power of an ac signal according to claim 1, wherein the number of the sampling pulse signals is 256 segments.
6. The method of claim 1, wherein the step of collecting the voltage test value and the current test value according to the sampling pulse signal comprises:
sampling the voltage signal by adopting a first analog-to-digital converter to obtain a voltage test value;
and sampling the current signal by adopting a second analog-to-digital converter to obtain a current test value.
7. A power measurement device for an ac signal, comprising:
The counting module is used for acquiring a frequency multiplication PWM pulse signal, wherein the frequency multiplication PWM signal is configured as an input timing clock source of an external timer, and the counting mode is sawtooth wave counting;
The first judging module is used for outputting a high-level pulse segmentation signal when the count of the input timing clock source is in a first range;
The second judging module is used for outputting a low-level pulse segmentation signal when the count of the input timing clock source is not in the first range;
The signal synthesis module is used for generating a sampling pulse signal according to the high-level pulse segmented signal and the low-level pulse segmented signal;
the acquisition module is used for acquiring a voltage test value and a current test value according to the sampling pulse signal;
And the calculation module is used for calculating the active power, the reactive power and the power factor of the alternating current signal according to the voltage test value and the current test value.
8. A user terminal comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the power measurement method of any of claims 1 to 6 when the processor executes the computer program.
9. A storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the steps of the power measurement method of any one of claims 1 to 6.
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| CN106033098A (en) * | 2015-03-19 | 2016-10-19 | 上海机电工程研究所 | AC power measuring method and device based on data collection |
| CN114280389A (en) * | 2020-09-27 | 2022-04-05 | 南京谷峰智能技术有限公司 | Intelligent electric energy quality monitoring terminal |
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| CN115792363A (en) | 2023-03-14 |
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