CN115802875A - Phase change memory and manufacturing method thereof - Google Patents

Abstract

The disclosure provides a phase change memory and a method for manufacturing the phase change memory. The phase change memory includes a substrate; a stack structure, the stack structure is set on the substrate; a heating layer is set as a part of the stack structure; a phase change layer is set on the In the stack structure; the conductive layer is arranged in the phase change layer, the phase change layer covers the conductive layer, and the conductive layer extends along the thickness direction of the stack structure; there is a current path between the conductive layer and the heating layer, and the phase change layer is connected to the heating layer region undergoes a phase transition. In the present disclosure, the conductive layer extends along the thickness direction of the stacked structure, and the phase change layer covers the conductive layer, which increases the connection area between the phase change layer and the heating layer in the vertical direction, improves the utilization rate of the phase change layer, and improves storage density of phase change memory.

Description

Phase-change memory and manufacturing method of phase-change memory

technical field

The present disclosure relates to the technical field of semiconductors, and in particular to a phase-change memory and a manufacturing method of the phase-change memory.

Background technique

Phase-change memory stores data by using the difference in conductivity of special materials when they transform between crystalline and amorphous states. Phase-change memory is usually an information storage device that uses the huge conductivity difference between chalcogenides in the crystalline and amorphous states to store data. With the improvement of the integration level of the phase change memory, the storage density of the phase change memory is seriously insufficient.

Contents of the invention

The following is an overview of the subject matter described in detail in this disclosure. This summary is not intended to limit the scope of the claims.

The disclosure provides a phase change memory and a manufacturing method of the phase change memory.

A first aspect of the present disclosure provides a phase change memory including a substrate;

a stack structure, the stack structure is disposed on the substrate;

a heating layer configured as part of the stack;

a phase change layer arranged in the stacked structure;

a conductive layer disposed in the phase change layer, the phase change layer covers the conductive layer, and the conductive layer extends along the thickness direction of the stacked structure;

There is a current path between the conductive layer and the heating layer, and a phase change occurs in the area where the phase change layer is connected to the heating layer.

According to some embodiments of the present disclosure, grooves are disposed in the phase change layer, and the conductive layer is disposed in the grooves.

According to some embodiments of the present disclosure, the phase change memory further includes a first external electrode connected to an end of the conductive layer away from the bottom of the groove.

According to some embodiments of the present disclosure, the stack structure includes a plurality of stack layers, and each stack layer includes one heating layer;

Along the thickness direction of the substrate, a plurality of the stacked layers are sequentially stacked.

According to some embodiments of the present disclosure, the stacked layers include a heating layer and an insulating layer;

Along the thickness direction of the substrate, the heating layers and the insulating layers are arranged alternately.

According to some embodiments of the present disclosure, the heating layer is located on the upper layer of the insulating layer.

According to some embodiments of the present disclosure, the uppermost layer of the stack structure is the insulating layer.

According to some embodiments of the present disclosure, the phase change memory further includes a second external electrode electrically connected to the heating layer, the second external electrode includes a plurality of electrode units, and the plurality of electrode units are connected to a plurality of The heating layer is electrically connected.

According to some embodiments of the present disclosure, for two adjacent stacked layers, the projected area of the upper stacked layer on the substrate is smaller than the projection of the lower stacked layer on the substrate area.

According to some embodiments of the present disclosure, one ends of the plurality of stacked layers are aligned.

A second aspect of the present disclosure provides a method of manufacturing a phase change memory, the method comprising:

provide the substrate;

An initial stack structure is formed on the substrate, the initial stack structure includes a plurality of stack layers, each of the stack layers includes an insulating layer and a heating layer, along the thickness direction of the substrate, the The heating layer and the insulating layer are arranged alternately;

Etching the initial stack structure to form a stack structure, in the stack structure, the stack layer on the upper layer exposes a part of the stack layer on the lower layer;

forming a phase change layer within the stack structure;

forming a conductive layer within the phase change layer;

The conductive layer is connected to the first external electrode, and the heating layer is connected to the second external electrode.

According to some embodiments of the present disclosure, the etching the initial stack structure to form a stack structure includes:

Etching the first side of the initial stack structure to form a stepped surface;

A second side of the initial stacked structure opposite to the first side is kept aligned to form a stacked structure.

According to some embodiments of the present disclosure, the forming a phase change layer in the stack structure includes:

forming a trench within the stack structure, the trench exposing the substrate;

forming an initial phase change layer, the initial phase change layer covering the bottom surface and the sidewall surface of the trench, and the top surface of the stacked structure;

The initial phase change layer covering the top surface of the stack structure is removed to form a phase change layer, and the phase change layer includes grooves.

According to some embodiments of the present disclosure, the forming a conductive layer in the phase change layer includes:

forming an initial conductive layer, the initial conductive layer fills the groove, and covers the top surface of the phase change layer and the top surface of the stacked structure;

removing the initial conductive layer covering the top surface of the phase change layer and the top surface of the stacked structure to form a conductive layer.

According to some embodiments of the present disclosure, the heating layer is connected to the second external electrode, including:

An electrode unit is formed on each heating layer, and a plurality of electrode units form the second external electrode.

According to some embodiments of the present disclosure, the conductive layer is connected to the first external electrode, and the heating layer is connected to the second external electrode, including:

covering the top surface of the stack structure, the top surface of the phase change layer, and the top surface of the conductive layer along a direction perpendicular to the substrate top surface with an oxide layer, and planarizing the oxide layer;

Etching the oxide layer to form a first electrode hole and a second electrode hole;

Depositing and forming a metal layer, the metal layer fills the first electrode hole and the second electrode hole, and covers the top surface of the oxide layer;

planarizing the metal layer to remove the metal layer on the surface of the oxide layer to form a first external electrode and a second external electrode.

In the phase-change memory and the manufacturing method of the phase-change memory provided by the embodiments of the present disclosure, the conductive layer in the phase-change memory extends along the thickness direction of the stacked structure, and the phase-change layer covers the conductive layer, which increases the contact between the phase-change layer and the heating. The connection area of the layers in the vertical direction improves the utilization rate of the phase change layer and improves the storage density of the phase change memory.

Other aspects will be apparent to others upon reading and understanding the drawings and detailed description.

Description of drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and, together with the description, serve to explain principles of the embodiments of the disclosure. In the drawings, like reference numerals are used to denote like elements. The drawings in the following description are some, but not all, embodiments of the present disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without any creative work.

FIG. 1 is a schematic diagram of the formation of a related phase change memory.

Fig. 2 is a flow chart of a method for manufacturing a phase change memory according to an exemplary embodiment.

Fig. 3 is a flow chart of forming a stack structure in a method for manufacturing a phase change memory according to an exemplary embodiment.

Fig. 4 is a flow chart of forming a phase change layer in a method for manufacturing a phase change memory according to an exemplary embodiment.

Fig. 5 is a flow chart of forming a conductive layer in a method for manufacturing a phase change memory according to an exemplary embodiment.

Fig. 6 is a flow chart of forming a second external electrode connection in a manufacturing method of a phase change memory according to an exemplary embodiment.

Fig. 7 is a flow chart of forming a connection between a first external electrode and a second external electrode in a manufacturing method of a phase change memory according to an exemplary embodiment.

Fig. 8 is a schematic diagram of an initial stacked structure of a phase change memory according to an exemplary embodiment.

Fig. 9 is a schematic diagram showing a stacked structure of a phase change memory according to an exemplary embodiment.

Fig. 10 is a schematic diagram showing trenches formed in a stack structure of a phase change memory according to an exemplary embodiment.

Fig. 11 is a schematic diagram of forming an initial phase change layer of a phase change memory according to an exemplary embodiment.

Fig. 12 is a schematic diagram of forming a phase change layer of a phase change memory according to an exemplary embodiment.

Fig. 13 is a schematic diagram of forming an initial conductive layer of a phase change memory according to an exemplary embodiment.

Fig. 14 is a schematic diagram of forming a conductive layer of a phase change memory according to an exemplary embodiment.

Fig. 15 is a schematic diagram of forming an oxide layer of a phase change memory according to an exemplary embodiment.

Fig. 16 is a schematic diagram of forming a first electrode hole and a second electrode hole in a phase change memory according to an exemplary embodiment.

Fig. 17 is a schematic diagram of forming a metal layer of a phase change memory according to an exemplary embodiment.

Fig. 18 is a schematic diagram of forming a first external electrode and a second external electrode of a phase change memory according to an exemplary embodiment.

Fig. 19 is a schematic diagram showing connected regions of a phase change memory in a power-on state according to an exemplary embodiment.

Reference signs:

100, substrate;

200, stacking structure; 210, stacking layer; 211, heating layer; 212, insulating layer; 220, initial stacking structure; 230, groove;

400, phase change layer; 410, groove; 420, connected area; 430, initial phase change layer;

500, conductive layer; 510, initial conductive layer;

600. The first external electrode; 700. The second external electrode;

800, oxide layer; 810, first electrode hole; 820, second electrode hole;

900. Metal layer.

Detailed ways

In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in the disclosed embodiments will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments It is a part of the embodiments of the present disclosure, but not all of them. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without making creative efforts belong to the protection scope of the present disclosure. It should be noted that, in the case of no conflict, the embodiments in the present disclosure and the features in the embodiments can be combined arbitrarily with each other.

In the related art, the phase change memory is an information storage device, and the phase change memory is referred to as PCRAM or PCM or OUM (Ovonic Unified Memory) or CRAM (Chalcogenide Random Access Memory).

In one example, as shown in FIG. 1 , the phase change memory includes an upper electrode 100', a lower electrode 200', a heating electrode 300', a phase change layer 400', and an insulating layer 500'. The upper electrode 100' covers the top surface of the phase change layer 400', the first end of the heating electrode 300' is connected to the bottom surface of the phase change layer 400', the other end of the heating electrode 300' is connected to the lower electrode 200', and the insulating layer 500' is connected to the outer peripheral sidewall of the heating electrode 300', and the insulating part 500' is connected to the bottom surface of the phase change layer 400'. In the energized state, the temperature rises, so that the phase change layer 400' transforms between the crystalline phase state and the amorphous phase state, and uses the difference in conductivity after transformation to store data information. Among them, the crystalline phase state is a low-resistance state, and the amorphous phase state is a high-resistance state.

However, in the structure of the above-mentioned phase-change memory, the first end of the heating electrode 300' generates heat, and the heat is transferred to the phase-change layer 400', and the phase-change layer 400' undergoes transformation due to local heating, and the utilization rate of the phase-change layer 400' is low. Only the connection area with the heating electrode 300' can undergo phase change. And the phase-changeable region is the region where the bottom of the phase-change layer 400' is connected to the first end of the heating electrode 300', and the storage density of the phase-change memory is not high.

The disclosure provides a phase change memory, which includes a substrate, a stack structure, a heating layer, a phase change layer and a conductive layer. The stacked structure is set on the substrate, the heating layer is set as a part of the stacked structure, the phase change layer is set in the stacked structure, the conductive layer is set in the phase change layer, the phase change layer covers the conductive layer, and the conductive layer is along the thickness of the stacked structure direction extension. There is a current path between the conductive layer and the heating layer, and a phase change occurs in the area where the phase change layer and the heating layer are connected. The conductive layer in the present disclosure extends along the thickness direction of the stacked structure, and the phase change layer covers the conductive layer, which increases the connection area between the phase change layer and the heating layer in the vertical direction, improves the utilization rate of the phase change layer, and improves the The storage density of phase change memory.

An exemplary embodiment of the present disclosure provides a phase change memory, as shown in FIG. 19 , which shows a schematic structural diagram of a phase change memory provided according to an exemplary embodiment of the present disclosure.

This embodiment does not limit the phase change memory, and the following will take the phase change memory as a phase change random access memory (PCRAM) as an example for introduction, but this embodiment is not limited thereto, and the phase change memory in this embodiment can also be for other structures.

As shown in FIG. 18 and FIG. 19 , a phase change memory provided by an exemplary embodiment of the present disclosure includes a substrate 100 , a stack structure 200 , a heating layer 211 , a phase change layer 400 and a conductive layer 500 .

The stack structure 200 is disposed on the substrate 100, and the substrate 100 may be a single crystal silicon, glass or sapphire substrate, which is not limited in this embodiment. The heating layer 211 is disposed as a part of the stack structure 200 , and the phase change layer 400 is disposed in the stack structure 200 .

As shown in Figure 12 and Figure 19, the conductive layer 500 is disposed in the phase change layer 400, wherein a groove 410 is disposed in the phase change layer 400, the conductive layer 500 is disposed in the groove 410, and the conductive layer 500 fills the groove 410, so that the phase change layer 400 can cover the conductive layer 500, increasing the contact area between the phase change layer 400 and the conductive layer 500, and the conductive layer 500 extends along the thickness direction of the stack structure 200, so that the phase change layer 400 also extends along the stack The thickness direction of the structure 200 extends.

There is a current path between the conductive layer 500 and the heating layer 211, and the phase change occurs in the region 420 of the phase change layer 400 connected to the heating layer 211, so that the phase change memory can store information.

The phase change layer 400 can be made of alloy materials, such as chalcogenide and synthetic materials containing germanium, antimony and tellurium. In the energized state, the temperature of the heating layer 211 rises, and the area 420 connected to the phase change layer 400 and the heating layer 211 receives heat, so that the area 420 connected to it is converted by heat, and the phase change layer 400 is in a crystalline phase state and an amorphous phase state. Between transformations, a phase change reaction occurs, and the function of storing data information is realized. Among them, the crystalline phase state is a low-resistance state, and the amorphous phase state is a high-resistance state.

When the phase change layer 400 is transformed from an amorphous phase state to a crystalline phase state, the temperature is raised to a temperature higher than the recrystallization temperature and lower than the melting point temperature, and cooled until the phase change layer 400 turns into a crystalline phase state. At this time, the phase-change layer 400 has long-distance atomic energy levels, high free electron density, and low resistivity, so that the phase-change layer 400 presents a low-resistance state.

When the phase change layer 400 is transformed from a crystalline phase state to an amorphous phase state, when the temperature is raised to a temperature higher than the melting point, quenched and cooled rapidly, the phase change layer 400 will transform into an amorphous phase state. At this time, the phase-change layer 400 has short-distance atomic energy levels, low free electron density, and high resistivity, so that the phase-change layer 400 presents a high-resistance state.

In this embodiment, as shown in FIG. 12 and FIG. 19 , the phase change memory further includes a first external electrode 600, and the first external electrode 600 is connected to an end of the conductive layer 500 away from the bottom of the groove 410, so that the conductive layer 500 passes through The first external electrode 600 is connected to external components.

As shown in FIG. 19 , a phase change memory provided by an exemplary embodiment of the present disclosure includes a substrate 100 , a stack structure 200 , a heating layer 211 , a phase change layer 400 and a conductive layer 500 . Wherein, the arrangement manners of the substrate 100 , the stack structure 200 , the heating layer 211 , the phase change layer 400 and the conductive layer 500 in this embodiment are the same as those in the above-mentioned embodiments, and will not be repeated here.

The difference between this embodiment and the above embodiments is that the stack structure 200 includes a plurality of stack layers 210 , and the plurality of stack layers 210 are stacked in sequence along the thickness direction of the substrate 100 .

Each stacked layer 210 includes a heating layer 211. Along the thickness direction of the substrate 100, a plurality of stacked layers 210 are sequentially stacked, so that the phase change layer 400 generates more connected regions 420 along the thickness direction of the stacked structure 200, Make the phase change memory have more storage charges.

Wherein, the stacked layer 210 further includes insulating layers 212 , along the thickness direction of the substrate 100 , heating layers 211 and insulating layers 212 are arranged alternately to separate the heating layers 211 so that the heating layers 211 do not interfere with each other. The heating layer 211 is located on the upper layer of the insulating layer 212 , and the uppermost layer of the stack structure 200 is the insulating layer 212 to cover the heating layer 211 and prevent the heating layer 211 from affecting the safety of other components.

In this embodiment, as shown in FIG. 19 , the phase change memory further includes a second external electrode 700 electrically connected to the heating layer 211. The second external electrode 700 includes a plurality of electrode units, and the plurality of electrode units are connected to a plurality of heaters. Layer 211 is electrically connected.

Wherein, when a plurality of stacked layers 210 are stacked sequentially along the thickness direction of the substrate 100, for two adjacent stacked layers 210, the projected area of the upper stacked layer 210 on the substrate 100 is smaller than that of the lower stacked layer 210 on the substrate. The projected area on the bottom 100 is such that the heating layer 211 in each stacked layer 210 is exposed, so that the electrode units correspond to the heating layer 211 and are fixedly connected. When the multiple stacked layers 210 are stacked sequentially along the thickness direction of the substrate 100 , one end of the multiple stacked layers 210 can be aligned so that the stacked structure 200 is stepped.

An exemplary embodiment of the present disclosure provides a method for manufacturing a phase-change memory, as shown in FIG. 2 , and FIG. 2 shows a flowchart of a method for manufacturing a phase-change memory according to an exemplary embodiment of the present disclosure. 3-19 are schematic diagrams of various stages of the manufacturing method of the phase-change memory, and the manufacturing method of the phase-change memory will be introduced below with reference to FIGS. 3-19 .

This embodiment does not limit the phase change memory, and the following will take the phase change memory as a phase change random access memory (PCRAM) as an example for introduction, but this embodiment is not limited thereto, and the phase change memory in this embodiment can also be for other structures.

As shown in FIG. 2 , a method for manufacturing a phase-change memory provided by an exemplary embodiment of the present disclosure includes the following steps:

Step S110, providing a substrate.

In this step, as shown in FIG. 18 , the substrate 100 may be a semiconductor substrate containing silicon, for example, a single crystal silicon, glass or sapphire substrate, and this embodiment is not limited thereto.

Step S120, forming an initial stacked structure on the substrate, the initial stacked structure includes a plurality of stacked layers, each stacked layer includes an insulating layer and a heating layer, and along the thickness direction of the substrate, the heating layer and the insulating layer are arranged alternately .

In this step, as shown in FIG. 8, a chemical vapor deposition (Chemical Vapor Deposition, CVD) process is used to deposit and form an initial stacked structure 220. The initial stacked structure 220 includes a plurality of stacked layers 210, and each stacked layer 210 includes a layer of insulating layer. A layer 212 and a layer of heating layer 211 , along the thickness direction of the substrate 100 , the heating layer 211 and the insulating layer 212 are arranged alternately.

The heating layer 211 is a heating electrode, and a circuit is arranged on the heating layer 211 , and the insulating layer 212 separates the heating layer 211 so that the heating layers 211 do not interfere with each other. Wherein, the heating layer 211 may be made of a metal material, the insulating layer 212 may be made of an oxide material, and the oxide may be silicon oxide or the like.

The number of stacked layers 210 may be 5 layers, 6 layers, etc., and the specific number is subject to actual design, which is not specifically limited here.

Step S130 , etching the initial stacked structure to form a stacked structure, in which the upper stacked layer exposes a part of the lower stacked layer.

In this step, as shown in FIG. 8, an etching process is used to remove part of the initial stacked structure 220. Referring to FIG. The upper stacked layer 210 exposes a part of the lower stacked layer 210 .

Step S140, forming a phase change layer in the stack structure.

In this step, as shown in FIG. 12 , the phase change layer 400 is deposited and formed in the stack structure 200 by a chemical vapor deposition process. Wherein, the phase change layer 400 may be made of alloy materials, such as chalcogenide and synthetic materials containing germanium, antimony and tellurium.

Step S150, forming a conductive layer in the phase change layer.

In this step, as shown in FIG. 14 , in the phase change layer 400 , a conductive layer 500 is deposited and formed by a chemical vapor deposition process. Wherein, the conductive layer 500 may be made of metal conductive material, and the metal conductive material may be tungsten or the like.

Step S160, the conductive layer is connected to the first external electrode, and the heating layer is connected to the second external electrode.

In this step, as shown in FIG. 19, the conductive layer 500 is used to connect to the first external electrode 600, and the heating layer 211 is used to connect to the second external electrode 700, so that in the passing state, the conductive layer 500 and the heating layer 211 form In the current path, the phase change occurs in the region 420 of the phase change layer 400 connected to the heating layer 211, so that the connected region 420 is heated and converted, and the phase change layer 400 is transformed between a crystalline phase state and an amorphous phase state, and a phase change reaction occurs , to realize the function of storing data information.

In the method of this embodiment, a stacked structure is formed on the substrate, and a phase-change layer is formed in the stacked structure, wherein the stacked structure includes a plurality of heating layers, so that the heating layer and the phase-change layer are in the vertical direction, resulting in more connections. area, which improves the utilization rate of the phase change layer and achieves more storage density.

As shown in FIG. 3 , a manufacturing method of a phase change memory provided by an exemplary embodiment of the present disclosure includes the following steps:

Step S210, providing a substrate.

Step S220, forming an initial stacked structure on the substrate, the initial stacked structure includes a plurality of stacked layers, each stacked layer includes an insulating layer and a heating layer, and along the thickness direction of the substrate, the heating layer and the insulating layer are arranged alternately .

The implementation manners of steps S210-S220 in this embodiment are the same as the implementation manners of steps S110-S120 in the foregoing embodiment, and will not be repeated here.

Step S230 , etching the first side of the initial stacked structure to form a stepped surface; keeping the second side of the initial stacked structure opposite to the first side in alignment to form a stacked structure.

In this step, referring to FIG. 8 , the initial stack structure 220 is etched by etching, and the first side of the initial stack structure 220 is selected for etching. Referring to FIG. 9 , the first side of the initial stack structure 220 forms a stepped surface, exposing the heating layer 211 in each stack layer 210 . Wherein, the second side opposite to the first side of the initial stacked structure 220 is kept aligned to form the stacked structure 200 .

Step S240, forming a phase change layer in the stack structure.

Step S250, forming a conductive layer in the phase change layer.

Step S260, the conductive layer is connected to the first external electrode, and the heating layer is connected to the second external electrode.

The implementation manners of steps S240-S260 in this embodiment are the same as the implementation manners of steps S140-S160 in the foregoing embodiment, and will not be repeated here.

In the method of this embodiment, the initial stacked structure is etched to reveal the heating layer, so that the heating layer can be connected to the second external electrode to realize the connection of the current circuit.

As shown in FIG. 4 , a method for manufacturing a phase-change memory provided by an exemplary embodiment of the present disclosure includes the following steps:

Step S310, providing a substrate.

Step S320, forming an initial stacked structure on the substrate, the initial stacked structure includes a plurality of stacked layers, each stacked layer includes an insulating layer and a heating layer, and along the thickness direction of the substrate, the heating layer and the insulating layer are arranged alternately .

Step S330 , etching the initial stacked structure to form a stacked structure, in which the upper stacked layer exposes a part of the lower stacked layer.

The implementation manners of steps S310-S330 in this embodiment are the same as the implementation manners of steps S110-S130 in the above-mentioned embodiment, and will not be repeated here.

Step S340 , forming a trench in the stack structure, the trench exposing the substrate.

In this step, as shown in FIG. 10 , part of the stack structure 200 is etched by an etching process along the thickness direction of the stack structure 200, and the insulating layer 212 and the heating layer 211 of the stack structure 200 are sequentially etched layer by layer. The insulating layer 212 and the heating layer 211 jointly form a trench 230 in the stack structure 200 , and the trench 230 exposes the substrate 100 .

Step S350 , forming an initial phase change layer, the initial phase change layer covers the bottom surface and the sidewall surface of the trench, and the top surface of the stacked structure.

In this step, as shown in FIG. 10 and FIG. 11 , the alloy material is deposited on the bottom surface and sidewall surface of the trench 230 and the top surface of the stacked structure 200 by means of a chemical vapor deposition process to form an initial phase change layer 430 .

Step S360 , removing the initial phase change layer covering the top surface of the stacked structure to form a phase change layer, the phase change layer including grooves.

In this step, as shown in FIG. 10 and FIG. 11, the initial phase change layer 430 covering the top surface of the stack structure 200 is etched and removed by dry or wet etching process, and as shown in FIG. 12, a phase change layer is formed. 400. Wherein, the phase change layer 400 includes a groove 410 , so that the phase change layer 400 only covers the bottom surface and the sidewall surface of the trench 230 .

Step S370, forming a conductive layer in the phase change layer.

Step S380, the conductive layer is connected to the first external electrode, and the heating layer is connected to the second external electrode.

The implementation manners of steps S370-S380 in this embodiment are the same as the implementation manners of steps S150-S160 in the foregoing embodiment, and will not be repeated here.

In the method of this embodiment, a trench is formed in the stacked structure, and an initial phase change layer is formed on the bottom surface and side wall surface of the trench, as well as the top surface of the stacked structure, so that when the initial phase change layer is etched subsequently, by adjusting the etching process to selectively remove the initial phase change layer on the top surface of the stacked structure, and another part of the initial phase change layer is retained in the trench to form a phase change layer, which ensures the smoothness of the phase change layer surface.

As shown in FIG. 5 , a method for manufacturing a phase-change memory provided by an exemplary embodiment of the present disclosure includes the following steps:

Step S410, providing a substrate.

Step S420, forming an initial stacked structure on the substrate, the initial stacked structure includes a plurality of stacked layers, each stacked layer includes an insulating layer and a heating layer, and along the thickness direction of the substrate, the heating layer and the insulating layer are arranged alternately .

Step S430 , etching the initial stacked structure to form a stacked structure, in which the upper stacked layer exposes a part of the lower stacked layer.

Step S440 , forming a trench in the stack structure, the trench exposing the substrate.

Step S450, forming an initial phase change layer, the initial phase change layer covers the bottom surface and sidewall surface of the trench, and the top surface of the stacked structure.

Step S460, removing the initial phase change layer covering the top surface of the stacked structure to form a phase change layer, the phase change layer including grooves.

The implementation manners of steps S410-S460 in this embodiment are the same as the implementation manners of steps S310-S360 in the foregoing embodiment, and will not be repeated here.

Step S470, forming an initial conductive layer, which fills the groove and covers the top surface of the phase change layer and the top surface of the stacked structure.

In this step, as shown in FIG. 12 , the metal conductive material is deposited on the top surface of the phase change layer 400 and the top surface of the stacked structure 200 by means of a chemical vapor deposition process, and the groove 410 is filled, as shown in FIG. 13 . As shown, an initial conductive layer 510 is formed.

Step S480 , removing the initial conductive layer covering the top surface of the phase change layer and the top surface of the stacked structure to form a conductive layer.

In this step, as shown in FIG. 13 , the initial conductive layer 510 covering the top surface of the phase change layer 400 and the top surface of the stacked structure 200 is etched and removed by a dry or wet etching process, as shown in FIG. 14 , forming the conductive layer 500 such that the phase change layer 400 wraps the conductive layer 500 .

Step S490, the conductive layer is connected to the first external electrode, and the heating layer is connected to the second external electrode.

The implementation manner of step S490 in this embodiment is the same as the implementation manner of step S380 in the foregoing embodiment, and will not be repeated here.

In the method of this embodiment, the metal conductive material is filled in the groove of the phase change layer, and the metal conductive material covers the top surface of the stack structure and the top surface of the phase change layer, so that it forms an initial conductive layer, so that subsequent etching For the initial conductive layer, by adjusting the etching process, the initial conductive layer on the top surface of the stack structure and the top surface of the phase change layer is selectively removed, and another part of the initial conductive layer is left in the groove to form a conductive layer, and the conductive layer is completed. of filling.

As shown in FIG. 6, a method for manufacturing a phase change memory provided by an exemplary embodiment of the present disclosure includes the following steps:

Step S510, providing a substrate.

Step S520, forming an initial stacked structure on the substrate, the initial stacked structure includes a plurality of stacked layers, each stacked layer includes an insulating layer and a heating layer, and along the thickness direction of the substrate, the heating layers and the insulating layers are arranged alternately .

Step S530 , etching the initial stacked structure to form a stacked structure, in which the upper stacked layer exposes a part of the lower stacked layer.

Step S540, forming a trench in the stack structure, the trench exposing the substrate.

Step S550 , forming an initial phase change layer, the initial phase change layer covers the bottom surface and sidewall surface of the trench, and the top surface of the stacked structure.

Step S560, removing the initial phase change layer covering the top surface of the stacked structure to form a phase change layer, the phase change layer including grooves.

Step S570, forming a conductive layer in the phase change layer.

The implementation manner of steps S510-S570 in this embodiment is the same as the implementation manner of steps S310-S370 in the above-mentioned embodiment, and will not be repeated here.

Step S580 , forming an electrode unit on each heating layer, and a plurality of electrode units form a second external electrode.

In this step, as shown in FIG. 18 , electrode units are formed on each heating layer 211 , and a plurality of electrode units form a second external electrode 700 to facilitate electrical connection with external components.

In the method of this embodiment, the electrode units on each heating layer are electrically connected to external components, so that each heating layer can be heated by electricity, and the heat is transferred from the heating layer to the phase change layer, which improves the utilization of the phase change layer. Rate.

As shown in FIG. 7 , a method for manufacturing a phase change memory provided by an exemplary embodiment of the present disclosure includes the following steps:

Step S610, providing a substrate.

Step S620, forming an initial stacked structure on the substrate, the initial stacked structure includes a plurality of stacked layers, each stacked layer includes an insulating layer and a heating layer, and along the thickness direction of the substrate, the heating layer and the insulating layer are arranged alternately .

Step S630 , etching the initial stacked structure to form a stacked structure, in which the upper layer of the stacked layer exposes a part of the lower layer of the stacked layer.

Step S640, forming a phase change layer in the stack structure.

Step S650, forming a conductive layer in the phase change layer.

The implementation manners of steps S610-S650 in this embodiment are the same as the implementation manners of steps S110-S150 in the foregoing embodiment, and will not be repeated here.

Step S660 , covering the top surface of the stack structure, the top surface of the phase change layer and the top surface of the conductive layer along the direction perpendicular to the top surface of the substrate with an oxide layer to planarize the oxide layer.

In this step, as shown in FIG. 15 , the top surface of the stack structure 200 , the top surface of the phase change layer 400 and the top surface of the conductive layer 500 along the direction perpendicular to the top surface of the substrate 100 are deposited by a chemical vapor deposition process. There is an oxide layer 800 , and the oxide layer 800 is planarized to ensure the flatness of the oxide layer 800 .

Step S670, etching the oxide layer to form a first electrode hole and a second electrode hole.

In this step, as shown in FIG. 15 , the oxide layer 800 is etched by a dry or wet etching process, and as shown in FIG. 16 , a first electrode hole 810 and a second electrode hole 820 are formed. Wherein, the first electrode hole 810 exposes the conductive layer 500 . There are a plurality of second electrode holes 820, and the plurality of second electrode holes 820 correspond to the plurality of stacked layers 210 respectively. The depth of the second electrode holes 820 is from the first side of the stacked structure 200 to the second side of the stacked structure 200. The sides are arranged from deep to shallow to expose the heating layer 211 of each stacked layer 210 .

Step S680 , depositing and forming a metal layer, the metal layer fills the first electrode hole and the second electrode hole, and covers the top surface of the oxide layer.

In this step, as shown in FIG. 16 and FIG. 17 , the metal layer 900 is deposited and formed by chemical vapor deposition. The metal layer 900 fills the first electrode hole 810 and the second electrode hole 820 and covers the top surface of the oxide layer 800 . Wherein, the metal layer 900 is a metal conductive material.

Step S690 , planarizing the metal layer to remove the metal layer on the surface of the oxide layer to form a first external electrode and a second external electrode.

In this step, as shown in FIG. 17 , the metal layer 900 is planarized, and the metal layer on the surface of the oxide layer 800 is etched and removed by dry or wet etching to expose the metal layer in the first electrode hole 810 900 and the metal layer 900 in the second electrode hole 820, as shown in FIG. The external electrode 700 enables the first external electrode 600 and the second external electrode 700 to be connected to external components.

In the method of this embodiment, the oxide layer is deposited on the stacked structure, and part of the oxide layer is subsequently etched to form the first electrode hole and the second electrode hole in sequence from the first side to the second side of the stacked structure, and deposit metal layer, to form the first external electrode and the second external electrode, to complete the production of the phase change memory, to improve the charge storage in the vertical direction of the phase change memory, and to increase the storage density.

The manufacturing method of the phase-change memory provided by the present disclosure improves the storage density of the phase-change memory, and improves the utilization rate of the phase-change layer by utilizing the vertical direction. In the energized state, the connected area of the phase change layer and the heating layer is heated, so that the connected area switches between the amorphous phase state and the crystalline phase state, thereby realizing data storage.

Each embodiment or implementation manner in this specification is described in a progressive manner, each embodiment focuses on the differences from other embodiments, and the same and similar parts of each embodiment can be referred to each other.

In the description of this specification, descriptions with reference to the terms "embodiments", "exemplary embodiments", "some implementations", "exemplary implementations", "examples" and the like mean that the descriptions are described in conjunction with the implementations or examples. A specific feature, structure, material, or characteristic is included in at least one embodiment or example of the present disclosure.

In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the described specific features, structures, materials or characteristics may be combined in any suitable manner in any one or more embodiments or examples.

In the description of the present disclosure, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" etc. The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, or in a specific orientation. construction and operation are therefore not to be construed as limitations on the present disclosure.

It can be understood that the terms "first", "second" and the like used in the present disclosure can be used to describe various structures in the present disclosure, but these structures are not limited by these terms. These terms are only used to distinguish one structure from another.

In one or more drawings, like elements are indicated with like reference numerals. For the sake of clarity, various parts in the drawings are not drawn to scale. Also, some well-known parts may not be shown. For simplicity, the structure obtained after several steps can be described in one figure. In the following, many specific details of the present disclosure, such as structures, materials, dimensions, processing techniques and techniques of devices, are described for a clearer understanding of the present disclosure. However, as will be understood by those skilled in the art, the present disclosure may be practiced without these specific details.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present disclosure, not to limit them; although the present disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still Modifications are made to the technical solutions described in the foregoing embodiments, or equivalent replacements are made to some or all of the technical features; these modifications or replacements do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present disclosure.

Claims (16)

1. A phase change memory, comprising:

a substrate;

a stacked structure disposed on the substrate;

a heating layer disposed as part of the stacked structure;

the phase change layer is arranged in the stacking structure;

the conducting layer is arranged in the phase change layer, the phase change layer coats the conducting layer, and the conducting layer extends along the thickness direction of the stacked structure;

and a current path exists between the conductive layer and the heating layer, and the phase change layer generates phase change in a region connected with the heating layer.

2. The phase-change memory according to claim 1, wherein a groove is provided in the phase-change layer, and the conductive layer is provided in the groove.

3. The phase change memory according to claim 2, further comprising a first external electrode connected to an end of the conductive layer away from the bottom of the groove.

4. The phase-change memory according to claim 1, wherein the stacked structure comprises a plurality of stacked layers, each of the stacked layers comprising one of the heating layers;

and the stacked layers are sequentially stacked along the thickness direction of the substrate.

5. The phase change memory according to claim 4, wherein the stacked layers include a heating layer and an insulating layer;

and the heating layer and the insulating layer are alternately arranged along the thickness direction of the substrate.

6. The phase change memory of claim 5, wherein the heating layer is located on an upper layer of the insulating layer.

7. The phase change memory of claim 5, wherein the uppermost layer of the stacked structure is the insulating layer.

8. The phase change memory according to claim 5, further comprising a second external electrode electrically connected to the heating layers, the second external electrode including a plurality of electrode units electrically connected to the plurality of heating layers.

9. The phase-change memory according to claim 4, wherein the projected area of the upper stacked layer on the substrate is smaller than the projected area of the lower stacked layer on the substrate in two adjacent stacked layers.

10. The phase change memory according to claim 9, wherein one end of the plurality of stacked layers is aligned.

11. A method for manufacturing a phase change memory, the method comprising:

providing a substrate;

forming an initial stacked structure on the substrate, wherein the initial stacked structure comprises a plurality of stacked layers, each stacked layer comprises an insulating layer and a heating layer, and the heating layers and the insulating layers are alternately arranged along the thickness direction of the substrate;

etching the initial stacking structure to form a stacking structure, wherein in the stacking structure, the stacking layer positioned on the upper layer exposes a partial region of the stacking layer positioned on the lower layer;

forming a phase change layer in the stacked structure;

forming a conductive layer in the phase change layer;

the conducting layer is connected with the first external electrode, and the heating layer is connected with the second external electrode.

12. The method of claim 11, wherein the etching the initial stack structure to form a stack structure comprises:

etching the first side of the initial stacking structure to form a step surface;

a second side of the initial stacked structure opposite the first side remains aligned forming a stacked structure.

13. The method of claim 11, wherein forming a phase change layer within the stacked structure comprises:

forming a trench in the stacked structure, the trench exposing the substrate;

forming an initial phase change layer covering the bottom surface and the side wall surface of the trench and the top surface of the stacked structure;

and removing the initial phase change layer covering the top surface of the stacked structure to form a phase change layer, wherein the phase change layer comprises a groove.

14. The method of claim 13, wherein forming a conductive layer in the phase change layer comprises:

forming an initial conductive layer, wherein the initial conductive layer fills the groove and covers the top surface of the phase change layer and the top surface of the stacking structure;

and removing the initial conductive layer covering the top surface of the phase change layer and the top surface of the stacked structure to form a conductive layer.

15. The method of fabricating a phase change memory according to claim 13, wherein the heating layer is connected to a second external electrode, comprising:

an electrode unit is formed on each of the heating layers, and a plurality of electrode units form the second external electrode.

16. The method of claim 11, wherein the conductive layer is connected to a first external electrode, and the heating layer is connected to a second external electrode, comprising:

covering an oxide layer on the top surface of the stacking structure, the top surface of the phase change layer and the top surface of the conducting layer along the direction vertical to the top surface of the substrate, and flattening the oxide layer;

etching the oxide layer to form a first electrode hole and a second electrode hole;

depositing to form a metal layer, wherein the metal layer fills the first electrode hole and the second electrode hole and covers the top surface of the oxide layer;

and flattening the metal layer to remove the metal layer on the surface of the oxide layer and form a first external electrode and a second external electrode.

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