CN115903985B - Current limiting circuit for LDO circuits with wide input voltage range - Google Patents
Current limiting circuit for LDO circuits with wide input voltage rangeInfo
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- CN115903985B CN115903985B CN202211719447.5A CN202211719447A CN115903985B CN 115903985 B CN115903985 B CN 115903985B CN 202211719447 A CN202211719447 A CN 202211719447A CN 115903985 B CN115903985 B CN 115903985B
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- tube
- low voltage
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- current
- voltage isolation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses a current limiting circuit suitable for an LDO circuit with a wide input voltage range, and belongs to the technical field of integrated circuits. The LDO feedback control loop with the wide input voltage range comprises an error amplifier, a driving tube N1, a high-low voltage isolation tube HN1, a current sampling tube HP1, a power tube of the LDO and feedback resistors R1 and R2, and the high-voltage current limiting circuit comprises a sampling resistor R3, a current comparator, a biasing circuit, a high-low voltage isolation circuit and a current limiting tube N2. The current limiting circuit effectively reduces the current of the LDO voltage drop area, and obtains the voltage drop area current which has no peak and is smaller than that of the LDO voltage drop area current in stable output.
Description
Technical Field
The invention belongs to the technical field of semiconductor integrated circuits, and particularly relates to a current limiting circuit suitable for an LDO circuit with a wide input voltage range.
Background
When the LDO works in the voltage drop area, the current of the second stage (the branch where the driving tube is located) of the operational amplifier is very large, which causes the current of the voltage drop area of the LDO to be larger than that of the LDO in the stable output, and particularly, the current is outstanding in the no-load state. The requirements of some portable products and long-term standby products on static power consumption are very strict, and the problem of larger static power consumption in LDO voltage drop areas brings non-negligible influence to circuits. Therefore, a circuit needs to be designed to limit the current of the branch, and the current limiting circuit needs to be capable of operating in a high-voltage environment in consideration of the application of the LDO in the fields of automotive electronics, medical equipment, industrial electronics, communication base stations and the like.
In the prior art, the current limiting of the voltage drop area is realized by adopting a current mirror image method, but the current limiting value is a fixed value, and although the current of the voltage drop area is limited, the current still has a peak. Meanwhile, a low-voltage process design is adopted, the risk of breakdown exists in a circuit, the reliability is low, and a high-voltage resistant device is adopted for design, so that the high-voltage resistant device generally has inferior performance as a low-voltage device, and a larger area is often required. Therefore, the area of the LDO can be well reduced by only partially adopting the high-voltage tube on the premise of meeting the reliability, the cost is saved, and the advantages of the process are realized.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides the current limiting circuit suitable for the LDO circuit with a wide input voltage range, which can effectively reduce the current of the LDO voltage drop area, can work in a high-voltage area, and simultaneously reduces the chip area on the premise of ensuring the reliability by adopting a method of jointly using a high-voltage tube and a low-voltage tube.
In order to solve at least one of the technical problems, according to one aspect of the invention, a current limiting circuit suitable for an LDO circuit with a wide input voltage range is provided, which comprises an LDO feedback control loop with a wide input voltage range and a high voltage resistant current limiting circuit.
The LDO feedback control loop with the wide input voltage range comprises an error amplifier, a driving tube N1, a high-low voltage isolation tube HN1, a current sampling tube HP1, a power tube of the LDO and feedback resistors R1 and R2.
The non-inverting input end of the error amplifier is connected with a reference voltage VREF, the inverting input end of the error amplifier is connected with one ends of feedback resistors R1 and R2, the output end of the error amplifier is connected with the grid electrode of a driving tube, the drain electrode of the driving tube is connected with the source stage of a high-low voltage isolation tube, the drain electrode of the high-low voltage isolation tube is connected with the grid electrode of a current sampling tube, the drain electrode of the high-low voltage isolation tube and the grid electrode of an LDO power tube, the drain electrode of the LDO power tube is connected with the other end of the feedback resistor R2, and the other end of the feedback resistor R1 is connected with the ground.
The high-voltage-resistant current limiting circuit comprises a sampling resistor R3, a current comparator, a bias circuit, a high-low voltage isolation circuit and a current limiting tube N2, wherein the bias circuit provides bias for the high-low voltage isolation circuit and the current comparator, and the high-low voltage isolation circuit enables the current comparator to work in a high-voltage environment.
Further, the current comparator comprises comparison tubes HP2 and HP3, a bias tube N5 and a bias tube N6, wherein the grid electrode of the comparison tube HP2 is connected with the drain electrode, the grid electrodes of the bias tube N5 and the bias tube N6 are connected, and the source electrodes are grounded respectively.
Further, the high-low voltage isolation circuit comprises a zener diode Z1, a zener diode Z2, a high-low voltage isolation tube HP4, a high-low voltage isolation tube HN3, a high-low voltage isolation tube HN4, a high-low voltage isolation tube HN2 and a bias tube N4. The positive electrode of the zener diode Z1, the drain electrode of the high-low voltage isolation tube HN2 and the gate electrode of the high-low voltage isolation tube HP4 are connected, the source electrode of the high-low voltage isolation tube HN2 is connected with the drain electrode of the N4, the drain electrode of the high-low voltage isolation tube HP4 is connected with the positive electrode of the zener diode Z2, and the source electrode of the bias tube N4 is grounded.
Further, the bias circuit comprises a current source IB and a bias tube N3, wherein the grid electrode, the drain electrode and the current source IB of the bias tube N3 are connected, and the source stage of the bias tube N3 is grounded.
One end of the sampling resistor R3 is connected with a source stage of the comparison tube HP3, the sampling resistor R3 is used as a sampling signal, a source electrode and a drain electrode of the high-low voltage isolation tube HP4 are respectively connected with a gate electrode of the comparison tube HP2 and a gate electrode of the comparison tube HP3, a drain electrode and a source stage of the high-voltage low isolation tube HN3 are respectively connected with a drain electrode of the comparison tube HP2 and a drain electrode of the comparison tube N5, a drain electrode and a source stage of the high-voltage low isolation tube HN4 are respectively connected with a drain electrode of the comparison tube HP3 and a drain electrode of the comparison tube N6, a gate electrode of the current limiting tube N2 is connected with a drain electrode of the N6, and a gate electrode of the bias tube N3 is connected with gate electrodes of the N4, N5 and N6.
The source electrode of HP3 in the high-voltage-resistant current-limiting circuit is connected with the source electrode of HP1 in the LDO feedback control loop with a wide input voltage range, the drain electrode of N2 in the high-voltage-resistant current-limiting circuit is connected with the source electrode of N1 in the LDO feedback control loop with a wide input voltage range, the source electrode of HP2 in the high-voltage-resistant current-limiting circuit is connected with the output VOUT in the LDO feedback control loop with a wide input voltage range, the input VIN is connected to the cathode of a zener diode Z1, the cathode of the zener diode Z2, the other end of a sampling resistor R3 and the source electrode of the LDO power tube, the current source IB, the grid electrode of a high-low voltage isolation tube HN2, the grid electrode of the high-low voltage isolation tube HN3, the grid electrode of the high-low voltage isolation tube HN4, the grid electrode of the high-low voltage isolation tube HN1 and the voltage of the error amplifier are connected with the input voltage VDD, and the divided voltage VDD is a low-voltage input signal.
Further, when the circuit operates in the low voltage region, the zener diode is not broken down, the high-low voltage isolation tube HP4 is turned on, and the gate voltages of the comparison tube HP2 and the comparison tube HP3 are equal.
Further, when the circuit works in a high voltage region, the zener diode is broken down, the high-low voltage isolation tube HP4 is closed, the gate-source voltage of the comparison tube HP3 is clamped within the breakdown voltage of the zener diode, and the HP4 plays a role in high-low voltage isolation.
Preferably, the power tubes, the comparison tube HP2, the comparison tube HP3 and the high-low voltage isolation tube HP4 of the current sampling tube HP1 and the LDO adopt P-type high-voltage LDMOS tubes, the high-low voltage isolation tube HN1, the high-low voltage isolation tube HN2, the high-low voltage isolation tube HN3 and the high-low voltage isolation tube HN4 adopt N-type high-voltage LDMOS tubes, and the driving tube N1, the driving tube N2, the biasing tube N3, the biasing tube N4, the biasing tube N5 and the biasing tube N6 adopt NMOS tubes.
Compared with the prior art, the invention has at least the following beneficial effects:
The current limiting circuit effectively reduces the current of the LDO voltage drop area, and obtains the voltage drop area current which has no peak and is smaller than that of the LDO voltage drop area current in stable output. Furthermore, the zener diodes Z1 and Z2 enable the circuit to be not influenced by high-voltage devices in a low-voltage area, and can work normally in the high-voltage area, so that the high-voltage and low-voltage isolation tubes HN1, HN2, HN3, HN4 and HP4 have a pressure-bearing effect, and the reliability of the circuit is guaranteed.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following brief description of the drawings of the embodiments will make it apparent that the drawings in the following description relate only to some embodiments of the present invention and are not limiting of the present invention.
FIG. 1 is a block diagram of a circuit of the present invention;
FIG. 2 is a circuit diagram of a current limiting circuit suitable for LDO circuit with wide input voltage range according to embodiment 1 of the present invention;
FIG. 3 is a comparative graph of simulation before and after current limiting according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. It will be apparent that the described embodiments are some, but not all, embodiments of the invention.
Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs.
Example 1:
The current limiting circuit suitable for the LDO circuit with the wide input voltage range comprises an LDO feedback control loop with the wide input voltage range and a high-voltage-resistant current limiting circuit, wherein the high-voltage-resistant current limiting circuit comprises a sampling resistor, a current limiting pipe, a high-low voltage isolation circuit, a current comparison circuit and a bias circuit, the LDO feedback control loop with the wide input voltage range is connected with a control signal of a low-voltage signal VDD, an input VIN and the current limiting pipe and is connected with the sampling resistor to output a VOUT signal, the sampling resistor is connected with the input VIN to output the sampling signal to a current comparison module, the current limiting pipe is used for limiting the current and outputting the control signal, the high-low voltage isolation circuit is connected with the low-voltage signal VDD, the input VIN and the bias signal to provide protection for current comparison, and the current comparison module is connected with the bias signal, the VOUT and the sampling signal to output the current limiting signal.
Referring to fig. 2, a high voltage-resistant current limiting circuit is shown in a dotted line frame, and an LDO feedback control loop with a wide input voltage range is shown in a dotted line frame. According to the design index and the application scene of the LDO, the LDO feedback control loop adopts a high-voltage-resistant design. The LDO feedback control loop with the wide input voltage range comprises an error amplifier, a driving tube N1, a high-low voltage isolation tube HN1, a current sampling tube HP1, a power tube of the LDO and feedback resistors R1 and R2. The non-inverting input end of the error amplifier is connected with a reference voltage VREF, the inverting input end of the error amplifier is connected with one ends of feedback resistors R1 and R2, the output end of the error amplifier is connected with the grid electrode of a driving tube, the drain electrode of the driving tube is connected with the source stage of a high-low voltage isolation tube, the drain electrode of the high-low voltage isolation tube is connected with the grid electrode of a current sampling tube, the drain electrode of the high-low voltage isolation tube and the grid electrode of an LDO power tube, the drain electrode of the LDO power tube is connected with the other end of the feedback resistor R2, and the other end of the feedback resistor R1 is connected with the ground.
The current comparator comprises a comparison tube HP2, a comparison tube HP3, a bias tube N5 and a bias tube N6, wherein the grid electrode of the comparison tube HP2 is connected with the drain electrode, the grid electrodes of the bias tube N5 and the bias tube N6 are connected, and the source electrodes are grounded respectively. The bias tube provides bias for the comparator, and the comparison tube compares the VIN and the VOUT and outputs a current limiting signal to the grid electrode of the current limiting tube N2.
The high-low voltage isolation circuit comprises a zener diode Z1, a zener diode Z2, a high-low voltage isolation tube HP4, a high-low voltage isolation tube HN3, a high-low voltage isolation tube HN4, a high-low voltage isolation tube HN2 and a bias tube N4. The positive electrode of the zener diode Z1, the drain electrode of the high-low voltage isolation tube HN2 and the gate electrode of the high-low voltage isolation tube HP4 are connected, the source electrode of the high-low voltage isolation tube HN2 is connected with the drain electrode of the N4, the drain electrode of the high-low voltage isolation tube HP4 is connected with the positive electrode of the zener diode Z2, and the source electrode of the bias tube N4 is grounded. The high-low voltage isolation tube enables the circuit to work in a high-voltage area, the reliability of the circuit is improved, and the zener diode enables the circuit to be switched between a low-voltage working state and a high-voltage working state.
The bias circuit comprises a current source IB and a bias tube N3, wherein the grid electrode and the drain electrode of the bias tube N3 are connected with the current source IB, and the source stage of the bias tube N3 is grounded.
One end of the sampling resistor R3 is connected with a source stage of the comparison tube HP3, the sampling resistor R3 is used as a sampling signal, a source electrode and a drain electrode of the high-low voltage isolation tube HP4 are respectively connected with a gate electrode of the comparison tube HP2 and a gate electrode of the comparison tube HP3, a drain electrode and a source stage of the high-voltage low isolation tube HN3 are respectively connected with a drain electrode of the comparison tube HP2 and a drain electrode of the comparison tube N5, a drain electrode and a source stage of the high-voltage low isolation tube HN4 are respectively connected with a drain electrode of the comparison tube HP3 and a drain electrode of the comparison tube N6, a gate electrode of the current limiting tube N2 is connected with a drain electrode of the N6, and a gate electrode of the bias tube N3 is connected with gate electrodes of the N4, N5 and N6.
The source electrode of HP3 in the high-voltage-resistant current-limiting circuit is connected with the source electrode of HP1 in the LDO feedback control loop with a wide input voltage range, the drain electrode of N2 in the high-voltage-resistant current-limiting circuit is connected with the source electrode of N1 in the LDO feedback control loop with a wide input voltage range, the source electrode of HP2 in the high-voltage-resistant current-limiting circuit is connected with the output VOUT in the LDO feedback control loop with a wide input voltage range, the input VIN is connected to the cathode of a zener diode Z1, the cathode of the zener diode Z2, the other end of a sampling resistor R3 and the source electrode of the LDO power tube, the current source IB, the grid electrode of a high-low voltage isolation tube HN2, the grid electrode of the high-low voltage isolation tube HN3, the grid electrode of the high-low voltage isolation tube HN4, the grid electrode of the high-low voltage isolation tube HN1 and the voltage of the error amplifier are connected with the input voltage VDD, and the divided voltage VDD is a low-voltage input signal.
Based on the circuit, the current limiting circuit of the scheme has the following working principle:
When operating in the low voltage range, where neither zener is broken down, the gate voltage of HP4 is pulled down to ground, HP4 is turned on, and the gate potentials of HP2 and HP3 are the same. When the VIN small circuit works in the voltage drop area, VOUT can not reach the output voltage nominal value VOUT (NOM), the feedback signal FB < VREF generated by the feedback resistor, the output of the error amplifier is that the N1 grid potential is increased, the grid potential of the HP1 is pulled down, that is, the grid potential of the Power tube is pulled down, VOUT is promoted to be raised, and a feedback loop is formed, at the moment, V OUT≈VIN. At the moment, the potential of the point A is lower and is smaller than VOUT, the potential of the point HP3 works in a subthreshold region, the potential of the point B is lower, and the current limiting of a voltage drop region is realized through N2. When VIN is larger than VOUT (NOM) +DeltaV, (the magnitude of DeltaV is directly related to R3), the potential at the point A is higher, the pull-up capability of HP3 is enhanced, the potential at the point B is higher, meanwhile, as VOUT reaches the output voltage nominal value VOUT (NOM) at the moment, the potential of the output of the error amplifier, namely the grid electrode of N1, is reduced, the potential at the point C is also reduced, and N2 works in a linear region, so that no influence is generated on the LDO feedback control loop.
When the voltage is in a high voltage range, Z1 is broken down after VIN rises to a certain height, the grid electrode of HP4 becomes smaller than VIN by a breakdown voltage, the voltage rises along with the rising of VIN, HP4 is turned off after the voltage rises to a certain height, Z2 is broken down, the grid electrode of HP3 becomes smaller than VIN by a breakdown voltage, and HP4 is subjected to high-voltage and low-voltage isolation. Since the gate-source voltage of HP3 is fixed and larger, the voltage at the point B is pulled up to be higher at the moment, N2 works in a linear region, and no influence is generated on the LDO feedback control loop.
The circuit forms a loop at A, B so that the current limit signal B point potential is not high, i.e., low, but an analog level, so that the voltage drop region current has no peak and is less than the current value at steady output.
Fig. 3 shows a comparison of the current limiting before and after the current limiting according to the present invention, and it can be seen from the graph that VOUT is the output of the LDO, and the current limiting circuit has no influence on the output during stable output. I1 is the simulation result of the short-circuit current limiter N2, namely a voltage drop area current curve before current limiting, and can be used for indicating that the voltage drop area current is large and has a peak, I2 is a voltage drop area current curve after current limiting, and can be used for indicating that the voltage drop area current has no peak and is smaller than the current during stable output.
The examples of the present invention are merely for describing the preferred embodiments of the present invention, and are not intended to limit the spirit and scope of the present invention, and those skilled in the art should make various changes and modifications to the technical solution of the present invention without departing from the spirit of the present invention.
Claims (5)
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| Application Number | Priority Date | Filing Date | Title |
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| CN202211719447.5A CN115903985B (en) | 2022-12-30 | 2022-12-30 | Current limiting circuit for LDO circuits with wide input voltage range |
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| CN202211719447.5A CN115903985B (en) | 2022-12-30 | 2022-12-30 | Current limiting circuit for LDO circuits with wide input voltage range |
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| CN115903985A CN115903985A (en) | 2023-04-04 |
| CN115903985B true CN115903985B (en) | 2025-07-15 |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116501123A (en) * | 2023-04-28 | 2023-07-28 | 无锡艾为集成电路技术有限公司 | Voltage generation circuit and electronic equipment |
| CN116454848B (en) * | 2023-06-19 | 2023-09-12 | 南京邮电大学 | A high-voltage switching power tube current-limiting protection circuit, PCB board and its controller |
| CN117519394A (en) * | 2023-12-11 | 2024-02-06 | 电子科技大学 | A kind of LDO constant overcurrent protection circuit |
| CN117650761B (en) * | 2024-01-26 | 2024-04-16 | 杭州芯正微电子有限公司 | Inductance current sampling amplifying circuit with wide input voltage range |
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| JPH0934572A (en) * | 1995-07-20 | 1997-02-07 | Hitachi Ltd | Power supply circuit |
| CN111290462A (en) * | 2020-03-25 | 2020-06-16 | 上海洺太电子科技有限公司 | LDO (low dropout regulator) voltage stabilizer with high current and high power supply rejection ratio |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP4866158B2 (en) * | 2006-06-20 | 2012-02-01 | 富士通セミコンダクター株式会社 | Regulator circuit |
| US8922179B2 (en) * | 2011-12-12 | 2014-12-30 | Semiconductor Components Industries, Llc | Adaptive bias for low power low dropout voltage regulators |
| US9535439B2 (en) * | 2013-11-08 | 2017-01-03 | Texas Instruments Incorporated | LDO current limit control with sense and control transistors |
| CN106055011B (en) * | 2016-06-23 | 2017-06-23 | 电子科技大学 | A kind of self-starting power supply circuit |
| CN110058631B (en) * | 2018-01-18 | 2022-07-29 | 恩智浦美国有限公司 | Voltage regulator with feed forward circuit |
| CN209233734U (en) * | 2018-05-21 | 2019-08-09 | 浙江正泰电器股份有限公司 | The power module of frequency converter |
| CN111474973B (en) * | 2020-05-22 | 2021-05-28 | 深圳市微源半导体股份有限公司 | Be applied to novel electric current circuit of turning back of LDO |
| CN114610107A (en) * | 2022-01-13 | 2022-06-10 | 电子科技大学 | NMOS LDO based on hybrid modulation bias current generating circuit |
| CN114879803B (en) * | 2022-05-24 | 2023-07-04 | 西安微电子技术研究所 | Current-limiting protection circuit structure of LDO |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0934572A (en) * | 1995-07-20 | 1997-02-07 | Hitachi Ltd | Power supply circuit |
| CN111290462A (en) * | 2020-03-25 | 2020-06-16 | 上海洺太电子科技有限公司 | LDO (low dropout regulator) voltage stabilizer with high current and high power supply rejection ratio |
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