CN115952868B - Quantum circuit task processing method and device, electronic equipment and readable storage medium - Google Patents

Abstract

The present disclosure provides a quantum circuit task processing method, device, electronic equipment and readable storage medium, and relates to the technical fields of quantum computers, quantum processors, quantum circuit tasks, and multi-processes. The method includes: responding to the presence of at least two target quantum circuit tasks to be processed in the task queue, allocating different target quantum circuit tasks to different quantum circuit translation processes; controlling each quantum circuit translation process to respond to the received target quantum circuit The task performs circuit translation operations to obtain translated quantum circuits; controls each quantum circuit translation process to submit the corresponding translated quantum circuits to the quantum computer for operation, and obtains the circuit operation results returned by the quantum computer; according to the results returned by each quantum circuit translation process The circuit operation results update the processing status of the corresponding target quantum circuit task. This method improves processing efficiency by applying multi-process concurrency technology to the processing of quantum circuit tasks by quantum devices.

Description

Quantum circuit task processing method, device, electronic equipment and readable storage medium

Technical field

The present disclosure relates to the field of quantum task processing technology, specifically to the technical field of quantum computers, quantum processors, quantum circuit tasks, and multi-process technology, and in particular to a quantum circuit task processing method, device, electronic equipment, computer-readable storage media, and computer programs. product.

Background technique

Since the current quantum equipment is still in the development stage, a quantum computer can often only integrate a single-core quantum chip, and the underlying system's serial execution method of circuit tasks cannot be changed. On the client side and server side of quantum applications, the original design provides the Nowait (no waiting) submission mode and a task creation mechanism that supports high concurrency.

Current quantum circuit tasks usually process tasks in a serial manner, that is, only after the previous quantum circuit task is processed, the next quantum circuit task can be continued. The processing process of each quantum circuit task can be mainly divided into three Stage: Pull the pending tasks, translate the circuit tasks and submit the waiting results, and return the received running results to the user. The second-stage circuit task translation and submission of waiting results usually take a long time, so serial design will significantly limit task processing efficiency.

Contents of the invention

Embodiments of the present disclosure provide a quantum circuit task processing method, device, electronic equipment, computer-readable storage medium, and computer program product.

In a first aspect, an embodiment of the present disclosure proposes a quantum circuit task processing method, including: in response to the presence of at least two target quantum circuit tasks to be processed in the task queue, allocating different target quantum circuit tasks to different quantum circuits. Translation process; wherein multiple quantum circuit translation processes are pre-created based on the number of cores of the quantum processing unit of the quantum computer; each quantum circuit translation process is controlled to perform circuit translation operations on the received target quantum circuit tasks to obtain the translated quantum circuit; Control each quantum circuit translation process, submit the corresponding translated quantum circuit to the quantum computer for operation, and obtain the circuit operation results returned by the quantum computer; update the corresponding target quantum circuit task based on the circuit operation results returned by each quantum circuit translation process. Processing status.

In a second aspect, an embodiment of the present disclosure proposes a quantum circuit task processing device, including: a task allocation unit configured to respond to the presence of at least two target quantum circuit tasks to be processed in the task queue, assigning different target quantum circuits to Tasks are assigned to different quantum circuit translation processes; among them, multiple quantum circuit translation processes are pre-created based on the core number of the quantum processing unit of the quantum computer; the translation unit is configured to control each quantum circuit translation process to respond to the received target quantum The circuit task performs a circuit translation operation and obtains the translated quantum circuit; the submission quantum device operation unit is configured to control the translation process of each quantum circuit, submit the corresponding translated quantum circuit to the quantum computer for operation, and obtain the circuit operation returned by the quantum computer. Result; the processing status update unit is configured to update the processing status of the corresponding target quantum circuit task based on the circuit operation results returned by each quantum circuit translation process.

In a third aspect, embodiments of the present disclosure provide an electronic device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions that can be executed by the at least one processor. , the instruction is executed by at least one processor, so that when executed by at least one processor, the quantum circuit task processing method described in the first aspect can be implemented.

In a fourth aspect, embodiments of the present disclosure provide a non-transitory computer-readable storage medium storing computer instructions. The computer instructions are used to enable the computer to implement the quantum circuit task processing method as described in the first aspect when executed.

In a fifth aspect, embodiments of the present disclosure provide a computer program product including a computer program, which, when executed by a processor, can implement the steps of the quantum circuit task processing method described in the first aspect.

The quantum circuit task processing solution provided by the present disclosure allocates multiple quantum circuit tasks in the task queue to multiple pre-created quantum circuit translation processes, so as to process different quantum circuit tasks at the same time with the help of different quantum circuit translation processes. Perform translation operations and submit waiting for multiple quantum circuit tasks, thereby avoiding the continuous accumulation of incoming quantum circuit tasks in the task queue and improving the processing efficiency of quantum circuit tasks by quantum devices.

It should be understood that what is described in this section is not intended to identify key or important features of the embodiments of the disclosure, nor is it intended to limit the scope of the disclosure. Other features of the present disclosure will become readily understood from the following description.

Description of the drawings

Other features, objects and advantages of the present disclosure will become more apparent upon reading the detailed description of the non-limiting embodiments with reference to the following drawings:

Figure 1 is an exemplary system architecture in which the present disclosure may be applied;

Figure 2 is a flow chart of a quantum circuit task processing method provided by an embodiment of the present disclosure;

Figure 3 is a flow chart of a method for creating a process pool provided by an embodiment of the present disclosure;

Figure 4 is a flow chart of a method for allocating different target quantum circuit tasks to different quantum translation processes based on task types provided by an embodiment of the present disclosure;

Figure 5 is a flow chart of a method for allocating different target quantum circuit tasks to different quantum translation processes based on performance requirements according to an embodiment of the present disclosure;

Figure 6 is a flow chart of a method for assigning different target quantum circuits to different quantum translation processes based on tasks based on importance according to an embodiment of the present disclosure;

Figure 7 is a schematic flowchart of quantum circuit task allocation and multi-process processing in an application scenario provided by an embodiment of the present disclosure;

Figure 8 is a schematic flowchart of processing quantum circuit tasks in different task stages provided by an embodiment of the present disclosure;

Figure 9 is a structural block diagram of a quantum circuit task processing device provided by an embodiment of the present disclosure;

FIG. 10 is a schematic structural diagram of an electronic device suitable for performing a quantum circuit task processing method provided by an embodiment of the present disclosure.

Detailed ways

Exemplary embodiments of the present disclosure are described below with reference to the accompanying drawings, in which various details of the embodiments of the present disclosure are included to facilitate understanding and should be considered to be exemplary only. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the disclosure. Also, descriptions of well-known functions and constructions are omitted from the following description for clarity and conciseness. It should be noted that, as long as there is no conflict, the embodiments and features in the embodiments of the present disclosure can be combined with each other.

In the technical solution of this disclosure, the collection, storage, use, processing, transmission, provision and disclosure of user personal information are in compliance with relevant laws and regulations and do not violate public order and good customs.

FIG. 1 shows an exemplary system architecture 100 to which embodiments of quantum circuit task processing methods, apparatuses, electronic devices, and computer-readable storage media of the present disclosure may be applied.

As shown in Figure 1, the system architecture 100 may include terminal devices 101, 102, 103, a network 104 and a quantum server 105. The network 104 is used as a medium for providing communication links between the terminal devices 101, 102, 103 and the quantum server 105. Network 104 may include various connection types, such as wired, wireless communication links, or fiber optic cables, among others.

Users can use terminal devices 101, 102, and 103 to interact with the quantum server 105 through the network 104 to issue quantum circuit tasks or receive returned task running results, etc. Various applications for information communication between the terminal devices 101, 102, 103 and the quantum server 105 can be installed, such as quantum circuit drawing applications, quantum circuit task transmission applications, and quantum circuit task processing applications. Applications etc.

The terminal devices 101, 102, 103 and the quantum server 105 can be hardware or software. When the terminal devices 101, 102, and 103 are hardware, they can be various electronic devices with display screens, including but not limited to smartphones, tablet computers, laptop computers, desktop computers, etc.; when the terminal devices 101, 102 When 103 is software, it can be installed in the electronic equipment listed above. It can be implemented as multiple software or software modules, or as a single software or software module, and is not specifically limited here. When the quantum server 105 is hardware, it can be implemented as a combination of a front-end server and a quantum computer; when the quantum server 105 is software, it can be implemented as multiple simulation software or simulation software modules, or as a single simulation software or simulation Software modules are not specifically limited here.

The quantum server 105 can provide various services through various built-in applications. Taking the quantum circuit task processing application that can handle quantum circuit tasks as an example, the quantum server 105 can achieve the following effects when running the quantum circuit task processing application. : First, receive the quantum circuit tasks incoming from the terminal devices 101, 102, and 103 through the network 104; then, when there are at least two target quantum circuit tasks to be processed in the task queue, assign different target quantum circuit tasks. to different quantum circuit translation processes; among them, multiple quantum circuit translation processes are pre-created based on the core number of the quantum processing unit of the quantum computer; then, each quantum circuit translation process is controlled to perform circuit translation on the received target quantum circuit task Operation to obtain the translated quantum circuit; in the next step, control the translation process of each quantum circuit to submit the corresponding translated quantum circuit to the quantum computer for operation, and obtain the circuit operation result returned by the quantum computer; finally, return the result according to the translation process of each quantum circuit The circuit operation result is updated to update the processing status of the corresponding target quantum circuit task.

It should be pointed out that in addition to obtaining the quantum circuit tasks to be processed from the terminal devices 101, 102, and 103 through the network 104, they can also be pre-stored locally on the quantum server 105 through various methods. Therefore, when the quantum server 105 detects that the data has been stored locally (for example, before starting to process a pending quantum circuit task that was left before processing), it can choose to obtain the data directly from the local. In this case, the exemplary system architecture 100 Terminal devices 101, 102, 103 and network 104 may not be included.

The quantum circuit task processing methods provided in subsequent embodiments of the present disclosure are generally executed by the quantum server 105 connected to a quantum computer or quantum device. Correspondingly, the quantum circuit task processing device is generally also provided in the quantum server 105.

It should be understood that the numbers of terminal devices, networks and quantum servers in Figure 1 are only illustrative. Depending on implementation needs, there can be any number of end devices, networks, and quantum servers.

Please refer to Figure 2, which is a flow chart of a quantum circuit task processing method provided by an embodiment of the present disclosure. The process 200 includes the following steps:

Step 201: In response to the presence of at least two target quantum circuit tasks to be processed in the task queue, allocate different target quantum circuit tasks to different quantum circuit translation processes;

This step is intended for the execution subject of the quantum circuit task processing method (such as the quantum server 105 shown in Figure 1) to confirm that there are multiple (that is, at least two) target quantum circuit tasks to be processed in the task queue. The target quantum circuit tasks are assigned to different quantum circuit translation processes.

Among them, multiple quantum circuit translation processes are pre-created based on the core number of the quantum processing unit of the quantum computer. For example, when the core number of the quantum processing unit (Quantum Processing Unit, QPU) of the quantum computer is 4, 4 quantum circuit translation processes can be pre-created. Circuit translation process, that is, each core corresponds to a quantum circuit translation process, that is, each core is responsible for one quantum circuit translation process. Of course, when a single core can be responsible for more quantum circuit translation processes, a larger number can be created in advance. The quantum circuit translation process is not specifically limited here.

Specifically, when allocating each target quantum circuit task to each quantum circuit translation process, various allocation criteria can also be combined, such as combining task type, task performance requirements, task importance, minimum time required for the task, etc. , assign it to the quantum circuit translation process that can meet its requirements, that is, it is also necessary to distinguish the different quantum circuit translation processes created in advance.

Step 202: Control each quantum circuit translation process to perform a circuit translation operation on the received target quantum circuit task to obtain the translated quantum circuit;

On the basis of step 201, this step aims to have the above-mentioned execution subject control each quantum circuit translation process to perform a circuit translation operation on the received target quantum circuit task to obtain a translated quantum circuit.

That is, each quantum circuit translation process will first translate the original quantum circuit model contained in the target quantum circuit task assigned to itself, and obtain the translated quantum circuit.

Step 203: Control the translation process of each quantum circuit, submit the corresponding translated quantum circuit to the quantum computer for operation, and obtain the circuit operation result returned by the quantum computer;

On the basis of step 202, this step aims to have the above-mentioned execution subject control each quantum circuit translation process, submit the corresponding translated quantum circuit to the quantum computer for operation, and obtain the circuit operation result returned by the quantum computer after the operation is completed.

Based on the above two steps, it can be seen that the operations responsible for the quantum circuit translation process include: translating the received original quantum circuit model into a quantum circuit that is identifiable and executable by the underlying quantum device, and sending the translated quantum circuit to the quantum circuit. device to run, and finally receive the operating results returned by the quantum device.

Step 204: Update the processing status of the corresponding target quantum circuit task according to the circuit operation results returned by each quantum circuit translation process.

Based on step 203, this step aims to update the processing status of the corresponding target quantum circuit task based on the circuit operation results returned by each quantum circuit translation process by the above execution subject.

That is, the update of the processing status can be specifically: updating the processing status of the target quantum circuit task from the previous pending status to the processing completed status. In addition, if the circuit operation result is empty or an abnormal result, the processing status of the target quantum circuit task can also be updated from the previous pending status to the processing exception status.

The quantum circuit task processing method provided by the embodiment of the present disclosure allocates multiple quantum circuit tasks in the task queue to multiple pre-created quantum circuit translation processes, so as to process different quantum circuit tasks simultaneously with the help of different quantum circuit translation processes. It can perform translation operations and submit waiting for multiple quantum circuit tasks at the same time, thereby avoiding the continuous accumulation of incoming quantum circuit tasks in the task queue and improving the processing efficiency of quantum circuit tasks by quantum devices.

Please refer to Figure 3, which is a flow chart of a method for creating a process pool provided by an embodiment of the present disclosure. The process 300 includes the following steps:

Step 301: Determine the number of cores of the quantum processing unit of the quantum computer;

Step 302: Create a quantum circuit translation process consistent with the number of cores;

Step 303: Create a process pool to store the translation processes of each quantum circuit.

In this embodiment, among the solutions provided in steps 301 to 303, on the basis of determining the number of cores of the quantum processing unit, one processing core is responsible for one quantum circuit translation process, and a number of quantum computers consistent with the number of cores are created. Circuit translation process, and create a process pool for storing each quantum circuit translation process, so that the quantum circuit translation process can be called and managed directly based on the process pool.

For example, based on the solution provided in this example, the task allocation step of step 201 in the above embodiment can be embodied as: allocating different target quantum circuit tasks to different quantum circuit translation processes in the process pool.

Specifically, when the number of target quantum circuit tasks is less than the number of idle quantum circuit translation processes in the process pool, a corresponding number of idle quantum circuit translation processes can be selected based on the preset process selection strategy to process the target quantum circuit tasks one by one. , Furthermore, process selection strategies can be diverse, such as random selection, selection based on idle time, selection based on process health status, selection based on the number of tasks executed in the history of the process, etc.; while the number of tasks in the target quantum circuit is greater than the number of processes When there are many idle quantum circuit translation processes in the pool, you can first call all idle quantum circuit translation processes to process a batch of target quantum circuit tasks, and then activate some of the quantum circuit translation processes that previously processed the dormant state to continue processing the remaining targets. Quantum circuit task, or wait for the quantum circuit translation process that was previously processing the task to return to the idle state to continue assigning it a new target quantum circuit task.

Furthermore, it is also possible to control only a preset number of quantum circuit translation processes in the process pool to be in a normal idle waiting state, while the remaining number of quantum circuit translation processes are controlled to be in a dormant state to avoid excessive quantum circuit translation. Processes are all in the idle waiting state, which occupies too much and too long a limited memory resource. That is, being in a dormant state can minimize the process's occupancy of memory resources, and is also conducive to rapid translation of quantum circuits when more processes are really needed. Activating it returns it to an idle waiting state faster than rebuilding a new quantum circuit translation process. Among them, the preset number is determined based on the average number of target quantum circuit tasks in the task queue, so that the quantum circuit translation process in the idle waiting state can meet the task usage requirements most of the time as much as possible to provide multi-process concurrency with maximum effect. Effect.

Furthermore, quantum circuit translation processes that have been in dormant state for longer than the preset time can also be destroyed. That is, if a quantum circuit translation process continues to be dormant for more than the preset time, it means that it has not been activated for a long time. Therefore, in order to further reduce its occupation of limited memory resources, such quantum circuit translation processes will be destroyed. Release the memory resources used to form the process.

In order to enhance the understanding of how to allocate different quantum circuit tasks to different quantum circuit translation processes, this disclosure also introduces the allocation process in different task allocation methods through the following multiple embodiments.

First, please refer to Figure 4. Figure 4 is a flow chart of a method for allocating different target quantum circuit tasks to different quantum translation processes based on task types provided by an embodiment of the present disclosure. The process 400 includes the following steps:

Step 401: Attach different task type labels to different pre-created quantum circuit translation processes;

That is, this step is intended for the above execution subject to attach different task type labels to different pre-created quantum circuit translation processes. That is, different task type labels can mean that the quantum circuit translation process where the label is located is dedicated to processing a certain task type. of quantum circuit tasks.

The classification criteria of task types can be determined by oneself according to the actual situation and actual needs. For example, the scale of the original quantum circuit model corresponding to the quantum circuit task, the number and complexity of the quantum gate circuits included, and the purpose of the task can be distinguished. There are no specific limitations here.

Step 402: Determine the respective task types of each target quantum circuit task;

Step 403: Assign the target quantum circuit tasks of the same task type to the quantum circuit translation process with the corresponding task type label.

Steps 402 to 403 first determine the task types corresponding to each target quantum circuit task, and then allocate the target quantum circuit tasks of the same task type to quantum circuits with corresponding task type labels according to the consistency of the task types. The translation process aims to maximize the processing efficiency of each quantum circuit translation process by making the quantum circuit translation process suitable for processing a certain type of quantum circuit task process the corresponding type of quantum circuit task.

Please refer to Figure 5. Figure 5 is a flow chart of a method for allocating different target quantum circuit tasks to different quantum translation processes based on performance requirements according to an embodiment of the present disclosure. The process 500 includes the following steps:

Step 501: Allocate different amounts of performance resources to different quantum circuit translation processes when they are created;

Step 502: According to the amount of allocated performance resources, attach a performance label that distinguishes high and low performance to the corresponding quantum circuit translation process;

Steps 501 to 502 aim to allocate different amounts of performance resources (such as the upper limit of processing resource occupancy, the upper limit of memory resource occupancy, the upper limit of video memory resource occupancy, etc.) to the different pre-created quantum circuit translation processes by the above-mentioned execution subject, that is, different performance Tags can mean that the quantum circuit translation process where the tag is located has different levels of performance resources, which means that its performance is different.

Performance tags can be simply divided into: weak performance tags and strong performance tags. They can also be divided into multiple levels according to the strength of their performance. For example, according to performance from weak to strong, they can be divided into: first-level performance tags, second-level performance tags, and third-level performance tags. Performance label, level four performance label.

Step 503: Determine the respective task performance requirements of each target quantum circuit task;

Step 504: Assign each target quantum circuit task to a quantum circuit translation process attached with a performance tag indicating corresponding performance.

Steps 503 to 504 first determine the task performance requirements corresponding to each target quantum circuit task, and then allocate each target quantum circuit task to the quantum circuit translation process with a performance tag indicating the corresponding performance, in order to achieve the goal of achieving the target quantum circuit task by The quantum circuit translation process with the required performance is used to process the quantum circuit tasks with corresponding performance requirements, so that each quantum circuit translation process can indeed handle the corresponding quantum circuit task, rather than being unable to process a certain quantum circuit task due to insufficient performance. Failure, waste of processing resources.

Please refer to Figure 6. Figure 6 is a flow chart of a method for allocating different target quantum circuits to different quantum translation processes based on importance based on an embodiment of the present disclosure. The process 600 includes the following steps:

Step 601: Attach different importance labels to different pre-created quantum circuit translation processes;

That is, this step is intended for the above execution subject to attach different importance labels to different pre-created quantum circuit translation processes. That is, different importance labels can mean that the quantum circuit translation process where the label is located is dedicated to processing requirements with corresponding importance levels. of quantum circuit tasks.

The criteria for classifying the degree of importance can be determined by oneself based on the actual situation and actual needs. For example, the scale of the original quantum circuit model corresponding to the quantum circuit task, the number and complexity of the quantum gate circuits included, as well as the purpose of the task and the permissions of the user submitting the task. Levels and other parameters have differentiating parameters and are not specifically limited here.

Step 602: Determine the importance of each target quantum circuit task;

Step 603: Allocate each target quantum circuit task to a quantum circuit translation process attached with a corresponding importance label.

Steps 602 to 603 first determine the corresponding importance of each target quantum circuit task, and then assign the higher importance rather than the lower importance (that is, the quantum circuit tasks requiring a certain degree of importance need to be assigned to tasks that can at least handle the tasks). The quantum circuit translation process of the quantum circuit task with the importance level), allocate each target quantum circuit task to the quantum circuit translation process with the corresponding importance level label, in order to process the corresponding quantum circuit by using the appropriate quantum circuit translation process Task, so that each quantum circuit translation process meets the importance required by the task, and provides corresponding importance guarantee for tasks requiring corresponding importance.

Furthermore, if it is found that there are also high-importance tasks in the target quantum circuit task (that is, the target quantum circuit task has an importance that exceeds the preset importance level), the high-importance task can also be assigned to at least two different quantum tasks at the same time. The circuit translation process, and simultaneously updates the processing status of high-importance tasks based on the circuit operation results returned by at least two different quantum circuit translation processes. To avoid as much as possible the processing errors caused by a single quantum circuit translation process to handle this high-importance task, and to ensure the accuracy of the circuit operation results obtained, that is, only when at least two different quantum circuit translation processes each return a circuit Only when the running results are consistent (that is, when there is an error in the result, the error should be ensured to be within the allowable range), the obtained circuit running result is considered to be accurate, and then the processing status of the high-importance task is updated.

In order to deepen understanding, this disclosure also provides a specific implementation plan combined with a specific application scenario:

In order to make the currently rare quantum resources available to as many users as possible, localized quantum device resources are encapsulated on the cloud in this scenario, so that they can not only meet the incoming usage needs of local users, but also receive remote End-access users pass in their usage requirements based on the use of cloud services. In order to better meet the usage requirements, an agent (Agent) is also created for managing usage requirements in this scenario, and the main business in the Agent can be detached. It is divided into three sub-processes: TaskPuller, TaskRunner and TaskPusher, and the sub-processes rely on database collaboration.

Among them, the TaskPuller sub-process is responsible for collecting the tasks to be executed in the real machine task queue on the server side. The process is executed synchronously, and only one task is pulled for processing at a time. That is, the TaskPuller process completes basic information extraction and initialization of the task and then writes the task into the local database;

The TaskRunner sub-process is responsible for adapting the circuit to the target underlying device (i.e., quantum computer or quantum device) and submitting it for operation. It can be divided into three parts: preprocessing (PRE), operation (RUN), and post-processing (POST). That is, the preprocessing part is responsible for translating the received original quantum circuit model into a circuit model or operation execution that can be recognized and runnable by a quantum computer or quantum device; the operation part is responsible for converting the processed into a circuit model or operation execution that can be recognized and runnable by a quantum computer or quantum device. After the translated quantum circuit is submitted to a quantum computer or quantum device, you can use the submission function synchronization option provided by the quantum computer or quantum device. After submission, wait for the function to return the calculation result, so the running phase actually includes submitting and waiting for the bottom layer to return the result; The processing part is responsible for processing the results returned by quantum computers or quantum devices. The processing process varies according to the underlying system. Sometimes it includes some calculations, and sometimes it can also translate the results into an accepted format and return them directly;

The TaskPusher sub-process carries the result data and uploads it to the server. It is executed synchronously within the process. Only one task is uploaded from the database at a time.

Since each process has to write the processed tasks into the local database and modify the task status to the next stage, when each process pulls tasks from the database, it will find the corresponding task to be processed based on the task status. Each process A process can only handle one task at a time. Under the conventional technical architecture, circuit tasks are sequentially transferred and executed by each process in the Agent. Each process is executed synchronously, which is inefficient.

In view of the shortcomings of the existing serial technology architecture solution, this embodiment provides a multi-process optimization solution for QPU Agent that parallelizes the task processing process. It improves execution efficiency through parallelization and supports adaptation to multi-core QPU. That is, this solution designs a structure that supports the expansion of TaskRunner sub-processes based on the existing Agent.

The following will introduce the multi-process optimization part in detail from the overall architecture design and design ideas:

Architecture design

From the above introduction to the functions of the three sub-processes of TaskPuller, TaskRunner and TaskPusher, it is not difficult to see that TaskPuller and TaskPusher are mainly used to collect tasks. There is no complex functional logic in the process and they are all connected to the server. Therefore, for these two processes The time consumed in operation is not the main goal that needs to be paid attention to and needs to be optimized. The circuit processing in Agent is basically included in TaskRunner, and this process is responsible for connecting with the underlying hardware system and waiting for the results to be returned. When the platform receives a large number of tasks, these tasks will accumulate in the database table between TaskPuller and TaskRunner. Therefore, this embodiment aims at the TaskRunner process as the target that needs to be optimized and designed.

Design ideas

The bottleneck of Agent is that TaskRunner takes too long to execute. Since there is no dependency between each circuit task processed by the Agent, TaskRunner can be parallelized. The design idea is to expand the number of TaskRunner runs. Change the Agent from the original single TaskRunner sub-process framework to support running multiple TaskRunners.

In addition, considering that Agent is a tool that helps the cloud platform connect to various underlying device systems, whether to adopt TaskRunner's multi-process docking method also depends on the docking system, which may not necessarily support multi-process submission. Therefore, in the design, the Agent must be compatible with running a single process and multiple processes at the same time, and the number of TaskRunners needs to be flexibly adjusted.

In single-process mode, TaskRunner can take out and run tasks with a status of pulled (to be processed) in order according to the state attribute of the tasks in the database. After the operation is completed, the task results are updated to the database and the status is updated to executed (processing completed) status. The Agent updates the state to allow tasks to continue flowing downwards.

In multi-process mode, please refer to the schematic diagrams shown in Figure 7 and Figure 8. Each TaskRunner process locks the database when reading the database to ensure that only one process can access it at the same time. In order to prevent multiple TaskRunners from taking the same task, an intermediate state occupied (occupied state) is also added, which is used to describe that the current task has been taken away and run by a TaskRunner process. After TaskRunner obtains a task with a status of pulled, it must complete the operation of updating the task status to occupied in one lock, thereby ensuring that no other process will obtain the same task after the lock is released.

In addition, the fine-grained issues of Agent need to be considered. Under the existing solution, no matter when the Agent is shut down, the task will not be lost after restarting. It relies on placing tasks in the database and managing their status. When a new state occupied is added to support multi-process mode, the Agent is shut down while the task is in this state. Then the next time it is restarted, the task in the occupied state will no longer be read and re-run by any TaskRunner. This also destroys the fine-grainedness of the current Agent. In response to this, the solution also needs to add logic to the Agent's daemon process to roll back the occupied state in the database to the pulled state every time it is started.

To control the number of TaskRunner processes, configure environment variables. The daemon starts the corresponding process according to the given number each time it runs. The number of processes can be configured from 1 to N. It should be noted that in multi-process mode, tasks are obtained from the server in the order of creation, but there is no guarantee that the underlying execution will also follow this order. Each task takes different time in preprocessing depending on the size of the circuit. It is possible that the tasks created later will be processed quickly in TaskRunner2 and exceed the tasks that are still being preprocessed in the TaskRunner1 process, and will be submitted to the underlying system first. At this time, there will be a situation where the task created later is executed than the task created first. However, this situation is insensitive to the user. Moreover, when two tasks are submitted with a very small gap between them, prioritizing the execution of smaller circuits is also a strategy to optimize the waiting time as a whole.

Through the above multi-process optimization scheme, QPU Agent is provided with a way to implement parallel processing tasks. The benefits brought by this parallelization are reflected in the improvement in efficiency when the Agent handles concurrent tasks and the Agent's call to the underlying system interface. From the perspective of the cloud platform, Agent is a link in the chain of running real machine tasks. Improving its internal task processing efficiency will directly feed back to the user's use. From the perspective of the underlying hardware system, Agent provides a service for multiple processes to submit tasks to the underlying layer, which is also a necessary support for improving hardware utilization and making full use of hardware resources. This can help the platform become more competitive by optimizing the user experience and improving the utilization of underlying resources.

With further reference to Figure 9, as an implementation of the methods shown in the above figures, the present disclosure provides an embodiment of a quantum circuit task processing device. The device embodiment corresponds to the method embodiment shown in Figure 2. The device Specifically, it can be applied to various electronic devices.

As shown in Figure 9, the quantum circuit task processing device 900 of this embodiment may include: a task allocation unit 901, a translation unit 902, a quantum device operation submission unit 903, and a processing status update unit 904. Among them, the task allocation unit 901 is configured to respond to the existence of at least two target quantum circuit tasks to be processed in the task queue, and allocate different target quantum circuit tasks to different quantum circuit translation processes; wherein, based on the central processing unit of the quantum computer The core number of the processor is pre-created with multiple quantum circuit translation processes; the translation unit 902 is configured to control each quantum circuit translation process to perform a circuit translation operation on the received target quantum circuit task to obtain the translated quantum circuit; submit the quantum device The operation unit 903 is configured to control the translation process of each quantum circuit, submit the corresponding translated quantum circuit to the quantum computer for operation, and obtain the circuit operation results returned by the quantum computer; the processing status update unit 904 is configured to control the translation process of each quantum circuit according to the The circuit operation result returned by the translation process updates the processing status of the corresponding target quantum circuit task.

In this embodiment, in the quantum circuit task processing device 900: the task allocation unit 901, the translation unit 902, the submission quantum device operation unit 903, and the processing status update unit 904. The specific processing and the technical effects thereof can be referred to Fig. 2 corresponds to the relevant descriptions of steps 201-204 in the embodiment, which will not be described again here.

In some optional implementations of this embodiment, the quantum circuit task processing device 900 may also include:

a core number determination unit configured to determine the number of cores of the central processor of the quantum computer;

The quantum circuit translation process creation unit is configured to create a quantum circuit translation process consistent with the number of cores;

The process pool creation unit is configured to create a process pool that stores the translation processes of each quantum circuit;

Correspondingly, the task allocation unit 901 can be further configured to:

Allocate different target quantum circuit tasks to different quantum circuit translation processes in the process pool.

In some optional implementations of this embodiment, the quantum circuit task processing device 900 may also include:

The process state control unit is configured to control a preset number of quantum circuit translation processes in the process pool to be in an idle waiting state, and the remaining number of quantum circuit translation processes to be in a dormant state; wherein, the preset number is based on the number of target quantum circuit tasks in the task queue. The average quantity is determined.

In some optional implementations of this embodiment, the quantum circuit task processing device 900 may also include:

The process destruction unit is configured to destroy the quantum circuit translation process whose dormant state lasts for more than a preset period of time.

In some optional implementations of this embodiment, the quantum circuit task processing device 900 may also include:

The task type label attaching unit is configured to attach different task type labels to different pre-created quantum circuit translation processes;

Correspondingly, the task allocation unit 901 can be further configured to:

Determine the respective task types of each target quantum circuit task;

Assign target quantum circuit tasks of the same task type to quantum circuit translation processes with corresponding task type labels;

In some optional implementations of this embodiment, the quantum circuit task processing device 900 may also include:

The performance resource allocation unit is configured to allocate different amounts of performance resources to different quantum circuit translation processes when they are created;

The performance label attachment unit is configured to attach a performance label that distinguishes high and low performance to the corresponding quantum circuit translation process according to the amount of allocated performance resources;

Correspondingly, the task allocation unit 901 can be further configured to:

Determine the respective task performance requirements for each target quantum circuit task;

Each target quantum circuit task is assigned to a quantum circuit translation process appended with a performance tag characterizing the corresponding performance.

In some optional implementations of this embodiment, the quantum circuit task processing device 900 may also include:

The importance label attaching unit is configured to attach different importance labels to different pre-created quantum circuit translation processes;

Correspondingly, the task allocation unit 901 can be further configured to:

Determine the importance of each target quantum circuit task;

Allocate each target quantum circuit task to a quantum circuit translation process attached with a corresponding importance label.

In some optional implementations of this embodiment, the quantum circuit task processing device 900 may also include:

The high-importance task allocation unit is configured to respond to the existence of a high-importance task in the target quantum circuit task and allocate the high-importance task to at least two different quantum circuit translation processes at the same time; wherein the high-importance task is a task with more than Target quantum circuit tasks with preset levels of importance;

The high-importance task processing status update unit is configured to simultaneously update the processing status of the high-importance task based on the circuit operation results returned by at least two different quantum circuit translation processes.

This embodiment exists as a device embodiment corresponding to the above method embodiment. The quantum circuit task processing device provided by this embodiment allocates multiple quantum circuit tasks in the task queue to multiple pre-created quantum circuit translation processes. Different quantum circuit translation processes are used to process different quantum circuit tasks at the same time to perform translation operations and submit waiting for multiple quantum circuit tasks at the same time, thereby avoiding the continuous accumulation of incoming quantum circuit tasks in the task queue and improving the efficiency of quantum devices. Processing efficiency of quantum circuit tasks.

According to an embodiment of the present disclosure, the present disclosure also provides an electronic device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores information that can be executed by the at least one processor. instructions, which are executed by at least one processor, so that when executed by at least one processor, the quantum circuit task processing method described in any of the above embodiments can be implemented.

According to an embodiment of the present disclosure, the present disclosure also provides a readable storage medium that stores computer instructions. The computer instructions are used to enable the computer to implement the quantum circuit tasks described in any of the above embodiments when executed. Approach.

According to an embodiment of the present disclosure, the present disclosure also provides a computer program product, which when executed by a processor can implement the quantum circuit task processing method described in any of the above embodiments.

Figure 10 shows a schematic block diagram of an example electronic device 1000 that may be used to implement embodiments of the present disclosure. Electronic devices are intended to refer to various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. Electronic devices may also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are examples only and are not intended to limit implementations of the disclosure described and/or claimed herein.

As shown in FIG. 10 , the device 1000 includes a computing unit 1001 that can execute according to a computer program stored in a read-only memory (ROM) 1002 or loaded from a storage unit 1008 into a random access memory (RAM) 1003 Various appropriate actions and treatments. In the RAM 1003, various programs and data required for the operation of the device 1000 can also be stored. Computing unit 1001, ROM 1002 and RAM 1003 are connected to each other via bus 1004. An input/output (I/O) interface 1005 is also connected to bus 1004.

Multiple components in the device 1000 are connected to the I/O interface 1005, including: input unit 1006, such as a keyboard, mouse, etc.; output unit 1007, such as various types of displays, speakers, etc.; storage unit 1008, such as a magnetic disk, optical disk, etc. ; and communication unit 1009, such as a network card, modem, wireless communication transceiver, etc. The communication unit 1009 allows the device 1000 to exchange information/data with other devices through computer networks such as the Internet and/or various telecommunications networks.

Computing unit 1001 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of the computing unit 1001 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, digital signal processing processor (DSP), and any appropriate processor, controller, microcontroller, etc. The computing unit 1001 performs various methods and processes described above, such as quantum circuit task processing methods. For example, in some embodiments, the quantum circuit task processing method may be implemented as a computer software program that is tangibly embodied in a machine-readable medium, such as storage unit 1008. In some embodiments, part or all of the computer program may be loaded and/or installed onto device 1000 via ROM 1002 and/or communication unit 1009 . When the computer program is loaded into RAM 1003 and executed by computing unit 1001, one or more steps of the quantum circuit task processing method described above may be performed. Alternatively, in other embodiments, the computing unit 1001 may be configured to perform the quantum circuit task processing method in any other suitable manner (eg, by means of firmware).

Various implementations of the systems and techniques described above may be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on a chip implemented in a system (SOC), load programmable logic device (CPLD), computer hardware, firmware, software, and/or a combination thereof. These various embodiments may include implementation in one or more computer programs executable and/or interpreted on a programmable system including at least one programmable processor, the programmable processor The processor, which may be a special purpose or general purpose programmable processor, may receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device. An output device.

Program code for implementing the methods of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing device, such that the program codes, when executed by the processor or controller, cause the functions specified in the flowcharts and/or block diagrams/ The operation is implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of this disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media may include, but are not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media would include one or more wire-based electrical connections, laptop disks, hard drives, random access memory (RAM), read only memory (ROM), erasable programmable read only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination of the above.

To provide interaction with a user, the systems and techniques described herein may be implemented on a computer having a display device (eg, a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user ); and a keyboard and pointing device (eg, a mouse or a trackball) through which a user can provide input to the computer. Other kinds of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and may be provided in any form, including Acoustic input, voice input or tactile input) to receive input from the user.

The systems and techniques described herein may be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., A user's computer having a graphical user interface or web browser through which the user can interact with implementations of the systems and technologies described herein), or including such backend components, middleware components, or any combination of front-end components in a computing system. The components of the system may be interconnected by any form or medium of digital data communication (eg, a communications network). Examples of communication networks include: local area network (LAN), wide area network (WAN), and the Internet.

Computer systems may include clients and servers. Clients and servers are generally remote from each other and typically interact over a communications network. The relationship of client and server is created by computer programs running on corresponding computers and having a client-server relationship with each other. The server can be a cloud server, also known as cloud computing server or cloud host. It is a host product in the cloud computing service system to solve the management difficulties existing in traditional physical host and virtual private server (VPS) services. Large, weak business scalability.

According to the technical solution of the embodiment of the present disclosure, multiple quantum circuit tasks in the task queue are assigned to multiple pre-created quantum circuit translation processes, so that different quantum circuit tasks can be processed simultaneously with the help of different quantum circuit translation processes to simultaneously process Multiple quantum circuit tasks perform translation operations and submit waiting, thereby avoiding the continuous accumulation of incoming quantum circuit tasks in the task queue and improving the processing efficiency of quantum circuit tasks by quantum devices.

It should be understood that various forms of the process shown above may be used, with steps reordered, added or deleted. For example, each step described in the present disclosure can be executed in parallel, sequentially, or in a different order. As long as the desired results of the technical solution disclosed in the present disclosure can be achieved, there is no limitation here.

The above-mentioned specific embodiments do not constitute a limitation on the scope of the present disclosure. It will be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions are possible depending on design requirements and other factors. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of this disclosure shall be included in the protection scope of this disclosure.

Claims (18)

1. A quantum circuit task processing method, comprising:

in response to at least two target quantum circuit tasks to be processed existing in the task queue, distributing different target quantum circuit tasks to different quantum circuit translation processes; the quantum computer-based quantum processing unit has a plurality of quantum circuit translation processes created in advance, and the allocation of the target quantum circuit tasks is performed according to preset allocation standards, wherein the allocation standards comprise: at least one of task type, task performance requirements, task importance, and minimum time required for a task;

controlling each quantum circuit translation process to perform circuit translation operation on the received target quantum circuit task to obtain a translated quantum circuit;

controlling each quantum circuit translation process to submit a corresponding translated quantum circuit to the quantum computer for operation, and obtaining a circuit operation result returned by the quantum computer;

and updating the processing state of the corresponding target quantum circuit task according to the circuit operation result returned by each quantum circuit translation process.

2. The method of claim 1, further comprising:

Determining the core number of a quantum processing unit of the quantum computer;

creating quantum circuit translation processes consistent with the number of cores;

creating a process pool for storing translation processes of each quantum circuit;

correspondingly, the task of assigning different target quantum circuits to different quantum circuit translation processes includes:

different target quantum circuit tasks are assigned to different quantum circuit translation processes in the process pool.

3. The method of claim 2, further comprising:

controlling a preset number of quantum circuit translation processes in the process pool to be in an idle waiting state and the rest number of quantum circuit translation processes to be in a dormant state; and determining the preset number according to the average number of the target quantum circuit tasks in the task queue.

4. A method according to claim 3, further comprising:

and destroying the quantum circuit translation process of which the dormant state lasts for more than a preset time length.

5. The method of any of claims 1-4, further comprising:

respectively attaching different task type labels to different sub-circuit translation processes which are created in advance;

correspondingly, the task of assigning different target quantum circuits to different quantum circuit translation processes includes:

Determining respective task types of the target quantum circuit tasks;

the target quantum circuit tasks of the same task type are assigned to quantum circuit translation processes for tags with corresponding task types.

6. The method of any of claims 1-4, further comprising:

allocating different amounts of performance resources at creation time for different quantum circuit translation processes;

according to the quantity of the allocated performance resources, adding performance labels for distinguishing performance from performance to performance for the corresponding quantum circuit translation process;

correspondingly, the task of assigning different target quantum circuits to different quantum circuit translation processes includes:

determining respective task performance requirements of each target quantum circuit task;

each of the target quantum circuit tasks is assigned to a quantum circuit translation process with a performance tag attached thereto that characterizes a corresponding performance.

7. The method of any of claims 1-4, further comprising:

different importance labels are respectively attached to different pre-established sub-circuit translation processes;

correspondingly, the task of assigning different target quantum circuits to different quantum circuit translation processes includes:

determining the respective importance degree of each target quantum circuit task;

Each of the target quantum circuit tasks is assigned to a quantum circuit translation process to which a corresponding importance tag is attached.

8. The method of claim 7, further comprising:

in response to the presence of a high importance task in the target quantum circuit tasks, simultaneously assigning the high importance task to at least two different quantum circuit translation processes; wherein the high importance task is a target quantum circuit task having an importance degree exceeding a preset importance degree;

and updating the processing state of the high-importance task according to the circuit operation results returned by the at least two different quantum circuit translation processes.

9. A quantum circuit task processing device, comprising:

a task allocation unit configured to allocate different target quantum circuit tasks to different quantum circuit translation processes in response to at least two target quantum circuit tasks to be processed existing in the task queue; the quantum computer-based quantum processing unit has a plurality of quantum circuit translation processes created in advance, and the allocation of the target quantum circuit tasks is performed according to preset allocation standards, wherein the allocation standards comprise: at least one of task type, task performance requirements, task importance, and minimum time required for a task;

A translation unit configured to control each of the quantum circuit translation processes to perform a circuit translation operation on the received target quantum circuit task to obtain a translated quantum circuit;

the submitting quantum equipment operation unit is configured to control each quantum circuit translation process to submit a corresponding translated quantum circuit to the quantum computer for operation, and obtain a circuit operation result returned by the quantum computer;

and the processing state updating unit is configured to update the processing state of the corresponding target quantum circuit task according to the circuit operation result returned by each quantum circuit translation process.

10. The apparatus of claim 9, further comprising:

a core number determination unit configured to determine a core number of a quantum processing unit of the quantum computer;

a quantum circuit translation process creation unit configured to create quantum circuit translation processes in accordance with the number of cores;

a process pool creation unit configured to create a process pool storing each of the quantum circuit translation processes;

correspondingly, the task allocation unit is further configured to:

different target quantum circuit tasks are assigned to different quantum circuit translation processes in the process pool.

11. The apparatus of claim 10, further comprising:

the process state control unit is configured to control a preset number of quantum circuit translation processes in the process pool to be in an idle waiting state and the rest number of quantum circuit translation processes to be in a dormant state; and determining the preset number according to the average number of the target quantum circuit tasks in the task queue.

12. The apparatus of claim 11, further comprising:

and the process destroying unit is configured to destroy the quantum circuit translation process of which the dormant state lasts for more than a preset time period.

13. The apparatus of any of claims 9-12, further comprising:

the task type tag attaching unit is configured to attach different task type tags to different sub-circuit translation processes created in advance respectively;

correspondingly, the task allocation unit is further configured to:

determining respective task types of the target quantum circuit tasks;

the target quantum circuit tasks of the same task type are assigned to quantum circuit translation processes for tags with corresponding task types.

14. The apparatus of any of claims 9-12, further comprising:

A performance resource allocation unit configured to allocate different amounts of performance resources at creation time for different quantum circuit translation processes;

a performance tag attaching unit configured to attach a performance tag for distinguishing performance from performance to performance for the corresponding quantum circuit translation process according to the number of allocated performance resources;

correspondingly, the task allocation unit is further configured to:

determining respective task performance requirements of each target quantum circuit task;

each of the target quantum circuit tasks is assigned to a quantum circuit translation process with a performance tag attached thereto that characterizes a corresponding performance.

15. The apparatus of any of claims 9-12, further comprising:

an importance tag attaching unit configured to attach different importance tags to different sub-circuit translation processes created in advance, respectively;

correspondingly, the task allocation unit is further configured to:

determining the respective importance degree of each target quantum circuit task;

each of the target quantum circuit tasks is assigned to a quantum circuit translation process to which a corresponding importance tag is attached.

16. The apparatus of claim 15, further comprising:

A high importance task allocation unit configured to allocate the high importance task to at least two different quantum circuit translation processes simultaneously in response to the presence of a high importance task in the target quantum circuit tasks; wherein the high importance task is a target quantum circuit task having an importance degree exceeding a preset importance degree;

and the high-importance task processing state updating unit is configured to update the processing state of the high-importance task according to the circuit operation results returned by the at least two different quantum circuit translation processes.

17. An electronic device, comprising:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein,

the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the quantum circuit task processing method of any one of claims 1-8.

18. A non-transitory computer-readable storage medium storing computer instructions for causing the computer to perform the quantum circuit task processing method of any one of claims 1-8.