CN115987225B - A differential input circuit, differential input processing method and chip - Google Patents
A differential input circuit, differential input processing method and chipInfo
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- CN115987225B CN115987225B CN202310065518.2A CN202310065518A CN115987225B CN 115987225 B CN115987225 B CN 115987225B CN 202310065518 A CN202310065518 A CN 202310065518A CN 115987225 B CN115987225 B CN 115987225B
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Abstract
The embodiment of the application provides a differential input circuit and a chip, and relates to the technical field of integrated circuits. In the differential input circuit, the main input tube module comprises at least two stages of bipolar junction transistors, and the base electrode of the latter stage transistor is connected with the first end of the former stage transistor. By the voltage superposition between the first end and the base electrode of the multi-stage transistor, compared with the voltage of the first end and the base electrode of a single transistor, the voltage difference of the whole main input tube module is improved obviously, the sensitivity of the main input tube module to smaller input signals can be kept, the following module and the voltage control module can play the role of following and regulating the voltage in the high common mode, the voltage withstand voltage of the input end of the differential input circuit is also higher, a better working point can be provided for the input of an operational amplifier or a comparator, and the index performance of the circuit in the low common mode voltage and the high common mode voltage is improved.
Description
Technical Field
The present application relates to the field of integrated circuits, and more particularly, to an input circuit and a chip for an integrated operational amplifier.
Background
The integrated operational amplifier (abbreviated as operational amplifier) has an input terminal, a circuit with an input terminal inside the integrated operational amplifier, and a comparator is the same as the integrated operational amplifier. The differential input circuit may amplify the signal inputted from the input terminal.
When the voltage at the differential input connection is too small, it is difficult to detect the signal. When the voltage at the differential input connection is too high, the internal device may be damaged. The withstand voltage at the input of a high voltage differential circuit is typically less than the maximum supply voltage of the circuit. The prior art provides a differential voltage-resistant protection method:
As shown IN fig. 1, two lines of the rightmost main input tube mp_in are taken as inputs of the integrated operational amplifier, taking mp_in1 as an example, a thick dotted line represents a path for calculating a drain voltage, an input signal inn_g is input to a gate of the main input tube mp_in1 and is also input to a gate of mp_in3, a voltage of a drain of the main input tube mp_in1 is denoted as Vx, a voltage difference between the gate and the source is denoted as VGS, and a voltage difference between the drain and the source is denoted as VDS, and the following relationship is provided:
Vx=INN_G+MP_IN3_VGS-MP_DIO1_VGS-MP_DIO2_VGS+HV_P1_VGS
the voltage difference between the drain and source of the main input pipe mp_in1 has the following relationship:
MP_IN1_VDS=INN_G+MP_IN1_VGS–Vx=MP_IN1_VGS-MP_IN3_VGS+MP_DIO1_VGS+MP_DIO2_VGS-HV_P1_VGS
It can be seen that the source of the main input tube mp_in1 follows the drain voltage without being changed by inn_g, the voltage between the drain and the source is not too high due to inn_g being raised, the protection of the main input tube mp_in1 is achieved, and the protection of the other main input tube mp_in2 is achieved based on the same principle.
However, the applicant has found that the threshold voltages of the high voltage tubes hv_p1 and hv_p2 used to achieve "drain following" are large, and that the large gate-source voltages hv_p1 and hv_p2 when on squeeze the voltage margins of the input tubes mp_in1 and mp_in2, i.e. squeeze the drain-source voltages of mp_in1 and mp_in2, so that the source voltages of the input tubes mp_in1 and mp_in2 are also relatively low IN part of the operating conditions, especially IN the 0 common mode, and the drain-source voltages of the input tubes mp_in1 and mp_in2 are low when the drain voltages of the input tubes mp_in1 and mp_in2 are raised by the high voltage tubes, and the circuit cannot operate IN a good state or cannot operate.
Therefore, how to protect the voltage withstand of the input differential input circuit and ensure the working performance when the input low common mode is realized is a technical problem to be solved.
Disclosure of Invention
The application aims to provide a differential input circuit, a differential input processing method and a differential input processing chip, which are used for solving the technical problem that the input differential input circuit is protected against voltage and the working performance of the input differential input circuit in a low common mode can be ensured in the prior art.
In order to achieve the above purpose, the following technical scheme is adopted in the embodiment of the application.
In a first aspect, an embodiment of the present application provides a differential input circuit, including a current source, a main input tube module, a follower module, and a voltage control module.
The main input tube module comprises a first input tube group and a second input tube group, each input tube group at least comprises two stages of bipolar junction transistors, wherein the base electrode of the bipolar junction transistor of the later stage is connected with the first end of the bipolar junction transistor of the former stage;
The first end of the tail-stage bipolar junction transistor is connected with the current source, and the second end of the tail-stage bipolar junction transistor is connected with a post-stage circuit through the following module;
The second end of the first-stage bipolar junction transistor is connected with the voltage control module, and the base electrode of the first-stage bipolar junction transistor is connected with an input signal;
The voltage control module is used for respectively controlling the second ends of the first-stage bipolar junction transistors to be different potentials when the input signals are in a low common mode and a high common mode;
the following module is used for connecting the input signal so that the voltage of the second terminal of the last-stage bipolar junction transistor changes along with the change of the input signal.
Optionally, the following module comprises a step-down unit, a reference tube unit and a following tube unit;
The first end of the voltage reduction unit and the first end of the reference tube unit are connected with the current source, and the control end of the reference tube unit is used for connecting the input signal;
the voltage control module is connected with the low-voltage end of the voltage reduction unit;
The control end of the following tube unit is connected with the low-voltage end of the voltage reduction unit, the first end of the following tube unit is connected with the second end of the tail-stage bipolar junction transistor, and the second end of the following tube unit is used for being connected with the rear-stage circuit.
Optionally, the voltage control module includes a first MOS transistor, a gate of the first MOS transistor is configured to receive a voltage signal that changes along with the input signal, and a drain of the first MOS transistor is connected to the second end of the first bipolar junction transistor.
Optionally, the reference tube unit comprises a reference input tube;
For the reference input tube, a control end is used for connecting the input signal, and a first end is connected with a first end of the voltage reducing unit so as to provide a voltage signal which changes along with the input signal for the voltage reducing unit.
Optionally, the depressurization unit comprises a first depressurization tube and a second depressurization tube;
The first buck tube and the second buck tube are diodes or MOS tubes with gates in short circuit with drain electrodes;
The positive electrode or the source electrode of the first voltage reducing tube is connected with the reference tube unit, the negative electrode or the drain electrode of the first voltage reducing tube is connected with the positive electrode or the source electrode of the second voltage reducing tube, and the first control voltage changing along with the input signal is output to the control end of the voltage regulating module.
Optionally, the follower unit includes a follower, a control end of the follower is connected to a low voltage end of the buck unit, a first end of the follower is connected to a second end of the last bipolar junction transistor, and a second end of the high voltage tube is used for connecting to the back stage circuit.
Optionally, the post-stage circuit is a post-stage amplifying circuit of an amplifier or a post-stage comparing circuit of a comparator.
In a second aspect, an embodiment of the present application provides a differential input processing method, applied to the differential input circuit of the first aspect, including:
The current source provides bias current to the last bipolar junction transistor of the main input tube module;
The base electrode of the first-stage bipolar junction transistor of the main input tube module receives an input signal;
The following module receives the input signal and enables the second terminal voltage of the tail-stage bipolar junction transistor to change along with the change of the input signal;
The voltage control module receives a first control voltage which changes along with the input signal, and controls the second end of the first-stage bipolar junction transistor to be different in potential when the input signal is in a low common mode and a high common mode respectively.
Optionally, the voltage control module includes a first MOS transistor, including:
In the low common mode, a first MOS tube in the voltage control module is turned off to control the second end of the first-stage bipolar junction transistor to be in a zero-approaching potential;
And in a high common mode, a first MOS tube in the voltage control module is conducted to control the second end of the first-stage bipolar junction transistor to be a potential which changes along with the input signal.
In a third aspect, embodiments of the present application provide a chip having the differential input circuit of the first aspect packaged therein.
Compared with the prior art, the application has the following beneficial effects:
According to the differential input circuit, the differential input processing method and the differential input processing chip, voltage superposition between the first end and the base electrode of the multi-stage bipolar junction transistor arranged in the main input tube module is achieved, compared with the voltage of the first end and the base electrode of a single bipolar junction transistor, the voltage difference of the whole main input tube module is improved, the sensitivity of the main input tube module to smaller input signals can be kept, and the voltage resistance of the input end of the differential input circuit is higher due to the fact that the following module and the voltage control module can play the role of following and adjusting the voltage in a high common mode. Therefore, a better working point can be provided for the input of the operational amplifier or the comparator, and the index performance of the circuit under the conditions of low common-mode voltage and high common-mode voltage is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a differential input circuit with drain following to increase the input voltage operating range in the prior art;
Fig. 2 is a schematic diagram of a differential input circuit of a main input tube module composed of 2-stage bipolar junction transistors according to an embodiment of the present application;
fig. 3 is a schematic diagram of a differential input circuit of a main input tube module composed of 3-stage bipolar junction transistors according to an embodiment of the present application;
Fig. 4 is a schematic diagram of a differential input circuit with a pair of 2-stage transistors as main input tubes according to an embodiment of the present application;
FIG. 5 is a schematic diagram of the device of FIG. 4 with the dashed box removed;
FIG. 6 is a schematic diagram illustrating the formation of Vnbias and Vn_cas_bias according to one embodiment of the present application;
fig. 7 is a schematic diagram of a clamp protection module according to an embodiment of the present application.
Reference numerals illustrate:
10-current source
20-Main input pipe Module
30-Follower module
31-Step-down unit
32-Step-down current lead-out unit
33-Reference tube unit
34-Reference tube current derivation unit
35-Follower tube unit
40-Voltage control module
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and the described embodiments are some embodiments of the present application, but not all embodiments of the present application. The components of the embodiments of the present application generally described in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the application, as presented in the figures, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application. The following embodiments and features of the embodiments may be combined with each other without conflict.
In the description of the present application, it should be noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. The term "coupled" is used in a broad sense, and may be either permanently coupled, removably coupled, integrally coupled, or indirectly coupled via an intervening medium, for example.
The existing differential input circuit adopts a scheme of drain electrode following so as to protect the voltage resistance of the input differential input circuit, and the problem that the normal operation of the circuit cannot be ensured when the input signal is in a low common mode exists.
In order to overcome the above problems, referring to fig. 2 and 3, an embodiment of the present application provides a differential input circuit, which includes a current source 10, a main input tube module 20, a follower module 30, and a voltage control module 40.
The main input tube module 20 comprises a first input tube set 21 and a second input tube set 22, each comprising at least two stages of bipolar junction transistors. Fig. 2 shows two stages, the outer bipolar junction transistor being the first stage and the inner bipolar junction transistor being the last stage. Fig. 3 illustrates an example of three stages, where it can be seen that PNP bipolar junction transistors can also be replaced by NPN without conflict.
In each input tube group, the connection relationship of the stages is described as follows:
The base of the latter bipolar junction transistor is connected to the first end of the former bipolar junction transistor, and it can be seen that in the example of fig. 2, the first end is the emitter of the PNP-type tube;
The first end of the last bipolar junction transistor is connected with the current source 10, the second end of the last bipolar junction transistor is connected with a post-stage circuit through the following module 30, the post-stage circuit can be a post-stage amplifying circuit of an amplifier or a post-stage comparing circuit of a comparator, and in the example of fig. 2, the second end is a collector of a PNP type tube;
The second end of the first-stage bipolar junction transistor is connected with the voltage control module 40, and the base electrode of the first-stage bipolar junction transistor is connected with the input signal INN_ G, INP _G;
The second terminal of the bipolar junction transistor of the intermediate stage may be connected to the voltage control module 40, or may be connected to other devices having a current-draining function.
The follower module 30 is connected to the input signal inn_ G, INP _g, so that the voltage of the second terminal of the last bipolar junction transistor varies along with the variation of the input signal inn_ G, INP _g. When the common mode is high, INN_ G, INP _G is high, so that the second terminal voltage of the last-stage bipolar junction transistor is also high, and the following effect is achieved. The voltage difference between the first terminal and the second terminal of the last bipolar junction transistor is not excessive, thereby protecting.
The voltage control module 40 is used for controlling the second terminal of the first-stage bipolar junction transistor to be different in potential when the input signal is in the low common mode and the high common mode respectively. For example, the second terminal of the first-stage bipolar junction transistor rises from a point of view as the common-mode portion of the input signal INN _ G, INP _ G rises. For example, in the low common mode, the voltage control module 40 controls the second terminal of the first bipolar junction transistor to be at a zero-going potential, and in the high common mode, the voltage control module 40 controls the second terminal of the first bipolar junction transistor to be at a potential that varies with the input signal.
The voltage superposition between the first end and the base electrode of the multi-stage bipolar junction transistor arranged in the main input tube module obviously improves the voltage compared with the voltage of the first end and the base electrode of a single bipolar junction transistor, so that the integral voltage difference of the main input tube module is improved, the sensitivity of the main input tube module to smaller input signals can be kept, and the voltage resistance of the input end of the differential input circuit is higher due to the fact that the following module and the voltage control module can play the roles of following and regulating the voltage in the high common mode. Therefore, a better working point can be provided for the input of the operational amplifier or the comparator, and the index performance of the circuit under the conditions of low common-mode voltage and high common-mode voltage is improved.
The main input tube module can be a plurality of pairs of main input tubes, and inputs common-mode voltage signals which are close. The main input pipe module may be a pair of main input pipes.
Fig. 4 illustrates an example of a pair of two-stage bipolar junction transistors as the main input tube module. Fig. 5 is a diagram of the pure device with the dashed box and portions marked in fig. 4 removed.
The MOS transistor device diagram in the figure illustrates:
The Bulk end, i.e. the substrate is connected with the VNW (the VNW is only named as voltage and can be replaced by other letters), so that the working states of the MOS transistors are consistent, and the voltage VGS between the grid electrode and the source electrode is the same;
the grid electrode G end is a long thick line and is a high-voltage MOS, and compared with the MOS with the grid electrode G end being a short thin line, the MOS has higher withstand voltage;
The circle at the G end of the grid electrode and the direction of the source electrode arrow can judge whether the MOS tube is a PMOS or an NMOS, the PMOS and the NMOS in the figure are only examples, and the PMOS can be replaced by the NMOS, and the NMOS can be replaced by the PMOS.
The following voltage inputs are shown:
inn_ G, INP _g can be understood as an input signal, or an input signal after clamp protection;
VDD, converted to current by the current source 10, can be understood as the power supply of an op-amp or comparator;
Vpbias, vnbias, vp _cas_bias and Vn_cas_bias are used for providing voltages for control ends of corresponding devices, and for example, VDD is connected with a resistor R11, the other end of the resistor R11 is Vpbias, VDD is connected with a resistor R12, the other end of the resistor R12 is Vnbias, VDD is connected with a resistor R13, the other end of the resistor R13 is Vp_cas_bias, VDD is connected with a resistor R14, and the other end of the resistor R14 is Vn_cas_bias. Alternatively, in the form of fig. 6, a current is formed from VDD, and is obtained by providing a resistor R and four MOS transistors M1, M2, M3, and M4, and providing a desired voltage by providing an aspect ratio W/L of the semiconductor structure, for example, the gate voltages of M1 and M3 are Vnbias, and the gate voltages of M2 and M4 are vn_cas_bias, so that Vnbias and vn_cas_bias provided in this way do not change greatly with VDD.
In the figure, the current source 10 is divided into two paths, one path of the left square frame provides current for the following module 30, one path of the right square frame provides current for the main input tube module 20, namely the point E in the figure, and because of the control of Vwbias and Vp_cas_bias, the current output is stable under the condition that the VDD has a certain change.
The follower module 30 mainly includes a step-down unit 31, a reference pipe unit 33, and a follower pipe unit 35.
The first end of the voltage reducing unit 31 and the first end of the reference tube unit 33 are both connected with the current source 10, the control end of the reference tube unit 33 is used for being connected with an input signal INN_ G, INP _G, the control end of the voltage control module 40 is connected with a low-voltage end B point of the voltage reducing unit 31, the first end of the following tube unit 35 is connected with a first power supply VDD, the control end of the following tube unit 35 is connected with the low-voltage end B point of the voltage reducing unit 31, the first end of the following tube unit 35 is connected with the second ends of the tail-stage bipolar junction transistors Q_INN and Q_INP, namely, the point C and the point F, and the second end of the following tube unit 35 is used for being connected with an input of an operational amplifier or a comparator. Point B in the figure is an example of a low voltage end, and there may be two different low voltage ends.
The reference tube unit 33 IN the figure includes a reference input tube mp_in1, a reference input tube mp_in2, and a first resistor R1.
The voltage reducing unit 31 in the drawing includes a first voltage reducing pipe mp_dio1, a second voltage reducing pipe mp_dio2. The first buck tube mp_dio1 and the second buck tube mp_dio2 may be other devices that act as buck, such as resistors or other transistors.
When the substrates of the first buck tube mp_dio1, the second buck tube mp_dio2, the reference input tube mp_in1 and the reference input tube mp_in2 are connected to the upper end of the first resistor R1, the input common mode voltage is set to v_a, so that the a-point voltage=v_a+mp_in1_vgs-mp_dio1_vgs can be obtained, and because mp_in1 and mp_dio1 are both connected to VNW, mp_in1_vgs=mp_dio1_vgs, the a-point voltage=v_a can be obtained. Then the voltage at point A is reduced by one MP_DIO2_VGS to obtain the voltage at point B.
It can be seen that the reference input tube, the first buck tube and the second buck tube can obtain a more accurate point B voltage more accurately and conveniently, and ensure that the point B voltage is lower than the input common mode voltage.
The step-down current deriving unit 32 is provided to derive the current at the low voltage terminal B of the step-down unit 31 to ground, thereby providing the current flowing through the second tail current pipe mn_bias2 to ground. Similarly, for the current derivation module 40, a first tail current pipe mn_bias1 may be set to ground, and a reference pipe current derivation unit 34 may be set, with the low voltage pipe mn_dio1 grounded.
In the step-down current deriving unit 32, a second high-voltage protection tube hv_ncas2 below the point B may be further configured to protect mp_dio1 and mp_dio2, where the second high-voltage protection tube hv_ncas2 divides the voltages of mp_dio1 and mp_dio2, so as to prevent the voltages of the two ends of mp_dio1 and mp_dio2 from being too high. If the first buck tube mp_dio1 and the second buck tube mp_dio2 are high voltage tubes, the second high voltage protection tube hv_ncas2 in the buck current deriving unit 32 may be omitted. Similarly, in the voltage control module 40, a first high voltage protection tube hv_ncas1 is provided. In the reference tube current derivation unit 34, a third high-voltage tube hv_p3 is provided. At point C, D of the main input pipe module 20, a follower pipe unit 35 is provided comprising high-voltage pipes hv_p1, hv_p2. The control terminals of the follower pipes hv_p1, hv_p2 may be connected to the low voltage terminal B of the step-down unit 31.
The first high voltage protection tube hv_ncas1 and the first tail current tube mn_bias1 of the voltage control module 40 are set to be identical to the second high voltage protection tube hv_ncas2 and the second tail current tube mn_bias2 in the buck current deriving unit 32. The control end of the voltage control module 40 in the figure, i.e. the control end of the first MOS transistor mn_1, is connected to the B-point voltage that changes along with the input signal, and adjusts the voltage of the second end of the first bipolar junction transistor according to the B-point voltage.
When the input signal voltage is in a low common mode, the voltage at the point B is smaller, the first MOS tube MN_1 is cut off, the two ends of the first MOS tube MN_1 bear the voltage of VDD, and the voltage at the point F is close to the ground, so that the voltage difference at the point EF of the main input tube module is higher, the current at the second end of the non-tail-stage bipolar junction transistor passes through the first high-voltage protection tube HV_NCAS1 and the first tail current tube MN_BIAS1 of the voltage control module 40 to the ground, and the main input tube module can effectively work;
When the input signal voltage rises, the voltage at the point B rises, and the voltage at the point F is controlled by VGS of MN_1 and rises synchronously, so that the withstand voltage of the bipolar junction transistor is protected.
In order to further prevent the voltage difference between the input inn_g and inp_g from being excessively large, a clamp protection module may be added before the input inn_g and inp_g signals, that is, the inn_g and inp_g signals are not directly input signals but are signals after the directly input signals INN and INP pass through the clamp protection module.
When the difference between the directly inputted signals INN and INP is not large, the signals inn_g and inp_g after passing through the clamp protection module may remain almost the same as the signals INN and INP, and when the difference between the directly inputted signals INN and INP exceeds the set value of the clamp protection module, the difference between the signals inn_g and inp_g after passing through the clamp protection module may be limited within a set upper limit.
As shown in fig. 7, the clamp protection module may be provided with a pair of high voltage tubes hv_sp1 and hv_sp2, and its control end is connected to the VNW in the circuit, so that VGS of hv_sp1 and hv_sp2 can be normally opened. The clamping unit in the figure can be two groups of zener diodes which are connected in anti-parallel.
Corresponding to the differential input circuit in the above embodiment, the embodiment of the present application further provides a differential input processing method, including:
The current source 10 provides a bias current to the last stage bipolar junction transistor of the main input tube module 20;
The base of the first bipolar junction transistor of the main input tube module 20 receives an input signal;
the follower module 30 receives the input signal and causes the second terminal voltage of the last bipolar junction transistor to vary with the variation of the input signal;
The voltage control module 40 receives a first control voltage that varies with the input signal and controls the second terminal of the first-stage bipolar junction transistor to be at different potentials when the input signal is in a low common mode and a high common mode, for example:
In the low common mode, the first MOS mn_1 in the voltage control module 40 is turned off to control the second terminal of the first bipolar junction transistor to be at zero potential;
In the high common mode, the first MOS mn_1 in the voltage control module 40 is turned on to control the second terminal of the first bipolar junction transistor to be a potential that varies with the input signal. The boundary between the low common mode and the high common mode may be a preset voltage threshold.
For the differential input processing method of the embodiment of the present application, the optional implementation manner is consistent with the differential input circuit, and the beneficial effects are consistent, and are not described herein.
Based on the above embodiment, the embodiment of the present application further provides a chip, and the differential input circuit is encapsulated inside the chip.
In general, the present application proposes a differential input circuit and chip. In the differential input circuit, the main input tube module comprises at least two stages of bipolar junction transistors, and the base electrode of the latter stage transistor is connected with the first end of the former stage transistor. By the voltage superposition between the first end and the base electrode of the multi-stage transistor, compared with the voltage of the first end and the base electrode of a single transistor, the voltage difference of the whole main input tube module is improved, the sensitivity to smaller input signals can be kept, and due to the following module, the voltage withstand voltage of the input end of the differential input circuit is higher, a better working point can be provided for the input of the operational amplifier or the comparator, and the index performance of the circuit in the low common mode voltage and the high common mode voltage is improved.
The above-described embodiments of the apparatus and system are merely illustrative, and some or all of the modules may be selected according to actual needs to achieve the objectives of the present embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
The foregoing is only a preferred embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the technical scope of the present application should be covered by the scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.
Claims (10)
1. A differential input circuit, characterized by comprising a current source (10), a main input tube module (20), a following module (30) and a voltage control module (40);
the main input tube module (20) comprises a first input tube group and a second input tube group, wherein each input tube group at least comprises two stages of bipolar junction transistors, and the base electrode of the later stage of bipolar junction transistor is connected with the first end of the former stage of bipolar junction transistor;
a first end of the last-stage bipolar junction transistor is connected with the current source (10), and a second end of the last-stage bipolar junction transistor is connected with a post-stage circuit through the following module (30);
The second end of the first-stage bipolar junction transistor is connected with the voltage control module (40), and the base electrode of the first-stage bipolar junction transistor is connected with an input signal;
The voltage control module (40) is used for respectively controlling the second ends of the first-stage bipolar junction transistors to be different potentials when the input signals are in a low common mode and a high common mode;
the following module (30) is used for connecting the input signal so that the voltage of the second terminal of the last-stage bipolar junction transistor follows the change of the input signal.
2. A differential input circuit as claimed in claim 1, characterized in that the follower module (30) comprises a buck unit (31), a reference tube unit (33) and a follower tube unit (35);
the first end of the voltage reduction unit (31) and the first end of the reference tube unit (33) are connected with the current source (10), and the control end of the reference tube unit (33) is used for connecting the input signal;
The voltage control module (40) is connected with the low-voltage end of the voltage reduction unit (31);
The control end of the following pipe unit (35) is connected with the low-voltage end of the voltage reduction unit (31), the first end of the following pipe unit (35) is connected with the second end of the tail-stage bipolar junction transistor, and the second end of the following pipe unit (35) is used for being connected with the rear-stage circuit.
3. The differential input circuit of claim 1, wherein the voltage control module (40) comprises a first MOS transistor (mn_1), a gate of the first MOS transistor (mn_1) being configured to receive a voltage signal that varies along with the input signal, and a drain of the first MOS transistor (mn_1) being connected to the second terminal of the first bipolar junction transistor.
4. A differential input circuit as claimed IN claim 2, characterized IN that the reference tube unit (33) comprises a reference input tube (mp_in1/mp_in2);
for the reference input tube (MP_In1/MP_In2), a control terminal is used for connecting the input signal, and a first terminal is connected with a first terminal of the voltage reducing unit (31) so as to provide a voltage signal which changes along with the input signal for the voltage reducing unit (31).
5. A differential input circuit as claimed in claim 2, characterized in that the buck unit (31) comprises a first buck tube (mp_dio1), a second buck tube (mp_dio2);
the first voltage reducing tube (MP_DIO1) and the second voltage reducing tube (MP_DIO2) are diodes or MOS tubes with a grid electrode short-circuited with a drain electrode;
The positive electrode or the source electrode of the first voltage reducing tube (MP_DIO1) is connected with the reference tube unit (33), the negative electrode or the drain electrode is connected with the positive electrode or the source electrode of the second voltage reducing tube (MP_DIO2), and a first control voltage changing along with the input signal is output to the control end of the voltage control module (40).
6. A differential input circuit as claimed in claim 2, characterized in that the follower transistor unit (35) comprises a follower transistor (hv_p1/hv_p2), the control terminal of the follower transistor (hv_p1/hv_p2) being connected to the low voltage terminal of the step-down unit (31), the first terminal of the follower transistor (hv_p1/hv_p2) being connected to the second terminal of the last bipolar junction transistor, the second terminal of the follower transistor (hv_p1/hv_p2) being used for connecting the subsequent circuit.
7. The differential input circuit of claim 1, wherein the post-stage circuit is a post-stage amplification circuit of an amplifier or a post-stage comparison circuit of a comparator.
8. A differential input processing method applied to the differential input circuit of any one of claims 1 to 7, the method comprising:
A current source (10) provides a bias current to an end stage bipolar junction transistor of the main input tube module (20);
The base of the first bipolar junction transistor of the main input tube module (20) receives an input signal;
A follower module (30) receives the input signal and causes the second terminal voltage of the last stage bipolar junction transistor to vary in response to a variation of the input signal;
A voltage control module (40) receives a first control voltage that varies with the input signal and controls the second terminal of the first-stage bipolar junction transistor to a different potential when the input signal is in a low common mode and a high common mode, respectively.
9. A differential input processing method according to claim 8, characterized in that, when applied to the differential input circuit according to claim 3, the step of controlling the second terminal of the first-stage bipolar junction transistor to be at different potentials by the voltage control module (40) when the input signal is in the low common mode and the high common mode, respectively, comprises:
in the low common mode, a first MOS tube (MN_1) in the voltage control module (40) is turned off to control the second end of the first-stage bipolar junction transistor to be zero-approaching potential;
And in a high common mode, a first MOS tube (MN_1) in the voltage control module (40) is conducted to control the second end of the first-stage bipolar junction transistor to be a potential which changes along with the input signal.
10. A chip, wherein the differential input circuit of any one of claims 1-7 is packaged inside the chip.
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| CN106549639A (en) * | 2017-01-17 | 2017-03-29 | 桂林电子科技大学 | A kind of gain-adaptive error amplifier |
| CN113341212A (en) * | 2021-06-05 | 2021-09-03 | 晶通微电子(南京)有限公司 | Differential voltage detection circuit with wide voltage input range |
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| US9467109B2 (en) * | 2014-06-03 | 2016-10-11 | Texas Instruments Incorporated | Differential amplifier with high-speed common mode feedback |
| KR101801938B1 (en) * | 2016-06-17 | 2017-11-27 | 한국전자통신연구원 | Power amplifier |
| CN111525866B (en) * | 2020-05-27 | 2021-05-11 | 上海儒竞智控技术有限公司 | Voltage following device and method and variable-frequency drive control loop |
| CN115021695B (en) * | 2022-06-20 | 2025-08-15 | 思瑞浦微电子科技（苏州）股份有限公司 | Operational amplifier input circuit and method for dynamically adjusting substrate voltage of operational amplifier input circuit |
| CN115276571B (en) * | 2022-07-05 | 2025-09-26 | 荣湃半导体（上海）有限公司 | A differential pair circuit with improved linearity |
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| CN106549639A (en) * | 2017-01-17 | 2017-03-29 | 桂林电子科技大学 | A kind of gain-adaptive error amplifier |
| CN113341212A (en) * | 2021-06-05 | 2021-09-03 | 晶通微电子(南京)有限公司 | Differential voltage detection circuit with wide voltage input range |
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