CN116107802A - Automatic clearing CMOS control method and automatic clearing CMOS circuit - Google Patents

Abstract

The invention discloses a control method for automatically clearing CMOS and an automatic CMOS circuit. The control method for automatically clearing CMOS includes: step S100, acquiring a diagnostic signal output by a processor; step S200, when determining that the BIOS of the processor is abnormal according to the diagnostic signal, triggering the processor to clear CMOS. The invention can solve the problem of poor practicability of the existing CMOS clearing scheme.

Description

Automatic clearing CMOS control method and automatic clearing CMOS circuit

technical field

The invention relates to the technical field of processors, in particular to an automatic clearing CMOS control method and an automatic clearing CMOS circuit.

Background technique

With the advancement of technology, the industrial control industry is usually equipped with control equipment to control the operating equipment. However, most industrial control occasions are limited by cost and cannot be equipped with UPS power supply for each control equipment, resulting in the existence of abnormal power-off scenarios, or , Most of the industrial control scenarios are directly powered off by pulling the switch. On the other hand, the CPU on the Intel platform, in the case of an abnormal power failure, may have abnormal CMOS data and cannot be turned on, which may cause the device to fail to start. affect the user's income. The existing solution for clearing CMOS is usually to draw a CMOS reset button on the panel. When something goes wrong, it is very troublesome to manually cut off the power, remove the battery, and then clear the CMOS. Another solution for clearing CMOS is to clear CMOS directly during the power-on and power-off process, regardless of whether the CMOS data is abnormal.

Contents of the invention

The main purpose of the present invention is to propose a control method for automatically clearing CMOS, aiming at solving the problem of poor practicability of the existing schemes for clearing CMOS.

In order to achieve the above object, the automatic clearing CMOS control method proposed by the present invention includes:

Step S100, acquiring a diagnostic signal output by the processor;

Step S200, when it is determined according to the diagnostic signal that the BIOS of the processor is abnormal, triggering the processor to clear the CMOS.

Optionally, the step S200 specifically includes:

Step S211, when the BIOS of the processor is abnormal, output a reset signal to the processor, so that the processor performs reset processing, and reacquires the diagnostic signal output by the processor;

Step S212 , when the BIOS of the processor is still in an abnormal state, trigger the processor to clear CMOS.

Optionally, the step S200 specifically includes:

Step S213, when the BIOS of the processor is abnormal, output a reset signal to the processor, so that the processor performs reset processing, and reacquires the diagnostic signal output by the processor;

When the BIOS of the processor is still in an abnormal state, repeat step S213 until the BIOS of the processor is normal or reaches a preset number of times;

When the BIOS of the processor is still in an abnormal state after repeatedly executing step S213 for a preset number of times, the processor is triggered to clear the CMOS.

Optionally, before the step S200, it also includes:

When it is determined that the BIOS of the processor is abnormal according to the diagnosis signal, the power supply is controlled to stop supplying power to the processor.

The present invention also proposes an automatic clearing CMOS circuit, comprising:

Clearing the CMOS circuit, the output end of the clearing CMOS circuit is connected to the CMOS reset terminal of the processor, and the clearing CMOS circuit is used to output the CMOS reset signal to the processor when receiving the clearing CMOS signal, so as to drive the processor to clear CMOS processing;

A controller, the receiving end of the controller is connected to the BIOS end of the processor, the first control end of the controller is connected to the controlled end of the clearing CMOS circuit, and the controller is used to execute the automatic clearing CMOS control program , so as to realize the above-mentioned automatic clearing CMOS control method.

Optionally, the signal output terminal of the controller is connected to the reset terminal of the processor, and the controller is also used for judging the BIOS working state of the processor according to the diagnostic signal output by the processor, and when the BIOS of the processor is abnormal, , outputting a reset signal to the processor, so that the processor performs reset processing.

Optionally, the automatic clearing CMOS circuit also includes:

A processor power supply circuit, the input end of the processor power supply circuit is connected to the power supply, the output end of the processor power supply circuit is connected to the power supply end of the processor, the controlled end of the processor power supply circuit is connected to the control connected to the second control terminal of the processor, and the processor power supply circuit is used to control the electrical connection between the power supply and the processor when it is turned on, so that the power supply supplies power to the processor;

The controller is also used to judge the BIOS working state of the processor according to the diagnostic signal output by the processor, and control the power supply circuit of the processor to shut down when the BIOS of the processor is abnormal, so that the power supply stops supplying power to the processor .

Optionally, the automatic clearing CMOS circuit also includes:

A clock circuit, the clock circuit is electrically connected to the processor, and the clock circuit is used to output a clock signal to the processor, so that the processor performs clock calibration processing.

Optionally, the automatic clearing CMOS circuit also includes:

Clear the CMOS power supply circuit, the input end of the clear CMOS power supply circuit is connected to the power supply, the output end of the clear CMOS power supply circuit is connected to the power supply end of the clear CMOS circuit, the controlled end of the clear CMOS power supply circuit is connected to the The third control terminal of the controller is connected, and the clearing CMOS power supply circuit is used to control the electrical connection between the power supply and the clearing CMOS circuit when it is turned on, so that the power supply supplies power to the clearing CMOS circuit;

The controller is also used to judge the BIOS working state of the processor according to the diagnostic signal output by the processor, and when the BIOS of the processor is abnormal, control the clearing CMOS power supply circuit to shut down, so that the power supply stops supplying power for clearing the CMOS circuit powered.

Optionally, the automatic clearing CMOS circuit also includes:

SuperIO module, the receiving end of the SuperIO module is connected to the BIOS end of the processor, the sending end of the SuperIO module is connected to the receiving end of the controller, and the SuperIO module is used to analyze the diagnostic signal output by the processor output to the controller after processing.

In the technical solution of the present invention, when the processor is powered on and started, the processor will perform a BIOS self-check and output a corresponding diagnostic signal, and by obtaining the diagnostic signal output by the processor, the diagnosis of the processor BIOS can be determined according to the diagnostic signal. Result, and judge whether the processor BIOS is normal according to the diagnosis result. When it is determined that the processor BIOS is abnormal, it can be considered that the processor needs to clear the CMOS at this time, or when the diagnostic signal output by the processor is not received, it can be considered that the self-test function of the processor is abnormal. Perform clear CMOS processing. Therefore, when it is determined that the BIOS of the processor is abnormal, or when the diagnostic signal output by the processor is not received, a CMOS reset signal may be output to the processor, so as to trigger the processor to clear the CMOS. The technical scheme of the present invention can realize the function of software automatic detection and automatic control processor clearing CMOS, has a stable judgment mechanism, can prevent the device from being unable to start due to abnormal CMOS data, reduces the cost of manual investigation and manual clearing of CMOS, and improves The operation stability of the processor improves the stability and safety of the industrial control equipment, and solves the problem of poor practicability of the existing CMOS clearing scheme.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments of the present invention. For those skilled in the art, other drawings can also be obtained according to the structures shown in these drawings without creative effort.

Fig. 1 is the schematic flow chart of an embodiment of the automatic clearing CMOS control method of the present invention;

Fig. 2 is a schematic flow chart of another embodiment of the automatic clearing CMOS control method of the present invention;

3 is a schematic flow diagram of another embodiment of the automatic clearing CMOS control method of the present invention;

4 is a schematic flow chart of another embodiment of the automatic clearing CMOS control method of the present invention;

Fig. 5 is the schematic diagram of the circuit structure of an embodiment of the automatic clearing CMOS circuit of the present invention;

FIG. 6 is a schematic circuit structure diagram of an embodiment of the automatic clearing CMOS circuit of the present invention.

The realization of the purpose of the present invention, functional characteristics and advantages will be further described in conjunction with the embodiments and with reference to the accompanying drawings.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

It should be noted that if there is a directional indication (such as up, down, left, right, front, back...) in the embodiment of the present invention, the directional indication is only used to explain the position in a certain posture (as shown in the accompanying drawing). If the specific posture changes, the directional indication will also change accordingly.

In addition, if there are descriptions involving "first", "second" and so on in the embodiments of the present invention, the descriptions of "first", "second" and so on are only for descriptive purposes, and should not be interpreted as indicating or implying Its relative importance or implicitly indicates the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include at least one of these features. In addition, the technical solutions of the various embodiments can be combined with each other, but it must be based on the realization of those skilled in the art. When the combination of technical solutions is contradictory or cannot be realized, it should be considered that the combination of technical solutions does not exist , nor within the scope of protection required by the present invention.

With the advancement of technology, the industrial control industry is usually equipped with control equipment to control the operating equipment. However, most industrial control occasions are limited by cost and cannot be equipped with UPS power supply for each control equipment, resulting in the existence of abnormal power-off scenarios, or , Most of the industrial control scenarios are directly powered off by pulling the switch. On the other hand, the CPU on the Intel platform, in the case of an abnormal power failure, may have abnormal CMOS data and cannot be turned on, which may cause the device to fail to start. affect the user's income. The existing solution for clearing CMOS is usually to draw a CMOS reset button on the panel. When something goes wrong, it is very troublesome to manually cut off the power, remove the battery, and then clear the CMOS. Another solution for clearing CMOS is to clear CMOS directly during the power-on and power-off process, regardless of whether the CMOS data is abnormal.

In order to solve the above problem, the present invention proposes a kind of automatic clearing CMOS control method, is applied in automatic clearing CMOS circuit, described automatic clearing CMOS circuit comprises clearing CMOS circuit, the output terminal of described clearing CMOS circuit and the CMOS reset terminal of processor Connection, with reference to Fig. 1 to Fig. 3, in one embodiment, automatically clearing CMOS control method comprises the following steps:

Step S100, acquiring a diagnostic signal output by the processor;

Step S200, when it is determined according to the diagnostic signal that the BIOS of the processor is abnormal, triggering the processor to clear the CMOS.

In this embodiment, a controller can be provided to control the processor and clear the main control chip of the CMOS circuit, such as MCU, CPLD, DSP (Digital Signal Process, digital signal processing chip), FPGA (Field Programmable Gate Array, which can programming logic gate array chip), etc., for controlling the clearing CMOS circuit to output a CMOS reset signal to the processor, so as to drive the processor to perform clearing CMOS processing.

The controller can be connected to the CPU processor through the ESPI bus or LPC bus to decode and judge whether the BIOS of the processor is normal through the analyzed diagnostic code. If the BIOS of the processor is abnormal, it can be considered that the processor needs to be cleared at this time. CMOS processing. When it is judged by the diagnostic code that the processor BIOS is abnormal, or the diagnostic signal output by the processor is not received, a CMOS reset signal is output to the processor to trigger the processor to clear the CMOS, thereby realizing the function of controlling the processor to clear the CMOS. The CMOS reset signal may be directly sent by the controller to the processor, or may be sent to the processor through an additional circuit based on the control of the controller.

In the technical solution of the present invention, when the processor is powered on and started, the processor will perform a BIOS self-check and output a corresponding diagnostic signal, and by obtaining the diagnostic signal output by the processor, the diagnosis of the processor BIOS can be determined according to the diagnostic signal. Result, and judge whether the processor BIOS is normal according to the diagnosis result. When it is determined that the processor BIOS is abnormal, it can be considered that the processor needs to clear the CMOS processing at this time, or when the diagnostic signal output by the processor is not received, it can be considered that the self-test function of the processor is abnormal, that is, the processor The BIOS is abnormal, and the CMOS needs to be cleared. Therefore, when it is determined that the BIOS of the processor is abnormal, or when the diagnostic signal output by the processor is not received, a CMOS reset signal may be output to the processor, so as to trigger the processor to clear the CMOS. The technical scheme of the present invention can realize the function of software automatic detection and automatic control processor clearing CMOS, has a stable judgment mechanism, can prevent the device from being unable to start due to abnormal CMOS data, reduces the cost of manual investigation and manual clearing of CMOS, and improves The operation stability of the processor improves the stability and security of industrial control equipment.

1 to 3, in an embodiment, the step S200 specifically includes:

Step S211, when the BIOS of the processor is abnormal, output a reset signal to the processor, so that the processor performs reset processing, and reacquires the diagnostic signal output by the processor;

Step S212 , when the BIOS of the processor is still in an abnormal state, trigger the processor to clear CMOS.

In this embodiment, when the BIOS of the processor is abnormal, a reset signal can be output to the processor first, so that the processor performs reset processing, that is, controls the processor to restart. It is understandable that when the processor is restarted, the processor will enter the self-test mode, and the BIOS in the processor will recognize the hardware configuration by reading the contents of the CMOSRAM, perform self-test and initialization on it, and output the corresponding diagnosis Signal. Therefore, the self-test function of the BIOS can be used to control the processor to restart, so that the processor can perform self-test and initialization, and judge whether the processor returns to normal according to the diagnostic signal output by the BIOS. When the BIOS is still in an abnormal state or does not receive a diagnostic signal after the processor is restarted, a CMOS reset signal is output to the processor to trigger the processor to clear the CMOS.

Optionally, the step S200 specifically includes:

Step S213, when the BIOS of the processor is abnormal, output a reset signal to the processor, so that the processor performs reset processing, and reacquires the diagnostic signal output by the processor;

Step S214, when the BIOS of the processor is still in an abnormal state, repeat step S213 until the BIOS of the processor is normal or reaches a preset number of times;

Step S215 , when the BIOS of the processor is still in an abnormal state after repeating step S213 for a preset number of times, triggering the processor to clear CMOS.

In this embodiment, when the BIOS is still in an abnormal state or does not receive a diagnostic signal after the processor restarts, it will output a reset signal to the processor again, so that the processor performs reset processing again. If the BIOS is still in the In an abnormal state or no diagnostic signal is received, continue to output a reset signal to control the processor to restart until the processor returns to normal or reaches the preset number of times. The required preset number of times can be set according to actual application conditions, so that after the processor is restarted for the preset number of times, a CMOS reset signal is output to the processor to trigger the processor to perform CMOS clearing processing.

In the technical solution of the present invention, the self-checking function of BIOS is used to control the processor to restart when the processor is abnormal, and the operation of clearing the CMOS is performed when the processor is still in an abnormal state after restarting the preset number of times, which increases the The effective fault-tolerant judgment mechanism has a stable judgment mechanism, which can prevent the device from being unable to boot due to abnormal CMOS data, reduce the cost of manual investigation and manual clearing of CMOS, improve the operation stability of the processor, and further improve the reliability of industrial control equipment. Stability and security.

Referring to FIGS. 1 to 3 , in an embodiment, before the step S200, it also includes:

Step S201, when it is determined according to the diagnostic signal that the BIOS of the processor is abnormal, control the power supply to stop supplying power to the processor.

It is understandable that the operation of directly controlling the processor to clear the CMOS when the system is powered on does not meet the Intel power-on specification, and there is a risk that it is easy to cause damage to the processor and equipment, which in turn affects the service life of the processor and equipment. Therefore, in this embodiment, before the processor is controlled to clear the CMOS, the power supply is controlled to stop supplying power to the processor, so that the processor is powered off and then the processor is controlled to clear the CMOS. In this way, the operation of clearing the CMOS after powering off the processor can avoid the risk of clearing the CMOS with power on, realize risk-free clearing of the CMOS, and improve the safety of the processor and the device.

The present invention also proposes an automatic clearing CMOS circuit, comprising:

Clearing the CMOS circuit, the output end of the clearing CMOS circuit is connected to the CMOS reset terminal of the processor, and the clearing CMOS circuit is used to output the CMOS reset signal to the processor when receiving the clearing CMOS signal, so as to drive the processor to clear CMOS processing;

A controller, the receiving end of the controller is connected to the BIOS end of the processor, the first control end of the controller is connected to the controlled end of the clearing CMOS circuit, and the controller is used to execute the automatic clearing CMOS control program , so as to realize the above-mentioned automatic clearing CMOS control method.

In this embodiment, the controller can select MCU, CPLD, DSP (Digital Signal Process, digital signal processing chip), FPGA (Field Programmable Gate Array, programmable logic gate array chip), etc., to control and clear the CMOS circuit output CMOS A reset signal is sent to the processor to drive the processor to clear the CMOS. The controller can be connected to the CPU processor through the ESPI bus or LPC bus for decoding and judging the working status of the BIOS through the analyzed diagnostic code. The circuit for controlling and clearing CMOS outputs a CMOS reset signal to the processor, so that the processor performs an operation of clearing the CMOS, thereby realizing the function of controlling the processor to clear the CMOS.

Referring to FIG. 5, FIG. 5 is a schematic diagram of a circuit structure of an embodiment of a clear CMOS circuit. The two CMOS reset terminals RTC_RST_IN and SRTC_RST_IN of the processor are connected together through diodes to ensure that the two reset terminals can be pulled low at the same time. One end of the switch tube Q1 is connected to the cathodes of the two diodes, and the other end is connected to the first control terminal VRTC_CMOS of the controller. When the controller judges that the BIOS of the processor is abnormal according to the diagnostic signal output by the processor, it outputs a low level to clear the CMOS circuit for 5s and then outputs a high level. When the output is low to clear the CMOS circuit, the first switch tube Q1 is turned on, thereby pulling down the two CMOS reset terminals of the processor, so that the processor performs an operation of clearing the CMOS, thereby realizing the function of controlling the processor to clear the CMOS. In addition, the 5V0A at the front end of the circuit needs to be powered on earlier than the 3V3A to ensure that when the battery is out of power, the entire CMOS sequence can meet the CPU requirements. After normal power-on, it is powered by VRTC_CORE, and the first switch tube Q1 ensures that only the battery is powered after the system is powered off. Leakage current is minimized to ensure battery life. At the same time, by setting and clearing the CMOS circuit, the processor and the controller can be isolated through diodes and switch tubes, avoiding interference or misoperation caused by the direct connection between the controller and the processor, and improving system stability and safety.

In the technical solution of the present invention, by setting the controller to obtain the diagnostic signal output by the processor, the detection of the working state of the processor BIOS can be realized, and it can be judged whether the processor needs to perform the operation of clearing the CMOS according to the working state of the processor BIOS, so as to When the processor BIOS is abnormal, the control clearing CMOS circuit drives the processor to clear the CMOS. The technical scheme of the present invention can realize the function of software automatic detection and automatic control processor clearing CMOS, has a stable judgment mechanism, can prevent the device from being unable to start due to abnormal CMOS data, reduces the cost of manual investigation and manual clearing of CMOS, and improves The operation stability of the processor improves the stability and security of industrial control equipment.

Referring to Fig. 6, in one embodiment, the signal output terminal of the controller is connected to the reset terminal of the processor, and the controller is also used for judging the BIOS working state of the processor according to the diagnostic signal output by the processor, and When the processor BIOS is abnormal, a reset signal is output to the processor, so that the processor performs reset processing.

In this embodiment, the signal output terminal CPU_RST of the controller is connected to the reset terminal of the processor, and when the BIOS of the processor is abnormal, the reset signal is first output to the processor, so that the processor performs reset processing, that is, control Processor restarts. It is understandable that when the processor is restarted, the processor will enter the self-test mode, and the BIOS in the processor will recognize the hardware configuration by reading the contents of the CMOSRAM, perform self-test and initialization on it, and output the corresponding diagnosis Signal. Therefore, the self-test function of the BIOS can be used to control the processor to restart, so that the processor can perform self-test and initialization, and judge whether the processor returns to normal according to the diagnostic signal output by the BIOS. When the BIOS is still in an abnormal state or does not receive a diagnostic signal after restarting the processor for a preset number of times, the control clearing CMOS circuit outputs a CMOS reset signal to the processor to drive the processor to clear the CMOS.

In the technical solution of the present invention, the self-checking function of BIOS is used to control the processor to restart when the processor is abnormal, and the operation of clearing the CMOS is performed when the processor is still in an abnormal state after restarting the preset number of times, which increases the The effective fault-tolerant judgment mechanism has a stable judgment mechanism, which can prevent the device from being unable to boot due to abnormal CMOS data, reduce the cost of manual investigation and manual clearing of CMOS, improve the operation stability of the processor, and further improve the reliability of industrial control equipment. Stability and security.

Referring to Figure 6, in one embodiment, the automatic clearing CMOS circuit also includes:

A processor power supply circuit, the input end of the processor power supply circuit is connected to the power supply, the output end of the processor power supply circuit is connected to the power supply end of the processor, the controlled end of the processor power supply circuit is connected to the control connected to the second control terminal of the processor, and the processor power supply circuit is used to control the electrical connection between the power supply and the processor when it is turned on, so that the power supply supplies power to the processor;

The controller is also used to judge the BIOS working state of the processor according to the diagnostic signal output by the processor, and control the power supply circuit of the processor to shut down when the BIOS of the processor is abnormal, so that the power supply stops supplying power to the processor .

Referring to Fig. 6, Fig. 6 is a schematic diagram of the circuit structure of an embodiment of the automatic clearing CMOS circuit. The processor power supply circuit is composed of the second switching tube Q2 and the third switching tube Q3. When the BIOS of the processor is abnormal, a high-level signal is output to control the second switching tube Q2 to turn on, thereby controlling the third switching tube Q3 to turn off, so that the power supply is electrically disconnected from the processor, thereby causing the processor to drop. It can be understood that the controller needs to be powered separately to ensure that the processor can still work normally after the processor is powered off. After the processor is powered off, the controller controls the clearing CMOS circuit to drive the processor to clear the CMOS. In this way, the operation of clearing the CMOS after powering off the processor can avoid the risk of clearing the CMOS with power on, realize risk-free clearing of the CMOS, and improve the safety of the processor and the device.

Referring to Figure 6, in one embodiment, the automatic clearing CMOS circuit also includes:

A clock circuit, the clock circuit is electrically connected to the processor, and the clock circuit is used to output a clock signal to the processor, so that the processor performs clock calibration processing.

It can be understood that when the processor is restarted or powered on after clearing the CMOS, the system time is easily lost. Therefore, in this embodiment, an external clock circuit is also provided to be electrically connected to the processor. The clock circuit can be realized by using an RTC clock chip. . When the processor is powered on again or clears the CMOS, the processor will compare whether the time difference between the system RTC time and the external RTC clock circuit is within the required range. If the time difference between the system RTC time and the external RTC clock circuit is If the value is greater than the preset range, write the external RTC time into the system RTC time to calibrate the system RTC time.

Referring to Figure 6, in one embodiment, the automatic clearing CMOS circuit also includes:

Clear the CMOS power supply circuit, the input end of the clear CMOS power supply circuit is connected to the power supply, the output end of the clear CMOS power supply circuit is connected to the power supply end of the clear CMOS circuit, the controlled end of the clear CMOS power supply circuit is connected to the The third control terminal of the controller is connected, and the clearing CMOS power supply circuit is used to control the electrical connection between the power supply and the clearing CMOS circuit when it is turned on, so that the power supply supplies power to the clearing CMOS circuit;

The controller is also used to judge the BIOS working state of the processor according to the diagnostic signal output by the processor, and when the BIOS of the processor is abnormal, control the clearing CMOS power supply circuit to shut down, so that the power supply stops supplying power for clearing the CMOS circuit powered.

Referring to FIG. 6, FIG. 6 is a schematic diagram of the circuit structure of an embodiment of the automatic clearing CMOS circuit. The clearing CMOS power supply circuit is composed of the fourth switching tube Q4, the fourth diode D4 and the fifth diode D5, wherein VRTC is the battery output The power supply voltage, 3V3A is the power supply voltage converted from the 12V power supply. When the controller judges that the BIOS of the processor is abnormal according to the diagnostic signal output by the processor, it outputs a control signal to control the fourth switching tube Q4 to turn off, so that the power supply is electrically disconnected from the clearing CMOS circuit, thereby clearing the CMOS circuit It can be quickly pulled low by the low-level signal output by the controller, thereby pulling down the two CMOS reset pins of the processor, so that the processor performs a CMOS clearing operation. It can be understood that the clear CMOS power supply circuit and the processor power supply circuit provide power for the minimum system of the processor.

Optionally, the automatic clearing CMOS circuit also includes:

SuperIO module, the receiving end of the SuperIO module is connected to the BIOS end of the processor, the sending end of the SuperIO module is connected to the receiving end of the controller, and the SuperIO module is used to analyze the diagnostic signal output by the processor output to the controller after processing.

In this embodiment, the SuperIO module is connected to the processor through the ESPI bus or the LPC bus, and is used to decode and judge the diagnostic signal output by the processor BIOS, and the decoded diagnostic code information is sent to the controller through the UART bus, so that the controller Judging whether the processor BIOS is normal according to the received diagnostic code, and then deciding whether to control the processor to reset or clear the CMOS.

The above is only a preferred embodiment of the present invention, and does not therefore limit the patent scope of the present invention. Under the inventive concept of the present invention, the equivalent structural transformation made by using the description of the present invention and the contents of the accompanying drawings, or direct/indirect use All other relevant technical fields are included in the patent protection scope of the present invention.

Claims (10)

1. An auto-erase CMOS control method, comprising the steps of:

step S100, obtaining a diagnosis signal output by a processor;

and step 200, triggering the processor to clear the CMOS processing when the BIOS of the processor is determined to be abnormal according to the diagnosis signal.

2. The method of automatic cleaning CMOS control according to claim 1, wherein the step S200 specifically includes:

step S211, when the BIOS of the processor is abnormal, outputting a reset signal to the processor so that the processor performs reset processing and reacquires a diagnosis signal output by the processor;

and step S212, triggering the processor to clear the CMOS processing when the BIOS of the processor is still in an abnormal state.

3. The method of automatic cleaning CMOS control according to claim 1, wherein the step S200 specifically includes:

step S213, when BIOS of the processor is abnormal, outputting a reset signal to the processor, so that the processor performs reset processing and reacquires a diagnosis signal output by the processor;

when the BIOS of the processor is still in an abnormal state, repeatedly executing the step S213 until the BIOS of the processor is normal or reaches the preset times;

and triggering the processor to clear the CMOS processing when the BIOS of the processor is still in an abnormal state after repeatedly executing the step S213 for a preset number of times.

4. The method for automatically cleaning CMOS control according to claim 1, further comprising, before step S200:

and when the BIOS of the processor is determined to be abnormal according to the diagnosis signal, controlling the power supply to stop supplying power to the processor.

5. An auto-clean CMOS circuit, comprising:

the output end of the clearing CMOS circuit is connected with the CMOS reset end of the processor, and the clearing CMOS circuit is used for outputting a CMOS reset signal to the processor when receiving the clearing CMOS signal so as to drive the processor to carry out clearing CMOS processing;

the receiving end of the controller is connected with the BIOS end of the processor, the first control end of the controller is connected with the controlled end of the clearing CMOS circuit, and the controller is used for executing an automatic clearing CMOS control program.

6. The auto-erase CMOS circuit of claim 5, wherein the signal output terminal of the controller is connected to the reset terminal of the processor, and the controller is further configured to determine the BIOS operating state of the processor according to the diagnostic signal output from the processor, and output a reset signal to the processor when the BIOS of the processor is abnormal, so that the processor performs the reset process.

7. The self-cleaning CMOS circuit of claim 5, wherein the self-cleaning CMOS circuit further comprises:

the input end of the processor power supply circuit is connected with the power supply, the output end of the processor power supply circuit is connected with the power supply end of the processor, the controlled end of the processor power supply circuit is connected with the second control end of the controller, and the processor power supply circuit is used for controlling the power supply to be electrically connected with the processor when being conducted so that the power supply supplies power for the processor;

the controller is also used for judging the BIOS working state of the processor according to the diagnosis signal output by the processor, and controlling the power supply circuit of the processor to be turned off when the BIOS of the processor is abnormal so as to stop the power supply source from supplying power to the processor.

8. The self-cleaning CMOS circuit of claim 5, wherein the self-cleaning CMOS circuit further comprises:

the clock circuit is electrically connected with the processor and is used for outputting a clock signal to the processor so as to enable the processor to perform clock calibration processing.

9. The self-cleaning CMOS circuit of claim 5, wherein the self-cleaning CMOS circuit further comprises:

the control end of the clearing CMOS power supply circuit is connected with the third control end of the controller, and the clearing CMOS power supply circuit is used for controlling the power supply to be electrically connected with the clearing CMOS circuit when being conducted so as to enable the power supply to supply power for the clearing CMOS circuit;

the controller is also used for judging the BIOS working state of the processor according to the diagnosis signal output by the processor, and controlling the clearing CMOS power supply circuit to be turned off when the BIOS of the processor is abnormal, so that the power supply stops supplying power to the clearing CMOS power supply circuit.

10. The self-cleaning CMOS circuit of claim 5, wherein the self-cleaning CMOS circuit further comprises:

the receiving end of the SuperIO module is connected with the BIOS end of the processor, the sending end of the SuperIO module is connected with the receiving end of the controller, and the SuperIO module is used for analyzing and processing the diagnosis signals output by the processor and then outputting the diagnosis signals to the controller.

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