CN116526987B - Bias circuit, radio frequency circuit and radio frequency chip - Google Patents

Abstract

The invention relates to the field of wireless communication technology. The invention discloses a bias circuit, a radio frequency circuit and a radio frequency chip. The bias circuit includes a signal input terminal, an overshoot circuit, a current mirror circuit, a voltage reverse circuit and a bias voltage output circuit. and signal output terminal; the signal input terminal is connected to the current mirror circuit, voltage reverse circuit and bias voltage output circuit respectively, the first terminal of the overshoot circuit is connected to ground, and the second terminal of the overshoot circuit is connected to the current mirror circuit; the signal input terminal is to receive the enable signal; the overshoot circuit is used to generate overshoot to compensate for the response speed of the radio frequency amplifier; the output end of the current mirror circuit is connected to the second input end of the voltage reversal circuit; the output end of the voltage reversal circuit is connected to the bias The second input terminal of the voltage output circuit is set, the third input terminal of the bias voltage output circuit is used to connect to the power supply, and the output terminal of the bias voltage output circuit is connected to the signal output terminal. The bias circuit of the present invention makes the transient response effect of the radio frequency amplifier fast.

Description

Bias circuit, RF circuit and RF chip

Technical field

The present invention relates to the field of wireless communication technology, and in particular, to a bias circuit, a radio frequency circuit and a radio frequency chip.

Background technique

At present, with the development of communication technology, the continuous development of mobile terminals and the gradual popularization of communication technology, radio frequency front-end modules have become an important part of wireless communication technology. A radio frequency module is a radio frequency chip that contains one or several radio frequency devices. These radio frequency devices include radio frequency amplifiers, radio frequency switches, amplifiers, etc.

In related technology, in a typical RF front-end module of a TDD (duplex mode of communication system) system, such as a WIFI RF front-end module or RF amplifier, it consists of the following parts: a power amplification component, which is used to amplify the input Radio frequency signal; receiving circuit component, used to receive the signal path, usually including a low noise amplifier (LNA); radio frequency switch component, used to switch the transmitting and receiving paths; logic control component, used to control the working status of other components. Assemble the above components on the substrate, connect them together through wiring, and package them to complete the module. In the TDD RF front-end, the RF amplifier is controlled by the enable signal. When the enable signal is enabled, the bias voltage is activated and the bias voltage or bias current is output to the power amplifier to drive the radio frequency amplifier to work. During the operation of the TDD system, the RF front-end circuit/RF amplifier is always on/off alternately.

However, in actual circuits, affected by factors such as device characteristics and switching time, the gain of the RF amplifier will rise during the moment it is turned on, causing the enable, bias and amplifier gain to be out of sync, causing the transient response of the RF amplifier circuit to Difference.

Contents of the invention

The purpose of embodiments of the present invention is to provide a bias circuit to solve the problem of poor transient response of radio frequency amplifiers in related technologies.

In order to solve the above technical problems, in the first aspect, an embodiment of the present invention provides a bias circuit for providing a bias voltage for a radio frequency amplifier. The bias circuit includes a signal input terminal, an overshoot circuit, a current mirror circuit, A voltage reversal circuit, a bias voltage output circuit and a signal output terminal; the signal input terminal is respectively connected to the first input terminal of the current mirror circuit, the first input terminal of the voltage reversal circuit and the bias voltage The first input end of the output circuit, the first end of the overshoot circuit is connected to ground, and the second end of the overshoot circuit is connected to the second input end of the current mirror circuit;

The signal input terminal is used to receive an enable signal;

The overshoot circuit is used to generate overshoot to compensate for the response speed of the radio frequency amplifier;

The output terminal of the current mirror circuit is connected to the second input terminal of the voltage reversal circuit;

The output terminal of the voltage reversal circuit is connected to the second input terminal of the bias voltage output circuit, and the third input terminal of the bias voltage output circuit is used to connect to a power supply. The output of the bias voltage output circuit terminal is connected to the signal output terminal.

Preferably, the overshoot circuit includes a first inductor and a first resistor, the first end of the first resistor serves as the first end of the overshoot circuit, and the second end of the first resistor is connected to the first end of the first resistor. The first end of an inductor is connected to the second end of the first inductor as the second end of the overshoot circuit.

Preferably, the current mirror circuit includes a first triode, a second triode, a second resistor and a third resistor; the first end of the second resistor and the first end of the third resistor serve as The first input end of the current mirror circuit and the second end of the second resistor are connected to the collector of the first transistor. The collector of the first transistor also serves as the current mirror circuit. The second input terminal is connected to the second terminal of the overshoot circuit; the emitter of the first triode is grounded, and the base of the first triode is connected to the collector of the first triode respectively. and the base of the second triode, the emitter of the second triode is grounded, and the collector of the second triode is the first end of the third resistor and serves as the current mirror. the output of the circuit.

Preferably, the models of the first transistor and the second transistor are NPN transistors.

Preferably, the bias circuit further includes a fourth resistor, the first end of the fourth resistor is connected to the output end of the current mirror circuit, and the second end of the fourth resistor is connected to the output end of the voltage reversal circuit. Second input terminal.

Preferably, the voltage reversal circuit includes a third transistor, a fifth resistor and a sixth resistor, the first terminal of the fifth resistor serves as the first input terminal of the voltage reversal circuit, and the fifth resistor The second end of the resistor is connected to the collector of the third triode. The collector of the third triode also serves as the output end of the voltage reversal circuit. The base of the third triode serves as The second input terminal of the voltage reversal circuit and the emitter of the third transistor are connected to the first terminal of the sixth resistor, and the second terminal of the sixth resistor is connected to ground.

Preferably, the bias voltage output circuit includes a fourth triode, a fifth triode, a seventh resistor, a sixth triode and an eighth resistor, and the first end of the seventh resistor serves as the bias voltage. The first input terminal of the voltage output circuit is set, the second terminal of the seventh resistor is connected to the collector of the fourth triode, and the base of the fourth triode is connected to the fourth triode respectively. The collector of the sixth triode is connected to the base of the sixth triode, the emitter of the fourth triode is connected to the collector of the fifth triode, and the collector of the fifth triode is also connected. is connected to the base of the fifth triode; the collector of the fifth triode also serves as the second input terminal of the bias voltage output circuit, and the emitter of the fifth triode is grounded, The emitter of the sixth triode serves as the output terminal of the bias voltage output circuit. The emitter of the sixth triode is also connected to the first end of the eighth resistor. The second terminal serves as the third input terminal of the bias voltage output circuit, and the collector of the sixth transistor is grounded.

Preferably, the fourth triode, the fifth triode and the sixth triode are all NPN-type triodes.

In a second aspect, an embodiment of the present invention provides a radio frequency circuit, which includes the above-mentioned bias circuit.

In a third aspect, an embodiment of the present invention provides a radio frequency chip, which includes the above-mentioned radio frequency circuit.

Compared with the related art, the bias circuit in the present invention connects the signal input terminal to the first input terminal of the current mirror circuit, the first input terminal of the voltage inversion circuit and the bias circuit respectively. The first input end of the voltage output circuit, the first end of the overshoot circuit is grounded, the second end of the overshoot circuit is connected to the second input end of the current mirror circuit, the signal input end is used to receive enable The overshoot circuit of the signal is used to generate overshoot to compensate the response speed of the radio frequency amplifier. The output end of the current mirror circuit is connected to the second input end of the voltage inversion circuit; The output terminal is connected to the second input terminal of the bias voltage output circuit, the third input terminal of the bias voltage output circuit is used to connect to the power supply, and the output terminal of the bias voltage output circuit is connected to the signal output end. By setting an overshoot circuit in front of the current mirror circuit, the leading edge of the bias voltage generates an overshoot to compensate for the RF amplifier response, thus improving the response speed at the moment when the RF amplifier is turned on. The current is amplified through the current mirror circuit, and is controlled by the voltage. The reverse circuit realizes the reversal of the output voltage, which facilitates the bias voltage output circuit to perform corresponding bias adjustment according to the output voltage, effectively controlling the RF transmit power so that the enable, bias and amplifier gain can be synchronized, thereby effectively reducing the transmit power. The implementation complexity of control is reduced, radiation is reduced, energy consumption is reduced, and product service life is improved.

Description of the drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without exerting creative efforts, among which:

Figure 1 is a circuit diagram of a bias circuit provided by an embodiment of the present invention;

FIG. 2 is a timing waveform diagram of a bias circuit provided by an embodiment of the present invention.

In the figure, 100. Bias circuit, 1. Signal input terminal, 2. Overshoot circuit, 3. Current mirror circuit, 4. Voltage reverse circuit, 5. Bias voltage output circuit, 6. Signal output terminal.

Detailed ways

The technical solutions in the embodiments of the present invention will be described clearly and completely below. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

Embodiment 1

Referring to Figures 1 and 2 of the accompanying drawings, an embodiment of the present invention provides a bias circuit 100 for providing a bias voltage for a radio frequency amplifier. The bias circuit 100 includes a signal input terminal 1 and an overshoot circuit 2 , current mirror circuit 3, voltage reversal circuit 4, bias voltage output circuit 5 and signal output terminal 6; the signal input terminal 1 is connected to the first input terminal of the current mirror circuit 3 and the voltage reversal circuit respectively. 4 and the first input terminal of the bias voltage output circuit 5, the first terminal of the overshoot circuit 2 is connected to ground, and the second terminal of the overshoot circuit 2 is connected to the current mirror circuit 3 the second input terminal;

The signal input terminal 1 is used to receive the enable signal;

The overshoot circuit 2 is used to generate overshoot to compensate for the response speed of the radio frequency amplifier;

The output terminal of the current mirror circuit 3 is connected to the second input terminal of the voltage inversion circuit 4;

The output terminal of the voltage reversal circuit 4 is connected to the second input terminal of the bias voltage output circuit 5, and the third input terminal of the bias voltage output circuit 5 is used to connect to a power supply. The bias voltage output The output of circuit 5 is connected to said signal output 6 .

Among them, the enable signal is output from the signal input terminal 1 to the first input terminal of the current mirror circuit 3, the first input terminal of the voltage inversion circuit 4, and the first input terminal of the bias voltage output circuit 5 respectively; An overshoot circuit 2 is set up in front of the mirror circuit 3, causing an overshoot on the front edge of the bias voltage to compensate for the response of the RF amplifier, thereby improving the response speed at the moment when the RF amplifier is turned on. The current is amplified through the current mirror circuit 3, and is controlled by the voltage The reverse circuit 4 realizes the reversal of the output voltage, which facilitates the bias voltage output circuit 5 to perform corresponding bias adjustment according to the output voltage, effectively controlling the radio frequency transmission power, so that the enable, bias and amplifier gain can be synchronized, thereby effectively reducing The implementation complexity of transmit power control reduces radiation, reduces energy consumption, and improves product service life.

In this embodiment, the overshoot circuit 2 includes a first inductor L1 and a first resistor R1. The first end of the first resistor R1 serves as the first end of the overshoot circuit 2. The first resistor R1 The second end of the first inductor L1 is connected to the first end of the first inductor L1 , and the second end of the first inductor L1 is connected to the second end of the overshoot circuit 2 .

Among them, due to the addition of the first inductor L1, an overshoot occurs on the leading edge of the bias voltage to compensate for the response of the radio frequency amplifier, thus improving the response speed at the moment when the amplifier is turned on. By designing the resistance value of the first resistor R1 and the inductance value of the first inductor L1, the amplitude and time of the overshoot can be adjusted. For most TDD amplifiers, such as WIFI amplifiers, the overshoot width is within 10us, and the amplitude difference from the normal waveform is within 200mV. When the enable signal is enabled, the enable pin changes from low level to high level.

In this embodiment, the current mirror circuit 3 includes a first transistor Q1, a second transistor Q2, a second resistor R2 and a third resistor R3; the first end of the second resistor R2 and the third The first terminals of the three resistors R3 are respectively used as the first input terminals of the current mirror circuit 3. The second terminals of the second resistors R2 are connected to the collector of the first triode Q1. The first triode The collector of tube Q1 also serves as the second input terminal of the current mirror circuit 3 and is connected to the second terminal of the overshoot circuit 2; the emitter of the first triode Q1 is grounded, and the first triode The base of the tube Q1 is connected to the collector of the first triode Q1 and the base of the second triode Q2 respectively. The emitter of the second triode Q2 is grounded. The second triode The collector of tube Q2 is respectively the first terminal of the third resistor R3 and serves as the output terminal of the current mirror circuit 3 . By forming the first transistor Q1 and the second transistor Q2 into a current mirror, the current waveform of the first transistor Q1 and the current waveform of the second transistor Q2 are the same. At the same moment, the first triode The current waveforms of the transistor Q1 and the second transistor Q2 are consistent. By setting the values of the first resistor R1, the second resistor R2 and the first inductor L1, the amplitude and time of the overshoot can be adjusted. For example, reducing the overshoot time improves the response speed when the RF amplifier is turned on, thereby synchronizing the enabling, biasing and amplifier gain of the RF amplifier, effectively reducing the implementation complexity of transmit power control.

In this embodiment, the first transistor Q1 and the second transistor Q2 are both NPN transistors. The NPN transistor is used to amplify the bias voltage signal and output it to the second input end of the voltage reversal circuit 4 through the second transistor Q2.

In this embodiment, the bias circuit 100 further includes a fourth resistor R4. The first end of the fourth resistor R4 is connected to the output end of the current mirror circuit 3. The second end of the fourth resistor R4 is connected to The second input terminal of the voltage inversion circuit 4. The fourth resistor R4 is used to transfer the voltage output by the second transistor Q2 to the second input end of the voltage reversal circuit 4, so that the voltage reversal circuit 4 receives the voltage and reversely outputs it to the bias voltage output circuit 5, The corresponding bias voltage is output to the signal output terminal 6 through the bias voltage output circuit 5, and the signal output terminal 6 is connected to the radio frequency amplifier circuit. Since the leading edge is connected to the first inductor L1, a short-term overshoot is generated, which accelerates the The turn-on time of the RF amplifier is shortened and the transient response of the amplifier is improved.

In this embodiment, the voltage reversal circuit 4 includes a third transistor Q3, a fifth resistor R5 and a sixth resistor R6. The first end of the fifth resistor R5 serves as the third transistor of the voltage reversal circuit 4. An input terminal, the second terminal of the fifth resistor R5 is connected to the collector of the third transistor Q3, and the collector of the third transistor Q3 also serves as the output terminal of the voltage reversal circuit 4 , the base of the third transistor Q3 serves as the second input terminal of the voltage reversal circuit 4, and the emitter of the third transistor Q3 is connected to the first terminal of the sixth resistor R6, so The second terminal of the sixth resistor R6 is connected to ground. The bias voltage is reversely converted through the third transistor Q3, the fifth resistor R5, and the sixth resistor R6, and is output to the bias voltage output circuit 5. The bias voltage is output through the bias voltage input circuit.

In this embodiment, the bias voltage output circuit 5 includes a fourth transistor Q4, a fifth transistor Q5, a seventh resistor R7, a sixth transistor Q6 and an eighth resistor R8. The seventh resistor The first end of R7 serves as the first input end of the bias voltage output circuit 5, and the second end of the seventh resistor R7 is connected to the collector of the fourth transistor Q4. The fourth transistor The base of Q4 is connected to the collector of the fourth triode Q4 and the base of the sixth triode Q6 respectively, and the emitter of the fourth triode Q4 is connected to the fifth triode Q4. The collector of Q5 is connected, and the collector of the fifth transistor Q5 is also connected with the base of the fifth transistor Q5; the collector of the fifth transistor Q5 also serves as the bias voltage. The second input terminal of the output circuit 5, the emitter of the fifth transistor Q5 is grounded, the emitter of the sixth transistor Q6 serves as the output terminal of the bias voltage output circuit 5, and the sixth transistor Q5 is connected to the ground. The emitter of transistor Q6 is also connected to the first end of the eighth resistor R8, and the second end of the eighth resistor R8 serves as the third input end of the bias voltage output circuit 5. The sixth third The collector of transistor Q6 is connected to ground.

In this embodiment, the models of the fourth transistor Q4, the fifth transistor Q5 and the sixth transistor Q6 are all NPN transistors.

In this embodiment, when the enable signal is enabled, the enable pin changes from low level to high level at point A. Due to the energy storage effect of the first inductor L1, the current waveform flowing through the collector of the first transistor Q1 is shown as IQ1-C in Figure 2.

Since the first transistor Q1 and the second transistor Q2 form a current mirror, the current waveform flowing through the collector of the second transistor Q2 is shown as IQ2-C in Figure 2.

Under the action of the second transistor Q2 and the third resistor R3, the waveform of the voltage at point B is shown as VB in Figure 2.

The voltage at point B is transmitted to the base of the third transistor Q3 through the fourth resistor R4. Under the action of the third transistor Q3, the fifth resistor R5 and the sixth resistor R6, the waveforms of the voltage at point C and the voltage at point D are This is shown as VC/VD in Figure 2.

The base of the fourth transistor Q4 is connected to the collector of the fourth transistor Q4, so the waveform of the base voltage of the fourth transistor Q4 is as shown in VE in Figure 2 .

After the voltage at point E passes through the sixth transistor Q6, it is output from the emitter of the sixth transistor Q6 to generate the bias voltage VBIAS. The waveform of the bias voltage is shown in VBIAS in Figure 2.

Add the bias voltage VBIAS to the RF amplifier circuit; due to the overshoot circuit 2 set at the leading edge, a short-term overshoot is generated, which speeds up the turn-on time of the RF amplifier and improves the transient response of the amplifier.

Embodiment 2

An embodiment of the present invention provides a radio frequency circuit, which includes the above-mentioned bias circuit 100. The bias circuit 100 of the first embodiment is applied to a radio frequency circuit, so that the bias circuit 100 outputs a bias voltage, and the bias voltage VBIAS is added to the radio frequency amplification circuit; due to a short-term overshoot on the leading edge, the RF amplifier turn-on time, improving amplifier transient response.

Embodiment 3

An embodiment of the present invention provides a radio frequency chip, which includes the radio frequency circuit of the above-mentioned second embodiment. It can effectively reduce the implementation complexity of transmit power control, reduce radiation, reduce energy consumption, and improve product service life.

The above are only examples of the present invention, and do not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the description and drawings of the present invention, or directly or indirectly applied to other related technologies fields are equally included in the scope of patent protection of the present invention.

Claims (8)

1. A bias circuit for providing bias voltage for a radio frequency amplifier, wherein the bias circuit comprises a signal input end, an overshoot circuit, a current mirror circuit, a voltage reversing circuit, a bias voltage output circuit and a signal output end; the signal input end is respectively connected with the first input end of the current mirror circuit, the first input end of the voltage reversing circuit and the first input end of the bias voltage output circuit, the first end of the overshoot circuit is grounded, and the second end of the overshoot circuit is connected with the second input end of the current mirror circuit;

the signal input end is used for receiving an enabling signal;

the overshoot circuit is used for generating overshoot and compensating the response speed of the radio frequency amplifier;

the output end of the current mirror circuit is connected with the second input end of the voltage reversing circuit;

the output end of the voltage reversing circuit is connected with the second input end of the bias voltage output circuit, the third input end of the bias voltage output circuit is used for being connected with a power supply, and the output end of the bias voltage output circuit is connected to the signal output end;

the overshoot circuit comprises a first inductor and a first resistor, wherein the first end of the first resistor is used as the first end of the overshoot circuit, the second end of the first resistor is connected with the first end of the first inductor, and the second end of the first inductor is connected with the second end of the overshoot circuit;

the current mirror circuit comprises a first triode, a second resistor and a third resistor; the first end of the second resistor and the first end of the third resistor are respectively used as a first input end of the current mirror circuit, the second end of the second resistor is connected with the collector electrode of the first triode, and the collector electrode of the first triode is also used as a second input end of the current mirror circuit and is connected to the second end of the overshoot circuit; the emitter of the first triode is grounded, the base electrode of the first triode is respectively connected with the collector electrode of the first triode and the base electrode of the second triode, the emitter of the second triode is grounded, and the collector electrode of the second triode is respectively connected with the first end of the third resistor and serves as the output end of the current mirror circuit.

2. The bias circuit of claim 1 wherein said first transistor and said second transistor are each NPN transistors.

3. The bias circuit of claim 1 further comprising a fourth resistor, a first terminal of the fourth resistor being connected to the output of the current mirror circuit, and a second terminal of the fourth resistor being connected to the second input of the voltage reversing circuit.

4. The bias circuit of claim 3, wherein the voltage reversing circuit comprises a third triode, a fifth resistor and a sixth resistor, a first end of the fifth resistor is used as a first input end of the voltage reversing circuit, a second end of the fifth resistor is connected with a collector of the third triode, the collector of the third triode is also used as an output end of the voltage reversing circuit, a base of the third triode is used as a second input end of the voltage reversing circuit, an emitter of the third triode is connected with a first end of the sixth resistor, and a second end of the sixth resistor is grounded.

5. The bias circuit of claim 1, wherein the bias voltage output circuit comprises a fourth transistor, a fifth transistor, a seventh resistor, a sixth transistor, and an eighth resistor, a first end of the seventh resistor being a first input end of the bias voltage output circuit, a second end of the seventh resistor being connected to a collector of the fourth transistor, a base of the fourth transistor being connected to the collector of the fourth transistor and the base of the sixth transistor, respectively, an emitter of the fourth transistor being connected to the collector of the fifth transistor, a collector of the fifth transistor being further connected to the base of the fifth transistor; the collector of the fifth triode is further used as the second input end of the bias voltage output circuit, the emitter of the fifth triode is grounded, the emitter of the sixth triode is used as the output end of the bias voltage output circuit, the emitter of the sixth triode is further connected with the first end of the eighth resistor, the second end of the eighth resistor is used as the third input end of the bias voltage output circuit, and the collector of the sixth triode is grounded.

6. The bias circuit of claim 5 wherein said fourth transistor, said fifth transistor and said sixth transistor are all NPN transistors in type.

7. A radio frequency circuit comprising the bias circuit of any of claims 1-6.

8. A radio frequency chip comprising the radio frequency circuit of claim 7.