CN116582396A - Synchronization signal (sync mark) detection using frequency-doubled sinusoidal (MFS) signal-based filtering - Google Patents

Abstract

Novel tools and techniques are provided for implementing synchronization signal ("sync mark") detection using multiplied sinusoidal "MFS" signal based filtering. In various embodiments, the computing system may detect the position of a sync mark within a data signal by using filtering based on the MFS signal and a sliding window comprising successive search windows each having a bit corresponding to the sync mark A bit length of length to identify a portion of the data signal having a magnitude indicative of the synchronization flag. The computing system may refine by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark to identify a sub-portion of the identified portion of the data signal The position of the synchronization mark within the data signal, the identified subportion having a phase indicative of the synchronization mark, the phase measurement being performed based on the filtering based on the MFS signal.

Description

Using a filtered sync signal (sync marker) based on a multiplied sinusoidal (MFS) signal detection

Cross References to Related Applications

This application asserts a patent filed on February 10, 2022 by Jeffrey Grundvig (Attorney Docket No. 220008US01) entitled "Synchronization Using Filtering Based on Multiplied Sine (MFS) Signals." Priority of U.S. Patent Application No. 63/308,941 (“the '941 Application”) for Synchronization Signal (Sync Mark) Detection Using Multi-Frequency Sinusoidal (MFS) Signal-Based Filtering), The entire disclosure of said application is hereby incorporated by reference for all purposes.

Copyright Notice

Portions of the disclosure of this patent document contain material that is protected by copyright. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights.

technical field

The present disclosure relates generally to methods, systems, and apparatus for implementing optimized communication systems, and more particularly, to implementing synchronization signals ("Synchronization Mark") detection method, system and equipment.

Background technique

Synchronization signals or synchronization marks are commonly used in communication systems to allow the data detection system to know where the data started and thus when to start recovering the data. In addition to the SyncMark (which can be a bit pattern), the Preamble field - which can be a single-frequency periodic pattern or pattern that can be used to measure the phase of the incoming signal in order to set or correct the sampling phase for both SyncMark detection and data recovery Other patterns - usually preceded by sync markers.

For example, in the case of a hard disk drive ("HDD"), the sync flag and preamble fields may be used for fields such as the user data field and the servo ("servo") field. However, conventional HDDs currently use rather long preambles (typically, up to 100 or more bits) followed by sync marks for both user data and servo fields.

Therefore, there is a need for more robust and scalable solutions for implementing optimized communication systems, and more specifically, for implementing synchronization signals using filtering based on multiplied or multi-frequency sinusoidal ("MFS") signals (" Synchronization mark") detection method, system and equipment.

Contents of the invention

The techniques of the present disclosure relate generally to tools and techniques for implementing optimized communication systems, and more particularly, to implementing synchronization signals ("Synchronization Mark") detection method, system and equipment.

In one aspect, a method for implementing synchronization signal ("sync flag") detection is provided. The method includes using a computing system to detect the location of a synchronization signal ("sync mark") within a data signal by using multi-frequency sinusoidal ("MFS") signal-based filtering and a sliding window comprising a sequential search window, the consecutive search windows each having a bit length corresponding to the bit length of the synchronization mark to identify a portion of the data signal having a magnitude indicative of the synchronization mark; and using the computing system, by performing phase measurements on said identified portion having said magnitude indicative of said sync mark to identify a sub-portion of said identified portion of said data signal to refine said sync mark within said data signal The position, the identified subsection has a phase indicative of the synchronization mark, the phase measurement is performed based on the filtering based on the MFS signal.

In some embodiments, the computing system includes a data signal detection processor, a digital signal processor, a data retrieval processor, a processor of a mobile device, a processor of a user device, a server computer, a cloud-based computing system on a network or at least one of a distributed computing system and/or the like. In some examples, the data signal may be used within a hard drive or other hardware, wherein the sync mark is among a plurality of sync marks disposed within the data signal, wherein the data signal includes at least one data field and Servo mechanism ("servo") fields, each preceded by a sync flag from among the plurality of sync flags. Alternatively, the data signal may be included in a signal transmitted over one of a wireless or wired medium.

According to some embodiments, using the sliding window includes: measuring the magnitude of the portion of the data signal within a search window; and continuously moving the sliding window by one sample along the data signal to form another search window window and measure the magnitude of the portion of the data signal within the further search window.

In some embodiments, detecting the position of the synchronization mark includes comparing the MFS sine coefficient of the synchronization mark and the MFS cosine coefficient of the synchronization mark with each consecutive search window of the data signal in the sliding window The portions within are multiplied to generate a data signal filtered by the MFS sine coefficients and a data signal filtered by the MFS cosine coefficients, respectively, for each search window.

In some examples, the MFS sinusoidal coefficients of the sync marks are generated by dividing the sync marks into a plurality of positive bit patterns each corresponding to consecutive binary ones in the sync marks and each corresponding to the a plurality of negative bit patterns of consecutive binary zeros in the synchronization mark, the plurality of positive bit patterns alternating with the plurality of negative bit patterns; generating for each of the plurality of positive bit patterns corresponding to consecutive a positive sinusoidal half-cycle of a number of binary ones; generating a negative sinusoidal half-cycle with a period corresponding to the number of consecutive binary ones for each of the plurality of negative bit patterns; The same alternating sequence of the corresponding binary ones and binary zeros concatenates positive sine half-cycles and negative sine half-cycles together to generate the MFS sinusoidal coefficients of the sync mark.

In some cases, the magnitude of the portion of the data signal within each search window is determined by squaring the sum of the data signal filtered by the MFS sine coefficients and the sum of the data signals filtered by the MFS cosine coefficients. The sum of the data signals is squared and the square root of the sum of the sum of squares of the data signal filtered by the MFS sine coefficients and the sum of the squares of the data signals filtered by the MFS cosine coefficients is calculated. In some examples, identifying the portion of the data signal having the magnitude indicative of the synchronization flag includes identifying at least one of a magnitude of the data signal having a maximum magnitude or a magnitude exceeding a predetermined threshold magnitude part of the person.

In some embodiments, identifying the portion of the data signal having the magnitude indicative of the synchronization flag includes identifying the portion of the data signal that has the largest in-band to out-of-band energy ratio or has the largest in-band to total energy ratio. A fraction of a signal energy ratio, wherein said in-band energy is calculated by squaring said magnitude of said portion of said data signal, wherein said total signal energy is calculated by summing all samples, and wherein the out-of-band energy is calculated by subtracting the in-band energy from the total signal energy.

According to some embodiments, the phase of the portion of the data signal within each search window is determined by taking the sum of the data signal filtered by the MFS sine coefficients and dividing by the sum of the data signal filtered by the MFS cosine coefficients The arctangent of the sum is calculated.

By way of example only, in some cases the method may further include, using the computing system, determining, based on the MFS sine coefficients and the MFS cosine coefficients, a difference between a frequency of the data signal and an internal clock frequency of an internal clock of the computing system. frequency offset. In some examples, the method may further include, using the computing system, adjusting the internal clock frequency to match the frequency of the data signal based on the determined frequency offset. In some cases, determining the frequency offset may include by generating MFS sine coefficients and MFS cosine coefficients of the first portion of the synchronization mark and taking the sum of the first portion of the synchronization mark filtered by the MFS sine coefficients Dividing by the arctangent of the sum of the first part of the sync-mark filtered by the MFS cosine coefficients, the phase of the first part of the sync-mark is measured; by generating the MFS sine coefficient of the second part of the sync-mark and MFS cosine coefficients and taking the arctangent of the sum of the second part of the sync marks filtered by the MFS sine coefficients divided by the sum of the second part of the sync marks filtered by the MFS cosine coefficients, measuring the calculating the phase difference between the measured phases of the first and second portions of the synchronization mark; and dividing the calculated phase difference by the The number of bits between the midpoints of the first and second parts of the synchronization flag.

In some embodiments, the method may further comprise determining, using the computing system, the data signal based on the phase of the identified portion of the data signal having the magnitude indicative of the synchronization mark Whether the polarity of is reversed.

In some cases, the synchronization marker replaces a combination of a single frequency synchronization signal and a preamble. In some examples, the bit length of the synchronization flag is less than the total bit length of the combination of the single frequency synchronization signal and the preamble. Alternatively, the bit length of the synchronization flag is the same as the total bit length of the combination of the single frequency synchronization signal and the preamble. Alternatively, the bit length of the synchronization flag is greater than the total bit length of the combination of the single frequency synchronization signal and the preamble.

According to some embodiments, the method may further comprise: using the computing system, identifying a start point of a data field within the data signal based on the refined location of the synchronization mark within the data signal; and responding Retrieving data from the data field is performed using the computing system upon identifying the origin of the data field.

In another aspect, an apparatus is provided for implementing synchronization signal ("sync mark") detection using frequency-multiplied sinusoidal signal-based filtering. The apparatus includes: at least one processor; and a non-transitory computer-readable medium communicatively coupled to the at least one processor. The non-transitory computer-readable medium has stored thereon computer software comprising a set of instructions that, when executed by the at least one processor, cause the device to: ) signal and a sliding window comprising successive search windows each having a bit length corresponding to the bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the synchronization mark; and identifying the data by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark The position of the sync mark within the data signal is refined by sub-portion of the identified portion of the signal, the identified sub-portion has a phase indicative of the sync mark, the phase measurement is based on the Performed based on filtering of the MFS signal.

In some embodiments, the computing system includes a data signal detection processor, a digital signal processor, a data retrieval processor, a processor of a mobile device, a processor of a user device, a server computer, a cloud-based computing system on a network or at least one of a distributed computing system and/or the like. In some examples, the data signal is included in a hard disk drive, wherein the sync mark is among a plurality of sync marks disposed within the data signal, wherein the data signal includes at least one data field and a servo (" Servo") fields, each preceded by a synchronization flag among the plurality of synchronization flags. Alternatively, the data signal is contained in a signal transmitted over one of a wireless medium or a wired medium.

According to some embodiments, detecting the position of the synchronization mark comprises comparing the MFS sine coefficient of the synchronization mark and the MFS cosine coefficient of the synchronization mark with the data signal within each successive search window of the sliding window to generate a data signal filtered by the MFS sine coefficients and a data signal filtered by the MFS cosine coefficients for each search window, respectively.

In some examples, the magnitude of the portion of the data signal within each search window is determined by squaring the sum of the data signal filtered by the MFS sine coefficients and the sum of the data signals filtered by the MFS cosine coefficients. The sum of the data signals is squared and the square root of the sum of the sum of squares of the data signal filtered by the MFS sine coefficients and the sum of the squares of the data signals filtered by the MFS cosine coefficients is calculated.

Alternatively, identifying the portion of the data signal having the magnitude indicative of the synchronization flag includes identifying the portion of the data signal that has a maximum in-band to out-of-band energy ratio or has a maximum in-band to total signal energy ratio , wherein the in-band energy is calculated by squaring the magnitude of the portion of the data signal, wherein the total signal energy is calculated by squaring all samples of the data signal within the search window and wherein the out-of-band energy is calculated by subtracting the in-band energy from the total signal energy.

In some embodiments, the phase of said portion of said data signal within each search window is calculated by taking said sum of said data signal filtered by MFS sine coefficients and dividing by said data signal filtered by MFS cosine coefficients The arc tangent of the said sum is computed.

In yet another aspect, a computing system is provided that includes logic that, when executed, is configured to: detect a synchronization signal using filtering based on a multi-frequency sinusoidal ("MFS") signal and a sliding window including a sequential search window ("sync mark") position within the data signal, the consecutive search windows each having a bit length corresponding to the bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark , the MFC filtering includes multiplying the MFS sine coefficients of the synchronization marks and the MFS cosine coefficients of the synchronization marks with the part of the data signal in each consecutive search window of the sliding window to respectively generating a data signal filtered by MFS sine coefficients and a data signal filtered by MFS cosine coefficients for each search window; and by performing on said identified portion of said data signal having said magnitude indicative of said synchronization mark phase measurement to refine the position of the sync mark within the data signal by identifying a sub-portion of the identified portion of the data signal, the identified sub-portion having a phase indicative of the sync mark, The phase measure is calculated by taking the arctangent of the sum of the data signals filtered by the MFS sine coefficients divided by the sum of the data signals filtered by the MFS cosine coefficients.

Various modifications and additions may be made to the embodiments discussed without departing from the scope of the invention. For example, while the embodiments described above refer to certain features, the scope of the invention also includes embodiments having different combinations of features and embodiments that do not include all of the above described features.

The details of one or more aspects of the disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the techniques described in this disclosure will be apparent from the description and drawings, and from the claims.

Description of drawings

A further understanding of the nature and advantages of certain embodiments may be realized by reference to the remaining portions of the specification and drawings, wherein like reference numerals are used to refer to like components. In some examples, a sublabel is associated with a component symbol to designate one of multiple similar components. When a component symbol is referenced without specifying an existing sublabel, it is intended to refer to all such multiple similar components.

1 is a schematic diagram illustrating a system for implementing synchronization signal ("Sync Mark") detection using frequency multiplied or multi-frequency sinusoidal ("MFS") signal-based filtering, in accordance with various embodiments.

2A and 2B are diagrammatic diagrams illustrating an example of a synchronization mark detection method using single frequency signal based filtering and a preamble.

3A-3E are diagrammatic diagrams illustrating various non-limiting examples of syncmark detection using MFS signal-based filtering, according to various embodiments.

4 is a flowchart illustrating a method for implementing syncmark detection using MFS signal-based filtering in accordance with various embodiments.

5 is a block diagram illustrating an example of a computer or system hardware architecture in accordance with various embodiments.

Detailed ways

review

Various embodiments provide tools and techniques for implementing optimized communication systems, and more particularly, provide for implementing synchronization signals ("sync markers") using filtering based on multiplied or multi-frequency sinusoidal ("MFS") signals Detection method, system and equipment.

In various embodiments, the preamble and sync marker are combined into a single combined field that is significantly shorter than the fields currently used for preamble and sync marker. Additionally, by improving syncmark detection performance while reducing bandwidth, this shorter single combined field will allow higher performance than previously achieved, and thus allow more bandwidth to be used for other purposes. The various embodiments described below illustrate how to improve syncmark detection performance for a given syncmark pattern length and how to extract the sub-bit phase of the syncmark pattern without requiring a separate preamble field normally used for that purpose. In some embodiments, multiplied sine calculations provide magnitude and phase of multi-frequency or complex mode signals, allowing simple magnitude comparison techniques as well as in-band and out-of-band energy comparison techniques for detecting synchronization marks. Since it improves syncmark detection performance while reducing bandwidth, various embodiments can be used in a variety of applications in any communication system (not limited to HDDs).

These and other aspects of systems and methods for implementing octave sinusoidal sync mark detection are described in more detail with respect to the accompanying figures.

The following detailed description explains several embodiments in further detail to enable those skilled in the art to practice such embodiments. The described examples are provided for illustrative purposes and are not intended to limit the scope of the invention.

In the following description, for purposes of explanation, numerous details are set forth in order to provide a thorough understanding of the described embodiments. It will be apparent, however, to one skilled in the art that other embodiments of the invention may be practiced without some of these details. In other instances, structures and devices are shown in block diagram form. Several embodiments are described herein, and while various features are attributed to different embodiments, it should be understood that features described with respect to one embodiment may also be combined with other embodiments. However, by the same token, no single feature or several features of any described embodiment should be considered essential to every embodiment of the invention, as other embodiments of the invention may omit such features.

Unless otherwise indicated, all numbers used herein to express used quantities, dimensions, etc. are to be understood as being modified in all instances by the term "about". In this application, the use of the singular includes the plural unless specifically stated otherwise, and the use of the terms "and" and "or" means "and/or" unless stated otherwise. Furthermore, use of the term "comprises" as well as other forms, such as "includes" and "included" should be considered non-exclusive. Also, terms such as "element" or "component" encompass both elements and components forming one unit and elements and components forming more than one unit, unless specifically stated otherwise.

Various embodiments as described herein—in some cases when embodying software products, computer-implemented methods, and/or computer systems—represent tangible, concrete improvements over existing technical fields, including, but not limited to, communications technology, data transfer technology, data retrieval technology, hard disk drive (“HDD”) technology and/or the like. In other respects, some embodiments may improve the operation of user equipment or the system itself (e.g., communication system, data transfer system, data retrieval system, HDD system, etc.) "MFS") signal filtering and sliding window comprising successive search windows each having a bit length corresponding to the bit length of the sync marker to detect the position of the sync signal ("sync mark") within the data signal length to identify a portion of the data signal having a magnitude indicative of the synchronization mark; and using the computing system, by performing an analysis of the identified portion of the data signal having the magnitude indicative of the synchronization mark performing a phase measurement in part to identify a sub-portion of the identified portion of the data signal to refine the location of the sync mark within the data signal, the identified sub-portion having a signal indicative of the sync mark phase, the phase measurement being performed based on the filtering based on the MFS signal; and/or the like.

In particular, to the extent that any abstract concepts exist in the various embodiments, those concepts can be represented by devices, software, systems, and methods involving novel functionality (e.g., steps or operations) that extend beyond merely conventional computer processing operations, such as Implemented as described herein, the novel functionality is such as combining the preamble and synchronization markers into a single combined field that is in some cases significantly shorter than the fields currently used for preamble and synchronization markers, to name a few examples; Frequency-multiplied sine calculations provide magnitude and phase of multi-frequency or complex mode signals, allowing simple magnitude comparison techniques as well as in-band and out-of-band energy comparison techniques for detecting sync marks and/or the like. These functionalities can produce tangible results outside of implementing a computer system, which include, by way of example only, optimized syncmark detection that allows for higher performance (compared to conventional techniques) while reducing bandwidth, Thus allowing more bandwidth to be used for other purposes by eliminating the need for a separate preamble field, at least some of the tangible results can be observed or measured by users, HDD manufacturers, other communication system manufacturers, and the like.

some examples

We now turn to the embodiments as illustrated by the figures. 1 through 5 illustrate methods, systems, and apparatus for implementing an optimized communication system, and more particularly implementing a synchronization signal ( Some features of the method, system and apparatus for "synchronization mark") detection. The methods, systems, and apparatuses illustrated by FIGS. 1-5 refer to examples of different embodiments including various components and steps that may be considered alternatives or used in conjunction with each other in various embodiments. The description of the illustrated methods, systems, and apparatus shown in FIGS. 1-5 are provided for purposes of illustration and should not be considered as limiting the scope of the different embodiments.

Referring to the drawings, FIG. 1 is a schematic diagram illustrating a system 100 for implementing synchronization signal ("Sync Mark") detection using multi-frequency or multi-frequency sinusoidal ("MFS") signal-based filtering, in accordance with various embodiments.

In the non-limiting embodiment of FIG. 1 , system 100 may include computing system 105 and corresponding database(s) 110 . In some cases, computing system 105 and corresponding database(s) 110 may reside within user device 115 (represented in FIG. 1 by computing system 105a and corresponding database(s) 110a or the like), which may Including but not limited to one of a smartphone, mobile phone, tablet computer, laptop computer, desktop computer, smart television, media streaming device or media player, and/or the like. Alternatively or additionally, computing system 105 and corresponding database(s) 110 may be accessed via one or more networks 150 (represented in FIG. 1 by remote computing system 105b and corresponding database(s) 110b or the like), And may include, but is not limited to, at least one of a server computer, a cloud-based or distributed computing system over a network, and/or the like.

In some embodiments, computing system 105 may include, but is not limited to, data signal detection processor(s), digital signal processor(s), data retrieval processor(s) or other processor(s) and/or the like at least one of the . In some cases, database(s) 110 may include, but are not limited to, read-only memory ("ROM"), programmable read-only memory ("PROM"), erasable programmable read-only memory ("EPROM"), electronic Erasable Programmable Read-Only Memory (“EEPROM”), Flash Memory, Other Non-Volatile Memory Devices, Random Access Memory (“RAM”), Static Random Access Memory (“SRAM”), Dynamic Random Access Memory memory ("DRAM"), synchronous dynamic random access memory ("SDRAM"), virtual memory, RAM disk or other volatile memory devices, non-volatile RAM devices, and/or the like.

Although not shown, user device 115 may further include a communication system for communicating with other devices from which the user device receives data signals (e.g., data signal 120 or the like) and/or to which the user device transmits data signals. . In some cases, a communication system may include wireless communication devices capable of communicating using protocols including, but not limited to, the Bluetooth ^™ communication protocol, communication protocol or other 802.11 communication protocol suite, ZigBee communication protocol, Z-wave communication protocol or other 802.15.4 communication protocol suite, cellular communication protocol (e.g., 3G, 4G, 4GLTE, 5G, etc.) or other suitable communication protocol and/or at least one of the like.

In some embodiments, a data signal (e.g., data signal 120 or similar) received or otherwise analyzed by computing system 105 may be used within a hard disk drive (“HDD”) (e.g., HDD 125a or the like) or other hardware. By). Alternatively, data signals received or otherwise analyzed by computing system 105 may be included in data signals transmitted over a wireless medium (and received by a transceiver such as transceiver 125b or the like) or transmitted over a wired medium (and transmitted by an input port or the like). receiver) in the signal. In some cases, the system 100 may further include other data signaling devices 125n or the like, which may include input ports as well as cables, other memory storage devices, receiver devices, and the like. Although FIG. 1 depicts each device 125 as being external to, but communicatively coupled with, user device 115, various embodiments are not so limited and HDD 125a, transceiver 125b, and/or other data signal(s) One or more of devices 125n may be external to, but communicatively coupled with, user device 115 . Alternatively, one or more of HDD 125a, transceiver 125b, and/or other data signaling device(s) 125n may each be disposed within user device 115 (not shown in FIG. 1 ).

According to some embodiments, a data signal (e.g., data signal 120 or the like) that may be stored or contained in HDD 125a, received wirelessly via transceiver 125b, or stored or received by other data signaling device(s) 125n may contain data field (e.g., data field 135 or the like) preceded by a sync signal ("sync mark") (e.g., sync mark 130 or the like) and/or a servo mechanism ("servo") field (e.g., servo field 145 (any optional; existing in HDD or similar) etc.) preceded by a sync mark (for example, sync mark 140 (optional) or similar). In some cases, a sync mark (eg, sync mark 130 and/or sync mark 140, or the like) is among a plurality of sync marks disposed within a data signal (eg, data signal 120 or the like). In this case, each field (e.g., each of the one or more data fields 135 and/or each of the one or more servo fields 145 (if any), etc.) may be preceded by multiple Synchronization marks among the synchronization marks (eg, synchronization marks 130 and/or synchronization marks 140 corresponding to data field(s) 135 and/or servo field(s) 145 , respectively, or the like).

In operation, the computing system 105a and/or the remote computing system 105b (collectively, the "computing systems") may perform a method of implementing synchronization mark detection using filtering based on a multiplied or multi-frequency sinusoidal ("MFS") signal, as described below with respect to Figure 4 is shown and described.

These and other functions of system 100 (and its components) are described in more detail below with respect to FIGS. 3 and 4 .

2A and 2B (collectively "FIG. 2") are diagrammatic diagrams illustrating an example 200 of a synchronization mark detection method using single-frequency signal-based filtering and a preamble.

In some approaches, a preamble field (e.g., preamble field 205) generally precedes the synchronization mark in addition to a synchronization mark (which may be a bit pattern) (e.g., synchronization mark 210), where the preamble field is useful for measuring transmitted The phase of the input signal in order to set the sampling phase of the single frequency cycle mode for data recovery. As used in HDDs, the sync flag 210 and preamble field 205 are used for both the user data field and the servo field. In some cases, a single-bin discrete Fourier transform ("DFT") is used in the HDD to determine the phase of the preamble signal, and then use the determined phase to set the sampling phase for syncmark detection and data detection. The magnitude of this same DFT is also typically used to adjust the amplitude of the incoming signal using a gain loop.

As shown in FIG. 2, a typical servo waveform for an HDD starts with a periodic preamble pattern (eg, preamble field 205) followed by a sync mark (eg, sync mark 210). This pattern is written to disk as a digital bit stream such as that shown in FIG. 2 . In this example mode, the preamble pattern (or preamble field 205 ) is shown as a 36-bit preamble followed by a 36-bit synchronization flag 210 . In practice, the length of the preamble pattern typically approaches up to 100 or more bits. When the waveform is read from a disk (eg, HDD) and sampled through a band-limited channel, it looks similar to the noise-free medium gray solid line waveform 220 shown in the graph of FIG. 2A . In practice, the readback signal will contain noise. However, FIG. 2A is provided for illustrative purposes only, and thus noise has been omitted. In FIG. 2A , the dark gray dashed line or curve 215 represents a standard servo preamble synchronization digital waveform, while the medium gray solid line or curve 220 represents a standard servo preamble synchronization analog waveform.

To determine the phase and amplitude of the servo readback waveform, a one-bin DFT is computed on a portion of the preamble signal. Typically, the preamble has to be longer than the DFT window length in order to ensure that the entire DFT window fits into the actual preamble part of the readback signal in case there is some uncertainty in the starting point where the DFT calculation starts. A real-signal one-bin DFT can, and typically is, computed by multiplying the signal of interest (eg, the readback signal) by sine and cosine waves of the same frequency or period as the preamble signal. The graph in FIG. 2B graphically depicts what the sine and cosine waves or coefficients look like for a preamble signal with a 4-bit period and a readback sampling rate that is twice the bit rate.

Next, the magnitude of the preamble signal is calculated by the following equation:

where sin_sum is the sum of the data signal filtered by single-frequency sine coefficients (e.g., as shown in FIG. (eg, as shown by the dark gray dashed line or curve 230 in FIG. 2B , which represents the preamble cosine wave coefficients) the sum of the filtered data signals.

The phase of the preamble signal used to set the sampling phase for both sync mark detection and data detection is calculated by the following equation:

In some methods, a single-bin DFT sine/cosine coefficient value is generated simply by taking the sequence of bits used to write the preamble pattern and creating sine and cosine waves that match the period of the sequence of bits of the preamble. For example, for a 16-bit preamble pattern "1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0" with a 4-bit period (T), the sinusoidal filter coefficients would be sin(2*π*n/T ), where T=4 and n={0:15}, and the cosine filter coefficients will be cos(2*π*n/T), where T=4 and n={0:15}. If the readback signal is processed at twice the sampling rate of the writing bit rate, then the period T will be 8 instead of 4 and n={0:31} (ie twice the coefficient).

However, in these approaches, the syncmark detection system and method requires a long preamble, which limits the length of the syncmark and limits the amount of data within the signal (especially in the case of HDDs). Systems/apparatus and methods for implementing syncmark detection using MFS signal-based filtering, as described herein with respect to FIGS. not better) performance.

3A-3E (collectively "FIG. 3") are diagrammatic diagrams illustrating various non-limiting examples 300 of syncmark detection using MFS signal-based filtering, according to various embodiments.

As shown in FIG. 3A, a multi-frequency sinusoidal ("MFS") bit pattern 305 may be used instead of a single frequency preamble or synchronization mark approach. To create a sine wave with a variable frequency but a continuously smooth phase without a break in each half-cycle, the following technique can be implemented.

The MFS sinusoidal coefficients of the syncmarks are generated by: (1) Dividing the syncmark (e.g., MFS bit pattern 305 or similar) into a number of positive bits each corresponding to consecutive binary "ones" or "1"s in the syncmark A pattern (e.g., positive bit patterns 310a through 310e or the like) and a plurality of negative bit patterns (e.g., negative bit patterns 315a through 315e or the like) each corresponding to consecutive binary "zeros" or "0"s in the synchronization marks ; (2) generate for each of the plurality of positive bit patterns a sinusoidal half-cycle having a period corresponding to the number of consecutive binary ones (dark gray solid line defined by dashed lines corresponding to positive bit patterns 310a to 310e or 320, as shown, for example, in FIG. 3A); (3) generate for each of the plurality of negative bit patterns a negative sinusoidal half-cycle having a period corresponding to the number of consecutive binary ones (by corresponding to The dark gray solid line or the portion of the curve 320 defined by the dotted lines of the negative bit patterns 315a to 315e, as shown, for example, in FIG. The positive sinusoidal half-cycle is sequentially concatenated with the negative sinusoidal half-cycle to generate the MFS sinusoidal coefficients of the sync mark (eg, as depicted by the dark gray solid line or curve 320 in FIG. 3A ). For example, the MFS sine coefficients of such a bit pattern 305 (e.g., "1 1 1 0 0 1 1 11 0 0 0 0 0 1 1 1 0 0 0 11 0 0 1 1 1 0 0 0") are in the form of A positive half cycle (e.g., bit pattern 310a) starts, followed by a negative half cycle of period 2 (e.g., bit pattern 315a), followed by a positive half cycle of period 4 (e.g., bit pattern 310b), followed by a period negative half cycle of 5 (eg, bit pattern 315b), and so on.

Similarly, the MFS cosine coefficients of the sync-marks are generated by (1) dividing the sync-marks into a plurality of positive bit patterns each corresponding to consecutive binary ones in the sync-mark and multiple positive bit patterns each corresponding to consecutive binary zeros in the sync-mark negative bit patterns, a plurality of positive bit patterns alternating with a plurality of negative bit patterns; (2) generating for each of the plurality of positive bit patterns a sin-cosine half-cycle having a period corresponding to the number of consecutive binary ones; ( 3) generating a negative cosine half-cycle with a period corresponding to the number of consecutive binary ones for each of the plurality of negative bit patterns; and (4) in the same alternating order as the corresponding binary ones and binary zeros in the synchronization marks The positive and negative cosine half-cycles are cascaded together to generate the MFS cosine coefficients of the sync marks (eg, as depicted by the light gray dashed line or curve 325 in FIG. 3A ). Alternatively, the MFS cosine coefficients may be generated by phase shifting the MFS sine coefficients.

As shown in Figure 3A, the frequency of the MFS sine (or cosine) wave varies instantaneously at each sine wave zero-crossing, but the phase is continuously smooth.

To detect this MFS signal, the multi-frequency sine/cosine coefficients are then multiplied with the incoming signal samples in a sliding window manner, in a manner similar to that done for finite impulse response ("FIR") filters or matched filters. For example, using a bit length (which may be a known length or number of bits of a sync mark to be detected; such as but not limited to 30, 36 or 54 bits) on the incoming signal samples, as shown in FIGS. 3A to 3D , or similar), whereby the first part of the incoming signal samples having the same number of bits as the sliding window is multiplied by the multifrequency sine/cosine coefficients. Next, the search window is shifted by a predetermined amount (such as, but not limited to, by one bit) [hence, the "sliding window"], and the next portion of incoming signal samples having the same number of bits as the search window is multiplied by a number of frequencies Sine/cosine coefficients. and so on. The results of each of these operations on a portion of the incoming signal samples are analyzed to detect MFS signals (e.g., by identifying signals of MFS signals whose signal magnitudes are maximum within a certain search window or whose signal magnitudes are above a predetermined threshold) magnitude or the like), as described in detail below.

These multifrequency sine/cosine coefficients can be used to calculate the magnitude and phase of the MFS signal of interest as follows, where the magnitude of the multiplied signal is calculated by the following equation:

where mfs_sin_sum is the sum of the data signal filtered by the MFS sine coefficients (e.g., as shown by the dark gray solid line or curve 320 in FIG. As shown in FIG. 3A by the light gray dashed line or curve 325, which represents the sum of the MFS cosine wave coefficient) filtered data signal.

The phase of the MFS signal that can be used for data detection and other processes is calculated by the following equation:

Next, the position of the synchronization marker is usually identified as the bit position whose mfs_signal_magnitude is the largest within a certain search window or whose signal magnitude value is higher than a predetermined threshold. This initial bit position of the peak value based on mfs_signal_magnitude can be further refined to a more exact position using mfs_signal_phase. In fact, even when the initial bit position based on mfs_signal_magnitude has several erroneous bits due to noise, mfs_signal_phase can still be used to provide the correct position including the subbit phase.

Merely as an example, in some cases this MFS detection technique can be used to measure a frequency offset defined as the difference between the signal being measured (or the bit rate of the incoming signal) and the frequency used to detect the sync marks and The difference in frequency compared to the internal clock frequency (or bit rate based on the internal clock) of the circuit that recovers the data. Ideally, the two match exactly, but in practice they may not be identical. The MFS technique can be used to measure the phase difference between two frequencies by measuring the phase of the sync-mark pattern at two different points in time or at two subsections of the sync-mark and determining how much the phase changes between those two points in time. Frequency difference or "frequency offset". More specifically, two separate MFS sine and cosine coefficients can be generated for two different parts of the sync mark. In some cases, the two portions may be adjacent to each other. Alternatively, the two parts may be separated by a third part. In some examples, the two portions may be adjacent but not overlapping. Alternatively, the two parts may overlap. In some cases, the two parts may have the same (bit) length. Alternatively, the two parts may have different (bit) lengths. Knowing the frequency offset may allow better data detection and/or adjust the internal clock rate to more accurately match the signal.

For example, a syncmark may have zero crossings of a sine wave (or peak crossings of a cosine wave) at the start, exact midpoint, and end of the syncmark, in which case the first part contains the first half of the syncmark and the second part Contains the second half of the sync marker, and both parts have the same length. In another example, the syncmark may be at the start of the syncmark, at approximately one-third the length of the syncmark closest to the start, at approximately one-quarter the length of the syncmark closest to the end, and at the end of the syncmark has the zero crossing of the sine wave (or the peak crossing of the cosine wave), in which case the first part contains the first third (1/3) of the sync mark and the second part contains the last quarter of the sync mark One (1/4), and halfway between the first part and the second part is five-twelfths (5/12) of the sync mark.

The frequency offset can be calculated based on the following equation:

Wherein delta_phase can be determined by the following steps: by generating the MFS sine coefficient and the MFS cosine coefficient of the first part of the synchronization mark and taking the sum of the first part of the synchronization mark filtered by the MFS sine coefficient and dividing by the MFS cosine coefficient taking the arctangent of the filtered sum of the first part of the sync-mark, measuring the phase of the first part of the sync-mark; by generating the MFS sine and MFS cosine coefficients of the second part of the sync-mark and taking The arc tangent of the sum of the second part of the sync marks filtered by the MFS sine coefficient divided by the sum of the second part of the sync marks filtered by the MFS cosine coefficient measures the the phase of the second portion; and calculating the phase difference between the measured phases of the first and second portions of the synchronization mark; wherein delta_time can be determined by: determining the first and second portions of the synchronization mark The number of bits between one and the midpoint of the second part.

Another advantage of this MFS detection technique is that it readily allows non-linear detection methods, for example, comparing in-band energy with out-of-band energy or the total signal energy within a certain search window, where the window length for energy calculation is Will be set to the predetermined length of the sync marker.

The in-band energy is calculated by squaring the magnitude of the portion of the data signal as follows:

in-band_energy = (mfs_signal_magnitude) ² . (equation 6)

The total signal energy is calculated by summing the squares of all samples of the data signal within the search window as follows:

total_signal_energy=∑[(each_signal_sample) ² ]. (Equation 7)

The out-of-band energy is calculated by subtracting the in-band energy from the total signal energy as follows:

out-of-band_energy = total_signal_energy-in-band_energy. (Equation 8)

3B and 3C depict a non-limiting example of a 54-bit sync flag pattern (eg, sync flag 330 or the like). For example, a comparison plot of a digital waveform (eg, digital waveform 335 or the like) and a band-limited noise-free sampled readback signal (eg, analog waveform 340 or the like) is shown in FIG. 3B. In some cases, for matched filter comparisons, the matched filter coefficients are the same as the noise-free readback signal. Here, the readback sample rate is twice the write bit rate, although embodiments are not limited thereto. A plot of corresponding MFS sine coefficients (eg, MFS sine wave 345 or the like) and MFS cosine coefficients (eg, MFS cosine wave 350 or the like) is shown in FIG. 3C.

FIGS. 3D and 3E depict simulated results ( FIG. 3D ) of syncmark detection for a 54-bit syncmark pattern (e.g., syncmark 330 or similar) comparing three syncmark detection methods and over a range of noise levels ( Standard deviation of the residual error for phase measurements made on data signals with random phase shifts using white noise) (Fig. 3E).

Referring to Figure 3D, three syncmark detection methods include: (a) matched filter method (where filter coefficients are generated using a noise-free readback signal) [the matched filter technique is used for Optimal linear filtering method for signal detection of noise]; (b) MFS signal magnitude method (where MFS filter sine/cosine coefficients are generated as described above with respect to FIG. 3A ); and (c) MFS signal in-band and in-band Comparison of External Energy Ratio (which is also described above with respect to Figure 3A). The number of bits used for the sync flag mode can be selected based on performance goals and/or requirements, and is not limited to the 54-bit and 36-bit modes shown in FIG. 3D.

As shown in FIG ^. 3D, for all three detection methods, the maximum peak position of the corresponding method is used (which in FIG. The position of the sync mark is identified corresponding to a servo missing rate of 1/1000000, etc.). For comparison purposes, except for the 54-bit sync mark pattern (the simulation results of which are shown in FIG. , 360a and 365a), a 36-bit sync mark pattern is also included in the simulation (the simulation results are shown in Fig. 3D by medium gray, light gray corresponding to methods (a), (b) and (c) Gray and dark gray dotted circle lines or curves 355b, 360b and 365b). As can be seen for both 54-bit and 36-bit modes, the MFS energy ratio approach (the results of which are depicted in FIG. The matched filter technique is exceeded (the results of which are depicted in Figure 3D by the medium gray solid line or curve 355a and the medium gray dashed circle line or curve 355b).

As described above, the phase of the MFS signal can be calculated using Equation 4 above. The period of the MFS signal phase measurement is approximately twice the average of the full period of the MFS sine/cosine signal. For example, for the 54-bit pattern shown in Figures 3B and 3C, the MFS sine wave has 7 cycles over 54 bits, which implies that the period of the mfs_signal_phase measurement is ones. Therefore, when using the MFS peak magnitude or energy ratio methods (methods (b) and (c), respectively, as described above for Fig. Distance from real location in /> Within a bit period, phase measurements can then be used to refine the original position into a more precise estimate, which includes sub-bit phases.

In some embodiments, a two-step phase measurement process may be used for maximum accuracy. Assuming that the initial peak magnitude is initially found to be 2 bits away from the true sync mark position, then the phase is first calculated based on this position, which differs by 2 bits (this means that the mfs_sin_sum and mfs_cos_sum values are 2 out of 54 bits at the true sync computed outside the marker window, which would add 2 bits of noise to the result). If the first phase calculation is used to calculate the second phase measurement based on the adjusted sync mark position, then the second phase calculation will be more completely calculated on the sync mark signal, which can improve the accuracy of the final second phase measurement.

Figure 3E plots the standard deviation of the residual error of phase measurements made on data signals with random phase shifts across a range of noise levels (using white noise). As shown in FIG. 3E , the light gray short dashed line or curve 375 is the phase measurement for a 32-bit window with a 4-bit period for the single-frequency periodic pattern, and the gray dot-dash line or curve 380 is the single-frequency periodic pattern with 4-bit period , while the dark gray dashed line or curve 385 is the phase measurement for a 56-bit window with a single frequency period mode of 8 bit periods, and the solid black line or curve 370 is for a bit period of ~7.7 bits Phase measurements in 54-bit MFS mode.

As shown in the plot, the MFS phase performance of the 54-bit mode (eg, black solid line or curve 370 ) is almost as good as expected for a 54-bit single tone with a period of 7.7 bits. This is very close to or identical to the result of a 56-bit window with a single-tone 8-bit period (eg, dark gray dashed line or curve 385). In conclusion, the MFS phase measurements are very close to the performance of comparable single-tone DFT phase measurements.

As described herein, syncmark detection using MFS signal based filtering allows for a significant reduction in the length of the combined preamble and syncmark field by combining the preamble and syncmark fields in a single field. As described herein, syncmark detection using MFS signal based filtering also allows excellent system detection performance on both the MFS magnitude and phase of the syncmark using DFT-type calculations. Syncmark detection using filtering based MFS signals, as described herein, also allows for detection methods that rely on in-band and out-of-band comparisons, where energy ratio methods (e.g., method (c) as described above with respect to FIG. 3D ) Less sensitive to amplitude errors and/or variations. As described herein, syncmark detection using MFS signal based filtering improves system performance by allowing higher detection rates and/or providing more bandwidth for data. As described herein, syncmark detection using MFS signal based filtering improves circuit area, size and/or power by providing high performance with a relatively simple circuit implementation. For example, MFS coefficients are easy to generate and are reproducible across several cycle length choices. Also, since the MFS method is only based on a priori known digital patterns, there is no adapted ideal sample dependence or channel bit density dependence.

These and other functions of illustrative instance(s) 300 (and their components) are described in more detail herein with respect to FIGS. 1 and 4 .

FIG. 4 is a flowchart illustrating a method 400 for implementing syncmark detection using MFS signal-based filtering in accordance with various embodiments.

Although techniques and procedures are depicted and/or described in a particular order for purposes of illustration, it should be understood that certain procedures may be reordered and/or omitted within the scope of various embodiments. Furthermore, while the method 400 illustrated by FIG. 4 may be implemented by or using the systems, instances or embodiments 100 and 300 (or components thereof) of FIGS. ), but such methods can also be implemented using any suitable hardware (or software) implementation. Similarly, while each of the systems, instances, or embodiments 100 and 300 of FIGS. 1 and 3 (or components thereof), respectively, may operate according to the method 400 illustrated by FIG. 4 (e.g., by executing read instructions on medium), although each of the systems, examples or embodiments 100 and 300 of FIGS. 1 and 3 may also each operate according to other modes of operation and/or execute other suitable procedures.

In the non-limiting example of FIG. 4 , method 400 may include, at block 405, using a computing system to detect synchronization signals by using multi-frequency sinusoidal ("MFS") signal-based filtering and a sliding window comprising a continuous search window ( A "sync mark") within a data signal, the consecutive search windows each having a bit length corresponding to the bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark. At block 410, the method 400 may include, using the computing system, identifying the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark. The position of the sync mark within the data signal is refined by subsections of the identified portion having a phase indicative of the sync mark, the phase measurement being based on the MFS-based signal filtering is performed.

According to some embodiments, using the sliding window includes the computing system: measuring a magnitude of a portion of the data signal within a search window; and continuously moving the sliding window by one sample along the data signal to A further search window is formed and the magnitude of the portion of the data signal within the further search window is measured.

In some embodiments, detecting the position of the synchronization mark includes comparing the MFS sine coefficient of the synchronization mark and the MFS cosine coefficient of the synchronization mark with each consecutive search window of the data signal in the sliding window to generate a data signal filtered by the MFS sine coefficients and a data signal filtered by the MFS cosine coefficients for each search window, respectively. The MFS sine coefficients and the MFS cosine coefficients of the synchronization marks may be generated as described above with respect to FIG. 3 .

In some cases, the magnitude of the portion of the data signal within each search window is determined by squaring the sum of the data signal filtered by the MFS sine coefficients and the sum of the data signals filtered by the MFS cosine coefficients. The sum of the data signals is squared and the square root of the sum of said sum of squares of said data signal filtered by MFS sine coefficients and said sum of squares of said data signal filtered by MFS cosine coefficients is calculated, as e.g. above Wen is defined in Equation 3.

In some examples, identifying the portion of the data signal having the magnitude indicative of the synchronization flag includes identifying at least one of a magnitude of the data signal having a maximum magnitude or a magnitude exceeding a predetermined threshold magnitude part of the person.

In some embodiments, identifying the portion of the data signal having the magnitude indicative of the synchronization flag includes identifying the portion of the data signal that has the largest in-band to out-of-band energy ratio or has the largest in-band to total energy ratio. Part of the signal energy ratio.

According to some embodiments, the phase of the portion of the data signal within each search window is determined by taking the sum of the data signal filtered by the MFS sine coefficients and dividing by the sum of the data signal filtered by the MFS cosine coefficients The arc tangent of the sum is calculated as defined, for example, in Equation 4 above.

By way of example only, in some cases, method 400 (although not shown in FIG. 4 ) may further include, using the computing system, determining the frequency of the data signal based on the MFS sine coefficients and MFS cosine coefficients and the internal frequency of the computing system. The frequency offset between the clock's internal clock frequencies. In some examples, method 400 (although not shown in FIG. 4 ) may further include, using the computing system, adjusting the internal clock frequency to match the frequency of the data signal based on the determined frequency offset. In some cases, determining the frequency offset may include by generating MFS sine coefficients and MFS cosine coefficients of the first portion of the synchronization mark and taking the sum of the first portion of the synchronization mark filtered by the MFS sine coefficients Dividing by the arctangent of the sum of the first part of the sync-mark filtered by the MFS cosine coefficients, the phase of the first part of the sync-mark is measured; by generating the MFS sine coefficient of the second part of the sync-mark and MFS cosine coefficients and taking the arctangent of the sum of the second part of the sync marks filtered by the MFS sine coefficients divided by the sum of the second part of the sync marks filtered by the MFS cosine coefficients, measuring the calculating the phase difference between the measured phases of the first and second portions of the synchronization mark; and dividing the calculated phase difference by the The number of bits between the midpoints of the first and second portions of the synchronization flag; as defined, for example, in Equation 5 above.

In some embodiments, the method 400 may include, at optional block 415, using the computing system, based on the phase of the identified portion of the data signal having the magnitude indicative of the synchronization mark It is determined whether the polarity of the data signal has been inverted.

In some cases, the synchronization marker replaces a combination of a single frequency synchronization signal and a preamble. In some examples, the bit length of the synchronization flag is less than the total bit length of the combination of the single frequency synchronization signal and the preamble. Alternatively, the bit length of the synchronization flag is the same as the total bit length of the combination of the single frequency synchronization signal and the preamble. Alternatively, the bit length of the synchronization flag is greater than the total bit length of the combination of the single frequency synchronization signal and the preamble.

According to some embodiments, method 400 may further comprise, using said computing system, identifying a start point of a data field within said data signal based on said refined location of said synchronization mark within said data signal (at block 420 at); and in response to identifying the origin of the data field, performing, using the computing system, retrieving data from the data field (at block 425).

Examples of system and hardware implementations

5 is a block diagram illustrating an example of a computer or system hardware architecture in accordance with various embodiments. Figure 5 provides a schematic illustration of one embodiment of a computer system 500 of service provider system hardware that can perform the methods provided by various other embodiments as described herein, and/or can perform as described above That performs the functions of a computer or hardware system (ie, computing system 105a or 105b and user device 115, etc.). It should be noted that FIG. 5 is only intended to provide a general illustration of the various components, each of which one or more (or none of which) may be utilized as appropriate. FIG. 5 thus illustrates in general terms how individual system elements may be implemented in a relatively separate or relatively more integrated manner.

Computer or hardware system 500 - which may represent an embodiment of a computer or hardware system as described above with respect to FIGS. Hardware elements that are coupled (or otherwise in communication, where appropriate). The hardware components may include: one or more processors 510, including but not limited to one or more general-purpose processors and/or one or more special-purpose processors (such as microprocessors, digital signal processing chips, graphics acceleration processing device and/or the like); one or more input devices 515, which may include, but are not limited to, a mouse, keyboard, and/or the like; and one or more output devices 520, which may include, but are not limited to, a display device, a printer and/or the like.

The computer or hardware system 500 may further include (and/or be in communication with) one or more storage devices 525, which may include, but are not limited to, local and/or network-accessible storage devices, and/or may include, but Not limited to magnetic disk drives, drive arrays, optical storage devices, solid state storage devices such as random access memory ("RAM") and/or read only memory ("ROM"), which are programmable, flash updateable, and/or the like By. Such storage devices may be configured to implement any suitable data storage, including but not limited to various file systems, database structures, and/or the like.

The computer or hardware system 500 may also include a communication subsystem 530, which may include, but is not limited to, a modem, a network card (wireless or wired), an infrared communication device, a wireless communication device, and/or a chipset (e.g., a Bluetooth ^™ device, 802.11 devices, WiFi devices, WiMax devices, WWAN devices, cellular communication facilities, etc.), and/or the like. Communications subsystem 530 may allow data to be exchanged with a network (such as the network described below, to name one example), other computer or hardware systems, and/or any other devices described herein. In many embodiments, computer or hardware system 500 will further include working memory 535, which may include RAM or ROM devices, as described above.

The computer or hardware system 500 may also include software elements shown currently located within working memory 535, including an operating system 540, device drivers, executable libraries, and/or other code, such as one or more application programs 545, the application programs may include computer programs provided by various embodiments (including but not limited to hypervisors, VMs, and the like), and/or may be designed to implement methods provided by other embodiments and/or configured by Other embodiments provide systems as described herein. Merely as an example, one or more programs described with respect to the method(s) discussed above may be implemented as codes and/or instructions executable by a computer (and/or a processor within a computer); then, on the one hand , such codes and/or instructions may be used to configure and/or adapt a general purpose computer (or other device) to perform one or more operations in accordance with the described methods.

These sets of instructions and/or codes may be encoded and/or stored on a non-transitory computer-readable storage medium, such as the storage device(s) 525 described above. In some cases, the storage medium may be incorporated within a computer system, such as system 500 . In other embodiments, the storage medium may be separate from the computer system (i.e., removable media, such as an optical disc, etc.) and/or provided in an installation package such that the storage medium may be used for programming, configuration, and/or adaptation A general-purpose computer on which instructions/code are stored. These instructions may take the form of executable code executable by the computer or hardware system 500, and/or may take the form of source and/or installable code that is compiled and/or installed on the computer or in the form of executable code when on the hardware system 500 (eg, using any of a variety of commonly available compilers, installers, compression/decompression utilities, etc.).

It will be obvious to a person skilled in the art that substantial variations may be made according to particular requirements. For example, custom hardware (such as programmable logic controllers, field programmable gate arrays, application specific integrated circuits, and/or the like) can also be used, and/or can be implemented in hardware, software (including portable software, such as applets, etc.) Or implement specific elements in both. Additionally, connections to other computing devices, such as network input/output devices, may be employed.

As mentioned above, on the one hand, some embodiments may employ a computer or hardware system (such as the computer or hardware system 500 ) to perform methods according to various embodiments of the present invention. According to one set of embodiments, one or more instructions contained in working memory 535 (which may be incorporated into operating system 540 and/or other code, such as application programs 545, are executed by computer or hardware system 500 in response to processor 510 ) to perform some or all of the procedures of such methods. Such instructions may be read into working memory 535 from another computer-readable medium, such as one or more of storage device(s) 525 . Merely by way of example, execution of the sequences of instructions contained in working memory 535 may cause processor(s) 510 to perform one or more procedures of the methods described herein.

As used herein, the terms "machine-readable medium" and "computer-readable medium" refer to any medium that participates in providing data that causes a machine to operate in some manner. In embodiments implemented using a computer or hardware system 500, various computer-readable media may participate in providing instructions/code to processor(s) 510 for execution and/or may be used to store and/or carry such instructions /code (for example, as a signal). In many implementations, computer readable media are non-transitory, physical and/or tangible storage media. In some embodiments, computer readable media may take various forms including, but not limited to, non-volatile media, volatile media, or the like. Non-volatile media include, for example, optical and/or magnetic disks, such as storage device(s) 525 . Volatile media includes, but is not limited to, dynamic memory, such as working memory 535 . In some alternative embodiments, the computer-readable medium may take the form of a transmission medium including, but not limited to, coaxial cables, copper wire, and fiber optics, including the electrical wires that comprise the bus 505 and the various components of the communication subsystem 530. component (and/or the medium through which communications subsystem 530 provides communications with other devices). In an alternative set of embodiments, transmission media can also take the form of waves (including but not limited to radio, acoustic and/or light waves, such as those generated during radio-wave and infrared data communications).

Common forms of physical and/or tangible computer readable media include, for example, floppy disks, floppy disks, hard disks, magnetic tape, or any other magnetic media, CD-ROMs, any other optical media, punched cards, paper tape, any other physical media with a pattern of holes , RAM, PROM and EPROM, FLASH-EPROM, any other memory chip or cartridge, a carrier wave as described hereinafter, or any other medium from which a computer can read instructions and/or codes.

Various forms of computer-readable media may be involved in carrying one or more sequences of one or more instructions to processor(s) 510 for execution. By way of example only, the instructions were originally carried on a magnetic and/or optical disk on the remote computer. The remote computer can load the instructions into its dynamic memory and send the instructions as signals over a transmission medium for receipt and/or execution by the computer or hardware system 500 . These signals, which may be in the form of electromagnetic signals, acoustic signals, optical signals, and/or the like, are all examples of carrier waves upon which instructions may be encoded according to various embodiments of the invention.

Communication subsystem 530 (and/or components thereof) will typically receive the signal, and bus 505 may then carry the signal (and/or data, instructions, etc. carried by the signal) to working memory 535, from which processor(s) 505 Retrieve and execute instructions from the working memory. The instructions received by working memory 535 may optionally be stored on storage device 525 either before or after execution by processor(s) 510 .

While specific features and aspects have been described with respect to a few embodiments, those skilled in the art will recognize that many modifications may be made. For example, the methods and processes described herein may be implemented using hardware components, software components, and/or any combination thereof. Furthermore, although the various methods and processes described herein may be described with respect to specific structural and/or functional components for ease of description, the methods provided by the various embodiments are not limited to any specific structural and/or functional architecture, but rather Can be implemented on any suitable hardware, firmware and/or software configuration. Similarly, although particular functionality is ascribed to a particular system component, unless the context dictates otherwise, this functionality need not be limited thereto and may be distributed among various other system components in accordance with several embodiments.

Furthermore, although the procedures of the methods and processes described herein are described in a particular order for ease of description, unless the context dictates otherwise, various procedures may be reordered, added, and/or omitted according to various embodiments. Furthermore, procedures described with respect to one method or process may be incorporated within other described methods or processes; likewise, system components described with respect to a particular architecture and/or system may be organized in alternative architectures and/or Or incorporated into other described systems. Thus, although various embodiments are described as having - or without - particular features for ease of description and illustrating aspects of those embodiments, certain features herein may be substituted, added, and/or deleted from other described embodiments. Various components and/or features described in the embodiments, unless the context dictates otherwise. Therefore, while several embodiments have been described above, it will be understood that the invention is intended to cover all modifications and equivalents coming within the scope of the appended claims.

Claims (20)

1. A method for implementing synchronization signal ("sync mark") detection, the method comprising:

detecting, using a computing system, a position of a synchronization signal ("sync mark") within a data signal by using filtering based on a multi-frequency sinusoidal "MFS" signal and a sliding window comprising successive search windows, each having a bit length corresponding to a bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark; and

using the computing system, refining the position of the synchronization mark within the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark to identify a sub-portion of the identified portion of the data signal having a phase indicative of the synchronization mark, the phase measurement being performed based on the MFS signal-based filtering.

2. The method of claim 1, wherein the computing system comprises at least one of a data signal detection processor, a digital signal processor, a data retrieval processor, a processor of a mobile device, a processor of a user device, a server computer, a cloud-based computing system on a network, or a distributed computing system.

3. The method of claim 1, wherein using the sliding window comprises:

measuring a magnitude of a portion of the data signal within a search window; and

The sliding window is continuously moved along the data signal for one sample to form another search window and the magnitude of the portion of the data signal within the other search window is measured.

4. The method of claim 1, wherein detecting the position of the syncmark comprises multiplying an MFS sine coefficient of the syncmark and an MFS cosine coefficient of the syncmark with the portion of the data signal within each successive search window of the sliding window to generate a data signal filtered by an MFS sine coefficient and a data signal filtered by an MFS cosine coefficient, respectively, for each search window.

5. The method of claim 4, wherein the MFS sine coefficient of the sync mark is generated by:

dividing the sync mark into a plurality of positive bit patterns each corresponding to a consecutive binary one in the sync mark and a plurality of negative bit patterns each corresponding to a consecutive binary zero in the sync mark, the plurality of positive bit patterns alternating with the plurality of negative bit patterns;

Generating for each of the plurality of positive bit patterns a positive sine half cycle having a number of periods corresponding to consecutive binary ones;

generating for each of the plurality of negative bit patterns a negative sinusoidal half cycle having a number of periods corresponding to consecutive binary ones; and

Positive and negative sinusoidal half-cycles are concatenated together in the same alternating order as the corresponding binary ones and zeros in the sync mark to generate the MFS sinusoidal coefficients of the sync mark.

6. The method of claim 4, wherein the magnitude of the portion of the data signal within each search window is calculated by squaring a sum of the data signals filtered by MFS sine coefficients and squaring a sum of the data signals filtered by MFS cosine coefficients, and calculating a square root of a sum of the squares of the data signals filtered by MFS sine coefficients and a sum of the squares of the data signals filtered by MFS cosine coefficients.

7. The method of claim 6, wherein identifying the portion of the data signal having the magnitude indicative of the synchronization mark comprises identifying a portion of the data signal having at least one of a maximum magnitude or a magnitude exceeding a predetermined threshold magnitude.

8. The method of claim 4, wherein identifying the portion of the data signal having the magnitude indicative of the synchronization mark comprises identifying a portion of the data signal having a maximum in-band to out-of-band energy ratio or having a maximum in-band to total signal energy ratio, wherein the in-band energy is calculated by squaring the magnitude of the portion of the data signal, wherein the total signal energy is calculated by summing squares of all samples of the data signal within a search window, and wherein the out-of-band energy is calculated by subtracting the in-band energy from the total signal energy.

9. The method of claim 4, wherein a phase of the portion of the data signal within each search window is calculated by dividing the sum of the data signals filtered by MFS sine coefficients by an arctangent of the sum of the data signals filtered by MFS cosine coefficients.

10. The method as recited in claim 1, further comprising:

determining, using the computing system, a frequency offset between a frequency of the data signal and an internal clock frequency of an internal clock of the computing system based on MFS sine coefficients and MFS cosine coefficients, wherein determining the frequency offset comprises:

Measuring a phase of a first portion of the syncmark by generating MFS sine coefficients and MFS cosine coefficients of the first portion of the syncmark and taking an arctangent of a sum of the first portion of the syncmark filtered by MFS sine coefficients divided by a sum of the first portion of the syncmark filtered by MFS cosine coefficients;

measuring a phase of a second portion of the syncmark by generating MFS sine and MFS cosine coefficients of the second portion of the syncmark and taking an arctangent of a sum of the second portion of the syncmark filtered by MFS sine coefficients divided by a sum of the second portion of the syncmark filtered by MFS cosine coefficients;

calculating a phase difference between the measured phases of the first and second portions of the synchronizing mark; and dividing the calculated phase difference by a number of bits between midpoints of the first and second portions of the synchronization mark; and

The internal clock frequency is adjusted based on the determined frequency offset to match the frequency of the data signal using the computing system.

11. The method as recited in claim 1, further comprising:

Identifying, using the computing system, a start point of a data field within the data signal based on the refined position of the synchronization mark within the data signal; and

In response to identifying the origin of the data field, retrieving data from the data field is performed using the computing system.

12. An apparatus for implementing synchronization signal ("sync mark") detection using frequency doubled sinusoidal signal based filtering, comprising:

at least one processor; and

A non-transitory computer-readable medium communicatively coupled to the at least one processor, the non-transitory computer-readable medium having stored thereon computer software comprising a set of instructions that, when executed by the at least one processor, cause the apparatus to:

detecting a position of a synchronization signal ("sync mark") within a data signal by using filtering based on a multi-frequency sinusoidal "MFS" signal and a sliding window comprising successive search windows, each having a bit length corresponding to a bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark; and

Refining the position of the synchronization mark within the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark to identify a sub-portion of the identified portion of the data signal having a phase indicative of the synchronization mark, the phase measurement being performed based on the MFS signal-based filtering.

13. The apparatus of claim 12, wherein the apparatus comprises at least one of a data signal detection processor, a digital signal processor, a data retrieval processor, a processor of a mobile device, a processor of a user device, a server computer, a cloud-based computing system on a network, or a distributed computing system.

14. The apparatus of claim 12, wherein the data signal is included in a hard disk drive, wherein the sync mark is among a plurality of sync marks disposed within the data signal, wherein the data signal comprises at least one data field and a servo ("servo") field, each field being preceded by a sync mark among the plurality of sync marks.

15. The apparatus of claim 12, wherein the data signal is included in a signal transmitted over one of a wireless medium or a wired medium.

16. The apparatus of claim 12, wherein detecting the position of the syncmark comprises multiplying an MFS sine coefficient of the syncmark and an MFS cosine coefficient of the syncmark with the portion of the data signal within each successive search window of the sliding window to generate a data signal filtered by an MFS sine coefficient and a data signal filtered by an MFS cosine coefficient, respectively, for each search window.

17. The apparatus of claim 16, wherein the magnitude of the portion of the data signal within each search window is calculated by squaring a sum of the data signals filtered by MFS sine coefficients and squaring a sum of the data signals filtered by MFS cosine coefficients, and calculating a square root of a sum of the squares of the data signals filtered by MFS sine coefficients and a sum of the squares of the data signals filtered by MFS cosine coefficients.

18. The apparatus of claim 16, wherein identifying the portion of the data signal having the magnitude indicative of the synchronization mark comprises identifying a portion of the data signal having a maximum in-band to out-of-band energy ratio or having a maximum in-band to total signal energy ratio, wherein the in-band energy is calculated by squaring the magnitude of the portion of the data signal, wherein the total signal energy is calculated by summing squares of all samples of the data signal within a search window, and wherein the out-of-band energy is calculated by subtracting the in-band energy from the total signal energy.

19. The apparatus of claim 16, wherein a phase of the portion of the data signal within each search window is calculated by dividing the sum of the data signals filtered by MFS sine coefficients by an arctangent of the sum of the data signals filtered by MFS cosine coefficients.

20. A computing system comprising logic that, when executed, is configured to:

detecting the position of a synchronization signal ("sync mark") within a data signal by using a multi-frequency sinusoidal "MFS" signal-based filtering and a sliding window comprising successive search windows each having a bit length corresponding to the bit length of the sync mark to identify a portion of the data signal having a magnitude indicative of the sync mark, the MFC filtering comprising multiplying an MFS sine coefficient of the sync mark and an MFS cosine coefficient of the sync mark with the portion of the data signal within each successive search window of the sliding window to generate a data signal filtered by an MFS sine coefficient and a data signal filtered by an MFS cosine coefficient, respectively, for each search window; and

refining the position of the synchronization mark within the data signal by performing a phase measurement on the identified portion of the data signal having the magnitude indicative of the synchronization mark to identify a sub-portion of the identified portion of the data signal having a phase indicative of the synchronization mark, the phase measurement calculated by taking the arctangent of the sum of the data signals filtered by MFS sine coefficients divided by the sum of the data signals filtered by MFS cosine coefficients.