CN117557444A - Geometry processing device, graphics processor and electronic equipment - Google Patents
Geometry processing device, graphics processor and electronic equipment Download PDFInfo
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Abstract
The geometric processing device comprises a geometric shape distribution unit, a plurality of geometric processing pipelines, a geometric arbiter and a tile pipeline, wherein the geometric shape distribution unit distributes a corresponding geometric processing pipeline for each primitive packet and transmits the primitive packet to the corresponding geometric processing pipeline, and the distribution information of each primitive packet is transmitted to the geometric arbiter; the geometric processing pipeline transmits the geometric processing result of the primitive packet to the geometric arbiter; and the geometric arbiter transmits the geometric processing result of the primitive packet to the tile pipeline according to the allocation information of the primitive packet, and the tile pipeline carries out tile processing on the geometric processing result of the received primitive packet to obtain a tile processing result. The geometry processing device of the embodiment of the disclosure has simple design, records the sequence among the primitive packets by controlling the sequence of the primitive packet allocation information, and is easy for error localization.
Description
Technical Field
The present disclosure relates to the field of image rendering, and in particular, to a geometry processing device, a graphics processor, and an electronic device.
Background
Tile-based Rendering (TBR) is a Rendering technique commonly used in computer graphics. It is mainly used for real-time rendering, especially in mobile devices and embedded systems, to improve the performance and energy efficiency of graphics processors (Graphic Process Unit, GPU).
In tile rendering, geometry processing (Geometry Processing), tile processing (Tiling Processing), and fragment processing (Fragment Processing) are the primary rendering pipeline stages for processing geometry, tile, and fragment (pixel) information during rendering. Modern graphics processors are provided with multiple geometry processing pipelines in the geometry processing stage in order to fully utilize the parallel computing resources of the hardware. The outputs of these parallel geometry processing pipelines need to be fed into the post-tile pipeline in the order of the original geometry (primitive packets) through the selection of the arbiter.
Although the arbiter proposed in the prior art can solve the order problem, there is still room for optimization.
Disclosure of Invention
In view of this, the present disclosure proposes a geometry processing device, a graphics processor, and an electronic apparatus, where the geometry processing device of the embodiments of the present disclosure is simple in design, and is easy for error localization by recording the sequence between primitive packets through sequence control of primitive packet allocation information.
According to an aspect of the present disclosure, there is provided a geometry processing apparatus, including a geometry distribution unit, a plurality of geometry processing pipelines, a geometry arbiter, and a tile pipeline, where the geometry distribution unit is configured to obtain a command stream to be executed, split a drawing command included in the command stream into a plurality of primitive packets, distribute a corresponding geometry processing pipeline for each primitive packet and transmit the primitive packet to the corresponding geometry processing pipeline, and transmit distribution information of each primitive packet to the geometry arbiter, where a transmission order of the distribution information of the primitive packets is the same as an order of the primitive packets in the command stream; the geometric processing pipeline is used for carrying out geometric processing on the received primitive packet and transmitting the geometric processing result of the primitive packet to the geometric arbiter; the geometric arbiter is used for transmitting the geometric processing result of the primitive packet to the tile pipeline according to the distribution information of the primitive packet, and the transmission sequence of the geometric processing result of the primitive packet is the same as the transmission sequence of the distribution information of the primitive packet; and the tile assembly line is used for performing tile processing on the received geometric processing result of the primitive packet to obtain a tile processing result.
In one possible implementation manner, the geometric arbiter comprises a command information storage queue, an arbitration unit and a plurality of geometric data buffers corresponding to the geometric processing pipelines one by one, wherein the command information storage queue is used for storing allocation information of the primitive packets; the geometric data buffer area is used for storing the geometric processing result of the primitive packet from the corresponding geometric processing pipeline; the arbitration unit is used for acquiring the distribution information of the primitive packet from the command information storage queue, acquiring the geometric processing result of the primitive packet from the geometric data buffer area corresponding to the geometric processing pipeline indicated by the distribution information of the primitive packet, and transmitting the geometric processing result of the primitive packet to the tile pipeline.
In a possible implementation manner, the geometry allocation unit is further configured to transmit geometry state commands included in the command stream to each geometry processing pipeline, and transmit segment state commands included in the command stream to the geometry arbiter, where a transmission order of the segment state commands is the same as an order of the segment state commands in the command stream; the geometric processing pipeline is specifically used for carrying out geometric processing on the received primitive packet according to the geometric state command; the command information storage queue is further used for storing the fragment state commands, and the sequence of the allocation information of the primitive packets and the fragment state commands in the command information storage queue is the same as the sequence of the primitive packets and the fragment state commands in the command stream; the arbitration unit is further configured to obtain the segment status command from the command information store queue and transmit the segment status command to the tile pipeline.
In a possible implementation, the geometry allocation unit is specifically configured to add an end tag after each primitive packet, and to transfer the primitive packet and the end tag to the geometry processing pipeline; the geometry processing pipeline is specifically configured to transmit the geometry processing result and the end tag of the primitive packet to the geometry arbiter.
In a possible implementation manner, the arbitration unit is specifically configured to obtain a piece of data from the command information storage queue; when the data acquired from the command information storage queue is the allocation information of the primitive packet, acquiring a piece of data from a geometric data buffer area corresponding to a geometric processing pipeline indicated by the allocation information of the primitive packet; and when the data acquired from the geometric data buffer area is not the end mark, transmitting the data to the tile pipeline, and re-executing the steps of acquiring a piece of data from the geometric data buffer area corresponding to the geometric processing pipeline indicated by the allocation information of the primitive packet and the following steps.
In one possible implementation manner, the arbitration unit is specifically configured to determine whether the command information storage queue is empty when the data acquired from the geometric data buffer is an end tag; when the command information storage queue is not empty, the steps of acquiring a piece of data from the command information storage queue and afterwards are re-executed.
In one possible implementation, the arbitration unit is specifically configured to transmit the acquired data to the tile pipeline when the data acquired from the command information storage queue is not allocation information of a primitive packet; judging whether the command information storage queue is empty or not; when the command information storage queue is not empty, the steps of acquiring a piece of data from the command information storage queue and afterwards are re-executed.
In one possible implementation, the geometry processing result of the primitive packets and the order of the segment state commands in the tile pipeline are the same as the order of the allocation information of the primitive packets and the segment state commands in the command information storage queue.
According to another aspect of the present disclosure, there is provided a graphics processor including the geometry processing device of any one of the above.
According to another aspect of the present disclosure, there is provided an electronic device including the graphics processor described above.
According to the geometry processing device of the embodiment of the disclosure, a command stream to be executed is obtained through the geometry distribution unit, a drawing command included in the command stream is split into a plurality of primitive packets, a corresponding geometry processing pipeline is distributed for each primitive packet, the primitive packet is transmitted to the corresponding geometry processing pipeline, and the distribution of the primitive packets can be completed; and transmitting the allocation information of each primitive packet to a geometric arbiter through a geometric allocation unit, wherein the transmission sequence of the allocation information of the primitive packets is the same as the sequence of the primitive packets in a command stream, and the sequential recording of the primitive packets in the command stream is realized. The geometric processing pipeline is used for carrying out geometric processing on the received primitive packet, the geometric processing result of the primitive packet is transmitted to the geometric arbiter, the geometric arbiter is used for transmitting the geometric processing result of the primitive packet to the tile pipeline according to the distribution information of the primitive packet, and the transmission sequence of the geometric processing result of the primitive packet is the same as the transmission sequence of the distribution information of the primitive packet, so that the sequence of the geometric processing result of the primitive packet output by the geometric arbiter is the same as the sequence of the primitive packet in the command stream, and the sequence recovery of the geometric processing result of the primitive packet is realized. And finally, performing tile processing on the geometric processing result of the received primitive packet through a tile assembly line to obtain a tile processing result. The geometric processing device of the embodiment of the disclosure has simpler design because no encoding is needed, and can confirm the sequence among specific primitive packets without bigger and smaller sizes; and the sequence among the primitive packets is recorded through the sequence control of the primitive packet allocation information, when errors occur, the positions where the errors occur can be positioned according to the primitive packet allocation information, and the codes of all the primitive packets do not need to be observed, so that the error positioning is more convenient, and the working efficiency of the device is improved.
Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features and aspects of the present disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 illustrates an exemplary application scenario of a geometry processing device according to an embodiment of the present disclosure.
Fig. 2 illustrates an example of a command stream according to an embodiment of the present disclosure.
Fig. 3 shows a schematic view of the structure of a geometry processing device according to an embodiment of the present disclosure.
Fig. 4 shows a schematic diagram of the structure of a geometric arbiter according to an embodiment of the present disclosure.
Fig. 5 illustrates an example of allocation information of primitive packets and the order of fragment status commands in a command information store queue according to an embodiment of the present disclosure.
Fig. 6 illustrates an example of primitive packets and end markers transferred to a geometry processing pipeline in accordance with an embodiment of the present disclosure.
Fig. 7 shows a schematic diagram of a workflow of an arbitration unit according to an embodiment of the disclosure.
FIG. 8 illustrates an example of data transferred to a tile pipeline by an arbitration unit, according to an embodiment of the present disclosure.
Detailed Description
Various exemplary embodiments, features and aspects of the disclosure will be described in detail below with reference to the drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Although various aspects of the embodiments are illustrated in the accompanying drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
In addition, numerous specific details are set forth in the following detailed description in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements, and circuits well known to those skilled in the art have not been described in detail in order not to obscure the present disclosure.
The principle of tile rendering is first described below.
Tile-based Rendering (TBR) is a Rendering technique commonly used in computer graphics. It is mainly used for real-time rendering, especially in mobile devices and embedded systems, to improve the performance and energy efficiency of graphics processors (Graphic Process Unit, GPU).
Conventional rendering techniques tend to divide the entire scene into a plurality of pixels and perform rendering calculations pixel by pixel. This approach may lead to performance bottlenecks in processing large scenes and high resolution images because the computation of each pixel is independent, wasting a lot of computing resources. While Tile rendering divides the screen into small blocks (also called tiles), which are then rendered Tile by Tile. This allows for better utilization of parallel computing and memory bandwidth. Since each tile is rendered independently, parallel processing can be used to process multiple tiles simultaneously, increasing rendering speed. Furthermore, tile rendering may also reduce the memory bandwidth requirements because only the rendering data of the current tile needs to be read from memory.
In tile rendering, geometry processing (Geometry Processing), tile processing (Tiling Processing), and fragment processing (Fragment Processing) are the primary rendering pipeline stages for processing geometry, tile, and fragment (pixel) information during rendering. The following is a brief description of these three pipeline stages.
The geometry processing pipeline is responsible for processing the geometry in the scene and converting it into a form that can be rendered as a result of the geometry processing. The geometry processing pipeline mainly performs the following steps:
a. Vertex input: vertex data in the scene, such as position, normal, texture coordinates, etc., is received.
b. Vertex processing: each Vertex is processed, transformed (e.g., translated, rotated, scaled) and Vertex Shader (Vertex Shader) operations are applied to generate new Vertex data.
c. Primitive assembly: the processed vertices are assembled into primitives (e.g., points, lines, triangles).
d. Rasterizing: mapping the primitive to the pixel area on the screen to generate the fragment.
e. Cutting: clipping the graphic primitive and eliminating the parts outside the screen.
f. Triangle setup: setting the clipped primitive, including calculating the bounding box and barycentric coordinates of each triangle.
g. Geometry shader: additional processing is performed on the geometry, such as generating new vertices or adjusting primitives.
The tile pipeline is responsible for determining which tiles are covered by the geometry processing results as tile processing results.
The segment processing pipeline is responsible for obtaining segments (pixels) of geometric shapes according to tile processing results, and performing illumination, texture mapping and other calculations. The fragment processing pipeline mainly performs the following steps:
a. fragment setting: and determining which fragments need to be processed according to triangle bounding boxes and barycentric coordinates generated in a triangle setting stage in all geometric processing results covered by each tile.
b. Fragment shader: and (3) applying operations such as illumination model, texture sampling and the like to process each fragment to be processed, and calculating the color and other attributes of the fragment.
c. Fragment operation: the fragment is subjected to operations such as depth testing, stencil testing, etc., to determine whether the fragment is visible.
d. Pixel output: the processed fragments are output to a frame buffer to generate a final image.
Modern graphics processors are provided with multiple geometry processing pipelines in the geometry processing stage in order to fully utilize the parallel computing resources of the hardware. The outputs of these parallel geometry processing pipelines need to be fed into the post tile pipeline in the order of the original geometry, via selection by the arbiter.
In this regard, the prior art proposes to encode primitive packets in order (ascending or descending) and then input to the geometry processing pipeline so that the geometry processing results have the same encoding. The geometry processing results are fed into an arbiter as proposed in the prior art. The arbiter restores the geometric processing results of the primitive packets to the order according to the encoding size. Although the arbiter proposed in the prior art can solve the order problem, it has the following drawbacks: firstly, the design is complex, and the arbiter needs to compare the number sizes of the primitive packets to confirm the sequence among the specific primitive packets; secondly, errors of the device are difficult to find in time, when errors such as packet loss of a geometric processing pipeline occur, coding of all primitive packets needs to be observed to locate the position where the errors occur, so that an optimized space exists.
In view of this, the present disclosure proposes a geometry processing device, a graphics processor, and an electronic apparatus, where the geometry processing device of the embodiments of the present disclosure is simple in design, and is easy for error localization by recording the sequence between primitive packets through sequence control of primitive packet allocation information.
Fig. 1 illustrates an exemplary application scenario of a geometry processing device according to an embodiment of the present disclosure.
As shown in fig. 1, the geometry processing device of the embodiment of the present disclosure may be disposed in a graphics processor (Graphics Processing Unit, GPU) that is connected to a bus, which is also connected to a Memory (which may be a double rate synchronous dynamic Random Access Memory (Double Data Rate Synchronous Dynamic Random Access Memory, DDR) or Static Random Access Memory (SRAM), etc.) and a central processor (Central Processing Unit, CPU).
An application/driver in the central processor may generate the command stream. Fig. 2 illustrates an example of a command stream according to an embodiment of the present disclosure.
As shown in fig. 2, the command stream may include a geometry state command J, segment state commands P0, P1, and drawing commands H0, H1. The commands are stored in the command stream in the order of the geometry state command J-segment state command P0-drawing command H0-segment state command P1-drawing command H1. Wherein, the drawing command H0 includes primitive packet 0-primitive packet 3, and the drawing command H1 includes primitive packet 4 and primitive packet 5. The commands and primitive packets are stored in the order of geometry state command J-segment state command P0-primitive packet 1-primitive packet 2-primitive packet 3-segment state command P1-primitive packet 4-primitive packet 5 in the command stream.
The central processor may store the command stream to the memory via the bus and notify the geometry processing devices in the graphics processor. The geometric processing device starts to work, obtains a command stream from the memory, and finishes tile rendering according to geometric state commands and drawing commands in the command stream to obtain a tile processing result. The geometry processing means may store tile processing results and segment status commands to the memory via the bus, and a segment processing pipeline (not shown) in the graphics processor may fetch the tile processing results and segment status commands from the memory via the bus, generating an image from the tile processing results and segment status commands.
Those skilled in the art will appreciate that the fragment processing pipeline may also be disposed in a geometry processing apparatus, and that the embodiments of the present disclosure are not limited to the particular location of the fragment processing pipeline.
Details of the implementation of tile rendering by the geometry processing device of the embodiments of the present disclosure are described below. Fig. 3 shows a schematic view of the structure of a geometry processing device according to an embodiment of the present disclosure.
As shown in fig. 3, in one possible implementation, an embodiment of the present disclosure proposes a geometry processing apparatus including a geometry assigning unit, a plurality of geometry processing pipelines (3 being an example in fig. 3), a geometry arbiter and a tile pipeline,
The geometric shape distribution unit is used for acquiring a command stream to be executed, splitting a drawing command included in the command stream into a plurality of primitive packets, distributing a corresponding geometric processing pipeline for each primitive packet, transmitting the primitive packet to the corresponding geometric processing pipeline, and transmitting distribution information of each primitive packet to the geometric arbiter, wherein the transmission sequence of the distribution information of the primitive packets is the same as the sequence of the primitive packets in the command stream;
the geometric processing pipeline is used for carrying out geometric processing on the received primitive packet and transmitting the geometric processing result of the primitive packet to the geometric arbiter;
the geometric arbiter is used for transmitting the geometric processing results of the primitive packets to the tile pipeline according to the distribution information of the primitive packets, and the transmission sequence of the geometric processing results of the primitive packets is the same as the transmission sequence of the distribution information of the primitive packets;
and the tile assembly line is used for performing tile processing on the geometric processing result of the received primitive packet to obtain a tile processing result.
For example, assume that the command stream to be executed acquired by the geometry assigning unit is as shown in fig. 2. The drawing command H0 included in the command stream may be split into primitive packet 0-primitive packet 3, and the drawing command H1 may be split into primitive packet 4 and primitive packet 5.
The geometry allocation unit may allocate a corresponding geometry processing pipeline for each primitive packet. The allocation manner may be set according to the application scenario requirement, for example, set to a round-robin manner, or select, according to an index indicating the load degree of the geometric processing pipelines, the geometric processing pipeline with the lowest load degree among the plurality of geometric processing pipelines as the geometric processing pipeline corresponding to the primitive packet. Those skilled in the art will appreciate that there may be many more options for the allocation scheme, and that the embodiments of the present disclosure are not limited to the allocation scheme of the geometric processing pipeline.
The order of allocation may be the same as the order of primitive packets in the command stream. In the example of fig. 3, assuming that, according to an index indicating the degree of load of the geometry processing pipeline, the lowest degree of load among the plurality of geometry processing pipelines is selected as the geometry processing pipeline corresponding to the primitive packet, when the order of the primitive packet in the command stream is as shown in fig. 2, the geometry allocating unit allocates the geometry processing pipeline for the primitive packet 0 first, for example, allocates the geometry processing pipeline 0 for the primitive packet 0 (i.e., allocation information of the primitive packet 0). Then, the geometry processing pipeline 1 (i.e., the allocation information of the primitive packet 1), the geometry processing pipeline 2 (i.e., the allocation information of the primitive packet 2), the geometry processing pipeline 1 (i.e., the allocation information of the primitive packet 3), the geometry processing pipeline 0 (i.e., the allocation information of the primitive packet 4) and the geometry processing pipeline 1 (i.e., the allocation information of the primitive packet 5) are allocated to the primitive packet 1, the primitive packet 2, the primitive packet 3, the primitive packet 4, and the primitive packet 5 in this order.
The geometry distribution unit may transmit each primitive packet to a corresponding geometry processing pipeline and transmit distribution information of each primitive packet to the geometry arbiter. The primitive packet may be transmitted immediately after determining the geometry processing pipeline to which the primitive packet corresponds, such that the transmission order of primitive packets corresponding to the same geometry processing pipeline is not disturbed. Taking the primitive packet corresponding to the geometry processing pipeline 1 as an example, it can be seen that the primitive packet 1 is transmitted first, followed by the primitive packet 3 and then the primitive packet 5. The allocation information of each primitive packet may also be transmitted once determined such that the transmission order of the allocation information of the primitive packets is the same as the order of the primitive packets in the command stream. The sequence of the primitive packets in the command stream is as shown in fig. 2, the transmission sequence of the allocation information of the primitive packets may be: allocation information of primitive packet 0, allocation information of primitive packet 1, allocation information of primitive packet 2, allocation information of primitive packet 3, allocation information of primitive packet 4, allocation information of primitive packet 5.
The geometry processing pipeline receives primitive packets from the geometry distribution unit and performs geometry processing on the received primitive packets. Geometry processing includes performing vertex shading programs, and optionally geometry shading programs, etc., on the geometry in the primitive packet, and performing operations such as clipping and culling, etc., the embodiments of the present disclosure are not limited to the specific implementation of the geometry processing process. The geometric processing result of the primitive packet obtained by geometric processing pipeline processing is sent to a geometric arbiter.
Three geometry processing pipelines are illustrated in the example of fig. 3, and those skilled in the art will appreciate that in practical applications, more or fewer geometry processing pipelines may be included, and that the disclosed embodiments are not limited to a particular number of geometry processing pipelines included in the geometry processing apparatus.
The geometric arbiter performs arbitration tasks, transmits geometric processing results of the primitive packets to the tile pipeline according to the allocation information of the primitive packets from the geometric allocation unit, and enables the transmission order of the geometric processing results of the primitive packets to be the same as the transmission order of the allocation information of the primitive packets. The transmission sequence of the allocation information of the primitive packet may be the geometric processing result of the primitive packet 0, the geometric processing result of the primitive packet 1, the geometric processing result of the primitive packet 2, the geometric processing result of the primitive packet 3, the geometric processing result of the primitive packet 4, and the geometric processing result of the primitive packet 5 when the transmission sequence of the allocation information of the primitive packet is the allocation information of the primitive packet 0, the allocation information of the primitive packet 1, the allocation information of the primitive packet 2, the allocation information of the primitive packet 3, the allocation information of the primitive packet 4, and the allocation information of the primitive packet 5.
The structure of the geometric arbiter and exemplary ways of achieving the above-described functions can be seen below and in connection with the description of fig. 4-7.
The tile pipeline receives the geometric processing results of the primitive packets from the geometric arbiter, performs tile processing, and determines which tiles are covered by the geometric processing results of each primitive packet to obtain tile processing results. The tile processing results may be stored in a memory (see FIG. 1), from which a fragment processing pipeline (not shown) may fetch the tile processing results and generate an image from the tile processing results.
According to the geometry processing device of the embodiment of the disclosure, a command stream to be executed is obtained through the geometry distribution unit, a drawing command included in the command stream is split into a plurality of primitive packets, a corresponding geometry processing pipeline is distributed for each primitive packet, the primitive packet is transmitted to the corresponding geometry processing pipeline, and the distribution of the primitive packets can be completed; and transmitting the allocation information of each primitive packet to a geometric arbiter through a geometric allocation unit, wherein the transmission sequence of the allocation information of the primitive packets is the same as the sequence of the primitive packets in a command stream, and the sequential recording of the primitive packets in the command stream is realized. The geometric processing pipeline is used for carrying out geometric processing on the received primitive packet, the geometric processing result of the primitive packet is transmitted to the geometric arbiter, the geometric arbiter is used for transmitting the geometric processing result of the primitive packet to the tile pipeline according to the distribution information of the primitive packet, and the transmission sequence of the geometric processing result of the primitive packet is the same as the transmission sequence of the distribution information of the primitive packet, so that the sequence of the geometric processing result of the primitive packet output by the geometric arbiter is the same as the sequence of the primitive packet in the command stream, and the sequence recovery of the geometric processing result of the primitive packet is realized. And finally, performing tile processing on the geometric processing result of the received primitive packet through a tile assembly line to obtain a tile processing result. The geometric processing device of the embodiment of the disclosure has simpler design because no encoding is needed, and can confirm the sequence among specific primitive packets without bigger and smaller sizes; and the sequence among the primitive packets is recorded through the sequence control of the primitive packet allocation information, when errors occur, the positions where the errors occur can be positioned according to the primitive packet allocation information, and the codes of all the primitive packets do not need to be observed, so that the error positioning is more convenient, and the working efficiency of the device is improved.
Fig. 4 shows a schematic diagram of the structure of a geometric arbiter according to an embodiment of the present disclosure.
As shown in fig. 4, in one possible implementation, the geometry arbiter comprises a command information storage queue, an arbitration unit, a plurality of geometry data buffers (3 in fig. 4 for example) in one-to-one correspondence with a plurality of geometry processing pipelines (3 in fig. 4 for example),
the command information storage queue is used for storing the allocation information of the primitive packets;
the geometric data buffer is used for storing geometric processing results of primitive packets from the corresponding geometric processing pipeline;
the arbitration unit is used for acquiring the distribution information of the primitive packet from the command information storage queue, acquiring the geometric processing result of the primitive packet from the geometric data buffer area corresponding to the geometric processing pipeline indicated by the distribution information of the primitive packet, and transmitting the geometric processing result of the primitive packet to the tile pipeline.
For example, the command information storage queue may be implemented by a first-in first-out (First Input First Output, FIFO) memory, i.e., data received first is output first and data received later is output. The order of the allocation information of the primitive packets acquired from the command information storage queue by the arbitration unit may be the same as the order of the allocation information of the primitive packets received from the command information storage queue.
The geometry data buffers are used to store geometry processing results of primitive packets from corresponding geometry processing pipelines so that the order of transmission of geometry processing results of primitive packets from the same geometry processing pipeline is not disturbed. In addition, the geometric data buffer also plays a role of buffering the geometric processing result of the primitive packet, in which case, if the geometric processing result of the primitive packet obtained by the geometric processing pipeline is not selected to be input into the tile pipeline for processing, the geometric processing pipeline can still continue to operate and cannot be blocked.
The arbitration unit obtains the distribution information of the primitive packet from the command information storage queue, and obtains the geometric processing result of the primitive packet from the geometric data buffer area corresponding to the geometric processing pipeline indicated by the distribution information of the primitive packet. For example, when the transmission order of the allocation information of the primitive packet is the allocation information of the primitive packet 0, the allocation information of the primitive packet 1, the allocation information of the primitive packet 2, the allocation information of the primitive packet 3, the allocation information of the primitive packet 4, and the allocation information of the primitive packet 5, the arbitration unit obtains the allocation information of the primitive packet 0 from the command information storage queue first, and obtains the geometry processing result of the primitive packet 0 from the geometry data buffer 0 corresponding to the geometry processing pipeline 0 indicated by the allocation information of the primitive packet 0. And finally, acquiring the distribution information of the primitive packet 1, acquiring the geometric processing result of the primitive packet 1 from the geometric data buffer area 1 corresponding to the geometric processing pipeline 1 indicated by the distribution information of the primitive packet 1, … …, and finally acquiring the distribution information of the primitive packet 5, and acquiring the geometric processing result of the primitive packet 5 from the geometric data buffer area 1 corresponding to the geometric processing pipeline 1 indicated by the distribution information of the primitive packet 5. The obtained geometry processing results of the primitive packet may be transmitted to a tile pipeline.
In this way, the geometry arbiter can record the transmission order of the allocation information of the primitive packets, making it possible to resume the order of the geometry processing results of the primitive packets later.
Further, in the prior art, when a segment status command is also included in the command stream, the segment status command needs to be broadcast once in all geometric processing pipelines and then summarized into the arbiter, which increases the power consumption of the circuit.
In a possible implementation manner, the geometry allocation unit is further configured to transmit geometry state commands included in the command stream to each geometry processing pipeline, and transmit segment state commands included in the command stream to the geometry arbiter, where the sequence of transmitting the segment state commands is the same as the sequence of the segment state commands in the command stream;
the geometric processing pipeline is specifically used for carrying out geometric processing on the received primitive packet according to the geometric state command;
the command information storage queue is also used for storing fragment state commands, and the sequence of the allocation information of the primitive packets and the fragment state commands in the command information storage queue is the same as the sequence of the primitive packets and the fragment state commands in the command stream;
the arbitration unit is further configured to obtain the segment status command from the command information store queue and transmit the segment status command to the tile pipeline.
For example, the command stream includes geometry state commands and fragment state commands in addition to drawing commands. The geometry state command may include configuration information as described above for the geometry processing pipeline to perform geometry processing and the fragment state command may include configuration information as described above for the fragment processing pipeline to perform fragment processing. For example, referring to fig. 2, when the commands and primitive packets are stored in order of geometry state command J-segment state command P0-primitive packet 1-primitive packet 2-primitive packet 3-segment state command P1-primitive packet 4-primitive packet 5 in the command stream, the geometry state command J may include configuration information required for geometry processing the primitive packet 0-primitive packet 5 by the geometry processing pipeline, the segment state command P0 may include configuration information required for segment processing the tile processing result of the primitive packet 0-primitive packet 3 by the segment processing pipeline, and the segment state command P1 may include configuration information required for segment processing the tile processing result of the primitive packet 4-primitive packet 5 by the segment processing pipeline.
The geometry distribution unit is therefore also adapted to transmit geometry commands comprised by the command stream to the respective geometry processing pipeline. The geometry processing pipeline is enabled to complete geometry processing of the received primitive packets in accordance with the geometry state commands.
The disclosed embodiments also propose to transmit segment status commands to the geometry arbiter as well, and store them in the command information store queue. Since the segment status command has a certain association with the primitive packet, the allocation information of the primitive packet and the sequence of the segment status command in the command information storage queue can be made identical to the sequence of the primitive packet and the segment status command in the command stream. Namely, the association relation between the fragment state command and the primitive packet is recorded through the allocation information of the primitive packet and the sequence of the fragment state command. The transmission order of the segment status commands is the same as the order of the segment status commands in the command stream.
Fig. 5 illustrates an example of allocation information of primitive packets and the order of fragment status commands in a command information store queue according to an embodiment of the present disclosure.
As shown in fig. 5, when the commands and primitive packets are stored in the order of the geometric state command J-segment state command P0-primitive packet 1-primitive packet 2-primitive packet 3-segment state command P1-primitive packet 4-primitive packet 5 in the command stream, the order of the assignment information and segment state command of the primitive packets transmitted to the geometric arbiter by the geometric assignment unit may be the assignment information of the segment state command P0-primitive packet 0-the assignment information of the primitive packet 1-the assignment information of the primitive packet 2-the assignment information of the primitive packet 3-the assignment information of the segment state command P1-primitive packet 4-the assignment information of the primitive packet 5.
The arbitration unit may fetch the fragment status command from the command information store queue and transmit it to the tile pipeline. The subsequent tile pipeline may store the segment status command and the tile processing result together in a memory, the segment processing pipeline obtaining the segment status command and the tile processing result from the memory, and performing segment processing on the tile processing result according to the segment status command to generate an image.
In this way, the sequence between the segment state command and the primitive packet can be maintained, the segment state command is directly transmitted to the geometric arbiter instead of being transmitted through each geometric processing pipeline, the work of the geometric processing pipeline can be reduced, and the power consumption of the circuit is reduced.
In one possible implementation, the geometry allocation unit is specifically configured to add an end tag after each primitive packet, and to transfer the primitive packet and the end tag to the geometry processing pipeline;
the geometry processing pipeline is specifically configured to transmit the geometry processing result and the end-marker of the primitive packet to the geometry arbiter.
For example, the amount of data per primitive packet may be different, while the geometry processing pipeline performs geometry processing for a single primitive packet, and for the geometry processing pipeline, it is faster to determine when a primitive packet is completely acquired, so that geometry processing can be performed faster.
For this purpose, the geometry allocation unit may add an end-marker after each primitive packet, and transfer the primitive packet and the end-marker to the geometry processing pipeline. Fig. 6 illustrates an example of primitive packets and end markers transferred to a geometry processing pipeline in accordance with an embodiment of the present disclosure.
As shown in fig. 6, primitive packet 0, end tag, primitive packet 4, end tag are sequentially transferred to geometry processing pipeline 0. Primitive packet 1, end tag, primitive packet 3, end tag, primitive packet 5, end tag are sequentially transferred to geometry processing pipeline 1. Primitive packet 2, end marker is passed to geometry processing pipeline 2.
At this point, the geometry processing pipeline can quickly determine the data corresponding to each primitive packet.
Similarly, the amount of data of the geometry processing result of each primitive packet may be different, and the geometry arbiter obtains the geometry processing result of a single primitive packet at a time, so that it is faster for the geometry arbiter to determine when the geometry processing result of the primitive packet is completely obtained, and it is faster to transmit the geometry processing result to the tile pipeline.
In this regard, the geometry processing pipeline may add an end tag after the geometry processing result for each primitive packet, and transmit the geometry processing result and the end tag for the primitive packet to the geometry arbiter for storage in the geometry data buffer. At this time, the geometry arbiter can quickly determine the geometry processing result of each primitive packet.
In this way, the working efficiency of the geometry processing means is made higher.
Fig. 7 shows a schematic diagram of a workflow of an arbitration unit according to an embodiment of the disclosure.
As shown in fig. 7, in one possible implementation, the arbitration unit is specifically configured to perform the following steps:
step S71, obtaining a piece of data from the command information storage queue;
step S72, when the data acquired from the command information storage queue is the allocation information of the primitive packet, acquiring a piece of data from a geometric data buffer area corresponding to a geometric processing pipeline indicated by the allocation information of the primitive packet;
step S73, when the data acquired from the geometric data buffer is not the end mark, the data is transferred to the tile pipeline, and the steps of acquiring a piece of data from the geometric data buffer corresponding to the geometric processing pipeline indicated by the allocation information of the primitive packet and then are re-executed.
For example, the arbitration unit first performs step S71 to acquire a piece of data from the command information storage queue. As can be seen from fig. 5 and the related description, the acquired data may be allocation information of the primitive packet, and may also be a fragment status command. Accordingly, the arbitration unit may perform step S72 of acquiring one piece of data from the geometry data buffer corresponding to the geometry processing pipeline indicated by the allocation information of the primitive packet when the data acquired from the command information storage queue is the allocation information of the primitive packet.
For example, the data acquired from the command information storage queue is allocation information of the primitive packet 0, the allocation information indicates that the geometry processing pipeline 0 is allocated to the primitive packet 0, and then one piece of data can be acquired from the geometry data buffer 0 corresponding to the geometry processing pipeline 0.
Since the transmission order of the allocation information of the primitive packet is the same as the order of the primitive packet in the command stream, the allocation information of the primitive packet 0 may be the allocation information transmitted first. And referring to the above related description, after a corresponding geometric processing pipeline is allocated to the primitive packet 0, the primitive packet 0 can be directly transmitted to the corresponding geometric processing pipeline, so that the geometric processing pipeline 0 performs geometric processing on the primitive packet 0 first, and the obtained geometric processing result of the primitive packet 0 is also transmitted to the geometric data buffer zone 0 corresponding to the geometric processing pipeline 0 first. The data acquired from the geometric data buffer at this time may be the geometric processing result of the primitive packet 0, or may be the end mark of the primitive packet 0. The arbitration unit may execute step S73, where the data acquired from the geometric data buffer is not the end flag, the geometric processing result of the primitive packet corresponding to the allocation information of the primitive packet is not acquired yet. The piece of data is then transferred to the tile pipeline, which in turn transfers the geometry processing results of the primitive packet to the tile pipeline.
A data acquisition may not have acquired the geometry processing result of a complete primitive packet, and thus, the steps of acquiring a piece of data from the geometry data buffer corresponding to the geometry processing pipeline indicated by the allocation information of the primitive packet and thereafter may be re-performed until the data acquired from the geometry data buffer is an end marker.
As shown in fig. 7, in one possible implementation, the arbitration unit is specifically configured to perform the following steps:
step S74, judging whether the command information storage queue is empty or not when the data acquired from the geometric data buffer area is an end mark;
step S75, when the command information storage queue is not empty, the steps of acquiring a piece of data from the command information storage queue and thereafter are re-executed.
For example, if the data acquired from the geometric data buffer is an end mark, it indicates that the geometric processing result of the primitive packet corresponding to the allocation information of the primitive packet has been acquired. Step S74 may be performed at this time to determine whether the command information storage queue is empty. If the command information store queue is not empty, it indicates that there are more primitive packets waiting to be transmitted as a result of geometric processing or segment status commands, so step S75 may be performed to re-execute the steps of retrieving a piece of data from the command information store queue (step S71) and thereafter.
In a possible implementation, the arbitration unit is specifically configured to perform the following steps:
step S76, when the data acquired from the command information storage queue is not the allocation information of the primitive packet, transmitting the acquired data to the tile pipeline;
step S77, judging whether a command information storage queue is empty;
step S78, when the command information storage queue is not empty, the steps of acquiring a piece of data from the command information storage queue and thereafter are re-executed.
For example, if the data retrieved from the command information store queue is not the allocation information of the primitive packet, that is, the retrieved data is a fragment status command. Step S76 may be performed to transfer the acquired data directly to the tile pipeline. Thereafter, step S77 may be executed to determine whether the command information storage queue is empty, and in step S78, when the command information storage queue is not empty, the steps of acquiring one piece of data from the command information storage queue (step S71) and thereafter are re-executed.
In one possible implementation, the geometry processing results of the primitive packets and the order of the fragment status commands in the tile pipeline are the same as the order of the allocation information of the primitive packets and the fragment status commands in the command information storage queue.
FIG. 8 illustrates an example of data transferred to a tile pipeline by an arbitration unit, according to an embodiment of the present disclosure.
When the data stored in the command information storage queue is as shown in fig. 5, the data transferred to the tile pipeline by the arbitration unit is as shown in fig. 8. The segment state command P0, the geometric processing result of the primitive packet 1, the geometric processing result of the primitive packet 2, the geometric processing result of the primitive packet 3, the segment state command P1, the geometric processing result of the primitive packet 4, and the geometric processing result of the primitive packet 5 are sequentially transmitted to the tile pipeline.
In this case, the tile pipeline may determine which geometry processing results correspond to which segment state commands and tile processing for geometry processing results corresponding to the same segment state command. When the segment state command and the tile processing result are stored in the memory, the segment state command and the tile processing result with the corresponding relation can be correspondingly stored, so that the segment processing pipeline can conveniently acquire the segment state command and the tile processing result with the corresponding relation, and segment processing is carried out on the tile processing result according to the segment state command.
The first-in first-out command information storage queue used in the present disclosure directly transfers the sequence of the geometric processing results of the primitive packets to be processed from the command stream part to the geometric arbiter, thereby avoiding the defect that error correction is difficult under the counter-based sequence recovery mechanism. And, the command information storage queue can be used for transmitting the fragment status commands used by the fragment processing pipelines after the tile pipeline, so that the power consumption caused by broadcasting the information in a plurality of geometric processing pipelines is avoided. The geometry processing device simplifies the design of a hardware circuit, and the geometry arbiter can directly determine which path of geometry processing pipeline geometry processing result is selected to be output to the tile pipeline according to the distribution information of the sent primitive packet without comparing the sizes.
The embodiment of the disclosure also provides a graphics processor, which comprises the geometric processing device.
The embodiment of the disclosure also provides an electronic device comprising the graphics processor.
The electronic device may be a smart phone, a netbook, a tablet computer, a notebook computer, a wearable electronic device, a TV, a virtual reality device, etc., as long as the electronic device may include a graphics processor, and the embodiments of the present disclosure are not limited to a specific type of electronic device.
The foregoing description of the embodiments of the present disclosure has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the technical improvements in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (10)
1. A geometry processing device is characterized by comprising a geometry distribution unit, a plurality of geometry processing pipelines, a geometry arbiter and a tile pipeline,
The geometric shape distribution unit is used for acquiring a command stream to be executed, splitting a drawing command included in the command stream into a plurality of primitive packets, distributing a corresponding geometric processing pipeline for each primitive packet, transmitting the primitive packet to the corresponding geometric processing pipeline, and transmitting distribution information of each primitive packet to the geometric arbiter, wherein the transmission sequence of the distribution information of the primitive packets is the same as the sequence of the primitive packets in the command stream;
the geometric processing pipeline is used for carrying out geometric processing on the received primitive packet and transmitting the geometric processing result of the primitive packet to the geometric arbiter;
the geometric arbiter is used for transmitting the geometric processing result of the primitive packet to the tile pipeline according to the distribution information of the primitive packet, and the transmission sequence of the geometric processing result of the primitive packet is the same as the transmission sequence of the distribution information of the primitive packet;
and the tile assembly line is used for performing tile processing on the received geometric processing result of the primitive packet to obtain a tile processing result.
2. The apparatus of claim 1, wherein the geometry arbiter comprises a command information store queue, an arbitration unit, a plurality of geometry data buffers in one-to-one correspondence with the plurality of geometry processing pipelines,
The command information storage queue is used for storing the allocation information of the primitive packet;
the geometric data buffer area is used for storing the geometric processing result of the primitive packet from the corresponding geometric processing pipeline;
the arbitration unit is used for acquiring the distribution information of the primitive packet from the command information storage queue, acquiring the geometric processing result of the primitive packet from the geometric data buffer area corresponding to the geometric processing pipeline indicated by the distribution information of the primitive packet, and transmitting the geometric processing result of the primitive packet to the tile pipeline.
3. The apparatus of claim 2, wherein the device comprises a plurality of sensors,
the geometry distribution unit is further configured to transmit geometry state commands included in the command stream to each geometry processing pipeline, and transmit segment state commands included in the command stream to the geometry arbiter, where a transmission order of the segment state commands is the same as an order of the segment state commands in the command stream;
the geometric processing pipeline is specifically used for carrying out geometric processing on the received primitive packet according to the geometric state command;
the command information storage queue is further used for storing the fragment state commands, and the sequence of the allocation information of the primitive packets and the fragment state commands in the command information storage queue is the same as the sequence of the primitive packets and the fragment state commands in the command stream;
The arbitration unit is further configured to obtain the segment status command from the command information store queue and transmit the segment status command to the tile pipeline.
4. The apparatus of claim 2, wherein the device comprises a plurality of sensors,
the geometric shape distribution unit is specifically configured to add an end mark after each primitive packet, and transmit the primitive packet and the end mark to the geometric processing pipeline;
the geometry processing pipeline is specifically configured to transmit the geometry processing result and the end tag of the primitive packet to the geometry arbiter.
5. The apparatus of claim 4, wherein the arbitration unit is configured to,
acquiring a piece of data from the command information storage queue;
when the data acquired from the command information storage queue is the allocation information of the primitive packet, acquiring a piece of data from a geometric data buffer area corresponding to a geometric processing pipeline indicated by the allocation information of the primitive packet;
and when the data acquired from the geometric data buffer area is not the end mark, transmitting the data to the tile pipeline, and re-executing the steps of acquiring a piece of data from the geometric data buffer area corresponding to the geometric processing pipeline indicated by the allocation information of the primitive packet and the following steps.
6. The apparatus of claim 5, wherein the arbitration unit is configured to,
when the data acquired from the geometric data buffer area is an end mark, judging whether the command information storage queue is empty or not;
when the command information storage queue is not empty, the steps of acquiring a piece of data from the command information storage queue and afterwards are re-executed.
7. The apparatus of claim 5, wherein the arbitration unit is configured to,
transmitting the acquired data to the tile pipeline when the data acquired from the command information storage queue is not the allocation information of the primitive packet;
judging whether the command information storage queue is empty or not;
when the command information storage queue is not empty, the steps of acquiring a piece of data from the command information storage queue and afterwards are re-executed.
8. The apparatus of claim 3 wherein the geometry processing results and the order of segment status commands for the primitive packets in the tile pipeline are the same as the order of assignment information and segment status commands for the primitive packets in the command information storage queue.
9. A graphics processor comprising the geometry processing device of any one of claims 1-8.
10. An electronic device comprising the graphics processor of claim 9.
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