CN117894831B - A nitrogen-polarity gallium nitride high electron mobility transistor and a method for preparing the same - Google Patents
A nitrogen-polarity gallium nitride high electron mobility transistor and a method for preparing the same Download PDFInfo
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- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
- H10D30/473—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT
- H10D30/4732—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT using Group III-V semiconductor material
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Abstract
本发明提供一种氮极性氮化物高电子迁移率晶体管及其制备方法，属于半导体器件技术领域。该晶体管由下至上依次包括衬底、成核层、半绝缘层、缓冲层、掺杂层和脊型台面结构，及源电极、漏电极和栅电极；脊型台面结构由下至上包括背势垒层和沟道层。在脊型台面结构的一侧，源电极从沟道层的上表面沿脊型台面结构的侧壁延伸至掺杂层的上表面上；在脊型台面结构的另一侧，漏电极从沟道层的上表面沿脊型台面结构的侧壁延伸至掺杂层的上表面上。栅电极位于源电极和漏电极之间。从衬底到沟道层的方向为氮极性晶向。该器件结构能抑制背势垒类施主态陷阱电荷造成的电流崩塌现象，提高背势垒对沟道电子的限制作用和减小导通电阻，从而提高器件性能和可靠性。
The present invention provides a nitrogen polar nitride high electron mobility transistor and a preparation method thereof, belonging to the technical field of semiconductor devices. The transistor comprises a substrate, a nucleation layer, a semi-insulating layer, a buffer layer, a doping layer and a ridged mesa structure, and a source electrode, a drain electrode and a gate electrode from bottom to top; the ridged mesa structure comprises a back barrier layer and a channel layer from bottom to top. On one side of the ridged mesa structure, the source electrode extends from the upper surface of the channel layer along the side wall of the ridged mesa structure to the upper surface of the doping layer; on the other side of the ridged mesa structure, the drain electrode extends from the upper surface of the channel layer along the side wall of the ridged mesa structure to the upper surface of the doping layer. The gate electrode is located between the source electrode and the drain electrode. The direction from the substrate to the channel layer is a nitrogen polar crystal direction. The device structure can suppress the current collapse phenomenon caused by the back barrier donor state trap charge, improve the limiting effect of the back barrier on the channel electrons and reduce the on-resistance, thereby improving the device performance and reliability.
Description
Technical Field
The invention belongs to the technical field of semiconductor devices, and particularly relates to a nitrogen polar gallium nitride transistor with high electron mobility and a preparation method thereof.
Background
Gallium nitride high electron mobility transistors (GaN HEMTs) have the characteristics of high power, high operating frequency, high breakdown voltage. The radio frequency power amplification device manufactured by adopting the GaN HEMT is already used in the fields of 5G base stations, radar detection and the like. Gallium nitride (GaN) is a polar material having characteristics of gallium (Ga) polarity and nitrogen (N) polarity in the c-direction toward the crystal axis. Conventional GaN HEMT radio frequency power amplification devices are manufactured on Ga polar surfaces, however, researches show that the GaN HEMT radio frequency power amplification devices manufactured on N polar surfaces have 2-3 times of power density and higher power additional efficiency on the same working frequency compared with Ga polar HEMT devices. Because the manufacturing process of the N-polar GaN device is different from that of the Ga-polar HEMT, and the preparation of high-quality N-polar GaN material always faces great challenges, only few research institutions can realize the high-performance N-polar GaN HEMT power amplification device, and commercialization is not realized at present. In addition, the reliability of the N-polarity GaN power amplifier device is also an important factor for restricting commercialization of the N-polarity GaN power amplifier device, and the reliability problem is mainly represented by the problems of gate leakage and threshold drift caused by interface states of a metal gate and a medium, and the problem of current collapse caused by deep level traps existing in a back barrier interface.
As shown in fig. 1, fig. 1 (a) is an epitaxial structure of an N-polar GaN HEMT device, and fig. 1 (b) is an energy band diagram corresponding to the structure of fig. 1 (a). Two-dimensional electron gas exists at the interface of the GaN channel layer 106 and the AlGaN (aluminum gallium nitride) back barrier layer on the surface due to the action of the polarized electric field, while donor-like interface traps near the valence band exist at the interface of the AlGaN back barrier layer 105 and the GaN layer 102, and due to the bending of the energy band caused by polarization, part of the donor-like interface traps are ionized at the interface, so that more two-dimensional electron gas is induced in the channel, and therefore, the concentration of the two-dimensional electron gas is regulated by the donor-like state of the back barrier interface. During dynamic operation of the device, the ionization speed of the donor-like state may not keep pace with the change of the input signal frequency, so that the two-dimensional electron gas concentration cannot be timely supplemented by electrons contributed by the donor-like state, and finally, the dynamic output current is smaller than the static output current (as shown in fig. 2), which is the so-called current collapse effect.
As shown in fig. 3 (a), in order to eliminate the current collapse phenomenon caused by the back barrier donor state trapped charges, the most direct technical solution is to replace the GaN layer under the AlGaN back barrier layer 105 with an aluminum nitride (AlN) layer having a larger forbidden band width than the AlGaN back barrier layer 105, that is, to completely grow an N-polarity GaN HEMT device structure using the AlN substrate 101. Fig. 3 (b) is an energy band diagram corresponding to the structure of fig. 3 (a). As can be seen from fig. 3, the effect of the donor-like trap charge can be completely eliminated by this method, since there is no AlGaN/GaN interface under the back barrier. Furthermore, as the substrate is AlN, the heat conduction performance and the high voltage resistance performance of the device can be further improved. But since a high quality single crystal AlN substrate is also difficult to obtain, crystal growth is difficult, resulting in high substrate cost, high impurity content of the substrate, and small size (not more than 2 inches). In addition, it is difficult to grow an N-polar AlGaN layer with high Al content on an AlN substrate, and a high growth temperature is required to reduce the impurity content and obtain a smooth surface morphology, which also results in high production cost, and is not beneficial to commercialization of N-polar GaN radio frequency power amplifier devices.
Another method for suppressing the effect of the back barrier interface-like donor-like trap charges is to n-type dope the back barrier layer and the GaN thin layer under the back barrier layer. As shown in fig. 4 (a), below the AlGaN back barrier layer 105, there are also an n-type doped AlGaN back barrier layer 104 and an n-type doped GaN thin layer 103, and the Al content in the n-type doped AlGaN back barrier layer 104 is gradually decreased from the surface toward the inside. As shown in fig. 4 (b), by such a structural design, the fermi level near the back barrier interface is modulated away from the valence band level, thereby reducing the ionization degree of the interface donor-like trapped charges and thus reducing the effect of the donor-like trapped charges on the channel two-dimensional electron gas. Fig. 5 shows the output current of the N-polar GaN HEMT device with the structure of fig. 4 (a) during dynamic and static operation, and it can be seen from the figure that the current collapse effect has been significantly suppressed. The fermi level is sensitive to the back barrier doping concentration and the thickness of the doped region and there is a threshold above which the fermi level is likely to be modulated away from the valence band position. In the actual epitaxial growth process, the existing process instability and non-uniformity have great influence on the performance of the device. As shown in fig. 6, at back barrier doping concentrations < 8x10 18/cm3, the fermi level is still very close to the top of the valence band at the back barrier AlGaN/GaN interface, and when the doping concentration exceeds this value, the fermi level can be modulated close to the bottom of the conduction band. Around doping concentrations of 8.5X10 18/cm3, ±3% of doping concentration fluctuations will result in a wide variation of fermi level positions from 0.5 to 0.7 eV. In addition, the AlGaN back barrier height is also reduced in this way (as shown in fig. 6), and when the fermi level is modulated close to the conduction band, its barrier height is reduced from 4.15eV to 2.1eV, and therefore, the confinement and blocking effect on the two-dimensional electron gas in the channel becomes weak.
Disclosure of Invention
In order to solve the defects in the prior art, the invention provides a nitrogen polar gallium nitride high electron mobility transistor. The gallium nitride high electron mobility transistor can inhibit the current collapse phenomenon caused by back barrier donor state trap charges, and simultaneously can improve the limiting effect of the back barrier on channel electrons and reduce the on-resistance of the device, thereby improving the performance and the reliability of the device.
Specifically, in order to achieve the above purpose, the present invention adopts the following technical scheme:
The nitrogen-polarity nitride high-electron-mobility transistor sequentially comprises a substrate, a nucleation layer, a semi-insulating layer, a buffer layer, a doping layer, a ridge-type mesa structure, a source electrode, a drain electrode and a gate electrode from bottom to top, wherein the ridge-type mesa structure comprises a back barrier layer and a channel layer, the bottom surface of the back barrier layer is the bottom surface of the ridge-type mesa structure, the upper surface of the channel layer is the upper surface of the ridge-type mesa structure, two-dimensional electron gas exists at the interface of the channel layer and the back barrier layer, the source electrode extends from the upper surface of the channel layer to the upper surface of the doping layer along the side wall of the ridge-type mesa structure on one side of the ridge-type mesa structure, the drain electrode extends from the upper surface of the channel layer to the upper surface of the doping layer along the side wall of the ridge-type mesa structure on the other side wall of the ridge-type mesa structure, the gate electrode is located on the channel layer between the source electrode and the drain electrode, the semiconductor layer, the buffer layer, the n-type doped layer and the n-doped channel-type nitride material are doped crystal-phase-doped material from the upper layer to the n-doped layer.
As a preferred embodiment of the present invention, the nitride semiconductor material of the group IIIA element is any one of AlN, gaN, alGaN, inN, inGaN.
As a preferred embodiment of the present invention, the width of the upper surface of the ridge mesa is less than or equal to the width of the bottom surface of the ridge mesa.
As a further preferable embodiment of the invention, the included angle between the side wall of the ridge type mesa structure and the bottom surface is 50-60 degrees.
As a preferred embodiment of the present invention, the material of the nucleation layer is at least one of GaN, alN, alGaN.
As a preferred embodiment of the present invention, the material of the semi-insulating layer, the buffer layer, the doped layer, and the channel layer has a smaller forbidden bandwidth than the material of the back barrier layer.
As a preferred embodiment of the invention, the doping element of the doping layer is any one of Si, ge and Sn, and the doping concentration is 1 multiplied by 10 18/cm3～1×1020/cm3.
As a preferred embodiment of the present invention, the material of the back barrier layer is an aluminum-containing nitride semiconductor material, and the aluminum content of the back barrier layer decreases in the direction from the channel layer to the doped layer.
As a preferred embodiment of the invention, the doping type of the back barrier layer is n-type, and the doping concentration is less than or equal to 5 multiplied by 10 18/cm3.
As a preferred embodiment of the present invention, an ohmic contact layer is disposed on the side wall of the ridge mesa structure and the upper surface of the doped layer which is not in contact with the back barrier layer, the ohmic contact layer is made of a nitride semiconductor material containing indium, and the source electrode and the drain electrode form ohmic contact with the ohmic contact layer.
As a further preferred embodiment of the present invention, the material of the ohmic contact layer is an indium-containing nitride semiconductor material.
As a preferred embodiment of the present invention, the substrate is any one of a silicon substrate, a silicon carbide substrate, a sapphire substrate, a gallium nitride substrate, and an aluminum nitride single crystal substrate.
The invention also provides a preparation method of the nitrogen polar nitride high electron mobility transistor in any scheme, which comprises the following steps:
sequentially epitaxially growing a nucleation layer, a semi-insulating layer, a buffer layer, a doping layer, a back barrier layer and a channel layer on a substrate;
manufacturing a gate electrode on the surface of the channel layer far away from the back barrier layer;
etching the two sides of the back barrier layer and the channel layer to manufacture a ridge type mesa structure;
And manufacturing a drain electrode from the surface of the ridge mesa structure along the side wall of the ridge mesa structure to the surface of the doped layer away from the buffer layer on the other side of the gate electrode.
As a preferred embodiment of the present invention, the method of manufacturing further comprises the step of growing an ohmic contact layer on the sidewalls of the ridge mesa structure and the upper surface of the doped layer not in contact with the back barrier layer by a secondary epitaxy after the ridge mesa structure is manufactured. The ohmic contact layer is made of a nitride semiconductor material containing indium.
Compared with the prior art, the device structure has the advantages that (1) in the device structure, the source electrode extends from the upper surface of one side of the channel layer to the upper surface of the doped layer on the same side along the side wall of the ridge type mesa structure on the same side, and the drain electrode extends from the upper surface of the other side of the channel layer to the upper surface of the doped layer along the side wall of the ridge type mesa structure on the same side, so that the source electrode and the drain electrode are in direct contact with two-dimensional electron gas in the channel, good ohmic contact is formed, contact resistance can be reduced to a certain extent, and compared with the prior art, the device structure has higher output current and output transconductance. (2) In the device structure, the back barrier layer is doped with low concentration, ohmic contact is formed on the side wall of the ridge type mesa structure, and meanwhile, the high back barrier height is still kept, so that the blocking effect on electrons is more effective compared with the prior art. (3) The device structure can effectively inhibit the current collapse effect of the nitrogen polarity device in high-frequency dynamic operation.
Drawings
Fig. 1 is an epitaxial structure and an energy band diagram of an N-polar GaN HEMT device in the prior art;
fig. 2 is an output current plot of an N-polar GaN HEMT device having the epitaxial structure of fig. 1;
fig. 3 is an epitaxial structure (using AlN as a substrate) of another N-polarity GaN HEMT device in the prior art and an energy band diagram thereof;
Fig. 4 is an epitaxial structure (doped in the back barrier layer) and an energy band diagram of another N-polar GaN HEMT device in the prior art;
fig. 5 is an output current plot of an N-polar GaN HEMT device having the epitaxial structure of fig. 4;
fig. 6 is a graph of the fermi level distance back barrier AlGaN/GaN interface valence band top position energy difference (Ef-Ev) and the change in back barrier height versus back barrier layer doping concentration for an N-polar GaN HEMT device having the epitaxial structure of fig. 4;
Fig. 7 is a schematic structural diagram of a nitride polar gan hemt according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of another exemplary nitrogen polarity GaN HEMT according to an embodiment of the invention;
fig. 9 is a schematic flow chart of a method for preparing a nitride polar gallium nitride high electron mobility transistor according to an embodiment of the invention;
fig. 10 is a schematic diagram of the structure of a nitrogen polarity gan hemt provided in the comparative example;
Fig. 11 is a graph of the results of drain electrode high-pressure stress tests of HEMTs of examples and comparative examples;
Fig. 12 is an energy band diagram of a channel layer to a semi-insulating layer of the HEMT in the embodiment;
fig. 13 is a graph comparing output current (Id) and transconductance (Gm) curves of HEMTs of the examples and the comparative examples.
In the figure, 1, a substrate, 2, a nucleation layer, 3, a semi-insulating layer, 4, a buffer layer, 5, a doping layer, 6, a back barrier layer, 7, a channel layer, 8, a source electrode, 9, a drain electrode, 10, a gate electrode, 11, two-dimensional electron gas, 12, an ohmic contact layer, 101, an AlN substrate, 102, a GaN layer, 103, an n-type doped GaN thin layer, 104, an n-type doped AlGaN back barrier layer, 105, an AlGaN back barrier layer, 106, a GaN channel layer, alpha and an included angle.
Detailed Description
The following description sets forth a clear and complete description of the present invention, in connection with embodiments, so that those skilled in the art will fully understand the present invention. It will be apparent that the described embodiments are only some, but not all, of the preferred embodiments of the invention. Any equivalent alterations or substitutions for the following embodiments without any inventive effort by those of ordinary skill in the art are intended to be within the scope of the present invention.
Directional terms referred to herein, such as "from bottom to top", "upward", "upper surface", "bottom surface", and the like, refer to the direction in the drawings. Accordingly, directional terminology is used for the purpose of description and not limitation of the invention. The methods not described in detail in the examples below are all conventional methods well known to those skilled in the art.
Examples
As shown in fig. 7, an embodiment of the present invention provides a nitrogen polar nitride High Electron Mobility Transistor (HEMT) including, in order from bottom to top, a substrate 1, a nucleation layer 2, a semi-insulating layer 3, a buffer layer 4, a doped layer 5, and a ridge mesa structure, and a source electrode 8, a drain electrode 9, and a gate electrode 10. The ridge mesa structure comprises a back barrier layer 6 and a channel layer 7 from bottom to top. The bottom surface of the back barrier layer 6 is the bottom surface of the ridge mesa structure, and the upper surface of the channel layer 7 is the upper surface of the ridge mesa structure. There is a two-dimensional electron gas 11 at the interface of the channel layer 7 and the back barrier layer 6. On one side of the ridge mesa, a source electrode 8 extends from the upper surface of the channel layer 7 along the sidewalls of the ridge mesa onto the upper surface of the doped layer 5. On the other side of the ridge mesa, a drain electrode 9 extends from the upper surface of the channel layer 7 along the sidewalls of the ridge mesa onto the upper surface of the doped layer 5. A gate electrode 10 is located on the channel layer 7 between the source electrode 8 and the drain electrode 9. The semi-insulating layer 3, the buffer layer 4, the doped layer 5, the back barrier layer 6 and the channel layer 7 are all nitride semiconductor materials of IIIA group elements. The doping type of the doped layer 5 is n-type. The direction from the substrate 1 to the channel layer 7 is the nitrogen polar crystal direction.
Further, an included angle alpha between the side wall of the ridge mesa structure and the bottom surface of the ridge mesa structure is less than or equal to 90 degrees, namely the width of the upper surface of the ridge mesa structure is less than or equal to the width of the bottom surface of the ridge mesa structure. For example, α is 90 °, 80 °, 70 °, 65 °, 60 °, 55 °, 50 °, 45 °.
Further, the included angle alpha between the side wall of the ridge type mesa structure and the bottom surface is 50-60 degrees.
Further, the nitride semiconductor material of the group IIIA element is any one of AlN, gaN, alGaN, inN, inGaN. For example, the material of the semi-insulating layer 3 is GaN, the material of the buffer layer 4 is GaN, the material of the doped layer 5 is GaN, the material of the back barrier layer 6 is AlGaN, and the material of the channel layer 7 is GaN.
Further, the material of the nucleation layer 2 is at least one of GaN, alN, alGaN.
Further, the doping element of the doped layer 5 is any one of Si, ge, and Sn, and the doping concentration is 1×10 18/cm3～1×1020/cm3. For example, the doping element of the doped layer 5 is Si, and the doping concentration is 1×1018/cm3、2×1018/cm3、3×1018/cm3、4×1018/cm3……4×1019/cm3……1×1020/cm3.
Further, the doping type of the back barrier layer 6 is n-type, and the doping concentration is less than or equal to 5×10 18/cm3. For example, the doping concentration is 5×1018/cm3、4×1018/cm3、3×1018/cm3……5×1017/cm3……5×1016/cm3、3×1016/cm3……
Further, the material of the back barrier layer 6 is a nitride semiconductor material containing aluminum, and the aluminum content in the back barrier layer 6 decreases in the direction from the channel layer 7 to the doped layer 5. For example, the material in the back barrier layer 6 near the channel layer 7 (i.e., the upper layer of the back barrier layer 6) is AlN, and the material in the back barrier layer 6 near the doped layer 5 (i.e., the bottom layer of the back barrier layer 6) is Al 0.1Ga0.9 N.
Further, as shown in fig. 8, ohmic contact layers 12 are provided on the sidewalls of the ridge mesa structure and the upper surface of the doped layer 5 which is not in contact with the back barrier layer 6, and the source electrode 8 and the drain electrode 9 are in ohmic contact with the ohmic contact layers 12. The material of the ohmic contact layer 12 is an indium-containing nitride semiconductor material, for example, the material of the ohmic contact layer 12 is In 0.1Ga0.9 N.
Further, the substrate 1 is any one of a silicon substrate, a silicon carbide substrate, a sapphire substrate, and a gallium nitride substrate. For example, the substrate 1 is a silicon substrate.
As shown in fig. 9, an embodiment of the present invention further provides a method for preparing a nitride polar nitride high electron mobility transistor, including the steps of:
a nucleation layer 2, a semi-insulating layer 3, a buffer layer 4, a doped layer 5, a back barrier layer 6 and a channel layer 7 are sequentially epitaxially grown on a substrate 1;
Depositing gate metal on the upper surface of the obtained structure and etching to obtain a gate electrode 10;
depositing source metal on the upper surface of the obtained device structure, etching, and reserving the source metal on one side of the gate electrode 10 from the surface of the ridge type mesa structure to the surface of the doping layer 5 far away from the buffer layer 4 along the side wall of the ridge type mesa structure to obtain a source electrode;
And depositing drain metal on the upper surface of the obtained device structure, and etching to keep the drain metal on the other side of the gate electrode 10 from the surface of the ridge mesa structure to the surface of the doped layer 5 away from the buffer layer 4 along the side wall of the ridge mesa structure, thereby obtaining the drain electrode.
Further, after the ridge mesa structure is fabricated, an ohmic contact layer 12 is grown on the side wall of the ridge mesa structure and the upper surface of the doped layer 5 which is not in contact with the back barrier layer 6 by a secondary epitaxy method.
Comparative example
As shown in fig. 10, this comparative example provides a nitrogen-polar nitride high electron mobility transistor including, in order from bottom to top, a substrate 1, a semi-insulating layer 3, a buffer layer 4, a back barrier layer 6, and a channel layer 7, and a source electrode 8, a drain electrode 9, and a gate electrode 10. There is a two-dimensional electron gas 11 at the interface of the channel layer 7 and the back barrier layer 6. The source electrode 8 and the drain electrode 9 are respectively located on both sides on the upper surface of the channel layer 7, and the gate electrode 10 is located on the channel layer 7 between the source electrode 8 and the drain electrode 9.
Performance testing
The HEMT provided by the embodiment is characterized in that the substrate is a silicon substrate, the nucleation layer is made of GaN, the semi-insulating layer is made of GaN, the buffer layer is made of GaN, the doping element is Si, the doping concentration is 1X 10 19/cm3, the back barrier layer is made of undoped AlGaN, the channel layer is made of GaN, the drain electrode is made of four metal layers of Ti/Al/Ni/Au, the gate electrode is made of a double-layer metal layer of Ni/Au, and the source electrode is made of four metal layers of Ti/Al/Ni/Au. The materials of the respective elements in the structure of the HEMT provided by the comparative example are the same as those of the corresponding elements in the HEMT structure provided by the foregoing embodiment.
Fig. 11 is a graph of the results of high voltage stress testing of the drain electrode of the HEMT provided in the example (without ohmic contact layer) and the HEMT provided in the comparative example. As can be seen from fig. 11, the output current of the HEMT in the comparative example decreased by 14% before and after the test, whereas the output current of the HEMT in the example hardly changed. This shows that the HEMT of the invention can effectively inhibit the current collapse effect caused by the donor-like trap charges at the back barrier interface when the nitrogen polarity device is in high-frequency dynamic operation.
Fig. 12 is a band diagram of a channel layer to semi-insulating layer of the HEMT of the embodiment, from which it can be seen that the undoped back barrier band height can be maintained at a high level, and the blocking effect on channel electrons is better. Therefore, even under high electric field strength, electrons in the channel layer are not easily driven into the buffer layer or the semi-insulating layer and trapped by deep level traps therein, thereby contributing to improvement of reliability of the HEMT device.
Fig. 13 is a graph comparing output current (Id) and transconductance (Gm) curves of HEMTs of the examples and the comparative examples. As can be seen from the figure, the HEMT of the example has a larger output current and transconductance than the HEMT of the comparative example. This is because, in the structure of the comparative example, the source and drain electrodes of the device are electrically connected to the two-dimensional electron gas in the channel through the channel layer surface, whereas in the structure of the embodiment, the source and drain electrodes each have a portion in direct contact with the two-dimensional electron gas channel of the side wall of the ridge mesa in addition to a portion in contact with the channel layer surface on the upper surface of the ridge mesa, and thus have a smaller contact resistance. When n-type doping with a certain concentration is performed on the back barrier layer, or/and an indium-containing nitride semiconductor layer is regrown on the side wall of the ridge mesa structure to serve as an ohmic contact layer, the contact resistance of the source electrode and the drain electrode is more beneficial to be reduced.
The foregoing description is only of the preferred embodiments of the invention and is not intended to limit the scope of the invention. Various modifications and alterations of this invention will occur to those skilled in the art. Any and all such simple and equivalent variations and modifications are intended to be included within the scope of this invention.
Claims (10)
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| CN102017160A (en) * | 2008-04-23 | 2011-04-13 | 特兰斯夫公司 | Enhancement mode III-N HEMT |
| CN105428412A (en) * | 2015-12-22 | 2016-03-23 | 工业和信息化部电子第五研究所 | Algan/gan heterojunction field effect transistor and preparation method thereof |
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