CN117929857B - Y capacitor detection method, terminal, detection system and medium - Google Patents
Y capacitor detection method, terminal, detection system and medium Download PDFInfo
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Abstract
本发明提供了一种Y电容检测方法、终端、检测系统及介质，根据待测电路的健康状况、预设工况的运行参数以及老化特性，确定待测电路在预设工况下的电路调整参数；根据电路调整参数，调整预先建立的等效电路模型；等效电路模型根据寄生参数确定；确定调整后的等效电路模型在预设工况下的等效Y电容，得到Y电容检测结果。通过考虑待测电路的健康状况、预设工况的运行参数以及老化特性，制定相应的电路调整参数，对等效电路模型进行调整，从而提高等效电路模型对实际电路的描述准确性，以提高Y电容检测的准确度。
The present invention provides a Y-capacitor detection method, terminal, detection system and medium. According to the health status of the circuit to be tested, the operating parameters of the preset working condition and the aging characteristics, the circuit adjustment parameters of the circuit to be tested under the preset working condition are determined; according to the circuit adjustment parameters, the pre-established equivalent circuit model is adjusted; the equivalent circuit model is determined according to the parasitic parameters; the equivalent Y capacitance of the adjusted equivalent circuit model under the preset working condition is determined, and the Y capacitance detection result is obtained. By considering the health status of the circuit to be tested, the operating parameters of the preset working condition and the aging characteristics, the corresponding circuit adjustment parameters are formulated, and the equivalent circuit model is adjusted, so as to improve the accuracy of the description of the actual circuit by the equivalent circuit model, so as to improve the accuracy of the Y-capacitor detection.
Description
Technical Field
The invention belongs to the technical field of circuit detection, and particularly relates to a Y capacitance detection method, a terminal, a detection system and a medium.
Background
The Y capacitor is a circuit configuration similar to the english letter "Y" in that one end of the capacitor is connected to a power line and the other end is connected to a ground (earth). The Y capacitor on the electric automobile has 2 existing forms: an artificially designed safety capacitor is arranged between an anode/cathode and a level platform and is used for improving EMC performance of parts and a whole vehicle, and the safety capacitor generally appears in pairs; the other existence form is parasitic capacitance formed passively by the components and the whole vehicle due to the structural characteristics of the components and the whole vehicle, and the parasitic capacitance comprises stray capacitance formed between the cable and the grounding shielding layer and structural capacitance formed between the metal shells of the components, so that unexpected influence is caused.
Both parasitic capacitance and safety Y capacitance on the circuit board can generate certain leakage current in the circuit, and the circuit safety is influenced, so that the equivalent Y capacitance of the whole circuit needs to be detected. The existing detection method only considers the characteristics of the circuit, and does not consider the influence caused by factors such as element aging, working condition change and the like in the circuit in the use process of the actual circuit, so that the detection of the equivalent Y capacitance is inaccurate.
Disclosure of Invention
In view of the above, the invention provides a Y capacitance detection method, a terminal, a detection system and a medium, which aim to solve the problem of inaccurate detection of equivalent Y capacitance in the prior art.
A first aspect of an embodiment of the present invention provides a Y capacitance detection method, including:
Determining circuit adjustment parameters of the circuit to be tested under the preset working condition according to the health condition of the circuit to be tested, the operation parameters of the preset working condition and the aging characteristics;
According to the circuit adjustment parameters, adjusting a pre-established equivalent circuit model; determining an equivalent circuit model according to parasitic parameters;
and determining the equivalent Y capacitance of the adjusted equivalent circuit model under a preset working condition to obtain a Y capacitance detection result.
A second aspect of an embodiment of the present invention provides a Y capacitance detection apparatus, including:
the calculation module is used for determining circuit adjustment parameters of the circuit to be tested under the preset working condition according to the health condition of the circuit to be tested, the operation parameters of the preset working condition and the aging characteristic;
The adjusting module is used for adjusting a pre-established equivalent circuit model according to the circuit adjusting parameters; determining an equivalent circuit model according to parasitic parameters;
the detection module is used for determining the equivalent Y capacitance of the adjusted equivalent circuit model under a preset working condition to obtain a Y capacitance detection result.
A third aspect of the embodiments of the present invention provides a terminal comprising a memory, a processor and a computer program stored in the memory and executable on the processor, the processor implementing the steps of the Y capacitance detection method of the first aspect above when the computer program is executed.
A fourth aspect of an embodiment of the present invention provides a detection system, including: an impedance analyzer and a terminal as in the above third aspect.
A fifth aspect of an embodiment of the present invention provides a computer readable storage medium storing a computer program which when executed by a processor implements the steps of the Y capacitance detection method of the first aspect above.
According to the Y capacitance detection method, the terminal, the detection system and the medium provided by the embodiment of the invention, the circuit adjustment parameters of the circuit to be detected under the preset working condition are determined according to the health condition of the circuit to be detected, the operation parameters of the preset working condition and the aging characteristics; according to the circuit adjustment parameters, adjusting a pre-established equivalent circuit model; determining an equivalent circuit model according to parasitic parameters; and determining the equivalent Y capacitance of the adjusted equivalent circuit model under a preset working condition to obtain a Y capacitance detection result. By considering the health condition of the circuit to be tested, the operation parameters of the preset working condition and the aging characteristic, corresponding circuit adjustment parameters are formulated, and the equivalent circuit model is adjusted, so that the description accuracy of the equivalent circuit model to the actual circuit is improved, and the accuracy of Y capacitance detection is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of an implementation of a Y capacitance detection method provided in an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a Y capacitance detection device according to an embodiment of the present invention;
Fig. 3 is a schematic structural diagram of a terminal according to an embodiment of the present invention.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
Fig. 1 is a flowchart of an implementation of a Y capacitance detection method according to an embodiment of the present invention. As shown in fig. 1, in some embodiments, the Y capacitance detection method includes:
s101, determining circuit adjustment parameters of the circuit to be tested under the preset working condition according to the health condition of the circuit to be tested, the operation parameters of the preset working condition and the aging characteristic.
In the embodiment of the invention, the circuit to be tested can be a power battery circuit, a railway traction system circuit and the like, and is not limited herein. The health condition of the circuit to be tested, the operation parameters of the preset working condition and the aging characteristic refer to the health condition of each element in the circuit to be tested, the operation parameters of the preset working condition and the aging characteristic. For example, when the circuit to be tested is a power battery circuit, the components include a battery, a resistor, a capacitor and an inductor. Each element corresponds to at least one parasitic parameter, and the circuit adjusting parameters correspond to the parasitic parameters one by one, specifically, the adjusting values of the parasitic parameters. The operating parameters may include voltage, current, power, operating temperature, etc., without limitation. For example, the operating parameters of the battery may include rest voltage drop, charge-discharge current, etc. The preset working condition may be a current working condition, or may be any experimental set working condition, which is not limited herein.
In the embodiment of the invention, the health condition of the circuit to be tested, the operation parameters of the preset working condition and the aging characteristic can be measured values, namely, in the real-time operation process of the circuit to be tested, the data are continuously detected, then the circuit adjustment parameters are calculated in real time, the size of the equivalent Y capacitance is detected, the safety state of the current circuit is estimated, or the given value can be estimated, namely, in the debugging stage of the circuit to be tested, different data are given, the operation of the circuit to be tested is simulated, the circuit adjustment parameters under the conditions are calculated, the size of the equivalent Y capacitance in operation is obtained, and the safety state of the circuit after the circuit to be tested is put into use is estimated. The health condition and the aging characteristic are calculated according to real-time data of the components and the conventional evaluation method, and are not limited herein. The health, operating parameters, aging characteristics may also be reported by the device configured by the device, e.g., such data for the battery may be reported by the battery management system.
S102, adjusting a pre-established equivalent circuit model according to circuit adjustment parameters; the equivalent circuit model is determined based on the parasitic parameters.
In the embodiment of the invention, the parasitic parameters are corresponding parasitic parameters when each element of the circuit to be tested is a new element, and the circuit adjusting parameters are adjusting values of the parasitic parameters. Taking a power battery circuit as an example, the battery, the resistor, the capacitor, the inductor and other elements in the power battery circuit can be equivalent to a circuit consisting of parasitic resistance, parasitic capacitance and parasitic inductance, the resistor can also show inductive and capacitive characteristics besides the resistive characteristics of the resistor, the characteristics of the resistor are equivalent to parasitic capacitance and parasitic inductance, the parasitic resistance and the parasitic inductance are the same as those of the capacitor, and the parasitic resistance and the parasitic capacitance are the same as those of the inductor. By comprehensively considering all the parameters, the circuit to be measured can be equivalent as far as possible, so that the obtained equivalent circuit model can better describe the actual circuit, and further the equivalent Y capacitance can be accurately measured.
S103, determining the equivalent Y capacitance of the adjusted equivalent circuit model under a preset working condition, and obtaining a Y capacitance detection result.
In the embodiment of the invention, after the equivalent circuit model is adjusted, the insulation resistance of the positive electrode and the insulation resistance of the negative electrode can be calculated, and then the equivalent Y capacitance can be calculated by a conventional method according to the working condition and the insulation resistance of the circuit to be tested.
In some embodiments, each parasitic parameter corresponds to a circuit tuning parameter; s101 includes: the health condition of the circuit to be tested under the preset working condition, the operation parameters of the preset working condition and the aging characteristics of the battery are input into a pre-established neural network model, and the circuit adjustment parameters corresponding to the parasitic parameters are determined.
In the embodiment of the invention, the calculation of the circuit adjustment parameters can be realized according to the generalization characteristics of the neural network. One or more circuits to be tested can be preset for experiments, the variation value of the parasitic parameter of each element is measured as a circuit adjustment parameter in the experimental process, and meanwhile, the health condition, the operation parameter, the aging characteristic and the like are measured to form a training set, so that the neural network is trained. The measurement of the above-mentioned parameters can be specifically performed by a high-precision apparatus or a high-precision model. For example, for a cell, an electrochemical model of the cell may be developed, which is described based on ion migration and reaction within the cell, involving a series of dynamics and balancing equations, which, while relatively complex, accurately model the behavior of the cell.
In some embodiments, S102 comprises: and adding the corresponding circuit adjustment parameters to each parasitic parameter in the equivalent circuit model to obtain an adjusted equivalent circuit model.
In the embodiment of the invention, the circuit adjustment parameters of different parasitic parameters are also different, for example, the parasitic resistance of the battery increases with the decrease of the health degree and the increase of the aging degree, so that the circuit adjustment parameters corresponding to the parasitic resistance of the battery are positive values, and the added values become larger. In addition, the parasitic resistance of the battery is affected by factors such as the operating temperature. The path of the current in the resistor and adjacent conductive material (e.g., PCB traces, ground planes, etc.) may create electromagnetic induction, thereby creating parasitic inductance. The parasitic resistance of the capacitor will increase with the rise of the working temperature, the circuit adjustment parameter is positive, and the parasitic inductance of the capacitor will be affected by the surrounding conductive material and the electromagnetic effect generated by itself, so that the corresponding circuit adjustment parameter needs to be calculated according to the data such as current. If the parasitic parameter of a certain element is not greatly influenced by factors such as aging, operation conditions and the like, the calculated circuit adjustment parameter is 0, namely the parasitic parameter is unchanged.
In some embodiments, the method further comprises: parasitic parameters of all elements in the circuit to be tested, which are extracted according to the impedance analyzer; and determining an equivalent circuit model of the circuit to be tested according to the parasitic parameters of each element.
In some embodiments, S101 comprises: obtaining a standard value corresponding to the parasitic parameter; and determining the circuit adjustment parameters of the circuit to be tested under the preset working condition according to the standard value, the health condition of the circuit to be tested, the operation parameters of the preset working condition and the aging characteristic.
In some embodiments, each parasitic parameter corresponds to a circuit tuning parameter; s102 includes:
Wherein k i is a circuit adjustment parameter corresponding to an ith parasitic parameter, X i is a health condition corresponding to the ith parasitic parameter, Y ij is a j-th operation parameter corresponding to the ith parasitic parameter, m is a total number of operation parameters corresponding to the ith parasitic parameter, Z i is an aging characteristic corresponding to the ith parasitic parameter, X 0、Y0j、Z0 is a standard value, and ω 1、ω2、ω3 is a preset weight.
In an embodiment of the invention, the value of ω 1、ω2、ω3 depends on the effect of this factor on the parasitic parameters. For example, the parasitic resistance of the battery is greatly affected by the health and aging characteristics, less affected by the operating parameters, and correspondingly, omega 1、ω3 is greater and omega 2 is less. If not affected by the three factors, ω 1、ω2、ω3 is set to 0.X 0、Y0j、Z0 is given directly by an expert in the evaluation of the circuit to be tested.
In some embodiments, after obtaining the Y capacitance detection result, the method further comprises: calculating the maximum energy of the equivalent Y capacitor, and judging whether the maximum energy exceeds a preset threshold value; and when the maximum energy exceeds a preset threshold value, sending out an electric shock risk alarm signal.
In the embodiment of the invention, the sum of the total energy of the unilateral Y capacitors of the high-voltage system needs to be controlled below 0.2J, otherwise, the generated leakage current can influence the system safety, and under the condition of insulation failure, the outward discharge of the Y capacitors is easy to generate electric shock risk. Thus, 0.2J may be set to a preset threshold, or a value less than 0.2J, such as 0.19J. The square of the maximum working voltage is multiplied by the capacitance value of the Y capacitor and divided by 2, so that the maximum energy of the Y capacitor is obtained.
The detection system of the invention can comprise an impedance analyzer and a terminal, wherein the impedance analyzer can analyze parasitic parameters of an initial circuit to be detected, the terminal establishes an equivalent circuit model according to the parasitic parameters, corrects the equivalent circuit model according to health, aging and operation, and detects the equivalent Y capacitance of the circuit to be detected in real time. The terminal may be an MCU, a single-chip microcomputer, a mobile phone, a computer, etc., which is not limited herein.
In summary, the beneficial effects of the invention are as follows:
According to the invention, the corresponding circuit adjustment parameters are formulated by considering the health condition of the circuit to be detected, the operation parameters of the preset working condition and the aging characteristic, and the equivalent circuit model is adjusted, so that the description accuracy of the equivalent circuit model to the actual circuit is improved, and the accuracy of Y capacitance detection is improved.
It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not limit the implementation process of the embodiment of the present invention.
Fig. 2 is a schematic structural diagram of a Y capacitance detection device according to an embodiment of the present invention. As shown in fig. 2, in some embodiments, the Y capacitance detection device 2 includes:
the computing module 210 is configured to determine a circuit adjustment parameter of the circuit to be tested under the preset working condition according to the health condition of the circuit to be tested, the operation parameter of the preset working condition, and the aging characteristic;
an adjustment module 220, configured to adjust a pre-established equivalent circuit model according to circuit adjustment parameters; determining an equivalent circuit model according to parasitic parameters;
The detection module 230 is configured to determine an equivalent Y capacitance of the adjusted equivalent circuit model under a preset working condition, and obtain a Y capacitance detection result.
Optionally, each parasitic parameter corresponds to a circuit adjustment parameter; the calculation module 210 is configured to input the health condition of the circuit to be tested under the preset working condition, the operation parameter of the preset working condition, and the aging characteristic of the battery into a pre-established neural network model, and determine the circuit adjustment parameters corresponding to the parasitic parameters.
Optionally, the adjusting module 220 is configured to: and adding the corresponding circuit adjustment parameters to each parasitic parameter in the equivalent circuit model to obtain an adjusted equivalent circuit model.
Optionally, the Y capacitance detecting device 2 further includes: the model building module is used for extracting parasitic parameters of all elements in the circuit to be tested according to the impedance analyzer; and determining an equivalent circuit model of the circuit to be tested according to the parasitic parameters of each element.
Optionally, the computing module 210 is configured to: obtaining a standard value corresponding to the parasitic parameter; and determining the circuit adjustment parameters of the circuit to be tested under the preset working condition according to the standard value, the health condition of the circuit to be tested, the operation parameters of the preset working condition and the aging characteristic.
Optionally, each parasitic parameter corresponds to a circuit adjustment parameter; a calculation module 210, configured to:
Wherein k i is a circuit adjustment parameter corresponding to an ith parasitic parameter, X i is a health condition corresponding to the ith parasitic parameter, Y ij is a j-th operation parameter corresponding to the ith parasitic parameter, m is a total number of operation parameters corresponding to the ith parasitic parameter, Z i is an aging characteristic corresponding to the ith parasitic parameter, X 0、Y0j、Z0 is a standard value, and ω 1、ω2、ω3 is a preset weight.
Optionally, the Y capacitance detecting device 2 further includes: an alarm module for: calculating the maximum energy of the equivalent Y capacitor, and judging whether the maximum energy exceeds a preset threshold value; and when the maximum energy exceeds a preset threshold value, sending out an electric shock risk alarm signal.
The Y capacitance detection device provided in this embodiment may be used to execute the above method embodiment, and its implementation principle and technical effects are similar, and this embodiment will not be described here again.
Fig. 3 is a schematic structural diagram of a terminal according to an embodiment of the present invention. As shown in fig. 3, a terminal 3 according to an embodiment of the present invention is provided, the terminal 3 according to the embodiment includes: a processor 30, a memory 31 and a computer program 32 stored in the memory 31 and executable on the processor 30. The steps of the various Y capacitance detection method embodiments described above, such as those shown in fig. 2, are implemented by processor 30 when executing computer program 32. Or the processor 30, when executing the computer program 32, performs the functions of the modules/units of the system embodiments described above, e.g., the functions of the modules shown in fig. 3.
By way of example, the computer program 32 may be partitioned into one or more modules/units that are stored in the memory 31 and executed by the processor 30 to complete the present invention. One or more of the modules/units may be a series of computer program instruction segments capable of performing a specific function for describing the execution of the computer program 32 in the terminal 3.
The terminal 3 may be a terminal or a server, and the terminal 3 may include, but is not limited to, a processor 30, a memory 31. It will be appreciated by those skilled in the art that fig. 3 is merely an example of the terminal 3 and is not limiting of the terminal 3, and may include more or fewer components than shown, or may combine some components, or different components, e.g., the terminal may further include an input-output device, a network access device, a bus, etc.
The Processor 30 may be a central processing unit (Central Processing Unit, CPU), other general purpose Processor, digital signal Processor (DIGITAL SIGNAL Processor, DSP), application SPECIFIC INTEGRATED Circuit (ASIC), field-Programmable gate array (Field-Programmable GATE ARRAY, FPGA) or other Programmable logic device, discrete gate or transistor logic device, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 31 may be an internal storage unit of the terminal 3, such as a hard disk or a memory of the terminal 3. The memory 31 may also be an external storage device of the terminal 3, such as a plug-in hard disk provided on the terminal 3, a smart memory card (SMART MEDIA CARD, SMC), a Secure Digital (SD) card, a flash memory card (FLASH CARD), or the like. Further, the memory 31 may also include both an internal storage unit and an external storage device of the terminal 3. The memory 31 is used to store computer programs and other programs and data required by the terminal. The memory 31 may also be used to temporarily store data that has been output or is to be output.
The embodiment of the invention provides a computer readable storage medium, wherein the computer readable storage medium stores a computer program, and the computer program realizes the steps in the embodiment of the Y capacitance detection method when being executed by a processor.
The computer readable storage medium stores a computer program 32, the computer program 32 includes program instructions, which when executed by the processor 30 implement all or part of the procedures in the methods of the above embodiments, or may be implemented by the computer program 32 by instructing the relevant hardware, and the computer program 32 may be stored in a computer readable storage medium, where the computer program 32, when executed by the processor 30, implements the steps of the various method embodiments described above. The computer program 32 comprises computer program code, which may be in the form of source code, object code, executable files, or in some intermediate form, among others. The computer readable medium may include: any entity or device capable of carrying computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), an electrical carrier signal, a telecommunications signal, a software distribution medium, and so forth.
The computer readable storage medium may be an internal storage unit of the terminal of any of the foregoing embodiments, such as a hard disk or a memory of the terminal. The computer readable storage medium may also be an external storage device of the terminal, such as a plug-in hard disk provided on the terminal, a smart memory card (SMART MEDIA CARD, SMC), a Secure Digital (SD) card, a flash memory card (FLASH CARD), or the like. Further, the computer-readable storage medium may also include both an internal storage unit of the terminal and an external storage device. The computer-readable storage medium is used to store a computer program and other programs and data required for the terminal. The computer-readable storage medium may also be used to temporarily store data that has been output or is to be output.
It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not limit the implementation process of the embodiment of the present invention.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions. The functional units and modules in the embodiment may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit, where the integrated units may be implemented in a form of hardware or a form of a software functional unit. In addition, the specific names of the functional units and modules are only for distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working process of the units and modules in the above system may refer to the corresponding process in the foregoing method embodiment, which is not described herein again.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus/terminal and method may be implemented in other manners. For example, the apparatus/terminal embodiments described above are merely illustrative, e.g., the division of modules or units is merely a logical functional division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection via interfaces, devices or units, which may be in electrical, mechanical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated modules/units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the present invention may implement all or part of the flow of the method of the above embodiment, or may be implemented by a computer program to instruct related hardware, and the computer program may be stored in a computer readable storage medium, where the computer program, when executed by a processor, may implement the steps of each of the method embodiments described above. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, executable files or in some intermediate form, etc. The computer readable medium may include: any entity or device capable of carrying computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), an electrical carrier signal, a telecommunications signal, a software distribution medium, and so forth.
The above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention, and are intended to be included in the scope of the present invention.
Claims (6)
1. A method for Y capacitance detection, the method comprising:
determining circuit adjustment parameters of the circuit to be tested under the preset working condition according to the health condition of the circuit to be tested, the operation parameters of the preset working condition and the aging characteristics; the circuit adjusting parameter is an adjusting value of a parasitic parameter of the circuit to be measured;
According to the circuit adjustment parameters, adjusting a pre-established equivalent circuit model; the equivalent circuit model is determined according to parasitic parameters;
determining an equivalent Y capacitance of the adjusted equivalent circuit model under a preset working condition to obtain a Y capacitance detection result;
Each parasitic parameter corresponds to a circuit adjustment parameter; determining a circuit adjustment parameter of the circuit to be tested under the preset working condition according to the health condition of the circuit to be tested, the operation parameter of the preset working condition and the aging characteristic, wherein the circuit adjustment parameter comprises:
Inputting the health condition of the circuit to be tested under the preset working condition, the operation parameters of the preset working condition and the aging characteristics of the battery into a pre-established neural network model, and determining circuit adjustment parameters corresponding to each parasitic parameter; or obtaining a standard value corresponding to the parasitic parameter; determining circuit adjustment parameters of the circuit to be tested under the preset working condition according to the standard value, the health condition of the circuit to be tested, the operation parameters of the preset working condition and the aging characteristic;
According to the circuit adjustment parameters, adjusting an equivalent circuit model, including:
Adding the corresponding circuit adjustment parameters to each parasitic parameter in the equivalent circuit model to obtain an adjusted equivalent circuit model;
determining the circuit adjustment parameters of the circuit to be tested under the preset working condition according to the standard value, the health condition of the circuit to be tested, the operation parameters of the preset working condition and the aging characteristic, wherein the circuit adjustment parameters comprise:
Wherein k i is a circuit adjustment parameter corresponding to an ith parasitic parameter, X i is a health condition corresponding to the ith parasitic parameter, Y ij is a j-th operation parameter corresponding to the ith parasitic parameter, m is a total number of operation parameters corresponding to the ith parasitic parameter, Z i is an aging characteristic corresponding to the ith parasitic parameter, X 0、Y0j、Z0 is the standard value, and ω 1、ω2、ω3 is a preset weight.
2. The Y capacitance detection method according to claim 1, further comprising:
parasitic parameters of all elements in the circuit to be tested, which are extracted according to the impedance analyzer;
And determining an equivalent circuit model of the circuit to be tested according to the parasitic parameters of each element.
3. The Y capacitance detection method according to claim 1 or 2, characterized in that after obtaining the Y capacitance detection result, the method further comprises:
Calculating the maximum energy of the equivalent Y capacitor, and judging whether the maximum energy exceeds a preset threshold value;
and when the maximum energy exceeds a preset threshold value, sending out an electric shock risk alarm signal.
4. A terminal comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the Y capacitance detection method according to any of the preceding claims 1 to 3 when the computer program is executed.
5. A detection system, comprising: impedance analyzer and terminal according to claim 4.
6. A computer readable storage medium, characterized in that it stores a computer program which, when executed by a processor, implements the steps of the Y capacitance detection method according to any one of the preceding claims 1 to 3.
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| CN113376538A (en) * | 2021-05-18 | 2021-09-10 | 杭州迪为科技有限公司 | Battery pack Y-capacitor testing method and system |
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| JP5947584B2 (en) * | 2012-03-27 | 2016-07-06 | 矢崎総業株式会社 | Insulation state detector |
| WO2019047214A1 (en) * | 2017-09-11 | 2019-03-14 | 深圳市汇顶科技股份有限公司 | Capacitance detection circuit, capacitance detection method, touch detection device and terminal device |
| CN110967618A (en) * | 2019-03-21 | 2020-04-07 | 宁德时代新能源科技股份有限公司 | Circuit parameter detection method and detection device |
| KR102864695B1 (en) * | 2020-03-23 | 2025-09-24 | 주식회사 엘지에너지솔루션 | Apparatus and method for generating battery parameter |
| CN115114863A (en) * | 2022-08-23 | 2022-09-27 | 苏州清研精准汽车科技有限公司 | Battery pack Y capacitance prediction method and device, computer equipment and storage medium |
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| RU2015127848A (en) * | 2015-07-09 | 2017-01-13 | Степан Георгиевич Тигунцев | A method for determining the location of a short circuit on a long power line with adjusting the line parameters |
| CN113376538A (en) * | 2021-05-18 | 2021-09-10 | 杭州迪为科技有限公司 | Battery pack Y-capacitor testing method and system |
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