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CN117939033A - Multi-system and multi-channel video stitching system and method - Google Patents

Multi-system and multi-channel video stitching system and method Download PDF

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Publication number
CN117939033A
CN117939033A CN202311285088.1A CN202311285088A CN117939033A CN 117939033 A CN117939033 A CN 117939033A CN 202311285088 A CN202311285088 A CN 202311285088A CN 117939033 A CN117939033 A CN 117939033A
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China
Prior art keywords
video
chip
camera
channel
video stream
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Pending
Application number
CN202311285088.1A
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Chinese (zh)
Inventor
肖钟湘
夏云龙
蔡思建
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Hunan Dingli Electric Technology Co ltd
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Hunan Dingli Electric Technology Co ltd
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Application filed by Hunan Dingli Electric Technology Co ltd filed Critical Hunan Dingli Electric Technology Co ltd
Priority to CN202311285088.1A priority Critical patent/CN117939033A/en
Publication of CN117939033A publication Critical patent/CN117939033A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/222Studio circuitry; Studio devices; Studio equipment
    • H04N5/262Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/2624Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects for obtaining an image which is composed of whole input images, e.g. splitscreen
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/01Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0127Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/18Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
    • H04N7/181Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast for receiving images from a plurality of remote sources

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Closed-Circuit Television Systems (AREA)

Abstract

The invention provides a multi-system and multi-channel video monitoring system and a method, belonging to the field of engineering machinery video monitoring; comprising the following steps: the multichannel multi-system video camera is used for simulating a multichannel camera and detecting a video system after being electrified and generating a video stream; the first chip is connected with the multi-channel multi-system video camera and used for controlling the multi-channel multi-system video camera to run or stop and receiving video streams; the second chip is connected with the first chip and is used for setting a video splicing mode and writing the video splicing mode into the first chip through a bus; the first chip codes the video stream, then splices the video stream according to a video splicing mode, and then transmits a first digital signal to the second chip after transcoding; the monitoring screen is connected with the second chip and used for displaying an output image of the second chip after the first digital signal is processed into a second digital signal through a preset calculation strategy. The invention can realize multichannel system, shorten the identification display speed, increase the system stability and promote the system compatibility.

Description

Multi-system and multi-channel video stitching system and method
Technical Field
The invention belongs to the field of engineering machinery video monitoring, and relates to a multi-system and multi-channel video monitoring system and method.
Background
In the field of video monitoring of traditional engineering machinery, common video monitoring technologies include; the monitoring screen can only be connected with a camera with one signal output format; the video decoding module is used for sequentially identifying the signal output formats of the cameras by an elimination method when the monitor screen is started, so that the cameras which can be identified and matched with various signal output formats are achieved; the single signal input format multichannel monitor screen is connected with a plurality of cameras with a single signal output format, and one or a plurality of video signal pictures with the single signal format are displayed on the monitor screen.
Problems in the prior art are as follows: firstly, a screen can only be connected with cameras of a specific signal output format in a matching way, and the cameras of the same signal output format can only be replaced when the type of the cameras is selected and maintained, so that the flexibility and the compatibility are poor. Secondly, the signal output format of the camera is identified by an elimination method when the monitoring system is started by means of external video decoding module equipment, generally only one channel camera can be connected, and the signal output format of the camera is identified by the elimination method when the monitoring system is started, so that the starting time of the monitoring system is prolonged, the time length is different, and the monitoring screen is externally connected with 1 video decoding module. Thirdly, the multichannel monitoring screen is generally only connected with cameras with a certain signal output format, and one channel is generally only matched with the cameras with the signal output format; if the cameras with various signal output formats are connected, a multipath decoding chip is needed to be connected, powerful CPU (Central processing Unit) support is needed, and the cost is increased and the economical efficiency is poor.
Disclosure of Invention
In order to solve the problems, the invention provides a multi-video signal format and multi-channel video monitoring system, which adopts an SSD202 chip as a main chip and a latest DM5885 chip as a video decoding chip; software for designing a unique algorithm by combining the performances of the two high-new chips is applied; under the video monitoring system, 1 video channel can be compatible with most of the cameras in the market, 4 video channels can be further realized and simultaneously compatible with most of the cameras in the market, and four video images of the monitoring screen can be flexibly spliced and split for display. The boot image delay is less than 2 seconds. The problems that in the prior art, the system matching problem of a monitoring screen and a camera video signal, the problem of time delay of a starting image of the monitoring screen, the problem that a multi-channel multi-system video signal image cannot be flexibly spliced and segmented and the like are solved, and the problem that a multi-channel display screen is high in price are solved.
The technical scheme adopted by the invention is as follows: the multi-channel multi-system video camera is used for simulating the multi-channel camera after being electrified, generating video streams and detecting a video system; the first chip is connected with the multi-channel multi-system video camera and used for controlling the multi-channel multi-system video camera to run or stop, receiving the video stream, identifying, decoding, splicing and transcoding the video stream and transmitting the video stream to the second chip; the second chip is connected with the first chip, judges a video signal system and selects a video splicing mode through a self-made algorithm, and writes the video signal system and the video splicing mode into the first chip through a bus; the first chip codes the video stream, then splices the video stream according to a video splicing mode, then transmits a first digital signal to the second chip after transcoding, and the second chip provides power for the multichannel multi-system video signal equipment after starting up; the monitoring screen is connected with the second chip and used for displaying an output image of the second chip after the first digital signal is processed into a second digital signal through a preset calculation strategy.
Further, the monitor screen is an LCD monitor screen.
On the other hand, the technical scheme implementation method comprises the following steps: s1, generating a video stream through a multichannel multi-system video camera, and detecting a video system; s2, controlling the operation or stop of the multi-channel multi-system video camera through the first chip, receiving a video stream, and then identifying, decoding, splicing and transcoding; s3, setting a video splicing mode through a second chip, judging a video mode, selecting the video splicing mode, and writing a preset calculation strategy into the first chip through a bus; s4, displaying an output image of the second chip after the first digital signal is processed into a second digital signal through a preset calculation strategy through a monitoring screen.
Further, step 1 includes that S1.1, the monitoring system is powered on, and a system and a splicing mode are initialized according to information memorized in the last startup; s1.2, a video monitoring function is started, and whether a video system is correct or not is judged; if yes, the video system is correct, and the monitoring screen displays images at a first preset time; if not, the video system is wrong, the monitoring screen displays images at a second preset time, and the system is re-detected.
Furthermore, when the video splicing method carries out multichannel splicing transcoding, the steps are adjusted and executed according to the steps 1,2, 3 and 4, and the method specifically comprises the following steps: s5, the second chip writes the video splicing mode, the camera video mode and the video system into the first chip through a bus; s6, splicing and transcoding the first chip; and S7, displaying the second chip system on the monitoring screen after the second chip system is identified.
Furthermore, when the video stitching method carries out the multi-system recognition algorithm, the steps are adjusted and executed according to the steps 1,2,3 and 4, and the method specifically comprises the following steps: s8, the first chip controls the camera to be opened and controls the first chip to reset; s9, the first chip receives the video stream; s10, the second chip judges the type of the video stream according to the register state.
Further, judging that the types of the video streams comprise a first video stream format type and a second video stream format type according to the register states; the first video stream format type comprises at least two standard formats, and the second video stream format type comprises at least six standard formats.
The beneficial effects of the invention are as follows: under the condition that the cost does not need to be increased or even the cost is kept unchanged, the monitoring system can be compatible with cameras of various systems on the market, and multichannel video splicing mode (or segmentation) images can be flexibly displayed on the same monitoring screen. The image stitching mode applies the algorithm of the invention, and is selected by a display screen key or a touch key after the power-on.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a hardware module of a multi-system multi-channel video monitoring system according to an embodiment of the present invention;
FIG. 2 is a schematic hardware flow diagram of a multi-mode and multi-channel video stitching system according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of 12 video stitching modes according to an embodiment of the present invention;
FIG. 4 is a detection flow chart of a multi-system and multi-channel video stitching system according to an embodiment of the present invention;
FIG. 5 is a flowchart of multi-system and multi-channel video splicing transcoding for a multi-system and multi-channel video splicing system according to an embodiment of the present invention;
fig. 6 is a flowchart of a system identification algorithm of a multi-system and multi-channel video stitching system according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, fig. 1 is a schematic hardware structure of a multi-system and multi-channel video stitching system according to an embodiment of the present invention; the embodiment of the invention; a first aspect provides a multi-system and multi-channel video stitching system comprising: the multi-channel multi-system video camera is used for simulating the multi-system multi-channel camera and detecting a video system after being electrified and generating a video stream; the first chip is connected with the multi-channel multi-system video camera and is used for controlling the multi-channel multi-system video camera to run or stop and receiving video streams; the second chip is connected with the first chip and is used for setting a video splicing mode and writing the video splicing mode into the first chip through a bus; the first chip codes the video stream, then splices the video stream according to a video splicing mode, and then transmits a first digital signal to the second chip after transcoding; the display screen is connected with the second chip and used for displaying an output image of the second chip after the first digital signal is processed into the second digital signal through a preset calculation strategy.
In this embodiment, the multi-channel multi-system video camera may be the following 8 video system analog cameras :PAL CVBS、NTSC CVBS、PAL 720P AHD、NTSC 720P AHD、PAL 720P TVI、NTSC 720P TVI、PAL 720P CVI、NTSC 720P CVI, but is not limited to the 8 video system analog cameras.
In this embodiment, the video stream refers to the transmission of video data, which can be, for example, handled as a steady and continuous signal stream by the network on chip.
It should be noted that the implementation of the video streaming technology is based on key technology, video decoding technology and scalable video distribution technology.
In this embodiment, the first chip is configured to control the operation or stop of the multi-channel multi-system video camera, and receive the video stream; the first chip comprises a built-in lithium battery and a control chip with an alarm output function.
In this embodiment, the second chip is a high-new communication chip, and is used for setting a video splicing mode, and writing into the first chip through a bus.
In this embodiment, the display screen is a flat display device, and is composed of a certain number of color or black-and-white pixels.
It should be noted that the bus is I2C (Inter-INTEGRATED CIRCUIT, bus) which is a simple, bidirectional two-wire synchronous serial bus. It requires only two wires to transfer information between devices connected to the bus. The master device is used to initiate the bus transfer of data and generate a clock to open the transfer device, where any addressed device is considered a slave device. If the host computer is to send data to the slave device, the host computer firstly addresses the slave device, then actively sends the data to the slave device, and finally the host computer terminates the data transmission; if the host is to receive data from the slave, the slave is addressed by the master first, then the host receives data sent by the slave, and finally the host terminates the receiving process.
Referring to fig. 2, fig. 2 is a schematic hardware flow diagram of a multi-system and multi-channel video stitching system according to an embodiment of the present invention; the first chip is DM5885, which is used for video identification and decoding, firstly through video identification and decoding, then video splicing, and finally video transcoding.
The second chip is SSD202, which is used for compiling a video splicing mode, and decodes the video stream transmitted by the first chip by setting the video splicing mode and plays the video stream on the display screen; the display screen is an LCD liquid crystal display screen.
In this embodiment, the second chip SSD202 supplies power to any system multi-channel camera, and the camera generates real-time video stream and transmits the real-time video stream to the first chip DM5885 for video decoding; meanwhile, the second chip SSD202 selects a video splicing mode, and writes the video splicing mode into the first chip DM5885 through the bus.
Further, the second chip SSD202 determines the system through a preset calculation policy, writes the system into the first DM5885 through a bus, decodes and splices the video stream by the first chip DM5885, transfers the transcoded video stream to the second chip SSD202, and the second chip SSD202 rapidly displays the image on the LCD display screen.
The second aspect of the embodiment of the invention provides a multi-system and multi-channel video splicing method, S1 simulates a multi-system multi-channel camera through a multi-channel multi-system video camera, detects a video system and generates a video stream; s2, controlling the operation or stop of the multi-channel multi-system video camera through the first chip, receiving video streams, and identifying transcoding; s3, setting a video splicing mode through a second chip, and writing a preset calculation strategy into the first chip through a bus; s4, displaying an output image of the second chip after the first digital signal is processed into a second digital signal through a preset calculation strategy through a display screen.
Referring to fig. 3, fig. 3 is a schematic diagram of 12 video stitching modes according to an embodiment of the present invention.
In this embodiment, the second chip sets a video stitching mode, where the video stitching mode is implemented by a video stitching mode, where the video stitching mode includes at least 12 modes, and the specific 12 modes are sequentially divided into three rows and four columns, and are sequentially arranged, where the first row is respectively 1 to 4 from left to right; the second row is respectively 5 to 8 from left to right; the third row is 9 to 12 from left to right, respectively.
It should be noted that, the color of the video stitching mode No. 1 is white; the color of the video stitching mode No.2 is red; the color of the video stitching mode No. 3 is yellow; the color of video stitching mode No. 4 is green.
Further, the video stitching mode No.5 is stitched by white and red, white is one half of the upper part of the screen, and red is one half of the lower part of the screen; the No.6 video stitching mode is formed by stitching white and red, wherein white is one half of the left part of the screen, and red is one half of the right part of the screen; the color of the video stitching mode No. 7 consists of white, yellow and green, wherein the white is half of the lower part of the screen, the yellow is half of the left side of the upper part, and the green is half of the right side of the upper part; the color of the video stitching mode No. 8 consists of white, yellow and green, wherein the white is one half of the position of the upper part of the screen, the yellow is one left quarter of the lower part, and the green is one right quarter of the lower part.
Further, the color of the video stitching mode No. 9 is composed of white, red and green, wherein the white is one half of the left position of the screen, the red is one quarter of the right upper position of the screen, and the green is one quarter of the right lower position; the color of the No. 10 video stitching mode consists of white, red and green, wherein the white is one half of the right position of the screen, the red is one quarter of the left upper position of the screen, and the green is one quarter of the left lower position; the color of the video stitching mode 11 consists of white, red, green and yellow, and respectively occupies one fourth of the color in a clockwise order; the color of the No. 12 video stitching mode consists of white, red, green and yellow, wherein the white is one third of the left part of the screen, the red is one third of the right part of the screen, the yellow and the green are respectively one third of the middle part of the screen, and the yellow is on the upper side and the green is on the lower side.
Referring to fig. 4, fig. 4 is a detection flow chart of a multi-system and multi-channel video stitching system according to an embodiment of the present invention; in one embodiment, step 1 includes powering up the video splicing system S1.1, and initializing the system and the splicing mode; s1.2, a video monitoring function is started, and whether a system is correct or not is judged; if yes, the video system is correct, and the display screen displays images at a first preset time; if not, the video system is wrong, the display screen displays the image at the second preset time, and the system is re-detected.
In the embodiment, after the system is started and electrified, all hardware devices are initialized according to the last memorized information; and detecting and judging the system by a unique algorithm, and judging whether the camera system changes in operation or not in real time by decoding the chip state by the first chip DM 5885. If the video stream is stable and the first chip DM5885 is in a normal state, rapidly displaying the video on the LCD screen; if the abnormal video stream in the state of the first chip DM5885 does not conform to the standard, namely, the standard is detected in real time for at most 2 seconds, and then the LCD video is displayed.
The video system is correct, and the display screen displays images in a first preset time, wherein the first preset time is less than 1 s; the video system is wrong, and the display screen displays images in a second preset time, wherein the second preset time is less than 2 s.
Referring to fig. 5, fig. 5 is a flowchart of multi-system and multi-channel video splicing transcoding in a multi-system and multi-channel video splicing system according to an embodiment of the present invention; the video splicing method adjusts and executes the steps according to the steps 1,2, 3 and 4 when carrying out multichannel splicing transcoding, and specifically comprises the following steps: s5, the second chip writes the video splicing mode, the camera video mode and the video system into the first chip through a bus; s6, splicing and transcoding the first chip; and S7, displaying the second chip system on a display screen after identification.
Referring to fig. 6, fig. 6 is a flowchart of a system identification algorithm of a multi-system and multi-channel video stitching system according to an embodiment of the present invention. The video stitching method adjusts and executes the steps according to the steps 1, 2, 3 and 4 when the multi-system recognition algorithm is carried out, and the method specifically comprises the following steps: s8, the first chip controls the camera to be opened and controls the first chip to reset; s9, the first chip receives the video stream; s10, the second chip judges the type of the video stream according to the register state; it should be noted that the SSD202 turns on the camera and resets the DM5885; DM5885 receives the stable video stream and SSD202 determines which class the video stream belongs to based on its register state.
In this embodiment, the foregoing embodiments are performed according to the corresponding manner, and will not be described herein.
In one embodiment, the type of the video stream is judged to include a first video stream format type and a second video stream format type according to the register state; the first video stream format type comprises at least two standard formats, and the second video stream format type comprises at least six standard formats.
In this embodiment, the first video stream format type is CVBS (Composite Video Broadcast Signal ) and includes at least two formats. Specifically, the seed format is PAL CVBS and NTSC CVBS.
It should be noted that, CVBS is a composite synchronous video broadcast signal or composite video blanking and synchronization, CVBS is a widely used standard, also called baseband video or RCA video, which transmits data in analog waveforms, and composite video contains color difference (hue and saturation) and brightness (brightness) information, and synchronizes them in blanking pulses, and transmits them with the same signal; it is a format of an analog television program (picture) signal before being combined with a sound signal and modulated onto a radio frequency carrier.
The PAL CVBS and the NTSC CVBS are two different resolution systems, the PAL resolution is 720X576, and the NTSC resolution is 720X480.
In this embodiment, the second video stream format type is 1280×720 in resolution, and includes at least six formats, specifically including PAL 720P AHD, NTSC 720P AHD, PAL 720P TVI, NTSC 720P TVI, PAL 720P CVI, and NTSC 720P CVI.
It should be noted that, the above system also needs to determine whether the same pulse is used at least three times according to Vertica (Vertical synchronization, field sync) and Hsync (Horizontal synchronization pulse, horizontal sync pulse).
The principle of the multi-system and multi-channel video splicing system is further described with reference to the above embodiments: the first step: and initializing all hardware devices according to the last memorized information after power-on. And a second step of: the monitoring system judges the video signal, judges whether the camera system changes in work or not in real time through the DM5885 decoding chip state, and immediately displays the video image (1S picture) if the video system is correct. If the DM5885 state anomaly video stream does not conform to the standard. I.e. it takes up to 2 seconds in real time to detect the system and then LCD video is displayed. The monitoring system judges the video signal, judges whether the image splicing mode of the multichannel video signal changes in operation or not in real time through the DM5885 decoding chip state, immediately displays the video image (1S picture) if the image splicing mode of the video signal is correct, and detects the standard in a time of at most 2 seconds in real time if the abnormal video image splicing mode of the DM5885 state does not meet the requirement. And a third step of: if the video system errors need to be re-detected, the SSD202 turns on the camera and resets the DM5885, the DM5885 receives the video signals of the camera and transmits the video signals to the SSD202 chip, and the SSD202 chip combines the algorithm designed by the invention and judges which system the video signals belong to according to the register state of the DM5885 chip.
It should be noted that, if the video image stitching mode is wrong, the camera :1、PAL CVBS;2、NTSC CVBS;3、PAL 720P AHD;4、NTSC 720PAHD;5、720P TVI;6、NTSC 720P TVI;7、PAL 720P CVI;8、NTSC 720P CVI; of the 8 video system signals identified by the invention needs to re-detect the image stitching mode, the SSD202 opens the camera and resets the DM5885, the DM5885 receives the video signal of the coming camera and transmits the video signal to the SSD202 chip, and the SSD202 chip combines the algorithm designed by the invention to judge which type of image stitching mode the video signal belongs to according to the register state of the DM5885 chip. The invention can identify 12 video image stitching modes. Fourth step: the SSD202 chip makes judgment of video signal system and video image splicing mode according to the video signal transmitted by the DM5885 chip, and then uses the design algorithm of the invention to carry out code conversion, and transmits and writes the video signal system and the video image splicing mode into the DM5885 chip through the bus I2C.
Further, the state of the transcoded DM5885 decoding chip is completely matched with the video signal system at the moment and the multi-channel video image splicing mode, and the video signal of the camera is displayed by the DM5885 decoding chip, the SSD202 chip and the monitoring screen in the video image of the required splicing mode.
The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art will understand that; the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions are intended to be included within the scope of the present application without departing from the spirit and scope of the embodiments of the present application.

Claims (9)

1. A multi-system and multi-channel video stitching system, comprising:
The multichannel multi-system video camera is used for simulating a multichannel camera and detecting a video system after being electrified and generating a video stream;
The first chip is connected with the multi-channel multi-system video camera and used for controlling the multi-channel multi-system video camera to run or stop and receiving the video stream;
the second chip is connected with the first chip and is used for setting a video splicing mode and writing the video splicing mode into the first chip through a bus;
The first chip codes the video stream, then splices the video stream according to the video splicing mode, and then transmits a first digital signal to the second chip after code conversion;
the monitoring screen is connected with the second chip and used for displaying an output image after the second chip processes the first digital signal into a second digital signal through a preset calculation strategy.
2. The video stitching system of claim 1 wherein the first chip is DM588 for video transcoding.
3. The video stitching system of claim 1 wherein the second chip is an SSD202 for video stitching compilation.
4. The video stitching system of claim 1 wherein the monitor screen is an LCD liquid crystal monitor screen.
5. The multi-system and multi-channel video stitching method is characterized by comprising the following steps of:
S1, simulating a multi-channel camera by a multi-channel multi-system video camera, detecting a video system and generating a video stream;
S2, controlling the operation or stop of the multi-channel multi-system video camera through a first chip, receiving the video stream, and identifying and transcoding;
S3, setting a video splicing mode through a second chip, and writing a preset calculation strategy into the first chip through a bus;
And S4, displaying an output image display after the second chip processes the first digital signal into a second digital signal through a preset calculation strategy by a monitoring screen.
6. The video stitching method according to claim 5, wherein step 1 includes powering up the video stitching system to initialize the system and the stitching mode S1.1;
s1.2, a video monitoring function is started, and whether a system is correct or not is judged;
if yes, the video system is correct, and the monitoring screen displays images at a first preset time;
if not, the video system is wrong, the monitoring screen displays images at a second preset time, and the system is re-detected.
7. The video splicing method according to claim 5, wherein the steps of performing the multi-channel splicing transcoding according to the steps 1,2, 3, and 4 are adjusted and executed according to the steps of:
S5, the second chip writes the video splicing mode, the camera video mode and the video system into the first chip through a bus;
S6, splicing and transcoding the first chip;
And S7, displaying the second chip system on the monitoring screen after the second chip system is identified.
8. The video stitching method according to claim 5, wherein the steps of performing the multi-system recognition algorithm according to step 1, step 2, step 3, and step 4 are adjusted and executed according to the following steps:
S8, the first chip controls the camera to be opened and controls the first chip to reset;
s9, the first chip receives the video stream;
S10, the second chip judges the type of the video stream according to the register state.
9. The video splicing method according to claim 5, wherein determining the type of the video stream based on the register state thereof includes a first video stream format type and a second video stream format type; the first video stream format type comprises at least two standard formats, and the second video stream format type comprises at least six standard formats.
CN202311285088.1A 2023-10-04 2023-10-04 Multi-system and multi-channel video stitching system and method Pending CN117939033A (en)

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CN202311285088.1A CN117939033A (en) 2023-10-04 2023-10-04 Multi-system and multi-channel video stitching system and method

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Application Number Priority Date Filing Date Title
CN202311285088.1A CN117939033A (en) 2023-10-04 2023-10-04 Multi-system and multi-channel video stitching system and method

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CN117939033A true CN117939033A (en) 2024-04-26

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