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CN118016522B - Silicon column structure based on overexposure and preparation method thereof - Google Patents

Silicon column structure based on overexposure and preparation method thereof Download PDF

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CN118016522B
CN118016522B CN202410189160.9A CN202410189160A CN118016522B CN 118016522 B CN118016522 B CN 118016522B CN 202410189160 A CN202410189160 A CN 202410189160A CN 118016522 B CN118016522 B CN 118016522B
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CN118016522A (en
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林晨希
王玮
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Peking University
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Abstract

本申请提供一种基于过度曝光的硅柱结构及其制备方法,涉及电子制造领域,包括:提供硅基衬底;在硅基衬底的一侧形成掩膜层;基于激光直写的光刻工艺对掩膜层进行过度曝光处理,形成与多个第一区域对应的多个第一通孔,其中,相邻第一通孔沿行方向和列方向的侧壁部分连通,以在第二区域形成阵列排布的多个第一结构;基于多个第一结构对硅基衬底靠近掩膜层的一侧进行刻蚀,形成与多个第一结构对应的多个硅柱。本申请采用激光直写的光刻工艺对掩膜层进行曝光处理,降低了对光刻精度的要求,且通过过度曝光的方式形成多个更小尺寸的第一结构,从而基于第一结构刻蚀得到高特征比的硅柱,有效降低了制备高特征比的硅柱结构的工艺复杂性和工艺成本。

The present application provides a silicon pillar structure based on overexposure and a preparation method thereof, which relates to the field of electronic manufacturing, including: providing a silicon-based substrate; forming a mask layer on one side of the silicon-based substrate; overexposing the mask layer based on a laser direct writing lithography process to form a plurality of first through holes corresponding to a plurality of first regions, wherein the sidewall portions of adjacent first through holes along the row direction and the column direction are connected to form a plurality of first structures arranged in an array in the second region; etching the side of the silicon-based substrate close to the mask layer based on the plurality of first structures to form a plurality of silicon pillars corresponding to the plurality of first structures. The present application uses a laser direct writing lithography process to expose the mask layer, which reduces the requirements for lithography accuracy, and forms a plurality of first structures of smaller size by overexposure, thereby obtaining silicon pillars with a high feature ratio based on etching of the first structures, effectively reducing the process complexity and process cost of preparing silicon pillar structures with a high feature ratio.

Description

一种基于过度曝光的硅柱结构及其制备方法A silicon column structure based on overexposure and preparation method thereof

技术领域Technical Field

本申请实施例涉及电子制造领域,具体而言,涉及一种基于过度曝光的硅柱结构及其制备方法。The embodiments of the present application relate to the field of electronic manufacturing, and more specifically, to an overexposure-based silicon pillar structure and a method for preparing the same.

背景技术Background Art

由于微米柱、纳米柱存在约束效应和最大表面积效应,在许多新兴技术中发挥关键作用,在电子学、光学、化学合成与催化、生物传感等领域均有广泛应用。硅柱结构具有与CMOS(Complementary Metal Oxide Semiconductor,互补金属氧化物半导体)工艺兼容的优点,因此在MEMS(Micro-Electromechanical System,微机电系统)等领域备受青睐。Due to the constraint effect and maximum surface area effect of micro-pillars and nano-pillars, they play a key role in many emerging technologies and are widely used in electronics, optics, chemical synthesis and catalysis, biosensing, etc. The silicon pillar structure has the advantage of being compatible with CMOS (Complementary Metal Oxide Semiconductor) technology, so it is favored in MEMS (Micro-Electromechanical System) and other fields.

然而,现有的硅柱结构的制备方法中,在制备尺寸较小的硅柱结构时,一方面电子束光刻旋涂的掩膜的厚度相较于常规厚度更小,另一方面受刻蚀选择比的限制,需要制备金属掩膜以供图形的转移,这使得制备高特征比的硅柱结构的工艺复杂性和工艺成本较高。因此,如何降低高特征比的硅柱结构制备工艺的复杂度和工艺成本,成为本领域当前亟待解决的问题。However, in the existing method for preparing silicon pillar structures, when preparing silicon pillar structures of smaller size, on the one hand, the thickness of the mask for electron beam lithography spin coating is smaller than the conventional thickness, and on the other hand, due to the limitation of etching selectivity, a metal mask needs to be prepared for pattern transfer, which makes the process complexity and process cost of preparing silicon pillar structures with high feature ratios high. Therefore, how to reduce the complexity and process cost of the process for preparing silicon pillar structures with high feature ratios has become a problem that needs to be solved urgently in the field.

发明内容Summary of the invention

本申请实施例在于提供一种基于过度曝光的硅柱结构及其制备方法,旨在解决如何降低高特征比的硅柱结构制备工艺的复杂度和工艺成本的问题。The embodiments of the present application provide a silicon pillar structure based on overexposure and a method for preparing the same, aiming to solve the problem of how to reduce the complexity and process cost of the preparation process of a silicon pillar structure with a high feature ratio.

本申请实施例第一方面提供一种基于过度曝光的硅柱结构制备方法,所述制备方法包括:A first aspect of an embodiment of the present application provides a method for preparing a silicon pillar structure based on overexposure, the method comprising:

提供硅基衬底;Providing a silicon-based substrate;

在所述硅基衬底的一侧形成掩膜层,所述掩膜层包括沿行方向和列方向阵列排布的多个第一区域,以及围绕所述第一区域的第二区域;Forming a mask layer on one side of the silicon-based substrate, the mask layer comprising a plurality of first regions arrayed in a row direction and a column direction, and a second region surrounding the first regions;

基于激光直写的光刻工艺对所述掩膜层进行过度曝光处理,形成与所述多个第一区域对应的多个第一通孔,所述多个第一通孔贯穿所述掩膜层,其中,相邻第一通孔沿所述行方向和所述列方向的侧壁部分连通,以在所述第二区域形成阵列排布的多个第一结构;Performing an overexposure process on the mask layer based on a laser direct writing lithography process to form a plurality of first through holes corresponding to the plurality of first regions, wherein the plurality of first through holes penetrate the mask layer, wherein sidewall portions of adjacent first through holes along the row direction and the column direction are connected to form a plurality of first structures arranged in an array in the second region;

基于所述多个第一结构对所述硅基衬底靠近所述掩膜层的一侧进行刻蚀,形成与所述多个第一结构对应的多个硅柱。Based on the multiple first structures, a side of the silicon-based substrate close to the mask layer is etched to form a plurality of silicon pillars corresponding to the multiple first structures.

在一种可选的实施方式中,所述基于激光直写工艺对所述掩膜层进行过度曝光处理,形成与所述多个第一区域对应的多个第一通孔,包括:In an optional implementation, the over-exposure treatment of the mask layer based on the laser direct writing process to form a plurality of first through holes corresponding to the plurality of first regions includes:

基于所述激光直写的光刻工艺,对所述多个第一区域进行过度曝光处理,以去除所述第一区域的掩膜材料,以及相邻第一区域之间的部分掩膜材料,形成所述多个第一通孔,其中,所述第一结构包括沿第一方向的相邻两个第一通孔之间的掩膜材料,所述第一方向为平行于第一区域对角线的方向。Based on the laser direct writing lithography process, the multiple first regions are overexposed to remove the mask material of the first regions and part of the mask material between adjacent first regions to form the multiple first through holes, wherein the first structure includes the mask material between two adjacent first through holes along a first direction, and the first direction is a direction parallel to the diagonal of the first region.

在一种可选的实施方式中,所述基于所述多个第一结构对所述硅基衬底靠近所述掩膜层的一侧进行刻蚀,形成与所述多个第一结构对应的多个硅柱,包括:In an optional implementation, etching a side of the silicon-based substrate close to the mask layer based on the multiple first structures to form a plurality of silicon pillars corresponding to the multiple first structures includes:

对所述硅基衬底靠近所述掩膜层的一侧进行深硅刻蚀,以使所述第一通孔沿第二方向的深度增加,形成多个盲孔,相邻盲孔之间形成所述多个硅柱,所述第二方向为所述硅基衬底指向所述掩膜层的方向。Deep silicon etching is performed on one side of the silicon-based substrate close to the mask layer to increase the depth of the first through hole along the second direction to form a plurality of blind holes, and the plurality of silicon pillars are formed between adjacent blind holes, wherein the second direction is the direction from the silicon-based substrate to the mask layer.

在一种可选的实施方式中,所述掩膜层为光刻胶层。In an optional implementation, the mask layer is a photoresist layer.

在一种可选的实施方式中,所述掩膜层包括层叠设置的光刻胶层和金属层,所述金属层设置在所述硅基衬底的一侧,所述光刻胶层设置在所述金属层背离所述硅基衬底的一侧。In an optional implementation, the mask layer includes a stacked photoresist layer and a metal layer, the metal layer is disposed on one side of the silicon-based substrate, and the photoresist layer is disposed on a side of the metal layer away from the silicon-based substrate.

在一种可选的实施方式中,所述硅柱沿第二方向的高度大于或等于15μm,所述硅柱的直径小于或等于1μm,所述第二方向为所述硅基衬底指向所述掩膜层的方向。In an optional implementation, the height of the silicon pillar along the second direction is greater than or equal to 15 μm, the diameter of the silicon pillar is less than or equal to 1 μm, and the second direction is the direction from the silicon-based substrate to the mask layer.

在一种可选的实施方式中,所述第一区域在所述硅基衬底上的正投影形状为矩形。In an optional implementation, the orthographic projection shape of the first region on the silicon-based substrate is a rectangle.

在一种可选的实施方式中,所述第一通孔沿所述行方向的宽度与所述第一区域沿所述行方向的宽度之比大于或等于2:1,且小于或等于(√2+1):1。In an optional embodiment, the ratio of the width of the first through hole along the row direction to the width of the first region along the row direction is greater than or equal to 2:1 and less than or equal to (√2+1):1.

在一种可选的实施方式中,所述第一区域沿所述行方向或所述列方向的宽度小于或等于2μm;相邻第一区域之间沿所述行方向或所述列方向的间隙宽度,与所述第一区域沿所述行方向或所述列方向的宽度相同。In an optional embodiment, the width of the first region along the row direction or the column direction is less than or equal to 2 μm; the gap width between adjacent first regions along the row direction or the column direction is the same as the width of the first region along the row direction or the column direction.

本申请实施例第二方面提供一种基于过度曝光的硅柱结构,所述硅柱结构为采用第一方面中任意一项所述的基于过度曝光的硅柱结构制备方法进行制备得到的。A second aspect of an embodiment of the present application provides a silicon column structure based on overexposure, wherein the silicon column structure is prepared by using any one of the methods for preparing a silicon column structure based on overexposure described in the first aspect.

有益效果:Beneficial effects:

本申请提供一种基于过度曝光的硅柱结构及其制备方法,所述制备方法包括:提供硅基衬底;在所述硅基衬底的一侧形成掩膜层,所述掩膜层包括沿行方向和列方向阵列排布的多个第一区域,以及围绕所述第一区域的第二区域;基于激光直写工艺对所述掩膜层进行过度曝光处理,形成与所述多个第一区域对应的多个第一通孔,所述多个第一通孔贯穿所述掩膜层,其中,相邻第一通孔沿所述行方向和所述列方向的侧壁部分连通,以在所述第二区域形成阵列排布的多个第一结构;基于所述多个第一结构对所述硅基衬底靠近所述掩膜层的一侧进行刻蚀,形成与所述多个第一结构对应的多个硅柱。本申请采用激光直写的光刻工艺对掩膜层进行曝光处理,降低了对光刻精度的要求,且通过过度曝光的方式形成多个更小尺寸的第一结构,从而基于第一结构刻蚀得到高特征比的硅柱,有效降低了制备高特征比的硅柱结构的工艺复杂性和工艺成本。The present application provides a silicon pillar structure based on overexposure and a preparation method thereof, the preparation method comprising: providing a silicon-based substrate; forming a mask layer on one side of the silicon-based substrate, the mask layer comprising a plurality of first regions arranged in an array along the row direction and the column direction, and a second region surrounding the first region; overexposing the mask layer based on a laser direct writing process to form a plurality of first through holes corresponding to the plurality of first regions, the plurality of first through holes passing through the mask layer, wherein the sidewall portions of adjacent first through holes along the row direction and the column direction are connected to form a plurality of first structures arranged in an array in the second region; etching the side of the silicon-based substrate close to the mask layer based on the plurality of first structures to form a plurality of silicon pillars corresponding to the plurality of first structures. The present application uses a laser direct writing lithography process to expose the mask layer, which reduces the requirements for lithography accuracy, and forms a plurality of first structures of smaller size by overexposure, thereby etching a silicon pillar with a high feature ratio based on the first structure, effectively reducing the process complexity and process cost of preparing a silicon pillar structure with a high feature ratio.

上述说明仅是本申请技术方案的概述,为了能够更清楚了解本申请的技术手段,而可依照说明书的内容予以实施,并且为了让本申请的上述和其它目的、特征和优点能够更明显易懂,以下特举本申请的具体实施方式。The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below.

附图说明BRIEF DESCRIPTION OF THE DRAWINGS

为了更清楚地说明本申请实施例的技术方案,下面将对本申请实施例的描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

图1是本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法流程图;FIG1 is a flow chart of a method for preparing a silicon pillar structure based on overexposure according to an embodiment of the present application;

图2是本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中形成掩膜层的俯视示意图;FIG2 is a schematic top view of forming a mask layer in a method for preparing a silicon pillar structure based on overexposure according to an embodiment of the present application;

图3是本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中形成掩膜层的A-A’剖面示意图;FIG3 is a schematic cross-sectional view of A-A’ of forming a mask layer in a method for preparing a silicon pillar structure based on overexposure according to an embodiment of the present application;

图4是本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中另一种形成掩膜层的A-A’剖面示意图;FIG4 is a schematic cross-sectional view of another method for forming a mask layer in a method for preparing a silicon pillar structure based on overexposure according to an embodiment of the present application;

图5是本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中形成第一通孔的俯视示意图;5 is a schematic top view of forming a first through hole in a method for preparing a silicon pillar structure based on overexposure according to an embodiment of the present application;

图6是本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中另一种形成第一通孔的俯视示意图;FIG6 is a schematic top view of another method for forming a first through hole in a method for preparing a silicon pillar structure based on overexposure according to an embodiment of the present application;

图7是本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中形成第一通孔的B-B’剖面示意图;FIG7 is a schematic cross-sectional view taken along line B-B' of forming a first through hole in a method for preparing a silicon pillar structure based on overexposure according to an embodiment of the present application;

图8是本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中形成硅柱的A-A’剖面示意图。FIG8 is a schematic diagram of the A-A’ cross section of a silicon pillar formed in a method for preparing a silicon pillar structure based on overexposure proposed in an embodiment of the present application.

附图标记说明:101、硅基衬底;102、掩膜层;1021、光刻胶层;1022、金属层;103、第一通孔;104、第一结构;105、盲孔;106、硅柱;201、第一区域;202、第二区域。Explanation of the reference numerals: 101, silicon-based substrate; 102, mask layer; 1021, photoresist layer; 1022, metal layer; 103, first through hole; 104, first structure; 105, blind hole; 106, silicon pillar; 201, first region; 202, second region.

具体实施方式DETAILED DESCRIPTION

下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

在附图中,有时为了明确起见,可能夸大表示了构成要素的大小、层的厚度或区域,因此,本公开的任意一个实现方式并不一定限定与图中所示的尺寸,附图中部件的形状和大小不反映真实比例。此外,附图示意性地示出了理想的例子,本公开的任意一个实现方式不局限于附图所示的形状或数值等。In the drawings, the size of the constituent elements, the thickness of the layer or the area may be exaggerated for the sake of clarity. Therefore, any implementation of the present disclosure is not necessarily limited to the size shown in the drawings, and the shapes and sizes of the components in the drawings do not reflect the true proportions. In addition, the drawings schematically show ideal examples, and any implementation of the present disclosure is not limited to the shapes or values shown in the drawings.

由于微米柱、纳米柱存在约束效应和最大表面积效应,在许多新兴技术中发挥关键作用,在电子学、光学、化学合成与催化、生物传感等领域均有广泛应用。硅柱结构具有与CMOS(Complementary Metal Oxide Semiconductor,互补金属氧化物半导体)工艺兼容的优点,因此在MEMS(Micro-Electromechanical System,微机电系统)等领域备受青睐。Due to the constraint effect and maximum surface area effect of micro-pillars and nano-pillars, they play a key role in many emerging technologies and are widely used in electronics, optics, chemical synthesis and catalysis, biosensing, etc. The silicon pillar structure has the advantage of being compatible with CMOS (Complementary Metal Oxide Semiconductor) technology, so it is favored in MEMS (Micro-Electromechanical System) and other fields.

现有技术中,硅柱结构的制备方法一般分为两类,一种是由金等金属线作为催化剂的硅柱生长技术,属于“加法”,这种方法的缺点是需要高温高真空度的苛刻环境,并且硅柱的高度不均匀;另一种方法是在硅基衬底上,通过刻蚀工艺,移除硅柱以外部分,属于“减法”。然而,现有的“减法”形式的硅柱结构的制备方法中,通常采用电子束光刻工艺进行刻蚀形成硅柱结构,在制备尺寸较小的硅柱结构时,一方面电子束光刻旋涂的掩膜的厚度相较于常规厚度更小,另一方面受刻蚀选择比的限制,需要制备金属掩膜以供图形的转移,这使得制备高特征比的硅柱结构的工艺复杂性和工艺成本较高,需要说明的是,所述硅柱结构的尺寸是指所述硅柱结构沿高度方向(垂直于硅基衬底上下扁平面的方向)的尺寸以及所述硅柱结构沿宽度方向(平行于所述硅基衬底上下扁平面的方向)的尺寸。In the prior art, the preparation methods of silicon column structures are generally divided into two categories. One is the silicon column growth technology using metal wires such as gold as catalysts, which belongs to the "addition method". The disadvantage of this method is that it requires a harsh environment of high temperature and high vacuum, and the height of the silicon column is uneven; the other method is to remove the parts other than the silicon column on the silicon-based substrate through an etching process, which belongs to the "subtraction method". However, in the existing "subtraction" form of silicon column structure preparation method, electron beam lithography is usually used for etching to form the silicon column structure. When preparing a silicon column structure with a smaller size, on the one hand, the thickness of the mask for electron beam lithography spin coating is smaller than the conventional thickness. On the other hand, due to the limitation of the etching selectivity, a metal mask needs to be prepared for the transfer of the pattern, which makes the process complexity and process cost of preparing a silicon column structure with a high feature ratio higher. It should be noted that the size of the silicon column structure refers to the size of the silicon column structure along the height direction (the direction perpendicular to the upper and lower flat surfaces of the silicon-based substrate) and the size of the silicon column structure along the width direction (the direction parallel to the upper and lower flat surfaces of the silicon-based substrate).

有鉴于此,本申请实施例提出一种基于过度曝光的硅柱结构制备方法,图1示出了本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法流程图,如图1所示,所述制备方法包括如下步骤:In view of this, an embodiment of the present application proposes a method for preparing a silicon pillar structure based on overexposure. FIG. 1 shows a flow chart of a method for preparing a silicon pillar structure based on overexposure proposed in an embodiment of the present application. As shown in FIG. 1 , the preparation method comprises the following steps:

S101、提供硅基衬底。S101. Provide a silicon-based substrate.

具体实施步骤S101时,本申请实施例采用硅晶片的晶圆作为生成所述硅柱结构的衬底材料,其中,所述硅基衬底101的厚度大于所述硅柱结构制备方法中的其他层级材料的厚度,需要说明的是,在本申请实施例中提供的所述硅柱结构制备方法中,涉及的各部分结构的“厚度”,是指各部分结构垂直于所述硅基衬底101的上下扁平面的方向的尺寸,也即所述硅基衬底101指向所述硅柱结构制备方法中形成的其他层级结构的方向的尺寸。When implementing step S101, the embodiment of the present application uses a silicon chip wafer as the substrate material for generating the silicon pillar structure, wherein the thickness of the silicon-based substrate 101 is greater than the thickness of other hierarchical materials in the silicon pillar structure preparation method. It should be noted that in the silicon pillar structure preparation method provided in the embodiment of the present application, the "thickness" of each partial structure involved refers to the dimension of each partial structure in the direction perpendicular to the upper and lower flat surfaces of the silicon-based substrate 101, that is, the dimension of the silicon-based substrate 101 in the direction of other hierarchical structures formed in the silicon pillar structure preparation method.

S102、在所述硅基衬底的一侧形成掩膜层,所述掩膜层包括沿行方向和列方向阵列排布的多个第一区域,以及围绕所述第一区域的第二区域。S102, forming a mask layer on one side of the silicon-based substrate, wherein the mask layer includes a plurality of first regions arrayed along row and column directions, and a second region surrounding the first regions.

具体实施步骤S102时,图2示出了本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中形成掩膜层的俯视示意图,图3示出了本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中形成掩膜层的A-A’剖面示意图,如图3所示,在所述硅基衬底101的一侧首先形成掩膜层102,所述掩膜层102的厚度小于所述硅基衬底101的厚度。如图2所示,所述掩膜层102包括第一区域201以及围绕所述第一区域201的第二区域202,所述第一区域201用于基于曝光处理在所述掩膜层102上形成多个第一通孔,其中,所述第一区域201沿行方向和列方向呈现阵列排布;相邻所述第一区域201之间存在位于所述第二区域202内的间隙,所述第二区域202用于形成作为对硅基衬底101进行刻蚀处理的掩膜的第一结构。需要说明的是,本申请实施例中,图2中所述第一区域201与所述第二区域202在所述掩膜层102上的划分并非表征在形成掩膜层102时,所述第一区域201与所述第二区域202之间存在结构和材料的差异,而是表征在本申请实施例提供的后续制备方法中,所述第一区域201与所述第二区域202用于形成不同的结构或被施加不同的制备工艺。When the step S102 is specifically implemented, FIG2 shows a schematic top view of forming a mask layer in a method for preparing a silicon pillar structure based on overexposure proposed in an embodiment of the present application, and FIG3 shows a schematic cross-sectional view of forming a mask layer in a method for preparing a silicon pillar structure based on overexposure proposed in an embodiment of the present application. As shown in FIG3, a mask layer 102 is first formed on one side of the silicon-based substrate 101, and the thickness of the mask layer 102 is less than the thickness of the silicon-based substrate 101. As shown in FIG2, the mask layer 102 includes a first region 201 and a second region 202 surrounding the first region 201, wherein the first region 201 is used to form a plurality of first through holes on the mask layer 102 based on an exposure process, wherein the first region 201 is arranged in an array along the row direction and the column direction; there is a gap located in the second region 202 between adjacent first regions 201, and the second region 202 is used to form a first structure as a mask for etching the silicon-based substrate 101. It should be noted that, in the embodiment of the present application, the division of the first region 201 and the second region 202 on the mask layer 102 in Figure 2 does not represent that when the mask layer 102 is formed, there are differences in structure and material between the first region 201 and the second region 202, but rather represents that in the subsequent preparation method provided in the embodiment of the present application, the first region 201 and the second region 202 are used to form different structures or are subjected to different preparation processes.

在一些可选的实施方式中,所述掩膜层102为单层结构,所述掩膜层102为光刻胶层1021,通过在所述硅基衬底101的一侧表面旋涂光刻胶材料,形成所述光刻胶层1021,所述光刻胶层1021的厚度小于所述硅基衬底101的厚度。此外,由于更小厚度的光刻胶层需要额外形成金属层实现图形转移,使得制备工艺的复杂度和成本提升,且对金属层的刻蚀处理会使金属掩膜材料溅射到第一通孔的底部形成微掩膜,从而造成对所述硅基衬底的深硅刻蚀产生不良影响,本申请实施例由于采用激光直写的光刻工艺,所述掩膜层102的厚度较大,因此所述掩膜层102可以只设置为只有光刻胶层1021的单层结构,避免了制备金属层的工艺,有效降低了工艺复杂性和制备成本。In some optional embodiments, the mask layer 102 is a single-layer structure, and the mask layer 102 is a photoresist layer 1021. The photoresist layer 1021 is formed by spin-coating a photoresist material on one side of the silicon-based substrate 101, and the thickness of the photoresist layer 1021 is less than the thickness of the silicon-based substrate 101. In addition, since a photoresist layer with a smaller thickness needs to form an additional metal layer to realize pattern transfer, the complexity and cost of the preparation process are increased, and the etching process of the metal layer causes the metal mask material to be sputtered to the bottom of the first through hole to form a micro-mask, thereby causing an adverse effect on the deep silicon etching of the silicon-based substrate. Since the embodiment of the present application adopts a laser direct writing photolithography process, the thickness of the mask layer 102 is relatively large, so the mask layer 102 can be set to a single-layer structure with only the photoresist layer 1021, avoiding the process of preparing the metal layer, and effectively reducing the process complexity and preparation cost.

在一些可选的实施方式中,图4示出了本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中另一种形成掩膜层的A-A’剖面示意图,如图4所示,所述掩膜层102包括层叠设置的光刻胶层1021和金属层1022,所述金属层1022设置在所述硅基衬底101的一侧,所述光刻胶层1021设置在所述金属层1022背离所述硅基衬底101的一侧。具体而言,在所述硅基衬底101的一侧表面蒸发金属掩膜材料,形成所述金属层1022;随后,在所述金属层1022背离所述硅基衬底101的一侧表面旋涂所述光刻胶材料,形成所述光刻胶层1021。可选地,所述金属层1022的材料包括以下至少一种:钛(Ti)、铝(Al)、铬(Cr)等。In some optional implementations, FIG4 shows another A-A’ cross-sectional schematic diagram of forming a mask layer in a method for preparing a silicon pillar structure based on overexposure proposed in an embodiment of the present application. As shown in FIG4, the mask layer 102 includes a stacked photoresist layer 1021 and a metal layer 1022, the metal layer 1022 is arranged on one side of the silicon-based substrate 101, and the photoresist layer 1021 is arranged on the side of the metal layer 1022 away from the silicon-based substrate 101. Specifically, a metal mask material is evaporated on a surface of one side of the silicon-based substrate 101 to form the metal layer 1022; then, the photoresist material is spin-coated on a surface of one side of the metal layer 1022 away from the silicon-based substrate 101 to form the photoresist layer 1021. Optionally, the material of the metal layer 1022 includes at least one of the following: titanium (Ti), aluminum (Al), chromium (Cr), etc.

在一些可选的实施方式中,所述第一区域201在所述硅基衬底101上的正投影形状为矩形、圆形或其他不规则图形。可选地,所述第一区域201在所述硅基衬底101上的正投影形状为矩形。In some optional embodiments, the orthographic projection shape of the first region 201 on the silicon-based substrate 101 is a rectangle, a circle or other irregular shapes. Optionally, the orthographic projection shape of the first region 201 on the silicon-based substrate 101 is a rectangle.

在一些可选的实施方式中,所述第一区域201沿所述行方向或所述列方向的宽度小于或等于2μm;相邻第一区域201之间沿所述行方向或所述列方向的间隙宽度小于或等于2μm,且与所述第一区域201沿所述行方向或所述列方向的宽度相同。In some optional embodiments, the width of the first region 201 along the row direction or the column direction is less than or equal to 2 μm; the gap width between adjacent first regions 201 along the row direction or the column direction is less than or equal to 2 μm, and is the same as the width of the first region 201 along the row direction or the column direction.

S103、基于激光直写的光刻工艺对所述掩膜层进行过度曝光处理,形成与所述多个第一区域对应的多个第一通孔,所述多个第一通孔贯穿所述掩膜层。S103 , performing over-exposure processing on the mask layer based on a laser direct writing lithography process to form a plurality of first through holes corresponding to the plurality of first regions, wherein the plurality of first through holes penetrates the mask layer.

基于激光直写的光刻工艺对所述掩膜层进行过度曝光处理,形成与所述多个第一区域对应的多个第一通孔,所述多个第一通孔贯穿所述掩膜层,其中,相邻第一通孔沿所述行方向和所述列方向的侧壁部分连通,以在所述第二区域形成阵列排布的多个第一结构。The mask layer is overexposed based on a laser direct writing lithography process to form a plurality of first through holes corresponding to the plurality of first regions, and the plurality of first through holes penetrate the mask layer, wherein the side walls of adjacent first through holes are connected along the row direction and the column direction to form a plurality of first structures arranged in an array in the second region.

具体实施步骤S103时,图5示出了本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中形成第一通孔的俯视示意图,如图5所示,基于所述激光直写的光刻工艺,对所述多个第一区域201进行过度曝光处理,形成对应所述第一区域201的多个第一通孔103,所述第一通孔103在所述硅基衬底101上的正投影面积大于所述第一区域201在所述硅基衬底101上的正投影面积,每个所述第一区域201在所述硅基衬底101上的正投影位于对应的第一通孔103在所述硅基衬底101上的正投影内部。图7是本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中形成第一通孔的B-B’剖面示意图,如图7所示,所述多个第一通孔103贯穿所述掩膜层102。具体而言,采用激光光刻机基于所述激光直写的光刻工艺,去除所述第一区域201的掩膜材料,由于本申请实施例中采用激光直写的光刻工艺,可以以较低的光刻精度进行曝光处理,因此在对所述第一区域201进行曝光处理时,位于所述第一区域201周边的第二区域202的部分也受到过度曝光,使得相邻第一区域201之间沿所述行方向、所述列方向以及所述第一区域的对角线方向的部分掩膜材料也受到曝光,曝光去除的所述第一区域201以及所述第一区域201周边的部分第二区域形成所述多个第一通孔103。When the step S103 is specifically implemented, FIG5 shows a schematic top view of forming a first through hole in a method for preparing a silicon pillar structure based on overexposure according to an embodiment of the present application. As shown in FIG5, based on the laser direct writing lithography process, the multiple first regions 201 are overexposed to form multiple first through holes 103 corresponding to the first regions 201, and the orthographic projection area of the first through holes 103 on the silicon-based substrate 101 is larger than the orthographic projection area of the first region 201 on the silicon-based substrate 101, and the orthographic projection of each first region 201 on the silicon-based substrate 101 is located inside the orthographic projection of the corresponding first through hole 103 on the silicon-based substrate 101. FIG7 is a schematic B-B’ cross-sectional view of forming a first through hole in a method for preparing a silicon pillar structure based on overexposure according to an embodiment of the present application. As shown in FIG7, the multiple first through holes 103 penetrate the mask layer 102. Specifically, a laser lithography machine is used to remove the mask material of the first area 201 based on the laser direct writing lithography process. Since the laser direct writing lithography process is used in the embodiment of the present application, the exposure process can be performed with a lower lithography accuracy. Therefore, when the first area 201 is exposed, a portion of the second area 202 located around the first area 201 is also over-exposed, so that part of the mask material between adjacent first areas 201 along the row direction, the column direction and the diagonal direction of the first area is also exposed, and the first area 201 removed by exposure and the part of the second area around the first area 201 form the multiple first through holes 103.

其中,相邻第一通孔103沿所述行方向和所述列方向的侧壁部分连通,以在所述第二区域202内形成阵列排布的多个第一结构104。具体而言,由于所述第一通孔103相较于所述第一区域201的面积更大(相邻第一区域201之间的部分掩膜材料也受到曝光)。使得相邻的第一通孔103之间的间隙联通,原本对应于独立的第一区域201的第一通孔103沿所述行方向和所述列方向的侧壁部分连通,由于第一通孔103对角线长度相较于行方向和列方向的长度更长,因此沿第一方向的相邻两个第一通孔103之间的掩膜材料得到部分保留,使得两两相邻的四个第一通孔103阵列的中心对应的第二区域202形成面积更小的所述第一结构104,所述第一结构104沿所述行方向和所述列方向阵列排布,所述第一结构104沿所述行方向以及沿所述列方向的宽度分别小于所述第一区域沿所述行方向以及沿所述列方向的宽度,所述第一方向为平行于第一区域201对角线的方向。The sidewall portions of adjacent first through holes 103 along the row direction and the column direction are connected to form a plurality of first structures 104 arranged in an array in the second region 202. Specifically, since the first through holes 103 are larger in area than the first region 201 (part of the mask material between adjacent first regions 201 is also exposed), the first through holes 103 are preferably arranged in an array in the second region 202. The gaps between adjacent first through holes 103 are connected, and the sidewall portions of the first through holes 103 originally corresponding to the independent first regions 201 along the row direction and the column direction are connected. Since the diagonal length of the first through holes 103 is longer than the length in the row direction and the column direction, the mask material between two adjacent first through holes 103 along the first direction is partially retained, so that the second region 202 corresponding to the center of the array of four adjacent first through holes 103 is formed with a smaller area of the first structure 104. The first structures 104 are arranged in an array along the row direction and the column direction. The widths of the first structures 104 along the row direction and along the column direction are respectively smaller than the widths of the first region along the row direction and along the column direction. The first direction is a direction parallel to the diagonal of the first region 201.

在一些可选的实施方式中,图6示出了本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中另一种形成第一通孔的俯视示意图,如图6所示,沿所述行方向或所述列方向相邻的两个第一通孔103在所述硅基衬底101上的正投影的相邻边重合,以使相邻第一通孔103沿所述行方向和所述列方向的侧壁部分连通。In some optional embodiments, Figure 6 shows a top-view schematic diagram of another method for preparing a silicon pillar structure based on overexposure proposed in an embodiment of the present application for forming a first through hole. As shown in Figure 6, the adjacent edges of the positive projections of two adjacent first through holes 103 along the row direction or the column direction on the silicon-based substrate 101 coincide, so that the side wall portions of adjacent first through holes 103 along the row direction and the column direction are connected.

在一些可选的实施方式中,为了进一步降低所述第一结构104的面积,如图5所示,沿所述行方向或所述列方向相邻的两个第一通孔103在所述硅基衬底101上的正投影有交叠,以使相邻第一通孔103沿所述行方向和所述列方向的侧壁部分连通,形成多个所述面积更小的阵列排布的第一结构104。In some optional embodiments, in order to further reduce the area of the first structure 104, as shown in Figure 5, the orthographic projections of two adjacent first through holes 103 along the row direction or the column direction on the silicon-based substrate 101 overlap, so that the side wall portions of adjacent first through holes 103 along the row direction and the column direction are connected, forming a plurality of first structures 104 arranged in an array with a smaller area.

在一些可选的实施方式中,所述第一结构104在所述硅基衬底101上的正投影形状为四角星型或圆形。具体而言,在形成四角星型的多个第一结构104之后,在以所述第一结构104为掩膜对所述硅基衬底101进行刻蚀处理时,由于反应气体与侧壁硅的反应,刻蚀过程中的横扩现象可以有效减小所述第一结构104的突起,使其在所述硅基衬底101上的正投影形状为圆形。In some optional embodiments, the orthographic projection shape of the first structure 104 on the silicon-based substrate 101 is a four-pointed star or a circle. Specifically, after forming a plurality of first structures 104 in a four-pointed star shape, when the silicon-based substrate 101 is etched using the first structure 104 as a mask, due to the reaction between the reaction gas and the sidewall silicon, the lateral expansion phenomenon during the etching process can effectively reduce the protrusion of the first structure 104, so that the orthographic projection shape of the first structure 104 on the silicon-based substrate 101 is a circle.

在一些可选的实施方式中,所述第一通孔103沿所述行方向的宽度与所述第一区域201沿所述行方向的宽度之比大于或等于2:1,且小于或等于(√2+1):1;所述第一通孔103沿所述列方向的宽度与所述第一区域201沿所述列方向的宽度之比大于或等于2:1,且小于或等于(√2+1):1。In some optional embodiments, the ratio of the width of the first through hole 103 along the row direction to the width of the first region 201 along the row direction is greater than or equal to 2:1, and less than or equal to (√2+1):1; the ratio of the width of the first through hole 103 along the column direction to the width of the first region 201 along the column direction is greater than or equal to 2:1, and less than or equal to (√2+1):1.

在一些可选的实施方式中,基于激光直写的光刻工艺可以为无掩膜光刻技术(MLA,Maskless Aligner)、直写光刻技术(DWL,Direct Write Lithography)等。所述激光光刻机为可调整曝光参数使曝光区域扩大的激光直写光刻机。In some optional implementations, the lithography process based on laser direct writing can be maskless aligner (MLA), direct write lithography (DWL), etc. The laser lithography machine is a laser direct writing lithography machine that can adjust exposure parameters to expand the exposure area.

S104、基于所述多个第一结构对所述硅基衬底靠近所述掩膜层的一侧进行刻蚀,形成与所述多个第一结构对应的多个硅柱。S104 . Etching a side of the silicon-based substrate close to the mask layer based on the multiple first structures to form a plurality of silicon pillars corresponding to the multiple first structures.

具体实施步骤S104时,图8示出了本申请一实施例提出的一种基于过度曝光的硅柱结构制备方法中形成硅柱的A-A’剖面示意图,如图8所示,对所述硅基衬底101靠近所述掩膜层102的一侧进行深硅刻蚀,由于所述硅基衬底101靠近所述掩膜层102的一侧有部分区域受到所述多个第一结构104的遮挡,因此这些第一结构104对应区域下的硅基衬底材料不会受到刻蚀,在第一通孔103内暴露的硅基衬底材料受到深硅刻蚀,从而使得所述第一通孔103沿第二方向的深度在刻蚀处理下不断增加,形成多个盲孔105,所述盲孔105沿所述第二方向的深度大于所述第一通孔的深度。相邻盲孔105之间为对应所述第一结构104的区域,在所述相邻盲孔105之间形成对应所述多个第一结构104的所述多个硅柱106,所述第二方向为所述硅基衬底101指向所述掩膜层102的方向。在得到所述多个硅柱106之后,将残余的第一结构104去除,得到具有高特征比的硅柱结构,需要说明的是,本申请实施例中所提到的特征比为表征亚微米级硅柱的尺寸特征比例,本文提到的特征比特指基于本申请实施例提供的基于过度曝光的硅柱结构制备方法制备得到的硅柱的高度和直径(或宽度)的比值。When step S104 is specifically implemented, FIG8 shows an A-A’ cross-sectional schematic diagram of a silicon pillar formed in a method for preparing a silicon pillar structure based on overexposure proposed in an embodiment of the present application. As shown in FIG8 , deep silicon etching is performed on the side of the silicon-based substrate 101 close to the mask layer 102. Since a portion of the side of the silicon-based substrate 101 close to the mask layer 102 is blocked by the multiple first structures 104, the silicon-based substrate material under the corresponding areas of these first structures 104 will not be etched, and the silicon-based substrate material exposed in the first through hole 103 is subjected to deep silicon etching, so that the depth of the first through hole 103 along the second direction continues to increase under the etching process, forming a plurality of blind holes 105, and the depth of the blind hole 105 along the second direction is greater than the depth of the first through hole. The area between adjacent blind holes 105 corresponds to the first structure 104, and the plurality of silicon pillars 106 corresponding to the plurality of first structures 104 are formed between the adjacent blind holes 105, and the second direction is the direction from the silicon-based substrate 101 to the mask layer 102. After obtaining the plurality of silicon pillars 106, the remaining first structure 104 is removed to obtain a silicon pillar structure with a high characteristic ratio. It should be noted that the characteristic ratio mentioned in the embodiment of the present application is a characteristic ratio of the size of the submicron silicon pillar, and the characteristic bit mentioned herein refers to the ratio of the height and diameter (or width) of the silicon pillar prepared by the method for preparing the silicon pillar structure based on overexposure provided in the embodiment of the present application.

在一些可选的实施方式中,所述硅柱106沿所述第二方向的高度大于或等于15μm,所述硅柱106的直径小于或等于1μm,所述第二方向为所述硅基衬底101指向所述掩膜层102的方向。In some optional embodiments, the height of the silicon pillar 106 along the second direction is greater than or equal to 15 μm, the diameter of the silicon pillar 106 is less than or equal to 1 μm, and the second direction is the direction from the silicon-based substrate 101 to the mask layer 102 .

在一些可选的实施方式中,所述深硅刻蚀处理可以采用任意深硅刻蚀(DeepReactive Ion Etching)方案,例如,所述深硅刻蚀工艺可以为博世工艺、伪博世工艺等。In some optional implementations, the deep silicon etching process may adopt any deep silicon etching (DeepReactive Ion Etching) scheme. For example, the deep silicon etching process may be a Bosch process, a pseudo-Bosch process, or the like.

本申请实施例提供的基于过度曝光的硅柱结构制备方法可以以更低的光刻精度制备具有高特征比的硅柱结构,在制备相同直径的高特征比硅柱结构时,本申请提供的基于过度曝光的硅柱结构制备方法对于光刻精度要求更低。例如,制备预期直径为200nm的硅柱,一般采用光刻精度高于100nm的电子束光刻制备工艺;本申请提供的基于过度曝光的硅柱结构制备方法对于光刻精度可以降低至1μm,实现了10%的精度需求下降,有效降低了制备工艺的难度。The method for preparing a silicon pillar structure based on overexposure provided in the embodiment of the present application can prepare a silicon pillar structure with a high feature ratio with lower lithography precision. When preparing a high feature ratio silicon pillar structure of the same diameter, the method for preparing a silicon pillar structure based on overexposure provided in the present application has lower requirements for lithography precision. For example, to prepare a silicon pillar with an expected diameter of 200nm, an electron beam lithography preparation process with a lithography precision higher than 100nm is generally used; the method for preparing a silicon pillar structure based on overexposure provided in the present application can reduce the lithography precision to 1μm, achieving a 10% reduction in precision requirements, effectively reducing the difficulty of the preparation process.

本申请提供一种基于过度曝光的硅柱结构及其制备方法,所述制备方法包括:提供硅基衬底;在所述硅基衬底的一侧形成掩膜层,所述掩膜层包括沿行方向和列方向阵列排布的多个第一区域,以及围绕所述第一区域的第二区域;基于激光直写的光刻工艺对所述掩膜层进行过度曝光处理,形成与所述多个第一区域对应的多个第一通孔,所述多个第一通孔贯穿所述掩膜层,其中,相邻第一通孔沿所述行方向和所述列方向的侧壁部分连通,以在所述第二区域形成阵列排布的多个第一结构;基于所述多个第一结构对所述硅基衬底靠近所述掩膜层的一侧进行刻蚀,形成与所述多个第一结构对应的多个硅柱。本申请采用激光直写的光刻工艺对掩膜层进行曝光处理,降低了对光刻精度的要求,且通过过度曝光的方式形成多个更小尺寸的第一结构,从而基于第一结构刻蚀得到高特征比的硅柱,有效降低了制备高特征比的硅柱结构的工艺复杂性和工艺成本。The present application provides a silicon pillar structure based on overexposure and a preparation method thereof, the preparation method comprising: providing a silicon-based substrate; forming a mask layer on one side of the silicon-based substrate, the mask layer comprising a plurality of first regions arranged in an array along the row direction and the column direction, and a second region surrounding the first region; overexposure the mask layer based on a laser direct writing lithography process to form a plurality of first through holes corresponding to the plurality of first regions, the plurality of first through holes passing through the mask layer, wherein the sidewall portions of adjacent first through holes along the row direction and the column direction are connected to form a plurality of first structures arranged in an array in the second region; etching the side of the silicon-based substrate close to the mask layer based on the plurality of first structures to form a plurality of silicon pillars corresponding to the plurality of first structures. The present application uses a laser direct writing lithography process to expose the mask layer, which reduces the requirements for lithography accuracy, and forms a plurality of first structures of smaller size by overexposure, thereby etching a silicon pillar with a high feature ratio based on the first structure, effectively reducing the process complexity and process cost of preparing a silicon pillar structure with a high feature ratio.

基于同一发明构思,本申请实施例公开一种基于过度曝光的硅柱结构,所述硅柱结构为采用本申请实施例中任意一项所述的基于过度曝光的硅柱结构制备方法进行制备得到的。Based on the same inventive concept, an embodiment of the present application discloses a silicon pillar structure based on overexposure, and the silicon pillar structure is prepared by using any one of the methods for preparing a silicon pillar structure based on overexposure described in the embodiments of the present application.

本说明书中的各个实施例均采用递进的方式描述,每个实施例重点说明的都是与其他实施例的不同之处,各个实施例之间相同相似的部分互相参见即可。The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

在本说明书的描述中,需要理解的是,术语“中心”、“厚度”、“上”、“下”、“前”、“后”、“水平”、“顶”、“底”、“内”、“外”、“轴向”、“径向”、“周向”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。In the description of this specification, it should be understood that the terms "center", "thickness", "up", "down", "front", "back", "horizontal", "top", "bottom", "inside", "outside", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

在本申请中,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”、“固定”等术语应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或成一体;可以是机械连接,也可以是电连接,还可以是通信;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本申请中的具体含义。In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or a communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

在本申请中,除非另有明确的规定和限定,第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触,也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且,第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方,或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正上方和斜上方,或仅仅表示第一特征水平高度小于第二特征。In the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is lower in level than the second feature.

上文的申请提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请,上文中对特定例子的部件和设置进行描述。当然,它们仅仅为示例,并且目的不在于限制本申请。此外,本申请可以在不同例子中重复参考数字和/或参考字母,这种重复是为了简化和清楚的目的,其本身不指示所讨论各种实施方式和/或设置之间的关系。The above application provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the present application, the parts and settings of specific examples are described above. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and/or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and/or settings discussed.

本文中所称的“一个实施例”、“实施例”或者“一个或者多个实施例”意味着,结合实施例描述的特定特征、结构或者特性包括在本申请的至少一个实施例中。此外,请注意,这里“在一个实施例中”的词语例子不一定全指同一个实施例。The term "one embodiment", "embodiment" or "one or more embodiments" herein means that a particular feature, structure or characteristic described in conjunction with the embodiment is included in at least one embodiment of the present application. In addition, please note that the examples of the term "in one embodiment" here do not necessarily all refer to the same embodiment.

在此处所提供的说明书中,说明了大量具体细节。然而,能够理解,本申请的实施例可以在没有这些具体细节的情况下被实践。在一些实例中,并未详细示出公知的方法、结构和技术,以便不模糊对本说明书的理解。In the description provided herein, a large number of specific details are described. However, it is understood that the embodiments of the present application can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

最后,还需要说明的是,在本文中,诸如第一和第二等之类的关系术语仅仅用来将一个实体或操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、物品或者终端设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者终端设备所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括所述要素的过程、方法、物品或者终端设备中还存在另外的相同要素。Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

以上对本申请所提供的一种基于过度曝光的硅柱结构及其制备方法,进行了详细介绍,本文中应用了具体个例对本申请的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本申请的方法及其核心思想;同时,对于本领域的一般技术人员,依据本申请的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本申请的限制。The above is a detailed introduction to a silicon pillar structure based on overexposure and a preparation method thereof provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for a person skilled in the art, according to the idea of the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims (9)

1.一种基于过度曝光的硅柱结构制备方法,其特征在于,所述制备方法包括:1. A method for preparing a silicon pillar structure based on overexposure, characterized in that the preparation method comprises: 提供硅基衬底;Providing a silicon-based substrate; 在所述硅基衬底的一侧形成掩膜层,所述掩膜层包括沿行方向和列方向阵列排布的多个第一区域,以及围绕所述第一区域的第二区域,所述第一区域在所述硅基衬底上的正投影形状为矩形,所述第一区域沿所述行方向或所述列方向的宽度小于或等于2μm;A mask layer is formed on one side of the silicon-based substrate, wherein the mask layer includes a plurality of first regions arranged in an array along a row direction and a column direction, and a second region surrounding the first region, wherein the orthographic projection shape of the first region on the silicon-based substrate is a rectangle, and a width of the first region along the row direction or the column direction is less than or equal to 2 μm; 基于激光直写的光刻工艺对所述掩膜层进行过度曝光处理,形成与所述多个第一区域对应的多个第一通孔,所述多个第一通孔贯穿所述掩膜层,其中,相邻第一通孔沿所述行方向和所述列方向的侧壁部分连通,以在所述第二区域形成阵列排布的多个第一结构,所述第一结构在所述硅基衬底上的正投影形状为四角星形或圆形;The mask layer is overexposed based on a laser direct writing lithography process to form a plurality of first through holes corresponding to the plurality of first regions, wherein the plurality of first through holes penetrate the mask layer, wherein the sidewall portions of adjacent first through holes along the row direction and the column direction are connected to form a plurality of first structures arranged in an array in the second region, wherein the orthographic projection shape of the first structure on the silicon-based substrate is a four-pointed star or a circle; 基于所述多个第一结构对所述硅基衬底靠近所述掩膜层的一侧进行刻蚀,形成与所述多个第一结构对应的多个硅柱,所述硅柱的直径小于或等于1μm。Based on the multiple first structures, a side of the silicon-based substrate close to the mask layer is etched to form a plurality of silicon pillars corresponding to the multiple first structures, wherein the diameter of the silicon pillars is less than or equal to 1 μm. 2.根据权利要求1所述的基于过度曝光的硅柱结构制备方法,其特征在于,所述基于激光直写工艺对所述掩膜层进行过度曝光处理,形成与所述多个第一区域对应的多个第一通孔,包括:2. The method for preparing a silicon pillar structure based on overexposure according to claim 1, characterized in that the overexposure treatment of the mask layer based on a laser direct writing process to form a plurality of first through holes corresponding to the plurality of first regions comprises: 基于所述激光直写的光刻工艺,对所述多个第一区域进行过度曝光处理,以去除所述第一区域的掩膜材料,以及相邻第一区域之间的部分掩膜材料,形成所述多个第一通孔,其中,所述第一结构包括沿第一方向的相邻两个第一通孔之间的掩膜材料,所述第一方向为平行于第一区域对角线的方向。Based on the laser direct writing lithography process, the multiple first regions are overexposed to remove the mask material of the first regions and part of the mask material between adjacent first regions to form the multiple first through holes, wherein the first structure includes the mask material between two adjacent first through holes along a first direction, and the first direction is a direction parallel to the diagonal of the first region. 3.根据权利要求1所述的基于过度曝光的硅柱结构制备方法,其特征在于,所述基于所述多个第一结构对所述硅基衬底靠近所述掩膜层的一侧进行刻蚀,形成与所述多个第一结构对应的多个硅柱,包括:3. The method for preparing a silicon pillar structure based on overexposure according to claim 1, characterized in that etching a side of the silicon-based substrate close to the mask layer based on the multiple first structures to form a plurality of silicon pillars corresponding to the multiple first structures comprises: 对所述硅基衬底靠近所述掩膜层的一侧进行深硅刻蚀,以使所述第一通孔沿第二方向的深度增加,形成多个盲孔,相邻盲孔之间形成所述多个硅柱,所述第二方向为所述硅基衬底指向所述掩膜层的方向。Deep silicon etching is performed on the side of the silicon-based substrate close to the mask layer to increase the depth of the first through hole along the second direction to form a plurality of blind holes, and the plurality of silicon pillars are formed between adjacent blind holes. The second direction is the direction from the silicon-based substrate to the mask layer. 4.根据权利要求1所述的基于过度曝光的硅柱结构制备方法,其特征在于,所述掩膜层为光刻胶层。4 . The method for preparing a silicon pillar structure based on overexposure according to claim 1 , wherein the mask layer is a photoresist layer. 5.根据权利要求1所述的基于过度曝光的硅柱结构制备方法,其特征在于,所述掩膜层包括层叠设置的光刻胶层和金属层,所述金属层设置在所述硅基衬底的一侧,所述光刻胶层设置在所述金属层背离所述硅基衬底的一侧。5. The method for preparing a silicon pillar structure based on overexposure according to claim 1 is characterized in that the mask layer includes a stacked photoresist layer and a metal layer, the metal layer is arranged on one side of the silicon-based substrate, and the photoresist layer is arranged on a side of the metal layer away from the silicon-based substrate. 6.根据权利要求1所述的基于过度曝光的硅柱结构制备方法,其特征在于,所述硅柱沿第二方向的高度大于或等于15μm,所述第二方向为所述硅基衬底指向所述掩膜层的方向。6 . The method for preparing a silicon pillar structure based on overexposure according to claim 1 , wherein a height of the silicon pillar along a second direction is greater than or equal to 15 μm, and the second direction is a direction from the silicon-based substrate to the mask layer. 7.根据权利要求1所述的基于过度曝光的硅柱结构制备方法,其特征在于,所述第一通孔沿所述行方向的宽度与所述第一区域沿所述行方向的宽度之比大于或等于2:1,且小于或等于(√2+1):1。7. The method for preparing a silicon pillar structure based on overexposure according to claim 1 is characterized in that the ratio of the width of the first through hole along the row direction to the width of the first region along the row direction is greater than or equal to 2:1 and less than or equal to (√2+1):1. 8.根据权利要求1所述的基于过度曝光的硅柱结构制备方法,其特征在于,相邻第一区域之间沿所述行方向或所述列方向的间隙宽度,与所述第一区域沿所述行方向或所述列方向的宽度相同。8. The method for preparing a silicon pillar structure based on overexposure according to claim 1 is characterized in that a gap width between adjacent first regions along the row direction or the column direction is the same as a width of the first region along the row direction or the column direction. 9.一种基于过度曝光的硅柱结构,其特征在于,所述硅柱结构为采用权利要求1-8任意一项所述的基于过度曝光的硅柱结构制备方法进行制备得到的。9. A silicon column structure based on overexposure, characterized in that the silicon column structure is prepared by using the method for preparing a silicon column structure based on overexposure according to any one of claims 1 to 8.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108622848A (en) * 2017-03-16 2018-10-09 厦门大学 A kind of three-dimensional composite nanostructure of large area and preparation method thereof
CN113793714A (en) * 2021-07-28 2021-12-14 湖南大学 Preparation method for large-area soft X-ray zone plate
CN114496768A (en) * 2022-04-01 2022-05-13 浙江大学杭州国际科创中心 Preparation method of nano-pillar array

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8786852B2 (en) * 2009-12-02 2014-07-22 Lawrence Livermore National Security, Llc Nanoscale array structures suitable for surface enhanced raman scattering and methods related thereto

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108622848A (en) * 2017-03-16 2018-10-09 厦门大学 A kind of three-dimensional composite nanostructure of large area and preparation method thereof
CN113793714A (en) * 2021-07-28 2021-12-14 湖南大学 Preparation method for large-area soft X-ray zone plate
CN114496768A (en) * 2022-04-01 2022-05-13 浙江大学杭州国际科创中心 Preparation method of nano-pillar array

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