CN118116967A - Radio frequency device and preparation method thereof, and electronic equipment - Google Patents

Abstract

The embodiment of the application provides a radio frequency device, a preparation method thereof and electronic equipment, and relates to the technical field of semiconductors. The radio frequency device comprises a substrate, a circuit structure, a first dielectric layer, an auxiliary electrode and a second dielectric layer. The circuit structure is located on one side of the substrate, and the circuit structure comprises a first surface far away from the substrate, wherein the first surface comprises a step surface, and the step surface comprises a protrusion far away from one side of the substrate. The first dielectric layer is positioned on one side of the first surface away from the substrate. The first dielectric layer includes a second surface remote from the substrate. The difference in distance from any two points in the second surface to the upper surface of the substrate in the direction perpendicular to the substrate is less than or equal to 20nm. The auxiliary electrode comprises a first sub-electrode and a second sub-electrode which are connected. The second dielectric layer is positioned on one side of the first dielectric layer away from the substrate and covers the auxiliary electrode. The radio frequency device is used for improving the moisture-proof and waterproof characteristics of the device and improving the reliability of the device. The radio frequency device is applied to the electronic equipment to improve the performance of the electronic equipment.

Description

Radio frequency device and preparation method thereof, and electronic equipment

Technical Field

The present application relates to the field of semiconductor technology, and in particular to a radio frequency device and a preparation method thereof, and an electronic device.

Background technique

With the development of semiconductor technology, the requirements for device performance are constantly being improved, which has led to the emergence of new semiconductor materials and devices. Materials such as gallium arsenide (GaAs) and gallium nitride (GaN) have the characteristics of high electron drift rate, high temperature resistance, and stable chemical properties, and are widely used in high-frequency, high-temperature, and microwave fields.

At present, most GaN and GaAs devices use heterojunction as their basic structure. High electron mobility transistor (HEMT) is a semiconductor device that uses high-concentration two-dimensional electron gas (2DEG) generated at the heterojunction as a current carrier. 2DEG separates impurities and electrons in the spatial dimension, avoiding or reducing impurity scattering, so electrons have a higher mobility. The basis of GaN RF devices is HEMT.

With the continuous development of third-generation semiconductor technology, more and more application scenarios have chosen GaN RF devices, and GaN HEMT RF devices have also been continuously infiltrated and used on a large scale in different scenarios. Based on this, the field has put forward strict requirements on the moisture resistance and robustness of GaN HEMT RF devices.

Summary of the invention

The embodiments of the present application provide a radio frequency device and a method for manufacturing the same, and an electronic device, which are used to improve the moisture-proof and waterproof properties of the device and improve the reliability of the device.

To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

In a first aspect, a radio frequency device is provided, which includes a substrate, a circuit structure, a first dielectric layer, an auxiliary electrode, and a second dielectric layer. The circuit structure is located on one side of the substrate, and the circuit structure includes a first surface away from the substrate, the first surface includes a step surface, and the step surface includes a protrusion away from one side of the substrate. The first dielectric layer is located on the side of the first surface away from the substrate. The first dielectric layer includes a second surface away from the substrate. In a direction perpendicular to the substrate, the difference in distance from any two points in the second surface to the upper surface of the substrate is less than or equal to 20nm. The auxiliary electrode includes a first sub-electrode and a second sub-electrode connected to each other, the first sub-electrode is located on the side of the first dielectric layer away from the substrate, and the second sub-electrode penetrates the first dielectric layer and is connected to the circuit structure. The second dielectric layer is located on the side of the first dielectric layer away from the substrate and covers the auxiliary electrode.

The radio frequency device provided in the embodiment of the present application includes a first dielectric layer and a second dielectric layer located on a side of the first dielectric layer away from a substrate. In a direction perpendicular to the substrate, the difference in distance between any two points in the second surface of the first dielectric layer and the upper surface of the substrate is less than or equal to 20 nm, so that the second surface is relatively flat as a whole. In this way, even if a merged gap is generated in the portion of the first dielectric layer located on the step surface during the formation of the first dielectric layer, the portion of the second dielectric layer located on the side of the step surface away from the substrate will not have a merged gap, and the merged gap in the first dielectric layer cannot pass through the second dielectric layer to communicate with the outside world, so that water vapor in the external environment is not easy to enter the merged gap of the first dielectric layer and pass through the merged gap into the circuit structure, thereby avoiding the problem of cracking of the first dielectric layer due to water vapor intrusion, and further avoiding water vapor contacting the electrodes in the circuit structure, causing the electrodes to be corroded, causing the problem of short circuit between electrodes in the same layer, improving the moisture and water resistance of the radio frequency device, and at the same time improving the reliability of the radio frequency device.

In some embodiments, the second surface is parallel to the upper surface of the substrate. In this case, the portion of the second surface located on the step surface is flatter. In this way, the second dielectric layer located on the side of the first dielectric layer away from the substrate will not generate a merged gap at the position corresponding to the step surface, making it more difficult for water vapor in the external environment to pass through the first dielectric layer and the second dielectric layer into the circuit structure, thereby further improving the moisture and water resistance of the RF device and improving the reliability of the RF device.

In some embodiments, the portion of the second surface covered by the first sub-electrode is a first portion, the portion of the second surface located around the first sub-electrode is a second portion, and the first portion is farther away from the upper surface of the substrate than the second portion.

In some embodiments, the RF device further includes a third dielectric layer, and the third dielectric layer is located between the first dielectric layer and the first sub-electrode; the second sub-electrode also penetrates the third dielectric layer. In the embodiment of the present application, since the portion of the second surface located on the step surface is relatively flat, no merged gap will appear in the portion of the third dielectric layer located on the side of the step surface away from the substrate. In this way, even if a merged gap appears in the portion of the first dielectric layer located on the step surface, a merged gap also appears in the second dielectric layer. The third dielectric layer can separate the merged gap in the first dielectric layer from the merged gap in the second dielectric layer, thereby further avoiding the merged gap in the first dielectric layer from being connected to the external environment, further blocking the intrusion of water vapor, improving the moisture-proof and waterproof properties of the RF device, and improving the reliability of the RF device.

In some embodiments, the third dielectric layer includes a third surface away from the substrate, a portion of the third surface covered by the first sub-electrode is a third portion, a portion of the third surface located around the first sub-electrode is a fourth portion, and the third portion is farther away from the upper surface of the substrate than the fourth portion.

In some embodiments, the third dielectric layer includes a third surface away from the substrate, and the third surface is parallel to the upper surface of the substrate.

In some embodiments, the circuit structure includes a heterojunction, a fourth dielectric layer, a source, a drain, a fifth dielectric layer, and a gate. The heterojunction is located on one side of the substrate; the heterojunction includes a channel layer and a barrier layer stacked in sequence in a direction away from the substrate. The fourth dielectric layer is located on the side of the heterojunction away from the substrate. The source and the drain are located on the side of the fourth dielectric layer away from the substrate, and the source and the drain penetrate the fourth dielectric layer and contact the barrier layer. The fifth dielectric layer is located on the side of the fourth dielectric layer away from the substrate, and the fifth dielectric layer covers the source and the drain. The gate is located on the side of the fifth dielectric layer away from the substrate and between the source and the drain; the gate penetrates the fourth dielectric layer and the fifth dielectric layer and contacts the barrier layer.

In some embodiments, the circuit structure further includes a sixth dielectric layer and a field plate electrode. The sixth dielectric layer is located on a side of the fifth dielectric layer away from the substrate, and the sixth dielectric layer covers the gate. The field plate electrode is located on a side of the sixth dielectric layer away from the substrate, and the orthographic projection of the field plate electrode on the substrate partially overlaps with the orthographic projection of the gate on the substrate.

In this way, the electric field distribution in the RF device can be adjusted to make the electric field distribution at the location of the gate edge more uniform, avoid electric field spikes, and improve the breakdown resistance of the RF device.

In some embodiments, the RF device includes an active region and an inactive region surrounding the active region. The RF device also includes a first pad, a second pad, and a third pad; the first pad and the second pad are located on the side of the first dielectric layer away from the substrate; the first pad and the second pad are located in the inactive region, and the first pad and the second pad are electrically connected to the drain and the gate through the auxiliary electrode, respectively. The third pad is located on the side of the substrate away from the circuit structure; the third pad is electrically connected to the source.

In some embodiments, a portion of the second dielectric layer located on a side of the step surface away from the substrate does not have a merged gap.

In a second aspect, a method for preparing a radio frequency device is provided, comprising: forming a circuit structure on one side of a substrate, the circuit structure comprising a first surface away from the substrate, the first surface comprising a step surface, and the step surface comprising a protrusion away from one side of the substrate. Forming a first dielectric layer on the side of the circuit structure away from the substrate; the first dielectric layer comprises a second surface away from the substrate, and the height of the second surface varies with the height of the first surface. Flattening the second surface of the first dielectric layer. Forming an auxiliary electrode, the auxiliary electrode comprising a first sub-electrode and a second sub-electrode connected to each other, the first sub-electrode being located on the side of the first dielectric layer away from the substrate, and the second sub-electrode penetrating the first dielectric layer and connected to the circuit structure. Forming a second dielectric layer on the side of the first dielectric layer away from the substrate, the second dielectric layer covering the auxiliary electrode. After flattening the second surface of the first dielectric layer, in a direction perpendicular to the substrate, the difference in distance between any two points on the second surface and the upper surface of the substrate is less than or equal to 20 nm.

In the method for preparing the radio frequency device provided in the embodiment of the present application, a first dielectric layer is formed on an uneven first surface, and a second surface of the first dielectric layer is uneven, and a flattening treatment is performed on the second surface of the first dielectric layer, so that the second surface of the first dielectric layer is relatively flat. In this way, even if the first dielectric layer generates a merged gap at the step surface corresponding to the first surface during the formation process, after the second dielectric layer is formed on the flat second surface, there will be no merged gap in the part of the second dielectric layer located on the side of the step surface away from the substrate, and the merged gap in the first dielectric layer cannot pass through the second dielectric layer to communicate with the outside world, so that water vapor in the external environment is not easy to enter the merged gap of the first dielectric layer and pass through the merged gap into the circuit structure, thereby avoiding the problem of cracking of the first dielectric layer due to water vapor intrusion, and further avoiding the problem of water vapor contacting the electrodes in the circuit structure, causing the electrodes to be corroded, causing the problem of short circuits between electrodes in the same layer, improving the moisture-proof and waterproof properties of the radio frequency device, and at the same time improving the reliability of the radio frequency device.

In some embodiments, the planarizing the second surface of the first dielectric layer includes: removing a portion of the first dielectric layer by a chemical mechanical polishing process or a dry etching process to make the second surface of the first dielectric layer planar.

In some embodiments, the planarizing the second surface of the first dielectric layer includes: forming a sacrificial layer on a side of the first dielectric layer away from the substrate; the sacrificial layer includes a fourth surface away from the substrate, and the height of the fourth surface varies with the change of the second surface. A dry etching process is used to remove at least a portion of the sacrificial layer to make the second surface of the first dielectric layer flat.

In some embodiments, the material of the sacrificial layer includes an organic material.

In some embodiments, the forming of the auxiliary electrode comprises: etching the first dielectric layer to form an opening, wherein the opening exposes the source, drain or gate in the circuit structure. Forming a conductive layer on a side of the first dielectric layer away from the substrate. Etching the conductive layer to form an auxiliary electrode; the auxiliary electrode comprises a first sub-electrode located on the second surface and a second sub-electrode located in the opening; the second sub-electrode is electrically connected to the source, the drain or the gate.

In some embodiments, the forming of the auxiliary electrode comprises: etching the first dielectric layer to form an opening, wherein the opening exposes the source, drain or gate in the circuit structure. Forming a conductive layer on a side of the first dielectric layer away from the substrate. Removing a portion of the conductive layer by a stripping process to form an auxiliary electrode; the auxiliary electrode comprises a first sub-electrode located on the second surface and a second sub-electrode located in the opening; and the second sub-electrode is electrically connected to the source, the drain or the gate.

In some embodiments, after the second surface of the first dielectric layer is planarized and before the auxiliary electrode is formed, the preparation method further includes: forming a third dielectric layer on a side of the first dielectric layer away from the substrate, wherein the second portion also penetrates the third dielectric layer.

In some embodiments, before the second surface of the first dielectric layer is planarized, the thickness of the first dielectric layer is 400 nm to 5 μm.

According to a third aspect, an electronic device is provided, including a circuit board and a radio frequency device as described in any of the above embodiments, wherein the radio frequency device is electrically connected to the circuit board.

Among them, the technical effects brought about by any design method in the third aspect can refer to the technical effects brought about by different design methods in the first aspect, and will not be repeated here.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solutions in the present application, the following briefly introduces the drawings required to be used in some embodiments of the present application. Obviously, the drawings described below are only drawings of some embodiments of the present application. For ordinary technicians in this field, other drawings can also be obtained based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams, and are not limitations on the actual size of the products involved in the embodiments of the present application, the actual process of the method, the actual timing of the signal, etc.

FIG1 is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

FIG2 is a schematic diagram of the structure of another electronic device provided in an embodiment of the present application;

FIG3 is a schematic diagram of the structure of another electronic device provided in an embodiment of the present application;

FIG4 is a schematic diagram of the structure of a radio frequency device provided in an embodiment of the present application;

FIG5 is a schematic diagram of the structure of another radio frequency device provided in an embodiment of the present application;

FIG6 is a schematic diagram of the structure of another radio frequency device provided in an embodiment of the present application;

FIG7 is a schematic diagram of the structure of another radio frequency device provided in an embodiment of the present application;

FIG8 is a schematic diagram of the structure of another radio frequency device provided in an embodiment of the present application;

FIG9 is a schematic structural diagram of another radio frequency device provided in an embodiment of the present application;

FIG10 is a schematic diagram of the structure of another radio frequency device provided in an embodiment of the present application;

FIG11 is a schematic diagram of the structure of another radio frequency device provided in an embodiment of the present application;

FIG12 is a schematic diagram of the structure of another radio frequency device provided in an embodiment of the present application;

FIG13 is a flow chart of a method for preparing a radio frequency device provided in an embodiment of the present application;

14 to 17B are state diagrams of the radio frequency device corresponding to the preparation method provided in FIG. 13 ;

FIG18A is a flow chart of another method for preparing a radio frequency device provided in an embodiment of the present application;

FIG18B is a flow chart of another method for preparing a radio frequency device provided in an embodiment of the present application;

FIG19 is a state diagram of a radio frequency device corresponding to the preparation method provided in FIG18B ;

FIG20 is a flow chart of another method for preparing a radio frequency device provided in an embodiment of the present application;

21 and 22 are state diagrams of the radio frequency device corresponding to the preparation method provided in FIG. 20 ;

FIG23 is a flow chart of another method for preparing a radio frequency device provided in an embodiment of the present application;

FIG24 is a flow chart of another method for preparing a radio frequency device provided in an embodiment of the present application;

25A and 25B are state diagrams of the RF device corresponding to the manufacturing method provided in FIG. 24 .

Detailed ways

The technical solution in the embodiment of the present application will be described below in conjunction with the accompanying drawings in the embodiment of the present application. In the description of the present application, unless otherwise specified, "/" indicates that the objects associated before and after are in an "or" relationship, for example, A/B can represent A or B.

The "and/or" in this application is only a way to describe the association relationship of associated objects, indicating that there may be three relationships. For example, A and/or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural.

In the description of this application, unless otherwise specified, "plurality" means two or more than two. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c can mean: a, b, c, a and b, a and c, b and c, or a, b and c, where a, b, and c can be single or multiple.

In order to clearly describe the technical solutions of the embodiments of the present application, in the embodiments of the present application, words such as "first" and "second" are used to distinguish the same or similar items with substantially the same functions and effects. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit the difference.

In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a concrete way for easy understanding.

The embodiment of the present application provides an electronic device, which may include a communication device (e.g., a base station, a mobile phone), a wireless charging device, a medical device, a radar, a navigation device, a radio frequency (RF) plasma lighting device, an RF induction and microwave heating device, etc. The embodiment of the present application does not impose any special restrictions on the specific form of the above electronic devices.

Taking a base station as an example, FIG1 shows a simple structural diagram of a base station 100, wherein the base station 100 includes a control unit 101. The control unit 101 in the base station 100 includes a wireless transceiver, an antenna, and related signal processing circuits, etc., wherein the control unit 101 mainly includes four components: a cell controller, a voice channel controller, a signaling channel controller, and a multi-channel terminal interface for expansion. The control unit 101 of a base station 100 usually controls several base transceiver stations. Through remote commands from the transceiver station and the mobile station, the control unit 101 of the base station 100 is responsible for all mobile communication interface management, mainly the allocation, release, and management of wireless channels.

Continuing with Figure 1, the base station 100 also includes a transmission unit 102, which is connected to the core network. The control signaling, voice call or data service information on the core network side is sent to the control unit 101 of the base station 100 through the transmission unit 102, and these services are processed by the control unit 101.

In conjunction with Figure 1, the base station 100 also includes a baseband unit 103, an RF unit 104 and a power amplifier (PA) 105. The baseband unit 103 mainly performs baseband modulation and demodulation, wireless resource allocation, call processing, power control and soft switching. The RF unit 104 mainly performs the conversion between the air RF channel and the baseband digital channel, and then the PA 105 amplifies the signal and then sends it to the antenna through the RF feeder for transmission. The terminal device, such as a mobile phone, a tablet computer, etc., receives the radio waves transmitted by the antenna through the wireless channel and then demodulates its own signal. The main function of the PA is to amplify the RF signal.

Continuing with FIG. 1 , the base station further includes a power supply unit 106 , which can be used to supply power to structures such as the control unit 101 , the transmission unit 102 , and the baseband unit 103 .

FIG2 shows a structural diagram of another electronic device, in which a mobile phone is taken as an example. The mobile phone 200 may include a middle frame 201, a rear shell 202, and a display screen 203. The middle frame 201 includes a carrier board 2011 for carrying the display screen 203, and a frame 2012 surrounding the carrier board 2011. The carrier board 2011 carries an RF unit and a PA device. The PA device amplifies the signal output by the RF unit and feeds it to an antenna in the mobile phone (for example, the antenna may be arranged along the edge of the frame 2012) to send and receive signals.

In some embodiments, a device formed of a laterally-diffused metal-oxide semiconductor (LDMOS) may be used as the PA, or a device formed of gallium arsenide (GaAs) may be used as the PA.

With the development from the fourth generation of wireless communications technologies (4G) to the fifth generation of wireless communications technologies (5G), the requirements for the amplification function of the above-mentioned PA for radio frequency signals are becoming higher and higher. For example, compared with 4G network communications, the communication frequency band of 5G is migrating to a high frequency band, for example, migrating to 3 GHz to 5 GHz.

However, the prominent disadvantage of GaAs devices is their low power (for example, the power is usually less than 50W), and the prominent disadvantage of LDMOS devices is the limitation of operating frequency (the operating frequency is generally below 3GHz). Therefore, GaAs devices and LDMOS can no longer meet the needs of 5G communication networks.

Gallium nitride (GaN) RF devices not only reflect the high-frequency performance of gallium arsenide devices, but also combine the power handling capabilities of LDMOS devices, which can better meet the high communication frequency band and high power requirements of 5G. Therefore, the application scope of gallium nitride (GaN) RF devices is becoming wider and wider.

As shown in Fig. 3, in some examples, a radio frequency device 300 (e.g., a power amplifier) may be carried on a package substrate 400, and may be disposed on the package substrate 400 via an electrical connection structure (e.g., a metal layer) 401, so that the radio frequency device 300 may be signal-interconnected with other electronic devices on the package substrate 400. The package substrate 400 may be disposed on a circuit board 500, such as a printed circuit board (PCB), via another electrical connection structure 402, where the other electrical connection structure 402 may be a ball grid array (BGA) or other electrical connection structures.

In some other examples, the RF device 300 in the electronic device may be directly disposed on the circuit board 500 and electrically connected to the circuit board 500 .

The inventors of the present application have discovered through research that, in the process of preparing radio frequency devices, a dielectric layer is often used to protect the device to prevent the device from being affected by water vapor in the air. However, due to the existence of the undulating structure of the previous layer, the dielectric layer is discontinuous when deposited on different planes, and the dielectric layers on different planes meet at the steps, which makes it easy for merged gaps to appear in the dielectric layer, which becomes a weak path for water vapor intrusion and causes device failure.

The merged gap can be understood as an interface in the dielectric layer, which extends from the surface of the dielectric layer close to the substrate to the surface of the dielectric layer away from the substrate, dividing the dielectric layer into two adjacent parts. Alternatively, the merged gap can also be understood as a defect in the dielectric layer.

Based on this, as shown in FIGS. 4 to 6 , an embodiment of the present application provides a radio frequency device 300 , which includes a substrate 10 , a circuit structure 20 , a first dielectric layer 30 , an auxiliary electrode 40 and a second dielectric layer 50 .

In some examples, the material of substrate 10 may include silicon carbide (SiC), silicon (Si), sapphire, diamond, and the like.

The circuit structure 20 is located on one side of the substrate 10, and the circuit structure 20 includes a first surface S1 away from the substrate 10, and the first surface S1 includes a step surface S11, and the step surface S11 includes a protrusion away from one side of the substrate 10. In Figures 4 to 6, the first surface S1 is indicated by a "black thick solid line", and the step surface S11 is circled by a "black dotted frame".

In some examples, the first surface S1 may include a plurality of step surfaces S11. For example, as shown in FIGS. 4 to 6 , in a first direction X parallel to the substrate 10, the first surface S1 may include a plurality of step surfaces S11.

It is understandable that when the circuit structure 20 of the radio frequency device 300 is different, the number and structure of the step surface S11 are also different. Possible structures of the circuit structure 20 are introduced in subsequent embodiments and will not be described here in detail.

As shown in Fig. 4, Fig. 5 and Fig. 6, the first dielectric layer 30 is located on the side of the first surface S1 away from the substrate 10. The first dielectric layer 30 includes a second surface S2 away from the substrate 10. In the direction perpendicular to the substrate 10 (i.e., the second direction Y), the difference in distance between any two points on the second surface S2 and the upper surface S0 of the substrate 10 is less than or equal to 20 nm.

“In the direction perpendicular to the substrate 10, the difference in distances between any two points on the second surface S2 and the upper surface S0 of the substrate 10 is less than or equal to 20 nm” may mean that, in the direction perpendicular to the substrate 10, the difference in distances between any two points on the second surface S2 and the upper surface S0 of the substrate 10 is equal to zero. For example, referring to FIG. 4 , there are any two points on the second surface S2, such as point N1 and point N2, and in the direction perpendicular to the substrate 10, the distance between point N1 and the upper surface S0 of the substrate 10 is h1, and the distance between point N2 and the upper surface S0 of the substrate 10 is h2, and h1 is equal to h2.

Alternatively, “in the direction perpendicular to the substrate 10, the difference in distances between any two points on the second surface S2 and the upper surface S0 of the substrate 10 is less than or equal to 20 nm” may also mean that, in the direction perpendicular to the substrate 10, the difference h1 in distances between any two points on the second surface S2 and the upper surface S0 of the substrate 10 is greater than zero and less than or equal to 20 nm. For example, referring to FIG. 5 and FIG. 6 , there are any two points on the second surface S2, such as point N3 and point N4, wherein, in the direction perpendicular to the substrate 10, the distance between point N3 and the upper surface S0 of the substrate 10 is h3, the distance between point N4 and the upper surface S0 of the substrate 10 is h4, h3 is less than h4, and the difference between h4 and h3 is less than 20 nm.

For example, in a direction perpendicular to the substrate 10, the difference in distance between any two points on the second surface S2 and the upper surface S0 of the substrate 10 may be 0 nm, 1 nm, 5 nm, 10 nm, 15 nm or 20 nm. In the embodiment of the present application, the difference in distance between any two points on the second surface S2 and the upper surface S0 of the substrate 10 is not limited thereto, as long as it is less than or equal to 20 nm.

For example, the material of the first dielectric layer 30 may include insulating dielectrics such as silicon nitride, silicon oxide, and aluminum oxide.

Exemplarily, the thickness d1 of the first dielectric layer 30 may be 10 nm to 5 μm. For example, the thickness d1 of the first dielectric layer 30 may be 10 nm, 100 nm, 500 nm, 1 μm, 2 μm, 4 μm or 5 μm.

In this way, on the one hand, the problem that the circuit structure cannot be properly protected due to the small thickness of the first dielectric layer 30 can be avoided; on the other hand, the problem that the cost is high due to the large thickness of the first dielectric layer 30 can be avoided.

In some examples, the first dielectric layer 30 may be prepared by plasma chemical vapor deposition (PCVD), atomic layer deposition (ALD), low pressure chemical vapor deposition (LPVD), or other processes.

The auxiliary electrode 40 includes a first sub-electrode 41 and a second sub-electrode 42 connected to each other. The first sub-electrode 41 is located on a side of the first dielectric layer 30 away from the substrate 10 , and the second sub-electrode 42 penetrates the first dielectric layer 30 and is electrically connected to the circuit structure 20 .

For example, the material of the auxiliary electrode 40 may include metal, such as gold, aluminum, etc.

In some examples, the auxiliary electrode 40 may be prepared by using an evaporation process and a lift-off process. In other examples, the auxiliary electrode 40 may be prepared by using a sputtering process and an etching process.

The second dielectric layer 50 is located on a side of the first dielectric layer 30 away from the substrate 10 , and covers the auxiliary electrode 40 .

It can be understood that the second dielectric layer 50 covers the auxiliary electrode 40 , which means that the second dielectric layer 50 not only completely covers the auxiliary electrode 40 , but also partially covers the auxiliary electrode 40 .

In some examples, the material of the second dielectric layer 50 may include insulating dielectrics such as silicon nitride, silicon oxide, and aluminum oxide.

In some examples, the thickness d2 of the second dielectric layer 50 may be 10 nm to 5 μm. For example, the thickness d2 of the second dielectric layer 50 may be 10 nm, 100 nm, 500 nm, 1 μm, 2 μm, 4 μm, or 5 μm.

In this way, on the one hand, the problem that the second dielectric layer 50 is too thin and has poor insulation capacity to properly protect the auxiliary electrode can be avoided; on the other hand, the problem that the second dielectric layer 50 is too thick and causes high costs can be avoided.

The RF device 300 provided in the embodiment of the present application includes a first dielectric layer 30 and a second dielectric layer 50 located on a side of the first dielectric layer 30 away from the substrate 10. In a direction perpendicular to the substrate 10, the difference in distance between any two points on the second surface S2 of the first dielectric layer 30 and the upper surface S0 of the substrate 10 is less than or equal to 20 nm, so that the second surface S2 is relatively flat as a whole. In this way, even if a merged gap 31 is generated in the portion of the first dielectric layer 30 located on the step surface S11 during the process of forming the first dielectric layer 30 (see Figures 4 to 6), the portion of the second dielectric layer 50 located on the side of the step surface S11 away from the substrate 10 will not have a merged gap. The merged gap 31 in the first dielectric layer 30 cannot pass through the second dielectric layer 50 to communicate with the outside world, so that water vapor in the external environment is not easy to enter the merged gap 31 of the first dielectric layer 30 and pass through the merged gap 31 into the circuit structure 20, thereby avoiding the problem of cracking of the first dielectric layer due to water vapor invasion, and further avoiding water vapor contacting the electrodes in the circuit structure, causing the electrodes to be corroded, causing the problem of short circuit between electrodes in the same layer, thereby improving the moisture-proof and waterproof properties of the RF device 300, and at the same time improving the reliability of the RF device 300.

4 to 6 provide three different structures of the radio frequency device 300 , the main difference between which is that the morphology of the second surface S2 of the first dielectric layer 30 is different.

As shown in FIG. 4 , in some embodiments, the second surface S2 may be parallel to the upper surface S0 of the substrate 10 .

At this time, the second surface S2 is flatter, and the portion of the second surface S2 located on the step surface S11 is also flatter. In this way, the second dielectric layer 50 located on the side of the first dielectric layer 30 away from the substrate 10 will not generate a merged gap at the position corresponding to the step surface S11, making it more difficult for water vapor in the external environment to pass through the first dielectric layer 30 and the second dielectric layer 50 into the circuit structure 20, thereby further improving the moisture-proof and waterproof properties of the RF device 300 and improving the reliability of the RF device 300.

As shown in Figure 5, in other embodiments, the portion of the second surface S2 covered by the first sub-electrode 41 is the first portion S21, and the portion of the second surface S2 located around the first sub-electrode 41 is the second portion S22. The first portion S21 is farther away from the upper surface S0 of the substrate 10 than the second portion S22.

In some examples, as shown in FIG. 5 , there may be a smooth transition between the first portion S21 and the second portion S22 .

Through such an arrangement, the second dielectric layer 50 is not prone to having a merged gap at the junction of the first part S21 and the second part S22, which is conducive to avoiding the occurrence of merged gaps in the second dielectric layer 50 and the corrosion of the auxiliary electrode by water vapor through the merged gaps, further improving the waterproof and moisture-proof properties of the RF device 300 and improving the stability of the RF device 300.

As shown in FIG. 6 , in some other embodiments, a portion of the second surface S2 located above the step surface S11 is farther away from the upper surface S0 of the substrate 10 than a surrounding portion thereof.

It can be understood that the above embodiments only show three possible morphologies of the second surface S2, and the morphology of the second surface S2 in the embodiments of the present application is not limited thereto.

In some embodiments, as shown in FIG7 , the radio frequency device 300 may further include a third dielectric layer 60. The third dielectric layer 60 is located between the first dielectric layer 30 and the first sub-electrode 41. The second sub-electrode 42 also penetrates the third dielectric layer 60.

Exemplarily, the material of the third dielectric layer 60 may include insulating dielectrics such as silicon nitride, silicon oxide, and aluminum oxide.

Exemplarily, the thickness d3 of the third dielectric layer 60 may be 10 nm to 5 μm. For example, the thickness d3 of the third dielectric layer 60 may be 10 nm, 100 nm, 500 nm, 1 μm, 2 μm, 4 μm or 5 μm.

In the embodiment of the present application, since the second surface S2 is relatively flat, and the portion of the second surface located on the step surface S11 is relatively flat, no merged gap will appear in the portion of the third dielectric layer 60 located on the side of the step surface S11 away from the substrate 10. In this way, even if a merged gap 31 appears in the portion of the first dielectric layer 30 located on the step surface S11 (see FIG. 7 ), a merged gap also appears in the second dielectric layer 50, and the third dielectric layer 60 can separate the merged gap 31 in the first dielectric layer 30 from the merged gap in the second dielectric layer 50, thereby further preventing the merged gap 31 in the first dielectric layer 30 from being connected to the external environment, further blocking the invasion of water vapor, improving the moisture-proof and waterproof properties of the RF device 300, and improving the reliability of the RF device 300.

As shown in Fig. 7 and Fig. 8, the third dielectric layer 60 includes a third surface S3 away from the substrate 10. Based on different preparation methods of the auxiliary electrode 40, the morphology of the third surface S3 may be slightly different.

For example, when the auxiliary electrode 40 is prepared by a lift-off process, the third dielectric layer 60 is not easily damaged. At this time, as shown in FIG. 7 , the third surface S3 may be parallel to the upper surface S0 of the substrate 10 .

At this time, the third surface S3 is flat, and the portion of the third surface S3 located on the step surface S11 is also relatively flat. In this way, the second dielectric layer 50 located on the side of the third dielectric layer 60 away from the substrate 10 will not generate a merged gap at the position corresponding to the step surface S11, making it more difficult for water vapor in the external environment to pass through the second dielectric layer 50, the third dielectric layer 60 and the first dielectric layer 30 into the circuit structure 20, thereby further improving the moisture and water resistance of the RF device 300 and improving the reliability of the RF device 300.

For another example, when the auxiliary electrode 40 is prepared by an etching process, the third dielectric layer is easily etched. At this time, as shown in Figure 8, the third dielectric layer 60 includes a third surface S3 away from the substrate 10, and the portion of the third surface S3 covered by the first sub-electrode 41 is the third portion S31, and the portion of the third surface S3 located around the first sub-electrode 41 is the fourth portion S32. The third portion S31 is farther away from the upper surface S0 of the substrate 10 than the fourth portion S32.

The circuit structure 20 is further described below in conjunction with FIG. 4 to FIG. 10 .

In some embodiments, as shown in FIGS. 4 to 8 , the circuit structure 20 may include a heterojunction 21 , a fourth dielectric layer 22 , a source electrode 23 , a drain electrode 24 , a fifth dielectric layer 25 and a gate electrode 26 .

The heterojunction 21 is located on one side of the substrate 10 . The heterojunction 21 includes a channel layer 211 and a barrier layer 212 which are sequentially stacked in a direction away from the substrate 10 .

For example, the material of the channel layer 211 may include GaN. The thickness of the channel layer 211 may be 100 nm to 5 μm. For example, the thickness of the channel layer 211 may be 100 nm, 200 nm, 500 nm, 1 μm, or 5 μm.

For example, the material of the barrier layer 212 may include aluminum gallium nitride (AlGaN), aluminum nitride (AlN), indium gallium nitride (InGaN), etc. The thickness of the barrier layer 212 may be 2nm to 5μm. For example, the thickness of the barrier layer 212 is 2nm, 100nm, 500nm, 1μm or 5μm, etc.

The channel layer 211 and the barrier layer 212 form a heterojunction and generate a two-dimensional electron gas through polarization.

The fourth dielectric layer 22 is located on a side of the heterojunction 21 away from the substrate 10 .

Exemplarily, the material of the fourth dielectric layer 22 may include insulating dielectrics such as silicon nitride, silicon oxide, and aluminum oxide. The thickness of the fourth dielectric layer 22 may be 1 nm to 5 μm. For example, the thickness of the fourth dielectric layer 22 may be 1 nm, 10 nm, 100 nm, 500 nm, 1 μm, 3 μm, or 5 μm.

The source electrode 23 and the drain electrode 24 are located on a side of the fourth dielectric layer 22 away from the substrate 10 , and the source electrode 23 and the drain electrode 24 penetrate the fourth dielectric layer 22 and contact the barrier layer 212 .

The source electrode 23 and the drain electrode 24 may form an ohmic contact with the barrier layer 212 .

Exemplarily, the material of the source electrode 23 and the drain electrode 24 may include metal, such as titanium, aluminum, gold, etc.

In some examples, the materials of the source 23 and the drain 24 can be the same, so that the source 23 and the drain 24 can be prepared at the same time, thereby simplifying the preparation process of the RF device 300, improving the preparation efficiency of the RF device 300, and reducing the preparation cost of the RF device 300.

The fifth dielectric layer 25 is located on a side of the fourth dielectric layer 22 away from the substrate 10 , and the fifth dielectric layer 25 covers the source 23 and the drain 24 .

It can be understood that the fifth dielectric layer 25 covers the source 23 and the drain 24 , which includes not only the case where the fifth dielectric layer 25 completely covers the source 23 and the drain 24 , but also the case where the fifth dielectric layer 25 covers part of the source 23 and the drain 24 .

Exemplarily, the material of the fifth dielectric layer 25 may include insulating dielectrics such as silicon nitride, silicon oxide, and aluminum oxide.

Exemplarily, the thickness of the fifth dielectric layer 25 may also be 1 nm to 5 μm. For example, the thickness of the fifth dielectric layer 25 may be 1 nm, 10 nm, 100 nm, 500 nm, 1 μm, 3 μm or 5 μm.

The gate 26 is located on a side of the fifth dielectric layer 25 away from the substrate 10 and between the source 23 and the drain 24 . The gate 26 penetrates the fourth dielectric layer 22 and the fifth dielectric layer 25 and contacts the barrier layer 212 .

A Schottky contact may be formed between the gate 26 and the barrier layer 212 .

Exemplarily, the material of the gate 26 may also include metal, such as nickel, gold, etc.

In the working state of the circuit structure 20 provided in the above embodiment, the source 23 and the drain 24 can make the two-dimensional electron gas flow in the channel layer 211 between the source 23 and the drain 24 under the action of the electric field, and the conduction between the source 23 and the drain 24 occurs at the two-dimensional electron gas in the channel layer 211. The gate 26 is arranged between the source 23 and the drain 24 to allow or hinder the flow of the two-dimensional electron gas, thereby controlling the conduction or cutoff of the radio frequency device.

In the embodiment of the present application, referring to FIG8 , the first surface S1 of the circuit structure 20 may include the surface of the fifth dielectric layer 25 not covered by the gate 26, and the top surface 261 and the side wall 262 of the gate 26. The portion of the first surface S1 located above the edges of the source 23 and the drain 24 forms a step surface S11, and the top surface 261 and the side wall 262 of the gate also form a step surface S11.

In the embodiment of the present application, the radio frequency device 300 may include a plurality of auxiliary electrodes 40 .

In some examples, the source 23, the drain 24, and the gate 26 may be respectively connected to an auxiliary electrode 40. Based on the above circuit structure 20, the auxiliary electrode 40 corresponding to the source 23 may penetrate the first dielectric layer 30 and the fifth dielectric layer 25 to be in electrical contact with the source 23, the auxiliary electrode 40 corresponding to the drain 24 may penetrate the first dielectric layer 30 and the fifth dielectric layer 25 to be in electrical contact with the drain 24, and the auxiliary electrode 40 corresponding to the gate 26 may penetrate the first dielectric layer 30 to be in electrical contact with the gate 26.

In some other examples, the drain 24 and the gate 26 may be respectively connected to a corresponding auxiliary electrode 40 , while the source 23 may not be electrically connected to the auxiliary electrode.

In some embodiments, as shown in FIG9 , the circuit structure 20 may further include a sixth dielectric layer 27 and a field plate (FP) electrode 28, the sixth dielectric layer 27 being located on a side of the fifth dielectric layer 25 away from the substrate 10, and the sixth dielectric layer 27 covering the gate 26. The field plate electrode 28 is located on a side of the sixth dielectric layer 27 away from the substrate 10, and the orthographic projection of the field plate electrode 28 on the substrate 10 partially overlaps with the orthographic projection of the gate 26 on the substrate 10.

It can be understood that the sixth dielectric layer 27 covers the gate 26 , and the sixth dielectric layer 27 may completely cover the gate 26 , or the sixth dielectric layer 27 may partially cover the gate 26 .

Exemplarily, the material of the sixth dielectric layer 27 may include insulating dielectrics such as silicon nitride, silicon oxide, and aluminum oxide.

Exemplarily, the thickness of the sixth dielectric layer 27 may be 1 nm to 5 μm. For example, the thickness of the sixth dielectric layer 27 may be 1 nm, 10 nm, 100 nm, 500 nm, 1 μm, 3 μm or 5 μm.

Exemplarily, the material of the field plate electrode 28 may be metal, such as gold, aluminum, etc.

In some examples, the field plate electrode 28 may not contact the gate 26, the source 23, or the drain 24, so that no signal is loaded. In other examples, the field plate electrode 28 may be electrically connected to the source 23. In still other examples, the field plate electrode 28 may be electrically connected to the gate 26.

In the embodiment of the present application, a field plate electrode 28 is provided on the fifth dielectric layer 25, and the orthographic projection of the field plate electrode 28 on the substrate 10 partially overlaps with the orthographic projection of the gate 26 on the substrate 10, so that the electric field distribution in the RF device 300 can be adjusted, so that the electric field distribution at the edge of the gate 26 is more uniform, avoiding the occurrence of electric field spikes, and improving the breakdown resistance of the RF device.

On this basis, the first surface S1 of the circuit structure 20 may include a portion of the sixth dielectric layer 27 that is not covered by the field plate electrode 28, and a top surface 281 and a side wall 282 of the field plate electrode 28. The portion of the first surface S1 located above the edges of the source 23, the drain 24, and the gate 26 forms a step surface S11, and the top surface 281 and the side wall 282 of the field plate electrode 28 also form a step surface S11.

In some examples, the top surface 281 of the field plate electrode 28 may be uneven, that is, there are two points on the top surface 281 of the field plate electrode 28 , and the distances from the two points to the upper surface S0 of the substrate 10 are different in a direction perpendicular to the substrate 10 .

In other examples, the top surface 281 of the field plate electrode 28 may be parallel to the substrate 10 .

In some embodiments, as shown in FIG. 10 , the heterojunction 21 may further include an insertion layer 213 between the channel layer 211 and the barrier layer 212 .

For example, the material of the insertion layer 213 may include AlN.

The insertion layer 213 is located between the channel layer 211 and the barrier layer 212 and is used to increase the concentration of the two-dimensional electron gas, reduce the penetration of the two-dimensional electron gas into the barrier layer, reduce alloy disorder scattering, thereby increasing electron mobility and improving the output characteristics of the RF device 300 .

10 , in some other embodiments, the circuit structure 20 may further include a nucleation layer 291 and a buffer layer 292 . The nucleation layer 291 is located between the substrate 10 and the channel layer 211 , and the buffer layer 292 is located between the nucleation layer 291 and the channel layer 211 .

Exemplarily, the material of the nucleation layer 291 may include one or more of GaN, AlGaN, and AlN.

By providing the nucleation layer 291 , the epitaxial quality can be improved, which is beneficial to the growth of the upper epitaxial material (eg, the material of the buffer layer 292 ).

Exemplarily, the material of the buffer layer 292 may include AlGaN and/or AlN. For example, the material of the buffer layer 292 includes AlGaN, wherein the Al component in the AlGaN may decrease as the thickness increases. For another example, the material of the buffer layer 292 includes AlGaN and AlN, in which case the buffer layer 292 may be a superlattice structure.

By providing the buffer layer 292 , on one hand, the stress of multiple film layers (eg, the channel layer 211 and the barrier layer 212 ) on the substrate 10 can be relieved, and on the other hand, the anti-breakdown capability of the RF device 300 can be improved.

10 , in some other embodiments, the circuit structure 20 may further include a cap layer 293 , and the cap layer 293 is located between the barrier layer 212 and the fourth dielectric layer 22 . The cap layer 293 is used to protect the barrier layer 212 .

Exemplarily, the material of the cap layer 293 may include aluminum nitride, aluminum gallium nitride, or gallium nitride.

Exemplarily, the thickness of the cap layer 293 may be 1 nm to 5 nm. For example, the thickness of the cap layer 293 may be 1 nm, 2 nm, 3 nm, 4 nm, or 5 nm.

It is understandable that the presence of the cap layer 293 does not affect the ohmic contact between the source 23 and the drain 24 and the barrier layer 212 , and the presence of the cap layer 293 does not affect the Schottky contact between the gate 26 and the barrier layer 212 .

In some embodiments, the nucleation layer 291 , the buffer layer 292 , the channel layer 211 , the barrier layer 212 and the cap layer 293 may be formed by epitaxial growth on the substrate 10 using processes such as metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).

FIG. 11 is a top view of the RF device 300 provided in the embodiment of the present application, and FIG. 12 is a simplified cross-sectional view of the RF device 300 provided in the embodiment of the present application.

As shown in Figures 11 and 12, in some embodiments, the radio frequency device 300 includes an active area AA and a passive area BB surrounding the active area AA, wherein 2DEG exists in the active area AA, and 2DEG does not exist in the passive area BB.

In some examples, at least portions of the source 23 and the drain 24 are located in the active area AA, a portion of the gate 26 is located in the active area AA, and another portion of the gate 26 is located in the non-active area BB.

The RF device 300 may further include a first pad 71, a second pad 72, and a third pad 73. The first pad 71 and the second pad 72 are located on the side of the first dielectric layer 30 away from the substrate 10. The first pad 71 and the second pad 72 are located in the passive region BB, and the first pad 71 and the second pad 72 are electrically connected to the drain 24 and the gate 26 through the auxiliary electrode 40, respectively. The third pad 73 is located on the side of the substrate 10 away from the circuit structure 20. The third pad 73 is electrically connected to the source 23.

“The first pad 71 and the second pad 72 are electrically connected to the drain 24 and the gate 26 respectively through the auxiliary electrode 40 ” can mean that the first pad 71 is electrically connected to the drain 24 through one auxiliary electrode 40 , and the second pad 72 is electrically connected to the gate 26 through another auxiliary electrode 40 .

“The first pad 71 and the second pad 72 are electrically connected to the drain 24 and the gate 26 respectively through the auxiliary electrode 40 ” may also mean that the first pad 71 is electrically connected to the gate 26 through one auxiliary electrode 40 , and the second pad 72 is electrically connected to the drain 24 through another auxiliary electrode 40 .

Exemplarily, the materials of the first pad 71 , the second pad 72 , and the third pad 73 may all include metal, such as gold, aluminum, and the like.

In some examples, the first pad 71, the second pad 72 and the auxiliary electrode 40 may be made of the same material. In this way, the first pad 71 and the second pad 72 may be prepared simultaneously with the auxiliary electrode 40, thereby simplifying the preparation process of the RF device 300 and reducing the preparation cost of the RF device 300.

In some examples, as shown in Fig. 11, the auxiliary electrode 40 correspondingly connected to the drain 24 may be located in the passive region BB. In other examples, as shown in Fig. 12, a portion of the auxiliary electrode 40 correspondingly connected to the drain 24 is located in the active region AA, and another portion of the auxiliary electrode 40 correspondingly connected to the drain 24 is located in the passive region BB.

In some examples, as shown in FIG. 11 , the auxiliary electrode 40 correspondingly connected to the gate 26 may be located in the inactive region BB.

In some examples, as shown in FIG. 12 , the RF device 300 may further include an interconnect metal 80 located on a side of the substrate 10 away from the circuit structure 20 , and the interconnect metal 80 may be electrically connected to the source 23 through a backside via (Bvia) 81 .

Exemplarily, the back hole 81 may include portions located in the heterojunction 21 , the fourth dielectric layer 22 , the buffer layer 292 , and the nucleation layer 291 .

In some examples, the back hole 81 may be located in the active area AA. In other examples, the back hole 81 may be located in the inactive area BB.

In the embodiment of the present application, there is no limitation on the position of the third pad 73 , and the third pad 73 may be located in the active area AA or in the passive area BB.

The embodiment of the present application also provides a method for preparing a radio frequency device 300, as shown in FIG13, the method comprising:

S100 , as shown in FIG. 14 , a circuit structure 20 is formed on one side of a substrate 10 , wherein the circuit structure 20 includes a first surface S1 away from the substrate 10 , the first surface S1 includes a step surface S11 , and the step surface S11 includes a protrusion away from one side of the substrate 10 .

The circuit structure 20 may have a structure provided by any of the above embodiments. FIG14 only takes the circuit structure 20 including the heterojunction 21 (the heterojunction 21 includes the channel layer 211, the barrier layer 212 and the insertion layer 213), the fourth dielectric layer 22, the source 23, the drain 24, the fifth dielectric layer 25, the gate 26, the sixth dielectric layer 27, the field plate electrode 28, the nucleation layer 291, the buffer layer 292 and the cap layer 293 as an example for illustration.

Exemplarily, the heterojunction 21 , the nucleation layer 291 , the buffer layer 292 and the cap layer 293 may be formed by epitaxial growth on the substrate 10 using processes such as metal organic chemical vapor deposition or molecular beam epitaxy.

Exemplarily, the fourth dielectric layer 22 , the fifth dielectric layer 25 and the sixth dielectric layer 27 may be formed by plasma chemical vapor deposition, atomic layer deposition or low pressure chemical vapor deposition.

Exemplarily, the source 23 , the drain 24 , the gate 26 and the field plate electrode 28 may be formed by a deposition process, such as evaporation or sputtering.

The first surface S1 is schematically illustrated by a “thick black solid line” in FIG. 14 . The first surface S1 may include a surface of the sixth dielectric layer 27 that is not covered by the field plate electrode 28 , and a top surface 281 and a side wall 282 of the field plate electrode 28 .

S200, as shown in Fig. 15, a first dielectric layer 30 is formed on a side of the circuit structure 20 away from the substrate 10. The first dielectric layer 30 includes a second surface S2 away from the substrate 10, and the height of the second surface S2 varies with the height of the first surface S1.

For example, the first dielectric layer 30 may be formed on a side of the circuit structure 20 away from the substrate 10 by using processes such as plasma chemical vapor deposition, atomic layer deposition, and low pressure chemical vapor deposition.

S300 , as shown in FIG. 16A and FIG. 16B , the second surface S2 of the first dielectric layer 30 is planarized.

After the second surface S2 of the first dielectric layer 30 is planarized, the difference in distance between any two points on the second surface S2 and the upper surface S0 of the substrate 10 in a direction perpendicular to the substrate 10 (eg, the second direction Y) is less than or equal to 20 nm.

Exemplarily, referring to FIG. 16A , after the second surface S2 of the first dielectric layer 30 is planarized, there are any two points on the second surface S2, such as point N1 and point N2, the distance from point N1 to the upper surface S0 of the substrate 10 is h1, the distance from point N2 to the upper surface S0 of the substrate 10 is h2, and h1 is equal to h2.

Alternatively, illustratively, referring to FIG. 16B , after the second surface S2 of the first dielectric layer 30 is planarized, there are any two points on the second surface S2, such as point N3 and point N4. The distance between point N3 and the upper surface S0 of the substrate 10 is h3, the distance between point N4 and the upper surface S0 of the substrate 10 is h4, h3 is smaller than h4, and the difference between h4 and h3 is smaller than 20 nm.

S400, as shown in Figures 17A and 17B, an auxiliary electrode 40 is formed, and the auxiliary electrode 40 includes a first sub-electrode 41 and a second sub-electrode 42 connected to each other. The first sub-electrode 41 is located on a side of the first dielectric layer 30 away from the substrate 10, and the second sub-electrode 42 penetrates the first dielectric layer 30 and is connected to the circuit structure 20.

S500 , referring to FIG. 4 and FIG. 6 , a second dielectric layer 50 is formed on a side of the first dielectric layer 30 away from the substrate 10 , and the second dielectric layer 50 covers the auxiliary electrode 40 .

For example, the second dielectric layer 50 may be formed on a side of the first dielectric layer 30 away from the substrate 10 by using a process such as plasma chemical vapor deposition, atomic layer deposition or low pressure chemical vapor deposition.

In the method for preparing the RF device provided in the embodiment of the present application, a first dielectric layer 30 is formed on an uneven first surface S1, and a second surface S2 of the first dielectric layer 30 is uneven. The second surface S2 of the first dielectric layer 30 is planarized so that the second surface S2 of the first dielectric layer 30 is relatively flat. In this way, even if the first dielectric layer 30 generates a merged gap at the step surface S11 corresponding to the first surface S1 during the formation process, after the second dielectric layer 50 is formed on the flat second surface S2, no merged gap will appear in the portion of the second dielectric layer 50 located on the side of the step surface S11 away from the substrate 10, and the merged gap 31 in the first dielectric layer 30 cannot pass through the second dielectric layer 50 to communicate with the outside world, so that water vapor in the external environment is not easy to enter the merged gap of the first dielectric layer 30 and pass through the merged gap into the circuit structure 20, thereby avoiding the problem of cracking of the first dielectric layer due to water vapor intrusion, and further avoiding the problem of water vapor contacting the electrodes in the circuit structure, causing the electrodes to be corroded and causing short circuits between electrodes on the same layer, thereby improving the moisture-proof and waterproof properties of the RF device 300 and improving the reliability of the RF device 300.

In some embodiments, as shown in FIG15 , before the second surface S2 of the first dielectric layer 30 is planarized in step S300 , the thickness d4 of the first dielectric layer 30 may be 400 nm to 5 μm. For example, the thickness of the first dielectric layer 30 may be 400 nm, 800 nm, 1 μm, 2 μm, 3 μm or 5 μm.

By setting in this way, on the one hand, the thickness of the first dielectric layer 30 can be made not too small, so that the removal amount of the first dielectric layer 30 consumed by the planarization process can be reserved, and after the second surface S2 of the first dielectric layer 30 is planarized, the first dielectric layer 30 can still better protect the circuit structure 20. On the other hand, the thickness of the first dielectric layer 30 can be made not too thick, thereby avoiding an increase in cost.

As shown in FIG. 18A , in some examples, step S300 of planarizing the second surface S2 of the first dielectric layer 30 may include:

S310 , using a chemical mechanical polishing (CMP) process or a dry etching process to remove a portion of the first dielectric layer 30 , so as to make the second surface S2 of the first dielectric layer 30 flat.

Among them, the dry etching process is adopted, and the etching precision is high. The chemical mechanical polishing process is adopted, which can make the above process easier to implement, and the second surface S2 of the first dielectric layer 30 is flatter. In this way, after the second surface S2 of the first dielectric layer 30 is flattened, when the second dielectric layer 50 is formed on the side of the first dielectric layer 30 away from the substrate 10, the second dielectric layer 50 is located on the side of the step surface S11 away from the substrate 10. The part will not form a merged gap, which is conducive to further avoiding the problem of cracking of the first dielectric layer due to water vapor intrusion, avoiding water vapor contacting the electrodes in the circuit structure, causing the electrodes to be corroded, causing the problem of short circuit between the electrodes on the same layer, improving the moisture and water resistance of the RF device 300, and at the same time improving the reliability of the RF device 300.

As shown in FIG. 18B , in some other examples, step S300 of planarizing the second surface S2 of the first dielectric layer 30 may include:

S320, as shown in Fig. 19, a sacrificial layer 11 is formed on a side of the first dielectric layer 30 away from the substrate 10. The sacrificial layer 11 includes a fourth surface S4 away from the substrate 10, and the height of the fourth surface S4 varies with the second surface S2.

Exemplarily, the material of the sacrificial layer 11 may include an organic material, such as polyimide (PI), photosensitive coated glass or photoresist.

When the material of the sacrificial layer 11 includes photoresist, the material of the sacrificial layer 11 may be hydrogen silsesquioxane (HSQ).

Exemplarily, the thickness of the sacrificial layer 11 may be 100 nm to 5 μm. For example, the thickness of the sacrificial layer 11 may be 100 nm, 500 nm, 1 μm, 2 μm, or 5 μm.

S330 , using a dry etching process to remove at least a portion of the sacrificial layer 11 , so as to make the second surface S2 of the first dielectric layer 30 flat.

In the embodiment of the present application, a sacrificial layer 11 is formed to fill the low part of the second surface S2 of the first dielectric layer 30 , and a dry etching process is used to planarize the first dielectric layer 30 based on the characteristics of fast etching speed at high parts and slow etching speed at low parts.

In some examples, “remove at least a portion of the sacrificial layer 11 to make the second surface S2 of the first dielectric layer 30 flat” may be to remove a portion of the sacrificial layer 11 and fill the remaining sacrificial layer 11 at the lower portion of the second surface S2 to make the second surface S2 flat.

In other examples, “removing at least a portion of the sacrificial layer 11 to make the second surface S2 of the first dielectric layer 30 flat” may be to remove a portion of the sacrificial layer 11 and a higher portion of the first dielectric layer 30 (a portion farther from the upper surface S0 of the substrate 10), and the remaining sacrificial layer 11 is filled in the lower part of the second surface S2 to make the second surface S2 flat.

In some other examples, “remove at least a portion of the sacrificial layer 11 to make the second surface S2 of the first dielectric layer 30 flat” may be to remove the entire sacrificial layer 11 and a portion of the first dielectric layer 30 to make the second surface S2 flat.

It is understandable that the above FIG. 18A and FIG. 18B only show two ways of planarizing the second surface S2 of the first dielectric layer 30 , and the way of planarizing the second surface S2 of the first dielectric layer 30 in the embodiment of the present application is not limited thereto.

In some embodiments, as shown in FIG. 20 , step S400, forming an auxiliary electrode 40, includes:

S410 , as shown in FIG. 21 , the first dielectric layer 30 is etched to form an opening 301 , wherein the opening 301 exposes the source 23 , the drain 24 or the gate 26 in the circuit structure.

In some examples, etching the first dielectric layer 30 may form a plurality of openings 301. At this time, for example, the source 23, the drain 24 and the gate 26 may each correspond to an opening 301. For another example, the drain 24 and the gate 26 may each correspond to an opening 301.

In the embodiment of the present application, there is no limitation on the shape and size of the opening 301 , as long as a portion of the surface of the source 23 , the drain 24 or the gate 26 can be exposed.

S420 , as shown in FIG. 22 , forming a conductive layer 12 on a side of the first dielectric layer 30 away from the substrate 10 .

For example, the conductive layer 12 may be formed on a side of the first dielectric layer 30 away from the substrate 10 by using a sputtering process.

S430 , referring to FIG. 5 , the conductive layer 12 is etched to form an auxiliary electrode 40 . The auxiliary electrode 40 includes a first sub-electrode 41 located on the second surface S2 and a second sub-electrode 42 located in the opening 301 . The second sub-electrode 42 is connected to the source 23 , the drain 24 or the gate 26 .

As shown in Figure 5, during the etching process of the conductive layer 12, in order to completely remove the redundant parts of the conductive layer 12, over-etching is required, so that the first part S21 of the second surface S2 is farther away from the upper surface S0 of the substrate 10 than the second part S22, wherein the first part S21 is the part of the second surface S2 covered by the first sub-electrode 41, and the second part S22 is the part of the second surface S2 located around the first sub-electrode 41.

In some other embodiments, as shown in FIG. 23 , step S400, forming the auxiliary electrode 40, includes:

S440 , as shown in FIG. 21 , etching the first dielectric layer 30 to form an opening 301 , wherein the opening 301 exposes the source 23 , the drain 24 or the gate 26 in the circuit structure.

S450 , as shown in FIG. 22 , forming a conductive layer 12 on a side of the first dielectric layer 30 away from the substrate 10 .

In some examples, the conductive layer 12 may be formed on a side of the first dielectric layer 30 away from the substrate 10 by using an evaporation process.

S460, referring to FIG. 17A and FIG. 17B, a portion of the conductive layer 12 is removed by a lift-off process to form an auxiliary electrode 40. The auxiliary electrode 40 includes a first sub-electrode 41 located on the second surface S2 and a second sub-electrode 42 located in the opening 301. The second sub-electrode 42 is connected to the source 23, the drain 24 or the gate 26.

For example, after etching the first dielectric layer 30 to form the opening 301 in step S440, a patterned photoresist layer can be formed on the side of the first dielectric layer 30 away from the substrate 10 before forming the conductive layer 12 on the side of the first dielectric layer 30 away from the substrate 10 in step S440. In this way, after the conductive layer 12 is formed, the photoresist and the conductive layer 12 above the photoresist can be removed by using a stripping solution, thereby removing part of the conductive layer 12.

In this way, during the process of preparing the auxiliary electrode 40 , the first dielectric layer 30 is not easily damaged, and the second surface S2 of the first dielectric layer 30 can retain the planarized morphology.

When preparing the auxiliary electrode 40, planarizing the second surface S2 of the first dielectric layer 30 can also make the photoresist thickness uniform, and the photoresist curing effect is better after development, so that the excess part of the conductive layer can be better removed in the etching or stripping process to avoid metal residue.

In some embodiments, as shown in FIG. 24 , after the second surface S2 of the first dielectric layer 30 is planarized in step 300 and before the auxiliary electrode 40 is formed in step S400 , the preparation method further includes:

S600 , as shown in FIG. 25A and FIG. 25B , a third dielectric layer 60 is formed on a side of the first dielectric layer 30 away from the substrate 10 . The second portion 42 also penetrates the third dielectric layer 60 .

For example, the third dielectric layer 60 may be formed on a side of the first dielectric layer 30 away from the substrate 10 by using a process such as plasma chemical vapor deposition, atomic layer deposition or low pressure chemical vapor deposition.

Since the second surface S2 is relatively flat, no merged gap will appear in the portion of the third dielectric layer 60 located on the side of the step surface S11 away from the substrate 10. In this way, even if a merged gap appears in the portion of the first dielectric layer 30 located on the step surface S11, a merged gap also appears in the second dielectric layer 50, and the third dielectric layer 60 can separate the merged gap in the first dielectric layer 30 from the merged gap in the second dielectric layer 50, thereby further preventing the merged gap in the first dielectric layer 30 from being connected to the external environment, further blocking the intrusion of water vapor, improving the moisture-proof and waterproof properties of the RF device 300, and improving the reliability of the RF device 300.

8 , it can be understood that the third dielectric layer 60 is first formed on the side of the first dielectric layer 30 away from the substrate 10 and then the auxiliary electrode 40 is formed. The third dielectric layer 60 can also be used to protect the first dielectric layer 30 to prevent the first dielectric layer from being etched during the formation of the auxiliary electrode 40, so that the first dielectric layer 30 can better protect the circuit structure 20.

In the description of this specification, specific features, structures, materials or characteristics may be combined in an appropriate manner in any one or more embodiments or examples.

The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims (19)

1. A radio frequency device, comprising:

A substrate;

A circuit structure located on one side of the substrate, the circuit structure comprising a first surface remote from the substrate, the first surface comprising a step surface comprising a protrusion remote from one side of the substrate;

The first dielectric layer is positioned on one side of the first surface away from the substrate; the first dielectric layer comprises a second surface far away from the substrate; in a direction perpendicular to the substrate, a difference between distances from any two points in the second surface to an upper surface of the substrate is less than or equal to 20nm;

The auxiliary electrode comprises a first sub-electrode and a second sub-electrode which are connected, the first sub-electrode is positioned on one side of the first dielectric layer far away from the substrate, and the second sub-electrode penetrates through the first dielectric layer and is connected with the circuit structure;

And the second dielectric layer is positioned on one side of the first dielectric layer away from the substrate and covers the auxiliary electrode.

2. The radio frequency device of claim 1, wherein the second surface is parallel to an upper surface of the substrate.

3. The radio frequency device according to claim 1, wherein the portion of the second surface covered by the first sub-electrode is a first portion, the portion of the second surface located around the first sub-electrode is a second portion, and the first portion is further from the upper surface of the substrate than the second portion.

4. The radio frequency device according to claim 1 or 2, further comprising:

the third dielectric layer is positioned between the first dielectric layer and the first sub-electrode; the second sub-electrode also penetrates through the third dielectric layer.

5. The rf device of claim 4, wherein the third dielectric layer includes a third surface remote from the substrate, the portion of the third surface covered by the first sub-electrode being a third portion, the portion of the third surface surrounding the first sub-electrode being a fourth portion, the third portion being further from the upper surface of the substrate than the fourth portion.

6. The radio frequency device of claim 4, wherein the third dielectric layer includes a third surface remote from the substrate, the third surface being parallel to the upper surface of the substrate.

7. The radio frequency device according to any one of claims 1 to 6, wherein the circuit structure comprises:

A heterojunction positioned on one side of the substrate; the heterojunction comprises a channel layer and a barrier layer which are sequentially laminated along a direction away from the substrate;

the fourth dielectric layer is positioned on one side of the heterojunction far away from the substrate;

the source electrode and the drain electrode are positioned on one side, far away from the substrate, of the fourth dielectric layer, and penetrate through the fourth dielectric layer to be in contact with the barrier layer;

The fifth dielectric layer is positioned on one side, far away from the substrate, of the fourth dielectric layer, and the fifth dielectric layer covers the source electrode and the drain electrode;

the grid electrode is positioned on one side of the fifth dielectric layer away from the substrate and is positioned between the source electrode and the drain electrode; and the grid penetrates through the fourth dielectric layer and the fifth dielectric layer and is in contact with the barrier layer.

8. The radio frequency device of claim 7, wherein the circuit structure further comprises:

the sixth dielectric layer is positioned on one side, far away from the substrate, of the fifth dielectric layer, and the sixth dielectric layer covers the grid electrode;

And the field plate electrode is positioned on one side of the sixth dielectric layer far away from the substrate, and the orthographic projection of the field plate electrode on the substrate is overlapped with the orthographic projection part of the grid electrode on the substrate.

9. The radio frequency device according to claim 7 or 8, wherein the radio frequency device comprises an active region and a passive region surrounding the active region;

The radio frequency device further includes a first liner, a second liner, and a third liner; the first liner and the second liner are positioned on one side of the first dielectric layer away from the substrate; the first pad and the second pad are positioned in the passive region, and the first pad and the second pad are electrically connected with the drain electrode and the gate electrode through the auxiliary electrode respectively;

The third pad is positioned on one side of the substrate away from the circuit structure; the third pad is electrically connected with the source electrode.

10. The radio frequency device according to any one of claims 1 to 9, wherein a portion of the second dielectric layer on a side of the step surface remote from the substrate has no merging slit.

11. A method of manufacturing a radio frequency device, comprising:

Forming a circuit structure on one side of a substrate, wherein the circuit structure comprises a first surface far away from the substrate, the first surface comprises a step surface, and the step surface comprises a protrusion far away from one side of the substrate;

Forming a first dielectric layer on one side of the circuit structure away from the substrate; the first dielectric layer comprises a second surface far away from the substrate, and the height of the second surface changes along with the change of the height of the first surface;

Flattening the second surface of the first dielectric layer;

forming an auxiliary electrode, wherein the auxiliary electrode comprises a first sub-electrode and a second sub-electrode which are connected, the first sub-electrode is positioned on one side of the first dielectric layer far away from the substrate, and the second sub-electrode penetrates through the first dielectric layer to be connected with the circuit structure;

forming a second dielectric layer on one side of the first dielectric layer far away from the substrate, wherein the second dielectric layer covers the auxiliary electrode;

After the second surface of the first dielectric layer is subjected to planarization treatment, the difference between the distances from any two points in the second surface to the upper surface of the substrate in the direction perpendicular to the substrate is less than or equal to 20nm.

12. The method of claim 11, wherein planarizing the second surface of the first dielectric layer comprises:

And removing part of the first dielectric layer by adopting a chemical mechanical polishing process or a dry etching process so as to flatten the second surface of the first dielectric layer.

13. The method of claim 11, wherein planarizing the second surface of the first dielectric layer comprises:

Forming a sacrificial layer on one side of the first dielectric layer away from the substrate; the sacrificial layer includes a fourth surface remote from the substrate, the fourth surface having a height that varies with the second surface;

And removing at least part of the sacrificial layer by adopting a dry etching process so as to flatten the second surface of the first dielectric layer.

14. The method of claim 13, wherein the material of the sacrificial layer comprises an organic material.

15. The method of any one of claims 11 to 14, wherein forming the auxiliary electrode comprises:

Etching the first dielectric layer to form an opening, wherein the opening exposes a source electrode, a drain electrode or a grid electrode in the circuit structure;

forming a conductive layer on one side of the first dielectric layer away from the substrate;

Etching the conductive layer to form an auxiliary electrode; the auxiliary electrode comprises a first sub-electrode positioned on the second surface and a second sub-electrode positioned in the opening; the second sub-electrode is electrically connected to the source electrode, the drain electrode, or the gate electrode.

16. The method of any one of claims 11 to 14, wherein forming the auxiliary electrode comprises:

Etching the first dielectric layer to form an opening, wherein the opening exposes a source electrode, a drain electrode or a grid electrode in the circuit structure;

forming a conductive layer on one side of the first dielectric layer away from the substrate;

removing part of the conductive layer by adopting a stripping process to form an auxiliary electrode; the auxiliary electrode comprises a first sub-electrode positioned on the second surface and a second sub-electrode positioned in the opening; the second sub-electrode is electrically connected to the source electrode, the drain electrode, or the gate electrode.

17. The method according to any one of claims 11 to 14, wherein after the planarizing the second surface of the first dielectric layer, the method further comprises, before the forming of the auxiliary electrode:

Forming a third dielectric layer on one side of the first dielectric layer far away from the substrate;

Wherein the second portion also extends through the third dielectric layer.

18. The method according to any one of claims 11 to 17, wherein a thickness of the first dielectric layer is 400nm to 5 μm before the planarization treatment is performed on the second surface of the first dielectric layer.

19. An electronic device, comprising:

The electrical circuit board is provided with a plurality of circuit boards,

The radio frequency device of any of claims 1-10, electrically connected to the circuit board.