CN118130914A - Structure and method for testing contact resistance of probe card - Google Patents
Structure and method for testing contact resistance of probe card Download PDFInfo
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- CN118130914A CN118130914A CN202410278285.9A CN202410278285A CN118130914A CN 118130914 A CN118130914 A CN 118130914A CN 202410278285 A CN202410278285 A CN 202410278285A CN 118130914 A CN118130914 A CN 118130914A
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- 239000000523 sample Substances 0.000 title claims abstract description 46
- 238000012360 testing method Methods 0.000 title claims abstract description 42
- 238000000034 method Methods 0.000 title claims description 10
- 238000012545 processing Methods 0.000 claims abstract description 27
- 238000004364 calculation method Methods 0.000 claims description 6
- 230000002159 abnormal effect Effects 0.000 abstract description 3
- 238000010998 test method Methods 0.000 abstract description 3
- 238000012544 monitoring process Methods 0.000 abstract 1
- 101100084902 Mus musculus Psmd14 gene Proteins 0.000 description 9
- 101150057849 Padi1 gene Proteins 0.000 description 9
- 238000005259 measurement Methods 0.000 description 6
- 101150092599 Padi2 gene Proteins 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 229940095676 wafer product Drugs 0.000 description 4
- 101150030164 PADI3 gene Proteins 0.000 description 2
- 238000005299 abrasion Methods 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/20—Measuring earth resistance; Measuring contact resistance, e.g. of earth connections, e.g. plates
- G01R27/205—Measuring contact resistance of connections, e.g. of earth connections
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
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- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The application provides a probe card contact resistance test structure and a probe card contact resistance test method, which are applied to the technical field of contact resistance test, wherein adjacent gaskets are electrically connected, and head and tail end gaskets are electrically connected; the diodes are respectively arranged between adjacent gaskets and between the head end gasket and the tail end gasket; the pad is arranged corresponding to the diode; the processing module obtains the resistance value of the diode corresponding to the pad to be detected; the processing module obtains the total resistance of the diode corresponding to the pad to be tested and the pad to be tested; the processing module subtracts the resistance value of the diode corresponding to the pad to be detected from the total resistance value. The application reduces the influence of the probe card on the test accuracy, obtains the contact resistance between the probe card to be tested and the PADs by introducing the diode between every two PADs, and knows whether the probe card is abnormal or not by monitoring the contact resistance between each PAD and the probe card.
Description
Technical Field
The application relates to the technical field of contact resistance testing, in particular to a probe card contact resistance testing structure and a probe card contact resistance testing method.
Background
WAT (WAFER ACCEPTANCE TEST ) is the measurement of electrical parameters of a particular test structure after wafer product flow is completed and before quality inspection. The WAT aims to detect the process condition of each wafer product by testing the electrical parameters of a specific test structure on the wafer, evaluate the quality and stability of the semiconductor manufacturing process and judge whether the wafer product meets the electrical specification requirement of the process technology platform. The WAT data can be used as a quality certificate of wafer product delivery, and can reflect the actual production condition of the production line, the condition of the production line can be monitored by collecting and analyzing the WAT data, the trend of the change of the production line can be judged, and the possible occurrence condition can be early warned. The wafer shipment quality control WAT test quantity is huge, and the accuracy requirement is high.
Although the probe card used for wafer WAT test is used as consumable material and is maintained regularly, in actual use, contact resistance between the probe and the wafer is increased due to abrasion and contamination of the needle tip, so that the accuracy of the test is affected.
Based on this, a new solution is needed.
Disclosure of Invention
In view of this, the embodiments of the present disclosure provide a probe card contact resistance testing structure and method.
The embodiment of the specification also provides a probe card contact resistance test structure, which comprises a plurality of diodes, a plurality of gaskets and a processing module;
the adjacent gaskets are electrically connected, and the head gasket and the tail gasket are electrically connected;
the diodes are respectively arranged between the adjacent gaskets and between the head gasket and the tail gasket;
the pad is arranged corresponding to the diode;
The processing module acquires the resistance value of the diode corresponding to the pad to be detected;
the processing module obtains the total resistance of the diode corresponding to the pad to be tested and the pad to be tested;
the processing module subtracts the resistance value of the diode corresponding to the pad to be detected from the total resistance value.
Preferably, a previous pad of the adjacent pads is connected to an anode of a diode between the adjacent pads, and a cathode of the diode between the adjacent pads is connected to a next pad of the adjacent pads;
The tail end of the liner is connected with the anode of the diode between the head end and the tail end of the liner, and the cathode of the diode between the head end and the tail end of the liner is connected with the head end of the liner;
a previous one of the adjacent pads corresponds to a diode between the adjacent pads;
The tail end pads correspond to diodes between the head and tail end pads.
Preferably, the processing module adds positive current through a previous pad of the pad to be tested, grounds through a next pad of the pad to be tested, measures voltage through the pad to be tested and the next pad of the pad to be tested, and obtains the resistance value of the diode corresponding to the pad to be tested;
and the processing module adds positive current through the pad to be tested, is grounded through the pad to be tested and is used for measuring voltage through the pad to be tested and the pad to be tested, and obtains the total resistance of the diode corresponding to the contact resistance of the pad to be tested and the pad to be tested.
Preferably, when the pad at the head end is used as the pad to be tested, the pad at the front end of the pad to be tested is the pad at the tail end.
Preferably, when the pad at the tail end is used as the pad to be tested, the next pad of the pad to be tested is the head end pad.
Preferably, when the former pad of the pad at the tail end is used as the pad to be tested, the latter pad of the latter pad to be tested is the head end pad.
Preferably, the calculation formula for obtaining the resistance value of the diode corresponding to the pad to be tested by the processing module is as follows:
R＝(DeltaVA-DeltaVB)/(IdA-IdB)
Wherein R represents a diode corresponding to the pad to be tested; deltaVA denotes the difference between the voltages measured by the pad to be measured and the pad to be measured when the first positive current IdA is applied to the pad to be measured; deltaVB denotes the difference between the voltages measured by the pad to be measured and the pad to be measured after the second positive current IdB is applied to the pad to be measured.
Preferably, the calculation formula for obtaining the total resistance of the diode corresponding to the pad to be tested and the pad to be tested by the processing module is as follows:
R+Rpad＝(DeltaVPA-DeltaVB)/(IdA-IdB)
Wherein Rpad represents the pad contact resistance to be measured; deltaVPA denotes a difference between voltages measured at the pad to be measured and a subsequent pad of the pad to be measured by applying a first positive current IdA to the pad to be measured; deltaVPB denotes the difference between the voltages measured at the pad to be measured and the subsequent pad of the pad to be measured by applying a second positive current IdB to the pad to be measured.
The embodiment of the specification also provides a probe card contact resistance testing method, which applies a probe card contact resistance testing structure and comprises the following steps:
The structural arrangement steps are as follows: the adjacent gaskets are electrically connected, and the head gasket and the tail gasket are electrically connected; the diodes are respectively arranged between the adjacent gaskets and between the head gasket and the tail gasket; the pad is arranged corresponding to the diode;
a diode resistance value obtaining step: obtaining the resistance value of a diode corresponding to the pad to be tested;
a total resistance value obtaining step: acquiring the total resistance of the diode corresponding to the pad to be tested and the pad to be tested;
A contact resistance acquisition step: and subtracting the resistance value of the diode corresponding to the pad to be tested from the total resistance value.
Preferably, in the step of obtaining the resistance value of the diode, a positive current is applied to a previous pad of the pad to be tested, a next pad of the pad to be tested is grounded, and voltages are measured by the pad to be tested and the next pad of the pad to be tested, so that the resistance value of the diode corresponding to the pad to be tested is obtained;
in the step of obtaining the total resistance, positive current is added to the pad to be measured, the pad to be measured is grounded through the pad to be measured, and voltage is measured through the pad to be measured and the pad to be measured, so that the total resistance of the diode corresponding to the contact resistance of the pad to be measured and the pad to be measured is obtained.
Compared with the prior art, the beneficial effects that above-mentioned at least one technical scheme that this description embodiment adopted can reach include at least:
The application reduces the influence of the probe card on the test accuracy by adding a plurality of diodes and a layout design and a test method matched with the diodes, obtains the contact resistance between the probe card to be tested and the PADs by introducing the diodes between every two PADs (PADs), and monitors the contact resistance between each PAD and the probe card to obtain whether the probe card is abnormal or not.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a test structure in the present application;
FIG. 2 is a schematic diagram of the number of pads used in the present application to highlight the test.
Detailed Description
Embodiments of the present application will be described in detail below with reference to the accompanying drawings.
Other advantages and effects of the present application will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present application with reference to specific examples. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. The application may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present application. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
It is noted that various aspects of the embodiments are described below within the scope of the following claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the present disclosure, one skilled in the art will appreciate that one aspect described herein may be implemented independently of any other aspect, and that two or more of these aspects may be combined in various ways. For example, apparatus may be implemented and/or methods practiced using any number and aspects set forth herein. In addition, such apparatus may be implemented and/or such methods practiced using other structure and/or functionality in addition to one or more of the aspects set forth herein.
It should also be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present application by way of illustration, and only the components related to the present application are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
In addition, in the following description, specific details are provided in order to provide a thorough understanding of the examples. However, it will be understood by those skilled in the art that the present invention may be practiced without these specific details.
In view of this, the applicant has conducted intensive research and improved exploration on probe card contact resistance, as well as on contact resistance testing, and found that: although the probe card used for wafer WAT test is used as consumable material and is maintained regularly, in actual use, contact resistance between the probe and the wafer is increased due to abrasion and contamination of the needle tip, so that the accuracy of the test is affected.
Based on this, the technical solutions provided by the embodiments of the present application are described below with reference to the accompanying drawings.
The embodiment of the specification provides a probe card contact resistance test structure, which comprises a plurality of diodes, a plurality of gaskets and a processing module, as shown in fig. 1 and 2; the adjacent gaskets are electrically connected, and the gaskets at the head end and the tail end are electrically connected; the diodes are respectively arranged between adjacent gaskets and between the head end gasket and the tail end gasket; the pad is disposed corresponding to the diode. Specifically, the number of PADs PAD is not limited, and the PADs are arranged in sequence and connected end to end. For example, 22 diodes are provided, such as a resistor R1 of a first diode, a resistor R2 of a second diode, a resistor R3 of a third diode, a resistor R22 of a twenty-second diode; the number of pads is 22, such as a first Pad1, a second Pad2, a third Pad1, & gtand a twenty-second Pad22. The first pad is used as a head end pad and is also the beginning of an adjacent pad; the twenty-second pad serves as a trailing pad and is also the end of the adjacent pad.
The processing module obtains the resistance value of the diode corresponding to the pad to be detected; the processing module obtains the total resistance of the diode corresponding to the pad to be tested and the pad to be tested; the processing module subtracts the resistance value of the diode corresponding to the pad to be detected from the total resistance value. The pad contact resistance to be measured is the contact resistance between the probe card and the pad to be measured.
In one embodiment, as shown in fig. 1 and 2, a previous pad of the adjacent pads is connected to a positive electrode of a diode between the adjacent pads, and a negative electrode of the diode between the adjacent pads is connected to a subsequent pad of the adjacent pads; the tail end pad is connected with the anode of the diode between the head end pad and the tail end pad, and the cathode of the diode between the head end pad and the tail end pad is connected with the head end pad. The previous pad in the adjacent pads corresponds to the diode between the adjacent pads; the tail pad corresponds to a diode between the head and tail pads.
In an embodiment, as shown in fig. 1 and fig. 2, the processing module applies positive current through a previous pad of the pad to be tested, grounds through a next pad of the pad to be tested, measures voltage through the pad to be tested and the next pad of the pad to be tested, and obtains a resistance value of a diode corresponding to the pad to be tested.
The processing module adds positive current through the pad to be tested, is grounded through the pad to be tested, measures voltage through the pad to be tested and the pad to be tested, and obtains the total resistance of the diode corresponding to the pad to be tested and the contact resistance of the pad to be tested.
In one embodiment, as shown in fig. 1 and 2, when the head end pad is used as the pad to be tested, the previous pad of the pad to be tested is the tail end pad.
In one embodiment, as shown in fig. 1 and 2, when the tail pad is used as the pad to be tested, the next pad of the pad to be tested is the head pad.
In an embodiment, as shown in fig. 1 and 2, when the previous pad of the tail pad is used as the pad to be tested, the next pad of the pad to be tested is the head pad.
In one embodiment, as shown in fig. 1 and fig. 2, the calculation formula for obtaining the resistance value of the diode corresponding to the pad to be tested by the processing module is as follows:
R＝(DeltaVA-DeltaVB)/(IdA-IdB)
Wherein R represents a diode corresponding to the pad to be tested; deltaVA denotes the difference between the voltages measured by the pad to be measured and the pad to be measured when the first positive current IdA is applied to the pad to be measured; deltaVB denotes the difference between the voltages measured by the pad to be measured and the pad to be measured after the second positive current IdB is applied to the pad to be measured.
In one embodiment, as shown in fig. 1 and fig. 2, the calculation formula for obtaining the contact resistance of the pad to be measured and the total resistance of the diode corresponding to the pad to be measured by the processing module is as follows:
R+Rpad＝(DeltaVPA-DeltaVB)/(IdA-IdB)
Wherein Rpad represents the pad contact resistance to be measured; deltaVPA denotes a difference between voltages measured at the pad to be measured and a subsequent pad of the pad to be measured by applying a first positive current IdA to the pad to be measured; deltaVPB denotes the difference between the voltages measured at the pad to be measured and the subsequent pad of the pad to be measured by applying a second positive current IdB to the pad to be measured.
The application reduces the influence of the probe card on the test accuracy by adding a plurality of diodes and a layout design and a test method matched with the diodes, obtains the contact resistance between the probe card to be tested and the PADs by introducing the diodes between every two PADs (PADs), and monitors the contact resistance between each PAD and the probe card to obtain whether the probe card is abnormal or not.
The embodiment of the present disclosure also provides a method for testing contact resistance of a probe card, as shown in fig. 1 and fig. 2, by applying a structure for testing contact resistance of a probe card, including the following steps:
The structural arrangement steps are as follows: the adjacent gaskets are electrically connected, and the gaskets at the head end and the tail end are electrically connected; the diodes are respectively arranged between adjacent gaskets and between the head end gasket and the tail end gasket; the pad is disposed corresponding to the diode.
A diode resistance value obtaining step: and obtaining the resistance value of the diode corresponding to the pad to be tested.
A total resistance value obtaining step: and obtaining the total resistance of the diode corresponding to the pad to be tested and the contact resistance of the pad to be tested.
A contact resistance acquisition step: subtracting the resistance value of the diode corresponding to the pad to be tested from the total resistance value.
In an embodiment, in the step of obtaining the resistance value of the diode, a positive current is applied to a previous pad of the pad to be tested, a next pad of the pad to be tested is grounded, and voltages are measured by the pad to be tested and the next pad of the pad to be tested, so as to obtain the resistance value of the diode corresponding to the pad to be tested.
In the total resistance value obtaining step, positive current is added to the pad to be measured, the pad to be measured is grounded through the pad to be measured, and voltage is measured through the pad to be measured and the pad to be measured, so that the total resistance value of the diode corresponding to the contact resistance of the pad to be measured and the pad to be measured is obtained.
In one embodiment, as shown in fig. 1, R2 … … R20, R21, R22 are introduced diodes, and the corresponding diode R of the pad to be tested is one of them.
Specifically, for Rpad a test is performed, rpad a is the contact resistance between the probe card and the pad to be tested, and the specific steps are as follows:
a) When the Pad22 is positive current and the Pad3 is grounded, the voltage measured by the Pad1 is V1, the voltage measured by the Pad2 is V2, and the formula one obtained by measuring the first positive current IdA and the second positive current IdB twice is:
R1＝(DeltaV1V2A-DeltaV1V2B)/(IdA-IdB)
wherein DeltaV1V2A is the difference between the voltage measured at the first measurement (IdA) of Pad1 and the voltage measured at the Pad 2; deltaV1V2B is the difference between the voltage of the second measurement (IdB) of the Pad1 amount and the voltage of the Pad2 amount.
B) When Pad1 is plus positive current and Pad3 is grounded, the voltage measured by Pad1 is V1P, the voltage measured by Pad2 is V2P, and the formula II is obtained by two measurements (IdA and IdB):
R1+Rpad1＝(DeltaV1PV2PA-DeltaV1PV2PB)/(IdA-IdB)
wherein DeltaV1PV2PA is the difference between the voltage measured at the first measurement (IdA) of Pad1 and the voltage measured at the Pad 2; deltaV1PV2PB is the difference between the voltage of the second measurement (IdB) of the Pad1 amount and the voltage of the Pad2 amount.
C) Subtracting equation one from equation two yields:
Rpad1＝(DeltaV1PV2PA-DeltaV1PV2PB)/(IdA-IdB)-(DeltaV1V2A-DeltaV1V2B)/(IdA-IdB)
Through the above steps, the contact resistance Rpad1 between the PAD and the probe card can be calculated.
The contact resistance of each PAD with the probe card is similarly obtained.
Through the structure and the test, the contact resistance of each PAD and the probe card can be obtained, the state of the probe card can be known in real time, and the accuracy of wafer test is ensured.
In this specification, identical and similar parts of the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, the description is relatively simple for the embodiments described later, and reference is made to the description of the foregoing embodiments for relevant points.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the scope of the present application should be included in the present application. Therefore, the protection scope of the application is subject to the protection scope of the claims.
Claims (10)
1. The probe card contact resistance test structure is characterized by comprising a plurality of diodes, a plurality of gaskets and a processing module;
the adjacent gaskets are electrically connected, and the head gasket and the tail gasket are electrically connected;
the diodes are respectively arranged between the adjacent gaskets and between the head gasket and the tail gasket;
the pad is arranged corresponding to the diode;
The processing module acquires the resistance value of the diode corresponding to the pad to be detected;
the processing module obtains the total resistance of the diode corresponding to the pad to be tested and the pad to be tested;
the processing module subtracts the resistance value of the diode corresponding to the pad to be detected from the total resistance value.
2. The probe card contact resistance test structure of claim 1, wherein a previous one of the adjacent pads is connected to a positive electrode of a diode between the adjacent pads, and a negative electrode of the diode between the adjacent pads is connected to a subsequent one of the adjacent pads;
The tail end of the liner is connected with the anode of the diode between the head end and the tail end of the liner, and the cathode of the diode between the head end and the tail end of the liner is connected with the head end of the liner;
a previous one of the adjacent pads corresponds to a diode between the adjacent pads;
The tail end pads correspond to diodes between the head and tail end pads.
3. The probe card contact resistance test structure according to claim 2, wherein the processing module adds positive current through a previous pad of the pad to be tested, grounds through a next pad of the pad to be tested, measures voltage through the pad to be tested and the next pad of the pad to be tested, and obtains a resistance value of the diode corresponding to the pad to be tested;
and the processing module adds positive current through the pad to be tested, is grounded through the pad to be tested and is used for measuring voltage through the pad to be tested and the pad to be tested, and obtains the total resistance of the diode corresponding to the contact resistance of the pad to be tested and the pad to be tested.
4. The probe card contact resistance test structure of claim 2, wherein when the head end pad is used as the pad to be tested, a preceding pad of the pad to be tested is a tail end pad.
5. The probe card contact resistance test structure according to claim 2, wherein when the pad at the tail end is used as the pad to be tested, the pad at the next pad to be tested is the head end pad.
6. The probe card contact resistance test structure according to claim 2, wherein when a preceding pad of the pad is used as the pad to be tested, a subsequent pad of the pad to be tested is the head pad.
7. The probe card contact resistance test structure according to claim 3, wherein the calculation formula for obtaining the resistance value of the diode corresponding to the pad to be tested by the processing module is:
R＝(DeltaVA-DeltaVB)/(IdA-IdB)
Wherein R represents a diode corresponding to the pad to be tested; deltaVA denotes the difference between the voltages measured by the pad to be measured and the pad to be measured when the first positive current IdA is applied to the pad to be measured; deltaVB denotes the difference between the voltages measured by the pad to be measured and the pad to be measured after the second positive current IdB is applied to the pad to be measured.
8. The probe card contact resistance test structure according to claim 3, wherein the calculation formula for obtaining the total resistance of the diode corresponding to the pad to be tested and the pad to be tested by the processing module is as follows:
R+Rpad＝(DeltaVPA-DeltaVB)/(IdA-IdB)
Wherein Rpad represents the pad contact resistance to be measured; deltaVPA denotes a difference between voltages measured at the pad to be measured and a subsequent pad of the pad to be measured by applying a first positive current IdA to the pad to be measured; deltaVPB denotes the difference between the voltages measured at the pad to be measured and the subsequent pad of the pad to be measured by applying a second positive current IdB to the pad to be measured.
9. A method for testing contact resistance of a probe card, characterized in that the structure for testing contact resistance of a probe card according to any one of claims 1 to 8 is applied, comprising the steps of:
The structural arrangement steps are as follows: the adjacent gaskets are electrically connected, and the head gasket and the tail gasket are electrically connected; the diodes are respectively arranged between the adjacent gaskets and between the head gasket and the tail gasket; the pad is arranged corresponding to the diode;
a diode resistance value obtaining step: obtaining the resistance value of a diode corresponding to the pad to be tested;
a total resistance value obtaining step: acquiring the total resistance of the diode corresponding to the pad to be tested and the pad to be tested;
A contact resistance acquisition step: and subtracting the resistance value of the diode corresponding to the pad to be tested from the total resistance value.
10. The method according to claim 9, wherein in the step of obtaining the resistance value of the diode, the positive current is applied to the pad to be tested through the pad before the pad to be tested, the pad to be tested is grounded through the pad after the pad to be tested, and the voltage is measured through the pad to be tested and the pad after the pad to be tested, so as to obtain the resistance value of the diode corresponding to the pad to be tested;
in the step of obtaining the total resistance, positive current is added to the pad to be measured, the pad to be measured is grounded through the pad to be measured, and voltage is measured through the pad to be measured and the pad to be measured, so that the total resistance of the diode corresponding to the contact resistance of the pad to be measured and the pad to be measured is obtained.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410278285.9A CN118130914A (en) | 2024-03-12 | 2024-03-12 | Structure and method for testing contact resistance of probe card |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410278285.9A CN118130914A (en) | 2024-03-12 | 2024-03-12 | Structure and method for testing contact resistance of probe card |
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| CN118130914A true CN118130914A (en) | 2024-06-04 |
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| CN202410278285.9A Pending CN118130914A (en) | 2024-03-12 | 2024-03-12 | Structure and method for testing contact resistance of probe card |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN120044341A (en) * | 2025-04-24 | 2025-05-27 | 杭州广立微电子股份有限公司 | Method and structure for detecting probe card needle point condition, wafer and wafer testing method |
-
2024
- 2024-03-12 CN CN202410278285.9A patent/CN118130914A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN120044341A (en) * | 2025-04-24 | 2025-05-27 | 杭州广立微电子股份有限公司 | Method and structure for detecting probe card needle point condition, wafer and wafer testing method |
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