CN118175725B

CN118175725B - Wafer test printed circuit board and manufacturing method thereof

Info

Publication number: CN118175725B
Application number: CN202410334015.5A
Authority: CN
Inventors: 陈为华; 曾霖飞; 王艳梅
Original assignee: Paltech Precise Electronic Co ltd
Current assignee: Paltech Precise Electronic Co ltd
Priority date: 2024-03-22
Filing date: 2024-03-22
Publication date: 2024-08-30
Anticipated expiration: 2044-03-22
Also published as: CN118175725A

Abstract

The invention relates to a wafer test printed circuit board and a manufacturing method thereof, which belong to the technical field of printed circuit boards and comprise a circuit board body, wherein the circuit board body comprises a plurality of contact points and a plurality of test circuit modules, the contact points are detachably connected with probes, the contact points are used for being communicated with a wafer to be tested through the probes, the test circuit modules are respectively and electrically connected with the contact points, any one of the contact points comprises a plurality of sockets, one of the sockets is used for being detachably connected with the probes, the sockets are mutually connected in parallel, any one of the sockets is open-circuited, and any one of the test circuit modules is communicated with the wafer to be tested through the socket to form a passage; the method can complete the position change of the single probe when the probe position needs to be changed, and reduce the workload of adjustment and the probability of probe damage when the wafer circuit structure changes.

Description

Wafer test printed circuit board and manufacturing method thereof

Technical Field

The invention belongs to the technical field of printed circuit boards, and particularly relates to a wafer test printed circuit board and a manufacturing method thereof.

Background

The printed circuit board is a key electronic interconnection element of an electronic product, and is applied to various fields in production, for example, when a chip wafer is manufactured, unpackaged chips distributed on the chip wafer need to be tested, and at the moment, a special printed circuit board is needed to serve as a wafer test board to test the wafer.

In a general wafer production and testing process, a circuit structure on the wafer changes along with the change of process and target requirements, when the position of a bare DIE changes when the structure of the circuit of the wafer changes, a probe needs to synchronously change along with the position of the bare DIE, so that the probe can be contacted with the bare DIE after the position is changed and complete the test, therefore, a test area of a probe card needs to be enlarged, and a general solution, for example, a probe card and a wafer testing system disclosed in chinese patent CN113484561a, the probe card comprises: a PCB board; the ceramic substrate is arranged on the PCB; the probe head is arranged on the ceramic substrate and comprises a guide plate, and a plurality of evenly distributed probes are arranged on the guide plate; the PCB board and the ceramic substrate are provided with the plugboard therebetween, the plugboard is provided with a plurality of spring pins penetrating through the plugboard, two ends of each spring pin are fixedly connected with the PCB board and the ceramic substrate respectively, the flatness of the tip of each probe can be guaranteed while the test area is enlarged, so that the testing of the wafer is facilitated, however, in the scheme, the mode of enlarging the test area is mainly through reducing the requirement on the flatness, the arrangement points of the probes can be increased on the premise of meeting the flatness range, or more probes can be simultaneously contacted with the wafer to be tested, however, when the position of the bare DIE to be tested on the wafer to be tested is changed to be not contacted with any probe at present, the test can be completed only by changing the whole probe card, so that the test efficiency is lower, meanwhile, the probe structure of the probe card is more precise, the whole probe card is frequently changed and the whole probe card is damaged, and when the parts are changed into the single probes, the probability of the whole probe card is lower, and meanwhile, the work efficiency is higher, and the circuit can be manufactured by the method.

Disclosure of Invention

In order to solve the problems in the prior art, the invention provides a wafer test printed circuit board and a manufacturing method thereof, and the wafer test printed circuit board has the characteristic of replaceable probe positions.

The aim of the invention can be achieved by the following technical scheme:

The wafer test printed circuit board comprises a circuit board body, wherein the circuit board body comprises a plurality of contact points and a plurality of test circuit modules, the contact points are detachably connected with probes, the contact points are used for being communicated with a wafer to be tested through the probes, and the test circuit modules are respectively and electrically connected with the contact points;

Any contact point comprises a plurality of sockets, one of the sockets is used for being detachably connected with a probe, the sockets are mutually connected in parallel, any socket is open-circuited, and any test circuit module is communicated with a wafer to be tested through the socket to form a passage.

As a preferable technical scheme of the invention, the circuit board body comprises a plurality of circuit layers, a plurality of test circuit modules are respectively arranged in the circuit layers, an insulating layer is arranged between any two adjacent circuit layers, an electromagnetic shielding layer is arranged in any one insulating layer, and any electromagnetic shielding layer is composed of a metal shielding plate.

As a preferable technical scheme of the invention, any one of the insulating layers is composed of prepreg.

As a preferable technical scheme of the invention, the insulating layer is provided with buffer layers in cooperation with the electromagnetic shielding layer, any one of the electromagnetic shielding layers is correspondingly provided with two buffer layers, the two buffer layers are respectively and adjacently arranged on the upper surface and the lower surface of the corresponding electromagnetic shielding layer, and the two buffer layers are overlapped with the corresponding electromagnetic shielding layer in the direction vertical to the circuit board body.

As a preferable technical scheme of the invention, the relation between the thickness H of the buffer layer and the number of layers of the core plate layer of the circuit board body is as follows:

H=c×f(x)，f(x)=log(x)+1；

Wherein x is the number of layers of the core plate layer in the circuit board body, and the correction coefficient c is a preset constant.

As a preferable technical scheme of the invention, any one of the sockets is provided with a socket which is used for being detachably connected with the probe.

As a preferable technical scheme of the invention, any one of the socket bottoms is provided with an insulating sheet.

The invention also provides a manufacturing method of the wafer test printed circuit board, which comprises the following steps:

Step one: cleaning the core plate layer, covering a photosensitive film on the core plate layer, curing and cleaning the photosensitive film, and etching the part which is not covered by the photosensitive film;

Step two: placing an electromagnetic shielding layer on the surface of one prepreg, attaching the other prepreg to the other side of the electromagnetic shielding layer, completing the assembly of one insulating layer, and repeating the steps to assemble a plurality of insulating layers;

step three: punching positioning holes on the core plate layer, and respectively covering insulating layers on two sides of the core plate layer;

Step four: cleaning two core plate layers, covering photosensitive films on the two core plate layers, curing and cleaning the photosensitive films of the two core plate layers, and etching the parts of the two core plate layers which are not covered by the photosensitive films;

step five: respectively placing the etched two core plate layers on the surfaces of the two insulating layers placed in the third step;

Step six: punching positioning holes on the two core plate layers, and placing the surfaces of the two core plate layers to cover the insulating layer in the fifth step;

step seven: repeating the step five to the step six until the number of the core plate layers reaches a set value;

step eight: and respectively covering the two surfaces of the two core plate layers of the outermost layer with surface prepregs, arranging copper foils on the surface prepregs, etching the copper foils, and forming through a hot press.

The beneficial effects of the invention are as follows:

(1) By arranging the sockets which are usually in the open circuit state in each test circuit module and connecting each contact point with a plurality of sockets in parallel, the position change of a single probe can be finished by detaching the probe from the original socket and installing the probe at a new socket when the position of the probe needs to be changed, a new test loop can still be formed after the position of the probe is changed, the test is finished, and the adjustment workload and the probe damage probability are reduced when the circuit structure of the wafer is changed;

(2) By arranging the electromagnetic shielding layer in the insulating layer, the probability that the magnetic field generated by the test circuit module affects other test circuit modules is reduced, and the test accuracy is improved;

(3) By arranging the buffer layer, when the electromagnetic shielding layer deforms and has a tendency of extruding other parts of the circuit board, the buffer layer is matched with the deformed electromagnetic shielding layer to twist, so that the influence of the electromagnetic shielding layer on the whole circuit board is reduced;

(4) The thickness of the buffer layer is increased along with the increase of the number of layers of the core lifting layer in the circuit board body, the frequency of current flowing in the circuit board is higher when the number of layers of the circuit board is larger, the probability and the degree of deformation of the electromagnetic shielding layer are larger, when the thicker buffer layer is needed to reduce the influence of the deformation of the electromagnetic shielding layer to a greater extent, the thickness of the buffer layer is synchronously increased, the influence of the deformation of the electromagnetic shielding layer is reduced to a greater extent, and the thickness of the buffer layer is reduced when the probability and the degree of the deformation of the electromagnetic shielding layer are smaller, so that the influence on the structural strength is reduced;

(5) Meanwhile, the relation between the thickness H of the buffer layer and the number x of the insulating layers of the circuit board body is set to be H=D×c×f (x), f (x) =log (x) +1, so that the output value lifting rate of f (x) is gradually reduced along with the increase of the number x of the core board layers, the thickness of the buffer layer is still smaller when more core board layers are arranged, and the condition that the strength of the circuit board structure is influenced when the number x of the circuit board is higher and the buffer layer is too thick is avoided.

Drawings

The present invention is further described below with reference to the accompanying drawings for the convenience of understanding by those skilled in the art.

FIG. 1 is a schematic view of a partial cross-sectional structure of the present invention;

FIG. 2 is a schematic diagram of a circuit structure in which a test circuit module is connected to a wafer to be tested through probes;

fig. 3 is a schematic circuit structure of the probe of fig. 2 connected to a wafer to be tested after the probe is replaced by a socket.

Description of main reference numerals:

In the figure: 1. a circuit board body; 11. a core plate layer; 12. an insulating layer; 13. a test circuit module; 14. an electromagnetic shielding layer; 15. a contact point; 16. a socket; 17. a probe; 2. and testing the wafer.

Detailed Description

In order to further describe the technical means and effects adopted by the invention for achieving the preset aim, the following detailed description is given below of the specific implementation, structure, characteristics and effects according to the invention with reference to the attached drawings and the preferred embodiment.

Referring to fig. 1-3, a wafer test printed circuit board includes a circuit board body 1, the circuit board body 1 includes a plurality of contact points 15 and a plurality of test circuit modules 13, the plurality of contact points 15 are detachably connected with probes 17, the plurality of contact points 15 are used for communicating with a wafer 2 to be tested through the probes 17, and the plurality of test circuit modules 13 are respectively electrically connected with the plurality of contact points 15;

In this embodiment, each test circuit module 13 is a test circuit independent of other test circuit modules 13, the test circuit is formed by etching on a printed circuit board, since a plurality of bare DIE to be tested are formed on the wafer 2 to be tested, a plurality of probes 17 are required to be arranged corresponding to the plurality of bare DIE, each probe 17 is connected with one test circuit module 13, each probe 17 is used for being in touch connection with one bare DIE, when in use, the wafer 2 to be tested is placed on a test bench of test equipment, then a probe board comprising a circuit board body 1, a plurality of probes 17 and other components is used, the probes 17 are driven by the test equipment to be in contact with the wafer 2 to be tested, after the probes 17 are in touch with the bare DIE, the probes 17, the test circuit modules 13 and the bare DIE form a passage, at this time, a control module of the probe board sends a test signal to the circuit board body 1, the test signal flows in a loop comprising the bare DIE of the wafer 2 to be tested, and then sends a feedback signal to the control module, and the control module judges whether the wafer 2 to be tested and the bare DIE 2 reach the standard or not according to the feedback signal;

In the above process, in the general wafer production and test process, the circuit structure on the wafer changes along with the process and the change of the target requirement, when the circuit of the wafer drives the bare DIE to change in structure, the probe 17 needs to change synchronously with the position of the bare DIE, so that the probe 17 can be in contact with the bare DIE with the changed position, the test area of the probe card needs to be enlarged, when the probe 17 is only installed at a fixed plurality of points, the probe board needs to be detached from the test equipment, and the probe board with the position meeting the requirement of the probe 17 is installed on the test equipment, the efficiency is low, and the probe 17 on the probe board is damaged with high probability, therefore, each contact point 15 comprises a plurality of sockets 16, one of the sockets 16 is used for being detachably connected with the probe 17, the sockets 16 corresponding to each contact point 15 are mutually connected in parallel, each socket 16 is a circuit breaking module 13 is communicated with the wafer 2 to be tested through the sockets 16, and a path is formed;

Specifically, in this embodiment, each test circuit module 13 corresponds to one contact point 15, each contact point 15 corresponds to three sockets 16, specifically, a section of a path in each test circuit module 13 is selected to be provided with a circuit break, two ends of the circuit break extend to the surface of the circuit board body 1, the two ends are used as the contact points 15, then, three sockets 16 are provided on the surface of the circuit board body 1 corresponding to each contact point 15, two ends of each socket 16 are respectively electrically connected with two ends of the contact point 15, a breakpoint is formed between two ends of each socket 16, at this time, the three sockets 16 are connected in parallel, each socket 16 is a circuit break, a probe 17 is mounted on the socket 16 in a snap-fit manner, after the mounting, two ends of the probe 17 are respectively connected with two ends of the breakpoint of the socket 16, at this time, two ends of each test circuit module 13 are respectively connected with one end of the probe 17, and after the two ends of the probe 17 are connected, the test circuit module 13 forms a path;

For the contact point 15, specifically, since the contact point is arranged on the surface of the circuit board body 1, the test circuit module 13 is arranged in the circuit board body 1, in order to connect the contact point and the test circuit module 13, the circuit board body 1 is provided with a through hole perpendicular to the circuit board body, the inner wall of the through hole is plated with a copper layer, and the test circuit module 13 and the contact point are respectively connected with the copper layer to complete the connection of the contact point and the test circuit body;

for the sockets 16, specifically, any socket 16 is provided with a socket for detachably connecting with the probe 17, the buckle structure is arranged at the socket, and the probe 17 is mounted on the socket in a buckle manner so as to be connected with the socket 16;

during testing, a plurality of probes 17 are respectively mounted on one socket 16 corresponding to a plurality of contact points 15, the testing equipment drives the probe plate and the probes 17 on the probe plate to downwards probe until the probes 17 are contacted with bare DIE on the wafer 2 to be tested, the testing circuit module 13 is communicated with the wafer 2 to be tested through the sockets 16, the wafer 2 to be tested enables two ends of the probes 17 to be communicated, and a circuit to be tested forms a loop;

When the circuit of the test wafer changes, and the position of the probe 17 of the probe card needs to be changed, so that when the probe 17 can be contacted with the changed circuit, an operator pulls the probe 17 with the position required to be changed out of the current socket 16 and inserts the probe 17 into the socket 16 corresponding to the target position, at the moment, since the sockets 16 are connected in parallel, after the probe 17 is contacted with the wafer 2 to be tested, the test circuit module 13 is communicated with the new socket 16 to form a loop, and the replacement of the position of the probe 17 is completed;

By providing sockets 16 in a normally open state in each test circuit module 13 and connecting each contact point 15 in parallel with a plurality of sockets 16, it is ensured that when the position of the probe 17 needs to be changed, the position of a single probe 17 can be changed by detaching the probe 17 from the original socket 16 and installing the probe 17 at a new socket 16, and a new test circuit can be still formed after the position of the probe 17 is changed, so that the test is completed, and the adjustment workload and the damage probability of the probe 17 are reduced when the wafer circuit structure is changed.

For the circuit board body 1, specifically, the circuit board body 1 includes a plurality of circuit layers, an insulating layer 12 is disposed between any two adjacent circuit layers, a plurality of test circuit modules 13 are respectively disposed on the plurality of circuit layers, specifically, the circuit board body 1 includes a core plate layer 11, and a plurality of insulating layers 12 and a plurality of core plate layers 11 which are symmetrically and alternately stacked along both side surfaces of the core plate layer 11, the top and bottom surfaces of the circuit board body 1 are provided with the core plate layer 11, specifically, in this embodiment, three core plate layers 11 and four insulating layers 12 are provided in total, three core plate layers and 11 four insulating layers 12 are parallel to each other and have equal areas, at this time, one core plate layer 11 is used as a central core plate, a plurality of test circuit modules 13 are formed on both side surfaces of the core plate layer 11 by etching, then a piece of insulating layer 12 is respectively disposed on the upper surface and the lower surface of the core plate layer 11 in an attaching manner, the two insulating layers 12 are parallel to the core layer 11 and coincide in the direction perpendicular to the circuit board body 1, the two insulating layers 12 are each composed of prepreg, at this time, the two insulating layers 12 are entirely covered on the surface of the core layer 11, then, two core layer 11 formed with a plurality of test circuit modules 13 by etching are attached to the surfaces of the two insulating layers 12, and then, the two insulating layers 12 are arranged on the surfaces of the two core layer 11, at this time, the three core layer 11 and the four insulating layers 12 are symmetrically and alternately stacked along the surfaces of both sides of the central core layer 11 to form the circuit board body 1, and a plurality of test circuit modules 13 on the surfaces of the three core layer 11 are arranged on each circuit layer of the circuit board body 1, at the same time, specifically, sockets 16 corresponding to the plurality of test circuit modules 13 are arranged on the surface of the circuit board, the plurality of test circuit modules 13 are connected with the socket 16 through holes vertically opened in the vertical through holes.

In the above structure, in order to set up several probes 17, some test circuit modules 13 often need to overlap in the vertical direction, however, when the current changes in the operation process of the test circuit module 13, there is a probability that a magnetic field is generated above and below itself, which interferes with other test circuit modules 13, and reduces the accuracy of the test result, meanwhile, in the above structure, the arrangement of several sockets 16 makes that, with the change of the mounting position of the probes 17, the current may flow into the test circuit module 13 from multiple angles, the probability that the magnetic field is generated and affects other test circuit modules 13 further increases, in order to avoid such a situation, any one of the insulating layers 12 is provided with an electromagnetic shielding layer 14, and any one of the electromagnetic shielding layers 14 is formed by a metal shielding plate;

Specifically, in the production process of the circuit board body 1, for each insulating layer 12, placing an electromagnetic shielding layer 14 on the surface of one prepreg, attaching the other prepreg to the side of the prepreg on which the electromagnetic shielding layer 14 is placed, and completing the assembly of one insulating layer 12, wherein at this time, for each insulating layer 12, the electromagnetic shielding layer 14 is formed therein, and when the test circuit module 13 of a certain circuit layer generates a magnetic field, and there is a tendency to affect other test circuit modules 13, the magnetic field is intercepted by the electromagnetic shielding layer 14;

By arranging the electromagnetic shielding layer 14 in the insulating layer 12, the probability that the magnetic field generated by the test circuit module 13 affects other test circuit modules 13 is reduced, and the test accuracy is improved.

In the above structure, the electromagnetic shielding layer 14 is provided to reduce the influence of the magnetic field, however, the material of the electromagnetic shielding layer 14 is metal, the thermal expansion coefficient of the metal material is different from that of the insulating layer 12 made of the organic material, and the elasticity is lower, and for the circuit board body 1, long-term high-frequency use is required, when the test circuit module 13 generates electric heat under the electric heating effect in use, when the electric heating of the plurality of test circuit modules 13 acts on the electromagnetic shielding layer 14 in the insulating layer 12, the electromagnetic shielding layer 14 is likely to deform under the action of thermal expansion and contraction, at this time, the electromagnetic shielding layer 14 is likely to drive the whole circuit board body 1 to deform, and because the probe 17 is installed on the circuit board through the socket 16, when the circuit board body 1 deforms, the probe 17 is driven to change in position, for example, the probe 17 protrudes or is recessed, at this time, when the test equipment drives the probe 17 to be in contact with the wafer 2 to be tested excessively, the wafer or the probe 17 is damaged, the concave probe 17 is likely to be unable to contact with the wafer, in order to reduce the electromagnetic shielding layer 14 on the upper surface of the two layers corresponding to the two buffer layers 14 of the electromagnetic shielding layers of the two buffer layers 14 are arranged vertically, and the buffer layers are corresponding to the two buffer layers of the electromagnetic shielding layers 14 are vertically overlapped;

Specifically, in this embodiment, the buffer layer is made of an elastic insulating material, in the production process of the circuit board body 1, for each insulating layer 12, a buffer layer is placed on the surface of one electromagnetic shielding layer 14, another buffer layer is attached to the zero side of the electromagnetic shielding layer 14, so that the assembly of one electromagnetic shielding layer 14 is completed, then, the insulating layers 12 are placed on two sides of the electromagnetic shielding layer 14, at this time, for each electromagnetic shielding layer 14, the buffer layers are arranged on two sides, and when a certain electromagnetic shielding layer 14 deforms, and when there is a tendency of extruding other parts of the circuit board, the electromagnetic shielding layer 14 after the buffer layers match the deformation is distorted, so that the influence of the electromagnetic shielding layer 14 on the whole circuit board is reduced;

Through setting up the buffer layer, when electromagnetic shield layer 14 produces deformation, has the trend of extrusion circuit board other parts, the electromagnetic shield layer 14 after the buffer layer cooperation deformation takes place to warp, reduces electromagnetic shield layer 14 to the holistic influence of circuit board.

In the above structure, since the structural material of the buffer layer is different from the insulating layer 12, and the buffer layer has elasticity for absorbing the deformation of the electromagnetic shielding layer 14, when the buffer layer is thicker, the influence on the overall structural strength of the circuit board is more likely, and for thicker circuit boards, the more the number of circuit boards is, the more complex the function is, the higher the wafer test task is born, the higher the frequency of the current is, the larger the generated heat is, the probability and the degree of deformation of the electromagnetic shielding layer 14 are larger, the thicker buffer layer is required to reduce the influence of the deformation of the electromagnetic shielding layer 14 to a larger extent, and in order to ensure the deformation absorption effect on the electromagnetic shielding layer 14 without influencing the structural strength, the relation between the thickness H of the buffer layer and the number of layers of the insulating layer 12 of the circuit board body 1 is:

H=c×f(x)，f(x)=log(x)+1；

Wherein x is the number of layers of the core layer 11 in the circuit board body 1, and the correction coefficient c is a preset constant, and represents a specific correspondence between the output value and the thickness of the buffer layer after f (x) outputs a certain value, for example, when f (x) is required to output 1 by a worker, H corresponds to 3, and then c=3;

When the value of x is larger, the number of layers of the core plate layer 11 in the circuit board body 1 is more complex, the more complex the function is, the more complex the wafer test task is, the higher the frequency of current flowing is, the more the number of all the test circuit modules 13 of the whole circuit board body 1 is, the larger the generated heat is, a thicker buffer layer is needed to reduce the influence of the deformation of the electromagnetic shielding layer 14 to a greater extent, the output value of f (x) is increased along with the increase of x, and then the value of h=c×f (x) is also increased along with the value of f (x), so that the increase of the thickness of the buffer layer when the number of layers of the core plate layer 11 and the circuit layer is higher is completed, when the value of x is smaller, the number of layers of the core plate layer 11 in the circuit board body 1 is smaller, the heat generated by the whole circuit board body 1 is less, the thickness of the circuit board is required to be reduced, the influence of the structural strength of the insulating layer 12 is required to be reduced, and the output value of f (x) is reduced along with the reduction of x, and then the value of h=c×f (x) is also reduced along with the reduction of the value of f (x) and the thickness of the core plate layer is reduced along with the reduction of the value of x, so that the thickness of the core plate layer 11 is reduced;

meanwhile, the image of f (x) =log (x) +1 shows that as the number x of the core plate layers 11 is increased, the output value lifting rate of f (x) is gradually reduced, and the thickness of the buffer layer is still smaller when more core plate layers 11 are arranged, so that the condition that the strength of the circuit board structure is influenced when the number of circuit layers is higher and the buffer layer is too thick is avoided;

By increasing the thickness of the buffer layer along with the increase of the number of layers of the core plate layer 11 in the circuit board body 1, the higher the number of layers of the circuit board is, the higher the frequency of current flowing is, the larger the generated heat is, the probability and the degree of deformation of the electromagnetic shielding layer 14 are, when the thicker buffer layer is needed to reduce the influence of the deformation of the electromagnetic shielding layer 14 to a greater extent, the thickness of the buffer layer is synchronously increased, the influence of the deformation of the electromagnetic shielding layer 14 is reduced to a greater extent, and the thickness of the buffer layer is reduced to reduce the influence on the structural strength when the probability and the degree of the deformation of the electromagnetic shielding layer 14 are smaller;

Meanwhile, the relation between the thickness H of the buffer layer and the number x of the insulating layers 12 of the circuit board body 1 is set to be H=D×c×f (x), f (x) =log (x) +1, so that the output value lifting rate of f (x) is gradually reduced along with the increase of the number x of the core board layers 11, the thickness of the buffer layer is still smaller when more core board layers 11 exist, and the condition that the strength of the circuit board structure is influenced when the number of circuit layers is higher and the buffer layer is too thick is avoided;

To prevent the probe 17 from leaking electricity from the sockets, which affects the circuit board body 1, an insulating sheet is provided at the bottom of any socket, and prevents the leakage current from entering the circuit board body 1 when the leakage current of the probe 17 passes through the insulating layer 12.

The working principle and the using flow of the invention are as follows:

Placing the wafer 2 to be tested on a test bench of test equipment, then, a probe board comprising a circuit board body 1, a plurality of probes 17 and other components is driven by the test equipment to be detected until the probes 17 are contacted with the wafer 2 to be tested, after the probes 17 are contacted with the bare DIE, the probes 17, the test circuit module 13 and the bare DIE form a passage, at the moment, a control module of the probe board sends a test signal to the circuit board body 1, the test signal flows in a loop comprising the bare DIE of the wafer 2 to be tested and then sends a feedback new number to the control module, and the control module judges whether the wafer 2 to be tested and the bare DIE on the wafer 2 to be tested reach the standard according to the feedback signal;

When the circuit of the test wafer changes, and the position of the probe 17 of the probe card needs to be changed, so as to ensure that the probe 17 can be contacted with the changed circuit, an operator pulls the probe 17 with the position required to be changed out of the current socket 16 and inserts the probe 17 into the socket 16 corresponding to the target position, at this time, since the sockets 16 are connected in parallel, after the probe 17 is contacted with the wafer 2 to be tested, the test circuit module 13 is communicated with the new socket 16 to form a loop, and the replacement of the position of the probe 17 is completed.

Step one: cleaning the core plate layer 11, covering a photosensitive film on the core plate layer 11, curing and cleaning the photosensitive film, and etching the part not covered by the photosensitive film;

Step two: placing an electromagnetic shielding layer 14 on the surface of one prepreg, attaching the other prepreg to the other side of the electromagnetic shielding layer 14, completing the assembly of one insulating layer 12, and repeating the above steps to assemble a plurality of insulating layers 12;

Step three: punching positioning holes on the core plate layer 11, and respectively covering insulating layers 12 on two sides of the core plate layer 11;

step four: cleaning the two core plate layers 11, covering photosensitive films on the two core plate layers 11, curing and cleaning the photosensitive films of the two core plate layers 11, and etching the parts of the two core plate layers 11 which are not covered by the photosensitive films;

step five: respectively placing the etched two core plate layers 11 on the surfaces of the two insulating layers 12 placed in the third step;

Step six: punching positioning holes on the two core plate layers 11, and placing the surfaces of the two core plate layers 11 to cover the insulating layer 12 in the fifth step;

Step seven: repeating the step five to the step six until the number of the layers of the core plate layer 11 reaches a set value;

step eight: the two surfaces of the two core plate layers 11 of the outermost layer are respectively covered with surface prepregs, copper foils are arranged on the surface prepregs, and after the copper foils are etched, the copper foils are molded by a hot press.

The present invention is not limited in any way by the above-described preferred embodiments, but is not limited to the above-described preferred embodiments, and any person skilled in the art will appreciate that the present invention can be embodied in the form of a program for carrying out the method of the present invention, while the above disclosure is directed to equivalent embodiments capable of being modified or altered in some ways, it is apparent that any modifications, equivalent variations and alterations made to the above embodiments according to the technical principles of the present invention fall within the scope of the present invention.

Claims

1. The wafer test printed circuit board is characterized in that: the circuit board comprises a circuit board body, wherein the circuit board body comprises a plurality of contact points and a plurality of test circuit modules, the contact points are detachably connected with probes, the contact points are used for being communicated with a wafer to be tested through the probes, and the test circuit modules are respectively and electrically connected with the contact points;

Any contact point comprises a plurality of sockets, one of the sockets is used for being detachably connected with a probe, the sockets are mutually connected in parallel, any socket is open, and any test circuit module is communicated with a wafer to be tested through the socket to form a passage;

The probe is detached from the original socket and is installed at a new socket, so that the position of a single probe is changed, a new test loop is still formed after the position of the probe is changed, and the test is finished;

the manufacturing of the wafer test printed circuit board comprises the following steps:

Step two: placing an electromagnetic shielding layer on the surface of one prepreg, attaching the other prepreg to the other side of the electromagnetic shielding layer, completing the assembly of a layer structure, and repeating the steps to assemble a plurality of layer structures;

step three: punching positioning holes on the core plate layer, and respectively covering the cover layer structures on two sides of the core plate layer;

Step five: respectively placing the etched two core plate layers on the surfaces of the two layers of structures placed in the third step;

step six: punching positioning holes on the two core plate layers, and placing a cover layer structure on the surfaces of the two core plate layers in the fifth step;

Step eight: respectively covering the two surfaces of the two core plate layers of the outermost layer with surface prepregs, arranging copper foils on the surface prepregs, etching the copper foils, and forming through a hot press;

The layer structure is provided with the buffer layer in cooperation with the electromagnetic shielding layer, any one of the electromagnetic shielding layers is correspondingly provided with two buffer layers, the two buffer layers are respectively attached to the upper surface and the lower surface of the corresponding electromagnetic shielding layer, and the two buffer layers are overlapped with the corresponding electromagnetic shielding layer in the direction perpendicular to the circuit board body.

2. The wafer test printed circuit board of claim 1, wherein: the circuit board body comprises a plurality of circuit layers, a plurality of test circuit modules are respectively arranged in the circuit layers, a layer structure is arranged between any two adjacent circuit layers, an electromagnetic shielding layer is arranged in any one layer structure, and any electromagnetic shielding layer is composed of a metal shielding plate.

3. The wafer test printed circuit board of claim 1, wherein: any one of the sockets is provided with a socket which is used for being detachably connected with a probe.

4. A wafer test printed circuit board according to claim 3, wherein: an insulating sheet is arranged at the bottom of any socket.