CN118262029B - Rendering subdivision method, electronic device, storage medium and computer program product - Google Patents

Abstract

The embodiment of the present application discloses a rendering subdivision method, an electronic device, a storage medium and a computer program product. The rendering subdivision method includes: obtaining a first table; each row in the first table contains a first feature of an output variable in a first subdivision control shader TCS and first storage address information of the output variable; obtaining a second table; each row in the second table contains a second feature of an input variable in a first subdivision evaluation shader TES and second storage address information of a storage location allocated for the input variable; matching the first feature of the first table with the second feature of the second table, storing the first storage address information of each output variable in the first table to the storage location indicated by the second storage address information of the input variable matching each output variable in the second table.

Description

Rendering subdivision method, electronic device, storage medium and computer program product

Technical Field

The embodiments of the present application relate to the field of graphics rendering technology, and in particular to a rendering subdivision method, an electronic device, a storage medium, and a computer program product.

Background Art

With the development of graphics rendering technology, tessellation has become an important part of the graphics rendering pipeline run by the GPU (Graphics Processing Unit). It can decompose the input target primitives into smaller primitives, thereby providing more sophisticated geometric transformations. However, as people's requirements for rendering tessellation continue to increase, there are many aspects of tessellation that can be improved.

Summary of the invention

According to one aspect of an embodiment of the present application, a rendering subdivision method is provided, including: obtaining a first table; each row in the first table contains a first feature of an output variable in a first subdivision control shader TCS and first storage address information of the output variable; obtaining a second table; each row in the second table contains a second feature of an input variable in a first subdivision evaluation shader TES and second storage address information of a storage location assigned to the input variable; based on matching the first feature of the first table and the second feature of the second table, the first storage address information of each output variable in the first table is stored in the storage location indicated by the second storage address information of the input variable matching each output variable in the second table.

In the above scheme, the matching based on the first feature of the first table and the second feature of the second table, storing the first storage address information of each output variable in the first table to the storage location indicated by the second storage address information of the input variable matching each output variable in the second table, includes: comparing the first feature of the target output variable in the first table with the second feature of each input variable in the second table; in response to the existence of the second feature of the target input variable in the second table being the same as the first feature of the target output variable, storing the first storage address information of the target output variable to the storage location indicated by the second storage address information of the target input variable; wherein, the target output variable is any output variable in the first table; and the target input variable is an input variable matching the target output variable in the second table.

In the above scheme, the method further includes: in response to the second table not containing the second feature of the input variable that is the same as the first feature of the target output variable, outputting indication information; the indication information is used to indicate a matching failure.

In the above scheme, obtaining the first table includes: loading the stored first table, or running a first TCS to obtain the first table; obtaining the second table includes: loading the stored second table, or running a first TES to obtain the second table.

In the above solution, the method further includes: obtaining the first table and generating a first instruction; the first instruction is used to store the corresponding output variable based on the first storage address information in the first table.

In the above scheme, the method also includes: obtaining the second table and generating a second instruction; the second instruction is used to read the corresponding first storage address information based on the second storage address information in the second table, and read the corresponding output variable based on the corresponding first storage address information; the corresponding output variable is used as an input variable of the first TES.

In the above scheme, the method also includes: obtaining a third table; each row in the third table contains a third feature of an input variable in the second TES and third storage address information of a storage location assigned to the input variable; based on matching the first feature of the first table and the third feature of the third table, the first storage address information of each output variable in the first table is stored in the storage location indicated by the third storage address information of the input variable matching each output variable in the third table.

In the above scheme, the method also includes: obtaining a fourth table; each row in the fourth table contains a fourth feature of an output variable in the second TCS and fourth storage address information of the output variable; based on matching the fourth feature of the fourth table and the second feature of the second table, the fourth storage address information of each output variable in the fourth table is stored in the storage location indicated by the second storage address information of the input variable matching each output variable in the second table.

In the above solution, the first feature is the name of the output variable; the second feature is the name of the input variable.

In the above scheme, the first storage address information is used to indicate the storage location of the output variable in the video memory of the graphics card; the second storage address information is used to indicate the location of the buffer Buffer allocated for the input variable; wherein the Buffer is located in the video memory or a register in the graphics card.

In the above solution, if the first storage address information and the second storage address information both point to storage locations in the video memory, the first storage address information and the second storage address information point to different storage locations in the video memory.

According to another invention of the embodiment of the present application, an electronic device is provided, including: a graphics processing unit GPU; the GPU is configured to: obtain a first table; each row in the first table contains a first feature of an output variable in a first subdivision control shader TCS and first storage address information of the output variable; obtain a second table; each row in the second table contains a second feature of an input variable in a first subdivision evaluation shader TES and second storage address information of a storage location assigned to the input variable; and based on matching the first feature of the first table and the second feature of the second table, store the first storage address information of each output variable in the first table to the storage location indicated by the second storage address information of the input variable matching each output variable in the second table.

In the above solution, the GPU includes: a compiler and a driver, wherein;

The compiler is configured to: compile a first TCS to obtain a first table, wherein each row in the first table contains a first characteristic of an output variable in the first TCS and first storage address information of the output variable; and compile a first TES to obtain a second table, wherein each row in the second table contains a second characteristic of an input variable in the first TES and second storage address information of a storage location allocated for the input variable;

The driver is configured to: match the first feature of the first table with the second feature of the second table, and store the first storage address information of each output variable in the first table to the storage location indicated by the second storage address information of the input variable matching each output variable in the second table.

According to another aspect of the embodiments of the present application, a computer-readable storage medium is provided, in which a computer program is stored. When the computer program is loaded and executed by a processor, any of the methods described above is implemented.

According to another aspect of the embodiments of the present application, a computer program product is provided, including a computer program, and when the computer program is loaded and executed by a processor, the computer program implements any of the methods described above.

The embodiment of the present application provides a rendering subdivision method, an electronic product, a storage medium and a computer program product. The rendering subdivision method includes: obtaining a first table; each row in the first table contains a first feature of an output variable in a first subdivision control shader TCS and a first storage address information of the output variable; obtaining a second table; each row in the second table contains a second feature of an input variable in a first subdivision evaluation shader TES and a second storage address information of a storage location allocated for the input variable; matching the first feature of the first table and the second feature of the second table, storing the first storage address information of each output variable in the first table to the storage location indicated by the second storage address information of the input variable matching each output variable in the second table. The rendering subdivision method provided by the embodiment of the present application determines whether the TCS matches the TES by matching the first table composed of the output variables of the TCS and the second table composed of the input variables of the TES. And, when the TCS matches the TES, the output variable of the TCS is passed to the TES. In this way, if there is a TCS or TES in the cache, it is directly used for matching, and there is no need to repeatedly compile the TCS or TES, thereby improving the performance of tessellation.

BRIEF DESCRIPTION OF THE DRAWINGS

In the drawings, which are not necessarily drawn to scale, the same reference numerals may describe similar components in different views. The same numerals with different letter suffixes may represent different instances of similar components. The drawings generally illustrate various embodiments discussed in this document by way of example and not limitation.

FIG1 is a schematic diagram of a flow chart of a rendering subdivision method provided in an embodiment of the present application;

FIG2 is a schematic diagram of a structure of a rendering pipeline provided in an embodiment of the present application;

FIG3 is a schematic diagram of a structure of a geometric stage provided in an embodiment of the present application;

FIG4 is an exemplary schematic diagram of a triangle subdivision provided in an embodiment of the present application;

FIG5 is a schematic diagram of a structure of a tessellation shader provided in an embodiment of the present application;

FIG6 is an exemplary schematic diagram of a TCS provided in an embodiment of the present application;

FIG. 7 is an exemplary schematic diagram of a TES provided in an embodiment of the present application;

FIG8 is an exemplary schematic diagram of an output table of a TCS provided in an embodiment of the present application;

FIG9 is an exemplary schematic diagram of an input table of a TES provided in an embodiment of the present application;

FIG10 is a schematic diagram of a flow chart of matching a first table and a second table provided in an embodiment of the present application;

FIG11 is an exemplary schematic diagram of the matching between the output table provided in FIG8 and the input table provided in FIG9 according to an embodiment of the present application;

FIG12 is an exemplary schematic diagram of a first instruction provided in an embodiment of the present application;

FIG13 is an exemplary schematic diagram of a second instruction provided in an embodiment of the present application;

FIG14 is a second flow chart of a rendering subdivision method provided in an embodiment of the present application;

FIG15 is a schematic diagram of a structure of an electronic device provided in an embodiment of the present application;

FIG16 is a schematic diagram of the structure of a computer program product provided in an embodiment of the present application.

DETAILED DESCRIPTION

In order to facilitate the understanding of the present application, the present application will be described more comprehensively with reference to the relevant annex figures below. The preferred embodiment of the present application is given in the annex. However, the present application can be implemented in a variety of different forms and is not limited to the embodiments described in the present application. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present disclosure. The terms used in the specification of the present disclosure herein are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure. The term "and/or" used herein includes any and all combinations of one or more related listed items.

The embodiment of the present application provides a rendering subdivision method, which matches a first table consisting of output variables of TCS with a second table consisting of input variables of TES to determine whether TCS matches TES. And, if TCS matches TES, the output variables of TCS are passed to TES. In this way, if TCS or TES is cached, it is directly used for matching without the need to repeatedly compile TCS or TES, thereby improving the performance of tessellation.

The present application is described in detail below with reference to the accompanying drawings.

Referring to FIG1 , it shows a schematic flow chart of a rendering subdivision method provided by an embodiment of the present application. Specifically, the method may include:

Step 101: Obtain a first table; each row in the first table contains a first feature of an output variable in a first subdivision control shader TCS and first storage address information of the output variable;

Step 102: Obtain a second table; each row in the second table contains a second feature of an input variable in the first subdivision evaluation shader TES and second storage address information of a storage location allocated for the input variable;

Step 103: Based on matching the first feature of the first table and the second feature of the second table, the first storage address information of each output variable in the first table is stored in the storage location indicated by the second storage address information of the input variable matching each output variable in the second table.

It should be noted that the rendering mentioned here may refer to graphics rendering. Graphics rendering (technology) may refer to the process of converting a three-dimensional model into a two-dimensional image through a computer algorithm, which simulates the propagation and interaction of light in the real world to present a realistic image effect.

In some embodiments, graphics rendering can be implemented through a rendering pipeline (or rendering pipeline) as shown in FIG2. As shown in FIG2, the rendering pipeline can be abstracted into three stages: application stage; geometry stage; rasterization stage. Among them, the application stage is a data preparation stage, in which data such as vertex data, camera position, frustum data, scene model data, light source, etc. are transmitted to the graphics processing unit (GPU) through the central processing unit (CPU) of an electronic device such as a computer or terminal. In addition, in some embodiments, in the application stage, in order to improve the rendering performance, these data will also be processed, such as culling invisible objects, etc. The most important output of this stage is the geometric information required for rendering, that is, the rendering primitives, where the rendering primitives can be points, lines, surfaces, etc. Here, the geometry stage runs in the GPU, which is mainly used to transform the vertex coordinates received from the application stage into the screen space.

In some embodiments, the structure of the geometry stage is shown in FIG3 and includes: vertex shader, tessellation shader, geometry shader, clipping, and screen mapping, wherein the vertex shader, tessellation shader, and geometry shader are programmable stages, also known as programmable rendering pipelines, which are shaders that users can customize for programming. The so-called vertex shader has a processing unit of a vertex, that is, the vertex shader is called once for each vertex input. The main function of the vertex shader is to perform coordinate system transformation operations. The so-called tessellation shader is an optional stage shader that uses tessellation processing technology to subdivide the rendering primitives, thereby providing a more sophisticated geometric transformation. Among them, there are many subdivision methods, such as triangles, quadrilaterals, contour line sets, and the like in the Open Graphics Library (OpenGL). Exemplarily, as shown in FIG4, a schematic diagram of the subdivision method of triangles in an embodiment of the present application is shown.

In some embodiments, as shown in FIG5 , the subdivision process can be divided into three stages, namely, a tessellation control shader (TCS), a tessellation primitive generator (TPG), and a tessellation evaluation shader (TES), wherein the so-called TCS is responsible for outputting subdivision parameters and transmitting them to TPG, and the subdivision parameters are used to control how many smaller primitives the primitive to be rendered is subdivided into; TCS is also responsible for outputting vertex data of the primitive to be rendered after being processed by the vertex shader to TES. The so-called TPG is a fixed hardware module that performs subdivision operations according to the subdivision parameters provided by TCS. The so-called TES calculates vertex data for each smaller rendering primitive after the subdivision operation transmitted by TGP according to the vertex data transmitted by TCS, and passes the calculated vertex data to the next stage of the rendering pipeline. It should be noted that the so-called TCS and the so-called TES can be implemented in a program. Exemplarily, as shown in FIG6 , it shows an exemplary implementation of TCS provided in an embodiment of the present application; as shown in FIG7 , it shows an exemplary implementation of TES provided in an embodiment of the present application.

In some embodiments, the so-called rasterization stage runs in the GPU, and its main task is to decide which pixels in each rendering primitive should be drawn on the screen. It needs to interpolate the vertex data obtained in the previous stage and then perform pixel-by-pixel processing.

Based on the previous description of tessellation, in the tessellation stage, TCS transmits data to TES. Based on this, matching the output (variable) of TCS with the input (variable) of TES is a problem that the GPU needs to solve. The so-called matching can refer to matching a certain output variable of TCS with a certain input variable of TES, that is, matching the output of TCS with the input of TCS one by one.

In some embodiments, TCS and TES are matched during compilation, specifically as follows: the GPU compiler first compiles TCS, and after compilation, generates a TCS output table (TCS Output Table), in which each row contains the name (name) and offset (offset) of the TCS output, and then the GPU driver passes the TCS output table (TCS output table) and the shader source code (program code, which needs to be compiled by the GPU encoder when used) of TES to the GPU compiler. The GPU compiler matches the input of TES and the output of TCS according to the TCS output table and compiles TES.

In some other embodiments, the method shown in FIG. 1 obtains a first table of TCS and a second table of TES, respectively, wherein the first table is a specific example of the output table of TCS described above. The second table is the input table of TES. Based on this, the first feature of the output variable in the first table is matched with the second feature of the input variable in the second table, thereby transmitting the output variable of TCS to TES.

For example, as shown in FIG8 , it shows an exemplary schematic diagram of the first table provided in an embodiment of the present application. Among them, va is the first characteristic of an output variable of TCS, and offset (0) is the first storage address information of the output variable; vb is the first characteristic of another output variable of TCS, and offset (4) is the first storage address information of the output variable.

For example, as shown in FIG9 , an exemplary schematic diagram of the second table provided in an embodiment of the present application is shown. Among them, va is the second feature of an input variable of TES, and ID (0) is the second storage address information of the storage location assigned to the input variable; vb is the second feature of another input variable of TES, and ID (1) is the second storage address information of the input variable.

The first feature may be the name of the output variable (name); the second feature may be the name of the input variable (name). For example, va and vb shown in FIG8 and FIG9 are names.

The first storage address information is used to indicate the storage location of the output variable in the video memory of the graphics card; the second storage address information is used to indicate the location of the buffer allocated for the input variable; wherein the Buffer is located in the video memory or a register in the graphics card.

Furthermore, if the first storage address information and the second storage address information both point to storage locations in the video memory, the first storage address information and the second storage address information point to different storage locations in the video memory.

That is, the output variables in the first table are stored in the video memory. The so-called first storage address information refers to the storage location of the video memory, and the first storage address information is implemented in the form of a position offset. The storage location allocated for the input variables in the second table is in a buffer, which can be located in the video memory or register. Among them, the video memory and register are included in the graphics card. It should be understood that the graphics card can also include a GPU. The so-called second storage address information refers to the storage location in the buffer, and the second storage address information is implemented in the form of an ID in the buffer.

It should be understood that if the storage locations pointed to by the first storage address information and the second storage address information are both within the video memory, then the storage locations pointed to by the first storage address information and the second storage address information are different.

In some embodiments, obtaining the first table may include: loading the stored first table, or executing a first TCS to obtain the first table;

The obtaining of the second table may include: loading the stored second table, or running the first TES to obtain the second table.

It should be noted that if the first TCS is used for the first time, it is necessary to run the first TCS (i.e. compile the first TCS) and then generate a TCS output table. If the first TCS has been used before and is stored in the video memory or other storage location (i.e. cached), then if the first TCS needs to be used, it can be directly loaded. Similarly, the understanding of the second table will not be repeated here.

In some embodiments, the matching based on the first feature of the first table and the second feature of the second table, storing the first storage address information of each output variable in the first table to the storage location indicated by the second storage address information of the input variable matching each output variable in the second table, as shown in FIG. 10, may include:

Step 1001: Compare the first feature of the target output variable in the first table with the second feature of each input variable in the second table;

Step 1002: In response to the second feature of the target input variable being the same as the first feature of the target output variable in the second table, storing the first storage address information of the target output variable to the storage location indicated by the second storage address information of the target input variable;

The target output variable is any output variable in the first table; and the target input variable is an input variable in the second table that matches the target output variable.

It should be noted that the so-called target output variable can be any output variable in the first table; the so-called target input variable can be an input variable in the second table that matches the target output variable. In other words, the steps for matching each output variable in the first table with the input variable in the second table are similar, and only the target output variable is used as an example for explanation. Specifically, the target output variable is used as an index to traverse the input variables in the second table. If the second feature of the target input variable in the second table is the same as the first feature of the target output variable, then the first storage address information of the target output variable is stored in the storage location indicated by the second storage address information of the target input variable, that is, the matching between the target output variable and the target input variable is completed. The matching between the output variables of the remaining TCS and the input variables of the TES can be understood with reference to the above steps.

Exemplarily, as shown in FIG11, it shows an exemplary schematic diagram of matching a first table and a second table provided by an embodiment of the present application. In FIG11, the first table can refer to FIG8 above. The second table can refer to FIG9 above. That is, if the first feature va of an output variable in the first table is the same as the second feature va of an input variable in the second table, then, at this time, the first storage address information of the output variable in the first table can be stored in the storage location pointed to by the second storage address information corresponding to the input variable, that is, the 0 in offset (0) is stored at ID (0). If the first feature vb of an output variable in the first table is the same as the second feature vb of an input variable in the second table, then, at this time, the first storage address information of the output variable in the first table can be stored in the storage location pointed to by the second storage address information corresponding to the input variable, that is, the 4 in offset (4) is stored at ID (1).

In some embodiments, the method may further include:

In response to the second feature of the input variable being the same as the first feature of the target output variable not existing in the second table, outputting indication information; the indication information is used to indicate a matching failure.

That is, on the other hand, if the second feature of the input variable that is the same as the first feature of the target output variable does not exist in the second table, an indication information indicating that the matching failed is output. The indication information can be presented in any form, such as text, numbers, audio, etc. That is, when the second feature of the first feature system of the target output variable cannot be found in the second table, that is, the output of TCS does not match the input of TES, at this time, the output of TCS cannot be transmitted to TES to avoid subsequent errors. Afterwards, the matching between TCS and TES can be repeated.

In some embodiments, the method may further include:

The first table is obtained, and a first instruction is generated; the first instruction is used to store the corresponding output variable based on the first storage address information in the first table.

It should be noted that, as described above, the first TCS can be a program that, after compilation, stores the output variable itself in the video memory. Therefore, after running the first TCS, an instruction for storing the output variable is generated, that is, the first instruction. It should be understood that the output variable of the TCS can include at least one, that is, the first instruction can include at least one sub-instruction for storing the output variable. Exemplarily, the first instruction can be as shown in FIG. 12, which shows a schematic diagram of the first instruction generated by the TCS shown in FIG. 6 provided in an embodiment of the present application.

In some embodiments, the method may further include:

The second table is obtained and a second instruction is generated; the second instruction is used to read the corresponding first storage address information based on the second storage address information in the second table, and read the corresponding output variable based on the corresponding first storage address information; the corresponding output variable is used as an input variable of the first TES.

It should be noted that the understanding of the second instruction can refer to the understanding of the first instruction, which will not be repeated here. Exemplarily, the second instruction can be as shown in Figure 13, which shows a schematic diagram of the second instruction generated by the TES shown in Figure 7 provided in an embodiment of the present application.

In some embodiments, the method may further include:

Obtain a third table; each row in the third table contains a third feature of an input variable in the second TES and third storage address information of a storage location allocated for the input variable;

Based on matching the first feature of the first table and the third feature of the third table, the first storage address information of each output variable in the first table is stored in the storage location indicated by the third storage address information of the input variable in the third table that matches each output variable.

It should be noted that the so-called third table is the input table corresponding to the second TES, and the second TES is different from the first TES. That is, when different TESs need to be matched with the first TCS, the first table and the third table need to be matched to store the first storage address information of each output variable in the first table to the storage location indicated by the third storage address information of the input variable matching each output variable in the third table. For specific steps, refer to the matching of the first table and the second table, which will not be repeated here.

In some embodiments, the method may further include:

Obtain a fourth table; each row of the fourth table contains a fourth feature of an output variable in the second TCS and fourth storage address information of the output variable;

Based on matching the fourth feature of the fourth table and the second feature of the second table, the fourth storage address information of each output variable in the fourth table is stored in the storage location pointed to by the second storage address information of the input variable matching each output variable in the second table.

It should be noted that the so-called fourth table is the output table corresponding to the second TCS, and the second TCS is different from the first TCS. That is, when different TCSs need to be matched with the first TES, the second table and the fourth table need to be matched to store the fourth storage address information of each output variable in the fourth table to the storage location indicated by the second storage address information of the input variable matching each output variable in the second table. For the specific steps, refer to the matching of the first table and the second table, which will not be repeated here.

The rendering subdivision method provided in the embodiment of the present application, when implementing the ARB_seperate_shader_object extension, realizes the transmission between TCS and TES through a buffer (Buffer), and when TCS and/or TES are different and there is a cache (temporary storage), direct matching can be performed without repeatedly compiling TCS and/or TES, thereby improving the performance of tessellation.

Referring to Figure 14, an embodiment of the present application also provides an electronic device 140, which includes: a graphics processor GPU1401; the GPU1401 is configured to: obtain a first table; each row in the first table contains a first feature of an output variable in a first subdivision control shader TCS and first storage address information of the output variable; obtain a second table; each row in the second table contains a second feature of an input variable in a first subdivision evaluation shader TES and second storage address information of a storage location allocated for the input variable; and based on matching the first feature of the first table and the second feature of the second table, store the first storage address information of each output variable in the first table to the storage location indicated by the second storage address information of the input variable matching each output variable in the second table.

In some embodiments, the GPU may include: a compiler and a driver, wherein;

The compiler is configured to: compile a first TCS to obtain a first table, wherein each row in the first table contains a first characteristic of an output variable in the first TCS and first storage address information of the output variable; and compile a first TES to obtain a second table, wherein each row in the second table contains a second characteristic of an input variable in the first TES and second storage address information of a storage location allocated for the input variable;

The driver is configured to: match the first feature of the first table with the second feature of the second table, and store the first storage address information of each output variable in the first table to the storage location indicated by the second storage address information of the input variable matching each output variable in the second table.

In some other embodiments, the GPU may include: a driver, wherein;

The driver is configured to: load a cache associated with a first TCS to obtain a first table; each row in the first table contains a first feature of an output variable in the first TCS and first storage address information of the output variable; and load a cache associated with a first TES to obtain a second table; each row in the second table contains a second feature of an input variable in the first TES and second storage address information of a storage location allocated for the input variable; and match based on the first feature of the first table and the second feature of the second table, store the first storage address information of each output variable in the first table to the storage location indicated by the second storage address information of the input variable matching each output variable in the second table.

That is, the rendering subdivision method runs in the GPU, and obtains the first table and the second table by loading the cache or compiling, and then matches the first table and the second table so that the output variables in the TCS are transmitted to the input variables of the TES.

In order to understand the present application, as shown in FIG15 , a flowchart of a rendering subdivision method provided in an embodiment of the present application is shown.

Specific processes may include:

Compile TCS or load from cache, obtain the output table of TCS (i.e., the first table or the fourth table), each row of which contains the name (name) and offset (offset) of the TCS output, and generate the first instruction, which is used to store each output to the video memory at the corresponding offset offset.

Compile TES or load from cache to obtain the input table of TES (i.e., the second table or the third table), each row of which contains the name of the TES input (name) and the ID (buffer) assigned to each TES input. Generate a second instruction, which is used to read the offset (offset) from the ID position of the buffer (Buffer), and to read the input of TES from the video memory at the offset. The buffer can be located in the video memory or a register. It should be noted that the IDs in the input table can be continuous, for example, ID (0), ID (1), that is, continuous storage locations in the buffer; or they can be discontinuous, for example, ID (0), ID (2), that is, discontinuous storage locations in the buffer. In addition, the buffer can be a continuous storage area in the video memory or register, or it can be a discontinuous storage area.

The driver matches the TCS output table and TES input table, reads the ID of the corresponding TES input table for each output in the TCS outputtable, and loads the offset of each output to the corresponding ID position of the Buffer.

If a different TCS is used, and if there is a cache, load the cache and jump to the previous step to rematch. If there is no cache, jump to the previous step to recompile the TCS and create the cache.

If a different TES is used, and if there is a cache, load the cache and jump to the previous step to rematch. If there is no cache, jump to the previous step to recompile TES and create a cache.

Based on the above description, the segmentation scheme provided in the embodiment of the present application can be used by the GPU driver to match the input and output of TCS and TES, so when TCS and TES change, there is no need to recompile TCS and TES, only rematch. Under the ARB_seperate_shader_object extension, when using different TCS and TES, the driver only needs to rematch through the TCS output table and TES input table, without the need to recompile TCS and TES, which greatly improves the performance of the GPU.

An embodiment of the present application also provides a computer-readable storage medium, which stores a computer program. When the computer program processor is executed by a processor, the steps of the above-mentioned method embodiment are implemented. The aforementioned storage medium includes: a mobile storage device, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and other media that can store program codes.

The present application also provides a computer program product 160, as shown in FIG16, including a computer program 1600, and when the computer program 1600 is executed by a processor, the method provided in the above embodiments is implemented.

It should be noted that: "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

In addition, in the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored, or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

In addition, all functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may be separately used as a unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

A person of ordinary skill in the art can understand that: all or part of the steps of implementing the above method embodiment can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above method embodiment; and the aforementioned storage medium includes: mobile storage devices, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), disks or optical disks, etc. Various media that can store program codes.

Alternatively, if the above-mentioned integrated unit of the present invention is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present invention can be essentially or partly reflected in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROM, RAM, magnetic disks or optical disks.

The above description is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims (15)

1. A rendering subdivision method, comprising:

Obtaining a first table; each row in the first table contains a first characteristic of one output variable in a first subdivision control shader TCS and first storage address information for the output variable;

Obtaining a second table; each row in the second table contains second characteristics of one input variable in the first subdivision evaluation shader TES and second storage address information of a storage location allocated for the input variable;

And based on the first characteristic of the first table and the second characteristic of the second table, storing the first storage address information of each output variable in the first table to a storage position pointed by the second storage address information of the input variable matched with each output variable in the second table.

2. The method of claim 1, wherein the matching based on the first characteristic of the first table and the second characteristic of the second table stores first storage address information of each output variable in the first table to a storage location in the second table to which second storage address information of an input variable matching the each output variable refers, comprising:

comparing the first characteristic of the target output variable in the first table with the second characteristic of each input variable in the second table;

Storing the first storage address information of the target output variable to a storage location pointed by second storage address information of the target input variable in response to the second characteristic of the target input variable being the same as the first characteristic of the target output variable in the second table;

wherein the target output variable is any one of the output variables in the first table; the target input variable is an input variable in the second table that matches the target output variable.

3. The method according to claim 2, wherein the method further comprises:

outputting indication information in response to the second table not having the second characteristic of the input variable that is the same as the first characteristic of the target output variable; the indication information is used for indicating the matching failure.

4. The method of claim 1, wherein the obtaining a first table comprises: loading the stored first table or running a first TCS to obtain the first table;

The obtaining a second table includes: and loading the stored second table or running the first TES to obtain the second table.

5. The method according to claim 4, wherein the method further comprises:

obtaining the first table and generating a first instruction; the first instruction is configured to store a corresponding output variable based on first storage address information in the first table.

6. The method according to claim 4, wherein the method further comprises:

Obtaining the second table and generating a second instruction; the second instruction is used for reading corresponding first storage address information based on second storage address information in the second table, and reading corresponding output variables based on the corresponding first storage address information; the corresponding output variable is used as one input variable of the first TES.

7. The method according to claim 1, wherein the method further comprises:

obtaining a third table; each row in the third table contains a third characteristic of one input variable in a second TES and third storage address information of a storage location allocated for the input variable;

And based on the first characteristic of the first table and the third characteristic of the third table, storing the first storage address information of each output variable in the first table to a storage position pointed by the third storage address information of the input variable matched with each output variable in the third table.

8. The method according to claim 1, wherein the method further comprises:

Obtaining a fourth table; each row in the fourth table contains a fourth characteristic of one output variable in the second TCS and fourth storage address information for the output variable;

And based on the fourth characteristic of the fourth table and the second characteristic of the second table, fourth storage address information of each output variable in the fourth table is stored to a storage position pointed by second storage address information of an input variable matched with each output variable in the second table.

9. The method of any one of claims 1 to 8, wherein the first characteristic is a name of the output variable; the second characteristic is the name of the input variable.

10. The method according to any one of claims 1 to 8, wherein the first storage address information is used to indicate a storage location of the output variable in a video memory of a video card; the second storage address information is used for indicating the position of a Buffer zone Buffer allocated for the input variable; and the Buffer is positioned in the video memory or a register in the video card.

11. The method of claim 10, wherein if the first storage address information and the second storage address information are both directed to storage locations within the video memory, the first storage address information and the second storage address information are directed to different storage locations within the video memory.

12. An electronic device, comprising: a graphics processor GPU; the GPU is configured to: obtaining a first table; each row in the first table contains a first characteristic of one output variable in a first subdivision control shader TCS and first storage address information for the output variable; obtaining a second table; each row in the second table contains second characteristics of one input variable in the first subdivision evaluation shader TES and second storage address information of a storage location allocated for the input variable; and based on the first characteristic of the first table and the second characteristic of the second table, storing the first storage address information of each output variable in the first table to a storage position pointed by the second storage address information of the input variable matched with each output variable in the second table.

13. The electronic device of claim 12, wherein the GPU comprises: a compiler and a driver, wherein;

The compiler is configured to: compiling a first TCS to obtain a first table; each row in the first table contains a first characteristic of one output variable in the first TCS and first storage address information for the output variable; compiling the first TES to obtain a second table; each row in the second table contains a second characteristic of one input variable in the first TES and second storage address information of a storage location allocated for the input variable;

The driver is configured to: and based on the first characteristic of the first table and the second characteristic of the second table, storing the first storage address information of each output variable in the first table to a storage position pointed by the second storage address information of the input variable matched with each output variable in the second table.

14. A computer readable storage medium, in which a computer program is stored, characterized in that the computer program, when loaded and executed by a processor, implements the method of any of claims 1 to 11.

15. A computer program product comprising a computer program which, when loaded and executed by a processor, implements the method of any one of claims 1 to 11.