CN118353872A - Communication system, method, device, storage medium, and program product - Google Patents
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L61/00—Network arrangements, protocols or services for addressing or naming
- H04L61/50—Address allocation
- H04L61/5038—Address allocation for local use, e.g. in LAN or USB networks, or in a controller area network [CAN]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40208—Bus networks characterized by the use of a particular bus standard
- H04L2012/40234—Local Interconnect Network LIN
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Abstract
The invention relates to the technical field of electronic communication, and discloses a communication system, a method, equipment, a storage medium and a program product, wherein the system comprises: the system comprises a master node and a plurality of slave nodes which are sequentially connected in series, wherein the master node sequentially sends a plurality of different address allocation instructions to a first slave node according to a preset time frequency based on the number of the slave nodes, each slave node realizes address allocation and instruction forwarding by identifying the address allocation state of each node, and a hardware switch is not required to be configured in the system; in the address configuration process, each slave node does not need to return a configuration completion response signal when finishing address configuration, namely, the master node does not need to wait for response and directly and sequentially send an address allocation instruction according to preset time frequency, so that the address configuration efficiency is high; after the last slave node finishes address configuration, the master node sends an address response instruction to the slave node based on the configuration address of the slave node, and if the master node receives a response signal corresponding to the slave node in preset time, the master node indicates that the address configuration is successful.
Description
Technical Field
The present invention relates to the field of electronic communications technologies, and in particular, to a communication system, a method, an apparatus, a storage medium, and a program product.
Background
The local interconnect network (local interconnect network, LIN) is a serial communications network for implementing distributed electronic system control in an automobile. LIN buses are typically used to connect a number of identical LIN slave nodes (slave), and in order to distinguish these LIN slave nodes, each slave node needs to be assigned a different ID (Identity Document) and assembled in the correct position by its ID. Thereby increasing the complexity of assembly, increasing production costs, and being prone to errors. The automatic addressing of the LIN communication system is adopted at present, the LIN communication system can be arbitrarily installed during assembly, and each LIN slave node can identify the position of the LIN slave node through the automatic addressing mode after the assembly is completed.
However, to achieve automatic addressing of a LIN communication system, more ports or resistors are typically designed and deployed in the corresponding circuits of the LIN communication system, and the deployment of ports or resistors increases circuit area.
Disclosure of Invention
Embodiments of the present invention provide a communication system, a method, an apparatus, a storage medium, and a program product.
In a first aspect, the present invention provides a communication system comprising: a master node, a first slave node and at least one second slave node connected in series in sequence; the master node sequentially sends a plurality of different address allocation instructions to the first slave node according to a preset time frequency based on the number of slave nodes of the first slave node and the second slave node; when the first slave node receives an address allocation instruction, the first slave node determines the address configuration state of the first slave node; the address configuration state corresponding to the first slave node is an unconfigured address state, and the first slave node performs address configuration based on the address allocation instruction; the address configuration state corresponding to the first slave node is a configured address state, and the first slave node forwards the address allocation instruction to a second slave node adjacent to the first slave node.
In the embodiment of the application, the master node can directly communicate with the first slave node, and the master node can also indirectly communicate with any one of the at least one second slave node through the first slave node, namely each slave node only needs to be provided with two ports, so that the chip utilization area is increased. Meanwhile, when the first slave node finishes address configuration, the first slave node does not need to return a configuration completion response signal, the master node does not need to wait for the configuration completion response signal of the first slave node, and the master node directly and sequentially sends address allocation instructions according to preset time frequency, so that the address configuration efficiency is improved.
In a possible implementation of the first aspect, the system includes 1 second slave node; the second slave node receives the address allocation instruction and performs address configuration based on the address allocation instruction; after the second slave node performs address configuration, the master node sends an address response instruction to the second slave node based on the configuration address when the second slave node performs address configuration; the corresponding master node receives a response signal returned by the second slave node in response to the address response instruction within a preset time period, and addressing is finished; and the corresponding master node does not receive a response signal returned by the second slave node in response to the address response instruction within a preset time period, and readdresses the response signal.
In a possible implementation of the first aspect, the system includes n second slave nodes, where n is an integer greater than 1; the first slave node is connected with a1 st second slave node in the n second slave nodes, and the i-1 st second slave node is connected with an i second slave node, wherein i is an integer greater than 1, and i is less than or equal to n; when the ith-1 second slave node receives an address allocation instruction, the ith-1 second slave node determines the address configuration state of the ith-1 second slave node; the address configuration state of the corresponding i-1 second slave node is an unconfigured address state, and the i-1 second slave node performs address configuration based on an address allocation instruction; the address configuration state of the corresponding i-1 second slave node is the configured address state, and the i-1 second slave node forwards the address allocation instruction to the i-1 second slave node.
In a possible implementation manner of the first aspect, the nth second slave node receives an address allocation instruction and performs address configuration based on the address allocation instruction; after the nth second slave node performs address configuration, the master node sends an address response instruction to the nth second slave node based on the configuration address when the nth second slave node performs address configuration; the corresponding master node receives a response signal returned by the nth second slave node in response to the address response instruction within a preset time period, and addressing is finished; and the corresponding master node does not receive a response signal returned by the nth second slave node in response to the address response instruction within a preset time period, and readdresses the response signal.
In one possible implementation of the first aspect, the first slave node includes a first port, a first physical transceiver, a first protocol controller, a first master controller, a second protocol controller, a second physical transceiver, and a second port, where the first master controller is configured to determine an address configuration state of the first slave node; one end of the first port is connected with the master node, the other end of the first port is connected with the first physical transceiver, one end of the second port is connected with a1 st second slave node in the at least one second slave node, and the other end of the second port is connected with the second physical transceiver; and the output end of the first physical transceiver is connected with the input end of the first protocol controller, the output end of the first protocol controller is connected with the input end of the first main controller, the output end of the first main controller is connected with the input end of the second protocol controller, the output end of the second protocol controller is connected with the input end of the second physical transceiver, the output end of the second physical transceiver is connected with the input end of the second protocol controller, the output end of the second protocol controller is connected with the input end of the first protocol controller, and the output end of the first protocol controller is connected with the input end of the first physical transceiver.
In a possible implementation of the first aspect, the method further includes: when the address allocation instruction sent by the master node sequentially passes through the first port, the first physical transceiver and the first protocol controller to reach the first master controller, and the first master controller determines that the address allocation state of the first slave node is an unconfigured address state, the first master controller performs address allocation on the first slave node based on the address allocation instruction; when the first master controller determines that the address configuration state of the first slave node is the configured address state, the first master controller forwards the address allocation instruction so that the address allocation instruction sequentially passes through the second protocol controller, the second physical transceiver and the second port to reach the 1 st second slave node of the at least one second slave node.
In a possible implementation manner of the first aspect, the second slave node includes a third port, a third physical transceiver, a third protocol controller, a second master controller, a fourth protocol controller, a fourth physical transceiver, and a fourth port, where the second master controller is configured to determine an address configuration state of the corresponding second slave node; one end of the third port is connected with the second port, the other end of the third port is connected with the third physical transceiver, and one end of the fourth port is connected with the fourth physical transceiver; and the output end of the third physical transceiver is connected with the input end of the third protocol controller, the output end of the third protocol controller is connected with the input end of the second main controller, the output end of the second main controller is connected with the input end of the fourth protocol controller, the output end of the fourth protocol controller is connected with the input end of the fourth physical transceiver, the output end of the fourth physical transceiver is connected with the input end of the fourth protocol controller, the output end of the fourth protocol controller is connected with the input end of the third protocol controller, and the output end of the third protocol controller is connected with the input end of the third physical transceiver.
In a possible implementation of the first aspect, the system includes n second slave nodes; the third port of the 1 st second slave node of the n second slave nodes is connected with the second port, and the fourth port of the i-1 th second slave node is connected with the third port of the i-th second slave node.
In a second aspect, an embodiment of the present invention provides a communication method, applied to the foregoing system, where the method includes: the master node sequentially sends a plurality of different address allocation instructions to the first slave node according to a preset time frequency based on the number of slave nodes of the first slave node and the second slave node; when the first slave node receives an address allocation instruction, the first slave node determines the address configuration state of the first slave node; the address configuration state corresponding to the first slave node is an unconfigured address state, and the first slave node performs address configuration based on the address allocation instruction; the address configuration state corresponding to the first slave node is a configured address state, and the first slave node forwards the address allocation instruction to a second slave node adjacent to the first slave node.
In a third aspect, an embodiment of the present invention provides an electronic device, including: a memory for storing instructions for execution by one or more processors of the device; and a processor, one of the processors of the device, for executing instructions stored in the memory to implement the above first aspect and any one of the communication methods provided by the various possible implementations of the above first aspect.
In a fourth aspect, embodiments of the present invention provide a computer readable storage medium having stored thereon instructions that, when executed on a device, cause the device to implement any one of the communication methods provided by the above first aspect and the various possible implementations of the above first aspect.
In a fifth aspect, embodiments of the present invention provide a program product comprising instructions which, when executed by a device, cause the device to implement any one of the communication methods provided in the first aspect and the various possible implementations of the first aspect.
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FIG. 1 illustrates an example schematic diagram of a system 10, according to some embodiments of the invention;
FIG. 2 illustrates an example schematic diagram of a system 100, according to some embodiments of the invention;
FIG. 3 illustrates a flow diagram of a communication method, according to some embodiments of the invention;
Fig. 4 illustrates a flow diagram of another communication method, according to some embodiments of the invention.
Detailed Description
Illustrative embodiments of the invention include, but are not limited to, a communication system, method, apparatus, storage medium, and program product.
The technical scheme of the invention is described below with reference to fig. 1 to 4.
Fig. 1 illustrates a schematic diagram of a communication system 10, according to some embodiments of the application. As shown in fig. 1, the system 10 includes a master node (master) and a plurality of slave nodes (slave), each of which is configured with two ports, an input port D1 and an output port D2. Each slave node is respectively connected with the master node, and the input of the input port D1 of the slave node 1 is set to be low level or controlled by the output port of the master node; the output port D2 of the slave node 1 is connected to the input port D1 of the slave node 2, and the output port D2 of the slave node 2 is connected to the input port D1 of the slave node 3, and the daisy chain (DAISY CHAIN) connection shown in fig. 1 is realized in the above connection manner.
In some embodiments of automatic addressing, the output ports D2 of all the slave nodes (e.g., slave nodes 1,2, 3 … n) output a high level, when the slave node has not configured an address and the input port D1 corresponding to the slave node inputs a low level, the current slave node is selected, and the current slave node receives an address allocation instruction from the master node to perform address configuration, and switches the D2 output port from the high level to the low level, and each slave node sequentially continues similar operations until each slave node completes address configuration.
It can be seen that in the above embodiment, two additional ports are required for each slave node: input port D1 and output port D2, which results in a greater number of ports being deployed in the corresponding circuit design of communication system 10, which increases circuit area.
In some embodiments, the communication system of the present application is generally applied to distributed electronic system control in electronic devices such as automobiles, for example, a master node in the communication system may be a master control unit of a vehicle, such as a central Controller (CPU) of the vehicle or an on-board Electronic Control Unit (ECU), etc., and slave nodes include, but are not limited to: the vehicle door, steering wheel, seat, air conditioner, illumination lamp, humidity sensor, alternator, etc., are not particularly limited.
To this end, the invention proposes a communication method, applied to a communication system, comprising: a master node, a first slave node and at least one second slave node connected in series in sequence; the master node sequentially sends a plurality of different address allocation instructions to the first slave node according to a preset time frequency based on the number of slave nodes of the first slave node and the second slave node; when the first slave node receives an address allocation instruction, the first slave node determines the address configuration state of the first slave node; the address configuration state corresponding to the first slave node is an unconfigured address state, and the first slave node performs address configuration based on the address allocation instruction; the address configuration state corresponding to the first slave node is a configured address state, and the first slave node forwards the address allocation instruction to a second slave node adjacent to the first slave node.
It will be appreciated that in the above communication system, the master node, the first slave node and the at least one second slave node are in a serial state, for example, the master node is connected to the first slave node, the first slave node is connected to the 1 st second slave node in the at least one second slave node, and the subsequent second slave nodes are serially connected in sequence. In this manner, the master node may communicate directly with the first slave node, and the master node may also communicate indirectly with any of the at least one second slave node through the first slave node. That is, only two ports are needed to be configured for the first slave node and the second slave node, for example, the first slave node is connected with the master node through one port, the first slave node is connected with one port of the 1 st second slave node through the other port, and when the second slave node is multiple, the multiple second slave nodes can also be connected in series through the ports, so that the communication connection is realized, and the utilization area of the chip is increased.
The following is an example of a communication system comprising only 1 second slave node.
In some embodiments, when the communication system includes only 1 second slave node, in the above communication method:
The master node sequentially sends 2 different address allocation instructions to the first slave node according to a preset time frequency; when the first slave node receives an address allocation instruction, the first slave node determines the address configuration state of the first slave node; the address configuration state corresponding to the first slave node is an unconfigured address state, and the first slave node performs address configuration based on the address allocation instruction; the address configuration state corresponding to the first slave node is the configured address state, and the first slave node forwards the address allocation instruction to the second slave node; the second slave node then receives the address assignment instruction and performs address configuration based on the address assignment instruction.
It can be understood that, in the process that the master node sequentially sends 2 different address allocation instructions to the first slave node, when the first slave node receives the address allocation instruction for the 1 st time, the first slave node does not configure an address, that is, the first slave node firstly performs address configuration based on the 1 st time of receiving the address allocation instruction; then, when the first slave node receives the address allocation instruction for the 2 nd time, the first slave node forwards the address allocation instruction received for the 2 nd time to the second slave node because the first slave node has configured the address.
Further, after the master node finishes sending 2 different address allocation instructions, the master node sends an address response instruction to the corresponding second slave node based on the configuration address when the second slave node performs address configuration; the second slave node transmits a response signal to the master node in response to the address response instruction. The address response instruction sent by the master node reaches the second slave node after passing through the first slave node, and the response signal sent by the second slave node reaches the master node after passing through the first slave node.
It will be appreciated that when the first slave node completes the address configuration, the first slave node need not return a configuration completion response signal. And the master node does not need to wait for the configuration completion response signal of the first slave node, and the master node directly and sequentially sends the address allocation instruction according to the preset time frequency, so that the address configuration efficiency is improved. Meanwhile, after the second slave node finishes address configuration, the master node sends an address response instruction based on the configuration address of the second slave node, and the master node can determine that all slave nodes in the communication system finish address configuration based on response signals of the second slave node.
The following is an example of a communication system comprising n (n is an integer greater than 1) second slave nodes.
In some embodiments, when the communication system includes n second slave nodes, the first slave node is connected to a1 st second slave node of the n second slave nodes, and an i-1 st second slave node is connected to an i-th second slave node, where i is an integer greater than 1, and i is less than or equal to n. Wherein, in the communication method, the following steps:
The master node sequentially sends n+1 different address allocation instructions to the first slave node according to a preset time frequency; when the ith-1 second slave node receives an address allocation instruction, the ith-1 second slave node determines the address configuration state of the ith-1 second slave node; the address configuration state of the corresponding i-1 second slave node is an unconfigured address state, and the i-1 second slave node performs address configuration based on an address allocation instruction; the address configuration state of the corresponding i-1 second slave node is the configured address state, and the i-1 second slave node forwards the address allocation instruction to the i-1 second slave node. Thus, each of the n second slave nodes can receive the address allocation instruction for address configuration.
It can be understood that, in the process that the master node sequentially sends n+1 different address allocation instructions to the first slave node, when the first slave node receives the address allocation instruction for the 1 st time, the first slave node does not configure an address, that is, the first slave node firstly performs address configuration based on the 1 st time of receiving the address allocation instruction; then, when the first slave node receives the address allocation instruction from the 2 nd time to the n+1th time, the first slave node forwards the address allocation instruction from the 2 nd time to the n+1th time to the 1 st second slave node in the n second slave nodes because the first slave node is configured with the address; similarly, when each subsequent second slave node receives the address allocation instruction, if the address is not allocated, address allocation is performed based on the received address allocation instruction, and if the address is allocated, the received address allocation instruction is forwarded to the next node.
Further, after the master node finishes transmitting n+1 different address allocation instructions, the master node transmits an address response instruction to the corresponding nth second slave node based on the configuration address when the nth second slave node performs address configuration; the nth second slave node transmits a response signal to the master node in response to the address response instruction. The address response instruction sent by the master node reaches the second slave node after passing through the first slave node and the 1 st to n-1 st second slave nodes, and the response signal sent by the second slave node reaches the master node after passing through the 1 st to n-1 st second slave nodes and the first slave node.
It will be appreciated that when the first slave node or any one of the 1 st to n-1 st second slave nodes completes address configuration, no configuration completion response signal needs to be returned. And the master node does not need to wait for the configuration completion response signal of any one of the first slave node or the 1 st to the n-1 st second slave nodes, and the master node directly and sequentially sends the address allocation instructions according to the preset time frequency, so that the address configuration efficiency is improved. Meanwhile, after the nth second slave node finishes address configuration, the master node sends an address response instruction based on the node address of the nth second slave node, and the master node can determine that all slave nodes in the communication system finish address configuration based on the response signal of the nth second slave node.
In some embodiments, the master node may set a return duration of the response signal based on the processing delay of each slave node, and determine whether the current addressing was successful based on the return duration. For example, if the master node receives the response signal returned by the corresponding second slave node within the preset time after sending the address response instruction, the current addressing is successful, and the addressing is ended; if the master node does not receive the response signal returned by the corresponding second slave node within the preset time after sending the address response instruction, the current addressing failure is indicated, and the addressing is re-addressed.
In some embodiments, the preset time period may be set according to the following formula (1).
Ttimeout＝(Theader+Tsoftware)*N+Tbus_latency+Tnode_latency (1)。
In the case of the formula (1),T timeout is the address response frame timeout response time, T header is the address response frame header duration, T software is the single-node software processing time,
T bus_latency is LIN bus delay, namely bus delay from the master node to the Nth slave node and back to the master node, and T node_latency is slave node internal delay, namely node internal delay from the first slave node to the Nth slave node and back to the first slave node.
Illustratively, assuming that each slave node has a consistent internal delay, the bus length between the nodes is consistent, i.e., T timeout＝(Theader+Tsoftware)*N+Tsgl_bus_latency*2N+Tsgl_node_latency x (2N-1), where T sgl_bus_latency is a single-node bus delay, T sgl_node_latency is a single-node internal delay, and N represents the number of slave nodes, e.g., the total number of first slave nodes and second slave nodes.
In some embodiments, taking a baud rate of 20K as an example, the frame header is at most 47.6 bits, i.e., the maximum frame header time is 2380us; the processing time of the single-node software is related to the frequency of a system clock, the frequency of the system clock is generally not lower than 2MHz, and the processing time of the software is not more than 100 system clock cycles at most by taking a 2MHz system clock as an example; therefore, the processing time of single-node software is 50us at maximum; the single-node bus delay and the single-node internal delay are reserved with larger margin, the maximum single-node bus delay is 50us, and the maximum single-node internal delay is 20us; taking the bus to mount 16 slave nodes as an example, i.e., n=16 cases, if the maximum timeout time= (2380us+50us) ×16+50us×2×16+20us (2×16-1) =41 ms, i.e., within 41ms of the frame head of the address response frame sent by the master node, if the response signal corresponding to the slave node is not received, the current addressing is considered unsuccessful, and the addressing operation is restarted; and if the response signal of the corresponding slave node is received, the current addressing is considered to be successful, and the addressing operation is ended.
In order to more clearly describe the present application, the foregoing communication system is exemplified below.
Fig. 2 illustrates a schematic diagram of a communication system 100, according to some embodiments of the application.
As shown in fig. 2, the communication system 100 includes a master node, a first slave node, a second slave node 01, and a second slave node n. It will be appreciated that a plurality of not shown slave nodes may also be included between the second slave node 01 and the second slave node n. The number of slave nodes from the second slave node 01 to the second slave node n is n. The master node, the first slave node, the second slave node 01 and the second slave node n are sequentially connected in a serial state.
IN some embodiments, the first slave node includes a first port (e.g., lin_in), a second port (e.g., lin_out), a first physical transceiver (e.g., physical transceiver S), a first protocol controller (e.g., protocol controller S), a first master controller (e.g., master controller), a second protocol controller (e.g., physical transceiver M), and a second physical transceiver (e.g., protocol controller M). The first master controller is used for determining the address configuration state of the first slave node.
Illustratively, one end of the first port is connected with the master node, the other end of the first port is connected with the first physical transceiver, one end of the second port is connected with the second slave node 01, and the other end of the second port is connected with the second physical transceiver; and the output end of the first physical transceiver is connected with the input end of the first protocol controller, the output end of the first protocol controller is connected with the input end of the first main controller, the output end of the first main controller is connected with the input end of the second protocol controller, the output end of the second protocol controller is connected with the input end of the second physical transceiver, the output end of the second physical transceiver is connected with the input end of the second protocol controller, the output end of the second protocol controller is connected with the input end of the first protocol controller, and the output end of the first protocol controller is connected with the input end of the first physical transceiver.
The configuration of the second slave node will be described below with reference to the second slave node 01 as an example of the second slave node.
IN some embodiments, the second slave node 01 includes a third port (e.g., lin_in), a fourth port (e.g., lin_out), a third physical transceiver (e.g., physical transceiver S), a third protocol controller (e.g., protocol controller S), a second master controller (e.g., master controller), a fourth protocol controller (e.g., physical transceiver M), and a fourth physical transceiver (e.g., protocol controller M). The second master controller is used for determining the address configuration state of the corresponding second slave node.
Illustratively, one end of the third port is connected to the second port, the other end of the third port is connected to the third physical transceiver, one end of the fourth port is connected to the fourth physical transceiver, and the other end of the fourth port is connected to an adjacent second slave node behind the second slave node 01; and the output end of the third physical transceiver is connected with the input end of the third protocol controller, the output end of the third protocol controller is connected with the input end of the second main controller, the output end of the second main controller is connected with the input end of the fourth protocol controller, the output end of the fourth protocol controller is connected with the input end of the fourth physical transceiver, the output end of the fourth physical transceiver is connected with the input end of the fourth protocol controller, the output end of the fourth protocol controller is connected with the input end of the third protocol controller, and the output end of the third protocol controller is connected with the input end of the third physical transceiver.
It will be appreciated that when the communication system comprises only n second slave nodes, the third port of the 1 st of the n second slave nodes is connected to the second port and the fourth port of the i-1 st second slave node is connected to the third port of the i-th second slave node.
It will be appreciated that the protocol controller S is located close to the physical transceiver S, and the protocol controller M is located close to the physical transceiver M; the protocol controller S is used for realizing frame analysis, data receiving and transmitting of the LIN protocol; the protocol controller M is used for realizing frame generation, data transmission and reception of the LIN protocol; the master controller is used for judging the configuration state of the LIN slave node address and starting the protocol controller M according to the judging result; the physical transceiver S/M is used for realizing a physical layer of the LIN protocol, such as level conversion, circuit protection and the like; lin_in/lin_out is a bi-directional port that connects to a master node through a LIN bus.
In some embodiments, as shown in fig. 2, when the address allocation instruction sent by the master node sequentially passes through the first port, the first physical transceiver and the first protocol controller to reach the first master controller, the first master controller determines that the address configuration state of the first slave node is an unconfigured address state, and the first master controller performs address configuration on the first slave node based on the address allocation instruction; when the first master controller determines that the address configuration state of the first slave node is the configured address state, the first master controller forwards the address allocation instruction, so that the address allocation instruction sequentially passes through the second protocol controller, the second physical transceiver, the second port, the third protocol controller and the third physical transceiver to reach the second master controller of the second slave node 01.
Further, when the second master controller determines that the address configuration state of the first slave node 01 is an unconfigured address state, the second master controller performs address configuration on the second slave node 01 based on the address allocation instruction; when the second master controller determines that the address configuration state of the second slave node 01 is the configured address state, the second master controller forwards the address allocation instruction to an adjacent second slave node, such as the second slave node n, after the second slave node 01. Then, after the second slave node n receives the address allocation instruction and completes the address configuration, the master node transmits an address response instruction to the second slave node n based on the configuration address when the second slave node n performs the address configuration, and the second slave node n transmits a response signal to the master node in response to the address response instruction.
It can be appreciated that in the above communication system, the master node, the first slave node and the at least one second slave node are in a serial state, the master node may directly communicate with the first slave node, and the master node may also indirectly communicate with any one of the at least one second slave node through the first slave node. That is, only two ports are needed to be configured for the first slave node and the second slave node, for example, the first slave node is connected with the master node through one port, the first slave node is connected with one port of the second slave node through the other port, and when the second slave node is multiple, the multiple second slave nodes can also be connected in series through the ports, so that the communication connection is realized, and the utilization area of the chip is increased.
The foregoing communication method is exemplified below.
Fig. 3 illustrates a flow chart of steps of a method of communication, according to some embodiments of the application. As shown in fig. 3:
in STEP1 (STEP 1), power-on initialization is performed. During the initialization phase, all slave nodes may receive instructions sent from the master node. It is understood that all slave nodes herein include a first slave node and a second slave node.
In STEP2 (STEP 2), the master node sends an automatic addressing instruction, such as id=0x3c. At this time, the master Node transfers the number N of slave nodes on the bus to all the slave nodes, and configures the slave Node Addresses (NAD) of all the slave nodes to an unconfigured Address state.
In STEP3 (STEP 3), the master node transmits an address allocation command according to a preset time frequency.
For example, the master node issues the first address allocation frame, as id=0x3c, nad= "01". At this time, the slave node closest to the master node, i.e., the first slave node (the first slave node shown in fig. 2) receives the address allocation instruction of the master node; the main controller of the first slave node determines whether to forward the address allocation instruction according to the address allocation state of the NAD, if the first slave node is in an unconfigured address state, the frame is not forwarded, and the address information is stored in Flash of the main controller for address allocation; if the first slave node is in the configured address state, the frame is forwarded. It can be understood that, since the address configuration state of all the slave nodes in step 2 is configured as an unconfigured address state, that is, the address configuration state of the first slave node is the unconfigured address state at this time. Since the first slave node does not allocate NAD, the first slave node does not forward the address allocation instruction and NAD is stored to Flash of the master controller of the first slave node.
Further, the master node continues to transmit address allocation frames, as id=0x3c, nad= "02". At this time, the first slave node has allocated an address, and forwards the address allocation instruction to the second slave node (for example, the first slave node forwards the address allocation instruction to the second slave node 01 in fig. 2), and the master controller of the second slave node decides whether to forward the address allocation instruction according to the address configuration state of the NAD; since the second slave node does not allocate NAD, the second slave node does not forward the address allocation instruction and NAD is stored to Flash of the master controller of the second slave node.
Similarly, the master node transmits an address assignment frame, such as id=0x3c, nad= "N". At this time, the (N-1) -th slave node has allocated an address, and forwards the address allocation instruction to the Nth slave node (the second slave node N shown in FIG. 2); the master controller of the Nth slave node decides whether to forward the address allocation instruction according to the address configuration state of the NAD; since the nth slave node does not allocate NAD, the nth slave node does not forward the address allocation instruction, and the NAD is stored in Flash of the master controller of the nth slave node.
In STEP4 (STEP 4), the master node transmits an address response instruction, such as id=0x3d. Each slave node receives the address response instruction, judges whether the number N of the NAD and the slave nodes are matched, if not, forwards the address response instruction, and if so, responds to the address response instruction and returns a response signal of NAD address configuration to the master node; if the master node does not receive the response signal for a preset time, the addressing fails, and the addressing operation is restarted; if the master node receives the response signal within the preset time, the addressing is successful, and the addressing operation is ended.
In some embodiments, the master node sends an address response instruction based on the node address of the nth slave node, each slave node receives the address response instruction and matches the node address corresponding to the address response instruction, so that the 1 st to N-1 st slave nodes forward the address response instruction in turn until the address response instruction reaches the nth slave node due to the mismatch; the Nth slave node is matched with the node address corresponding to the address response instruction and responds to the address response instruction to return a response signal to the master node. The preset duration of receiving the response signal by the master node may refer to the description of the foregoing formula (1), which is not described herein.
It will be appreciated that no configuration completion response signal needs to be returned when any of the 1 st to n-1 st slave nodes completes address configuration. And the master node does not need to wait for the configuration completion response signal of any one of the 1 st to n-1 st slave nodes, and the master node directly and sequentially sends the address allocation instruction according to the preset time frequency, so that the address configuration efficiency is improved. Meanwhile, after the nth slave node finishes address configuration, the master node sends an address response instruction based on the node address of the nth slave node, and the master node can determine that all slave nodes in the communication system finish address configuration based on the response signal of the nth slave node.
Fig. 4 illustrates a flow diagram of another communication method, according to some embodiments of the application. As shown in fig. 4, the communication method is applied to the communication system shown in fig. 2, and the communication method flow includes:
S401: the master node sequentially sends a plurality of different address allocation instructions to the first slave node according to a preset time frequency based on the number of slave nodes of the first slave node and the second slave node.
In some embodiments, as shown in fig. 2, when the communication system includes only 1 first slave node and n second slave nodes, the master node sequentially transmits n+1 different address allocation instructions to the first slave nodes according to a preset time frequency.
It will be appreciated that the time frequency may be set according to the number of slave nodes of the first slave node and the second slave node. Illustratively, when the communication system includes only 1 first slave node and n second slave nodes, the master node transmits an address allocation command every 10ms, and in other embodiments, other time frequencies, such as 20ms, 30ms, etc., are not limited in particular.
S402: when the first slave node receives the address allocation instruction, the first slave node determines an address configuration state of the first slave node.
In some embodiments, as shown in fig. 2, when an address allocation instruction sent by the master node sequentially passes through the first port, the first physical transceiver, and the first protocol controller to reach the first master controller, the first master controller determines an address configuration state of the first slave node. When the address configuration state of the first slave node is judged to be the unconfigured address state, jumping to S403; when it is judged that the address configuration state of the first slave node is the configured address state, the process proceeds to S404.
S403: the address configuration state corresponding to the first slave node is an unconfigured address state, and the first slave node performs address configuration based on the address allocation instruction.
In some embodiments, as shown in fig. 2, when the first master controller determines that the address configuration state of the first slave node is an unconfigured address state, the first master controller performs address configuration on the first slave node based on the address allocation instruction.
S404: the address configuration state corresponding to the first slave node is a configured address state, and the first slave node forwards the address allocation instruction to a second slave node adjacent to the first slave node.
In some embodiments, as shown in fig. 2, when the first master controller determines that the address configuration state of the first slave node is the configured address state, the first master controller forwards the address allocation instruction such that the address allocation instruction sequentially passes through the second protocol controller, the second physical transceiver, the second port, the third protocol controller, the third physical transceiver to reach the second master controller of the second slave node 01.
Further, when the second master controller determines that the address configuration state of the first slave node 01 is an unconfigured address state, the second master controller performs address configuration on the second slave node 01 based on the address allocation instruction; when the second master controller determines that the address configuration state of the second slave node 01 is the configured address state, the second master controller forwards the address allocation instruction to an adjacent second slave node, such as the second slave node n, after the second slave node 01. Then, after the second slave node n receives the address allocation instruction and completes the address configuration, the master node transmits an address response instruction to the second slave node n based on the configuration address when the second slave node n performs the address configuration, and the second slave node n transmits a response signal to the master node in response to the address response instruction.
It can be appreciated that in the above communication system, the master node, the first slave node and the at least one second slave node are in a serial state, the master node may directly communicate with the first slave node, and the master node may also indirectly communicate with any one of the at least one second slave node through the first slave node. That is, only two ports are needed to be configured for the first slave node and the second slave node, for example, the first slave node is connected with the master node through one port, the first slave node is connected with one port of the second slave node through the other port, and when the second slave node is multiple, the multiple second slave nodes can also be connected in series through the ports, so that the communication connection is realized, and the utilization area of the chip is increased.
It will be appreciated that when the first slave node or any one of the 1 st to n-1 st second slave nodes completes address configuration, no configuration completion response signal needs to be returned. And the master node does not need to wait for the configuration completion response signal of any one of the first slave node or the 1 st to the n-1 st second slave nodes, and the master node directly and sequentially sends the address allocation instructions according to the preset time frequency, so that the address configuration efficiency is improved.
In some embodiments, embodiments of the present application also provide a computer readable medium storing program code which, when run on a computer, causes the computer to perform the methods of the above aspects.
In some embodiments, embodiments of the present application also provide a computer program product comprising: computer program code which, when run on a computer, causes the computer to perform the method of the above aspects.
In the drawings, some structural or methodological features may be shown in a particular arrangement and/or order. However, it should be understood that such a particular arrangement and/or ordering may not be required. Rather, in some embodiments, these features may be arranged in a different manner and/or order than shown in the illustrative figures. Additionally, the inclusion of structural or methodological features in a particular figure is not meant to imply that such features are required in all embodiments, and in some embodiments, may not be included or may be combined with other features.
It should be noted that, in the embodiments of the present invention, each unit/module mentioned in each device is a logic unit/module, and in physical terms, one logic unit/module may be one physical unit/module, or may be a part of one physical unit/module, or may be implemented by a combination of multiple physical units/modules, where the physical implementation manner of the logic unit/module itself is not the most important, and the combination of functions implemented by the logic unit/module is only a key for solving the technical problem posed by the present invention. Furthermore, in order to highlight the innovative part of the present invention, the above-described device embodiments of the present invention do not introduce units/modules that are less closely related to solving the technical problems posed by the present invention, which does not indicate that the above-described device embodiments do not have other units/modules.
It should be noted that in the examples and descriptions of this patent, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
While the invention has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the invention.
Claims (12)
1. A communication system, the system comprising: a master node, a first slave node and at least one second slave node connected in series in sequence;
The master node sequentially sends a plurality of different address allocation instructions to the first slave node according to a preset time frequency based on the number of the slave nodes of the first slave node and the second slave node;
When the first slave node receives the address allocation instruction, the first slave node determines the address configuration state of the first slave node;
The address configuration state corresponding to the first slave node is an unconfigured address state, and the first slave node performs address configuration based on the address allocation instruction;
the address configuration state corresponding to the first slave node is a configured address state, and the first slave node forwards the address allocation instruction to the second slave node adjacent to the first slave node.
2. The system of claim 1, wherein the corresponding system comprises 1 of the second slave nodes;
The second slave node receives the address allocation instruction and performs address configuration based on the address allocation instruction; and, after the address configuration by the second slave node,
The master node sends an address response instruction to the second slave node based on a configuration address when the second slave node performs the address configuration;
Receiving a response signal returned by the second slave node in response to the address response instruction within a preset time period corresponding to the master node, and ending addressing;
And re-addressing the master node when the response signal returned by the second slave node in response to the address response instruction is not received within a preset time period.
3. The system of claim 1, wherein the system comprises n of the second slave nodes, wherein n is an integer greater than 1;
The first slave node is connected with a1 st second slave node in n second slave nodes, and an i-1 th second slave node is connected with an i-th second slave node, wherein i is an integer greater than 1, and i is less than or equal to n;
When the ith-1 second slave node receives the address allocation instruction, the ith-1 second slave node determines the address configuration state of the ith-1 second slave node;
The address configuration state of the second slave node corresponding to the i-1 th slave node is an unconfigured address state, and the i-1 th slave node performs address configuration based on the address allocation instruction;
and the address configuration state of the corresponding i-1 th second slave node is the configured address state, and the i-1 th second slave node forwards the address allocation instruction to the i-1 th second slave node.
4. A system according to claim 3, wherein an nth one of the second slave nodes receives the address assignment instruction and performs address configuration based on the address assignment instruction; and, after the nth second slave node performs address configuration,
The master node sends an address response instruction to the nth second slave node based on a configuration address when the nth second slave node performs the address configuration;
receiving a response signal returned by the nth second slave node in response to the address response instruction within a preset time period corresponding to the master node, and ending addressing;
and re-addressing the response signal returned by the nth second slave node in response to the address response instruction is not received by the master node within a preset time period.
5. The system of any of claims 1-4, wherein the first slave node comprises a first port, a first physical transceiver, a first protocol controller, a first master controller, a second protocol controller, a second physical transceiver, a second port, wherein the first master controller is configured to determine an address configuration status of the first slave node;
one end of the first port is connected with the master node, the other end of the first port is connected with the first physical transceiver, one end of the second port is connected with the 1 st second slave node in the at least one second slave node, and the other end of the second port is connected with the second physical transceiver; and, in addition, the method comprises the steps of,
The output end of the first physical transceiver is connected with the input end of the first protocol controller, the output end of the first protocol controller is connected with the input end of the first main controller, the output end of the first main controller is connected with the input end of the second protocol controller, the output end of the second protocol controller is connected with the input end of the second physical transceiver, the output end of the second physical transceiver is connected with the input end of the second protocol controller, the output end of the second protocol controller is connected with the input end of the first protocol controller, and the output end of the first protocol controller is connected with the input end of the first physical transceiver.
6. The system of claim 5, further comprising:
when the address allocation instruction sent by the master node passes through the first port, the first physical transceiver and the first protocol controller in order to reach the first master controller,
When the first master controller determines that the address configuration state of the first slave node is an unconfigured address state, the first master controller carries out address configuration on the first slave node based on the address allocation instruction;
When the first master controller determines that the address configuration state of the first slave node is the configured address state, the first master controller forwards the address allocation instruction so that the address allocation instruction sequentially passes through the second protocol controller, the second physical transceiver and the second port to reach the 1 st of the at least one second slave node.
7. The system of claim 5, wherein the second slave node comprises a third port, a third physical transceiver, a third protocol controller, a second master controller, a fourth protocol controller, a fourth physical transceiver, a fourth port, wherein the second master controller is configured to determine an address configuration status of the corresponding second slave node;
one end of the third port is connected with the second port, the other end of the third port is connected with the third physical transceiver, and one end of the fourth port is connected with the fourth physical transceiver; and, in addition, the method comprises the steps of,
The output end of the third physical transceiver is connected with the input end of the third protocol controller, the output end of the third protocol controller is connected with the input end of the second main controller, the output end of the second main controller is connected with the input end of the fourth protocol controller, the output end of the fourth protocol controller is connected with the input end of the fourth physical transceiver, the output end of the fourth physical transceiver is connected with the input end of the fourth protocol controller, the output end of the fourth protocol controller is connected with the input end of the third protocol controller, and the output end of the third protocol controller is connected with the input end of the third physical transceiver.
8. The system of claim 7, wherein the system comprises n of the second slave nodes;
And the third port of the 1 st second slave node in the n second slave nodes is connected with the second port, and the fourth port of the i-1 th second slave node is connected with the third port of the i-th second slave node.
9. A communication method applied to the system of any one of claims 1 to 8, the method comprising:
The master node sequentially sends a plurality of different address allocation instructions to the first slave node according to a preset time frequency based on the number of slave nodes of the first slave node and the second slave node;
When the first slave node receives the address allocation instruction, the first slave node determines the address configuration state of the first slave node;
The address configuration state corresponding to the first slave node is an unconfigured address state, and the first slave node performs address configuration based on the address allocation instruction;
the address configuration state corresponding to the first slave node is a configured address state, and the first slave node forwards the address allocation instruction to the second slave node adjacent to the first slave node.
10. An electronic device, comprising:
A memory for storing instructions for execution by one or more processors of the electronic device;
And a processor, one of the processors of the electronic device, for executing instructions stored in the memory to implement the method of claim 9.
11. A computer readable storage medium having stored thereon instructions that, when executed on an electronic device, cause the electronic device to implement the method of claim 9.
12. A program product comprising instructions which, when executed on an electronic device, cause the electronic device to implement the method of claim 9.
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