CN118547265A - Semiconductor processing device and semiconductor coating equipment - Google Patents

Abstract

The present application relates to the technical field of semiconductor thin film vapor deposition, and discloses a semiconductor processing device and a semiconductor coating equipment, wherein the semiconductor processing device comprises: a reaction chamber, comprising a top plate and a bottom plate, the top plate and the bottom plate are arranged with relative spacing to form a reaction space of the reaction chamber; a diffuser, arranged above the top plate and in fluid communication with the reaction chamber, for uniformly diffusing at least one reaction gas into the reaction chamber; a heating plate, rising or falling relative to the bottom plate, for delivering a substrate into the reaction chamber or taking it out of the reaction chamber; wherein the top plate comprises a plurality of first jet holes facing the reaction chamber, and the heating plate comprises a plurality of second jet holes facing the reaction chamber; in a cleaning stage, the first jet holes spray a first cleaning gas onto the surface of the substrate under a vacuum state, and the second jet holes spray a second cleaning gas onto the bottom of the substrate or the reaction chamber under a vacuum state.

Description

Semiconductor processing device and semiconductor coating equipment

Technical Field

The present application relates to the technical field of semiconductor thin film vapor deposition, for example, to a semiconductor processing device and a semiconductor coating equipment.

Background Art

At present, atomic layer deposition (ALD) is a modern process used in the semiconductor industry to form a thin film of material on a substrate such as a silicon wafer. ALD is a type of vapor deposition in which a film is formed by depositing multiple ultra-thin layers with a film thickness determined by the number of deposited layers. In the ALD process, gaseous molecules of one or more compounds of the material to be deposited are supplied to a substrate or wafer to form a thin film of that material on the substrate. Within one pulse, the precursor material is adsorbed onto the substrate quite completely in a self-limiting process. The precursor material can be decomposed in a subsequent reactant pulse to form a monolayer of the desired material. Alternatively, the adsorbed precursor material can react with the reactants of the subsequent reactant pulse to form a monolayer of the compound. A thicker film is produced by repeated growth cycles until the target thickness is reached.

At the same time, during the process of depositing the above-mentioned thin film, the inside of the reaction chamber needs to be cleaned to etch away the residual film in the reaction chamber and avoid the generation of particle impurities as much as possible, because these particle impurities will affect the performance and reliability of the film, and in severe cases may even cause complete failure of the device.

In the process of implementing the embodiments of the present disclosure, it is found that there are at least the following problems in the related art:

The existing chamber cleaning method has low cleaning efficiency and unsatisfactory cleaning effect, and is unable to independently process the dust and gas in the reaction chamber, which ultimately leads to reduced film uniformity and production yield.

Summary of the invention

In order to provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. The summary is not an extensive review, nor is it intended to identify key/critical components or delineate the scope of protection of these embodiments, but rather serves as a prelude to the detailed description that follows.

The embodiments of the present disclosure provide a semiconductor processing device and a semiconductor coating device to improve the cleaning rate and cleaning effect, thereby improving the uniformity of the film and the production yield.

In some embodiments, a semiconductor processing device includes: a reaction chamber, including a top plate and a bottom plate, which are relatively spaced apart to form a reaction space of the reaction chamber; a diffuser, which is arranged above the top plate and is fluidly connected to the reaction chamber to uniformly diffuse at least one reaction gas into the reaction chamber; a heating plate, which rises or falls relative to the bottom plate to send a substrate into the reaction chamber or take it out of the reaction chamber; wherein the top plate includes a plurality of first jet holes facing the reaction chamber, and the heating plate includes a plurality of second jet holes facing the reaction chamber; in a cleaning stage, the first jet holes spray a first cleaning gas onto a surface of the substrate under a vacuum state, and the second jet holes spray a second cleaning gas onto a bottom of the substrate or the reaction chamber under a vacuum state.

Optionally, the heating plate comprises: a groove configured to carry the substrate, and a plurality of second gas injection holes distributed along the surface of the groove; and after the substrate is moved out of the reaction chamber, the second cleaning gas is supplied into the reaction chamber to clean the reaction chamber.

Optionally, the heating plate further comprises: an edge boss forming the periphery of the groove, and a plurality of second gas injection holes facing the reaction chamber are arranged on the edge boss.

Optionally, the semiconductor processing device further includes: a first gas source, connected to each first gas injection hole via a first ventilation pipeline and a second ventilation pipeline, for providing a first cleaning gas; wherein the first cleaning gas includes an inert gas and plasma radicals.

Optionally, the semiconductor processing device further includes: a second gas source, connected to each second gas injection hole via a fifth ventilation line, a fourth ventilation line and a third ventilation line, for providing a second cleaning gas; wherein the second cleaning gas includes plasma radicals.

Optionally, the semiconductor processing device also includes: a third gas source, which is connected to each second injection hole via a sixth ventilation line, a fourth ventilation line and a third ventilation line to provide a second cleaning gas; wherein the second cleaning gas includes an inert gas; wherein the fourth ventilation line, the fifth ventilation line and the sixth ventilation line are connected through a three-way valve to respectively control the opening and closing of the fifth ventilation line and the fourth ventilation line or the opening and closing of the sixth ventilation line and the fourth ventilation line.

Optionally, the semiconductor processing device also includes: an exhaust assembly connected to the end of the reaction chamber through the base plate, for extracting gas and particles from the reaction chamber; a particle recovery device connected to a first exhaust pipeline of the exhaust assembly, and a first control valve is provided at the connection point; an exhaust gas treatment device connected to a second exhaust pipeline of the exhaust assembly, and a second control valve is provided at the connection point.

Optionally, when the first jet hole sprays the first cleaning gas toward the surface of the substrate under a vacuum state, the first control valve and the second control valve are in an open state; when the second jet hole sprays the second cleaning gas toward the bottom of the substrate under a vacuum state, the first control valve and the second control valve are in an open state; when the second jet hole sprays the second cleaning gas toward the reaction chamber under a vacuum state, the first control valve is in a closed state and the second control valve is in an open state.

Optionally, the aperture of the first jet hole and/or the second jet hole is 1 mm-5 mm; the distribution of the first jet hole and/or the second jet hole includes one of equal-interval distribution, staggered distribution or unequal-interval distribution.

In some embodiments, the semiconductor coating equipment includes a semiconductor processing device as described in the present application, wherein the semiconductor coating equipment includes an etching equipment, a chemical vapor deposition equipment, or an atomic layer deposition equipment.

The semiconductor processing device and semiconductor coating equipment provided by the embodiments of the present disclosure can achieve the following technical effects:

By arranging a plurality of first gas injection holes facing the reaction chamber on the top plate and arranging a plurality of second gas injection holes facing the reaction chamber on the heating plate, in the cleaning stage, the first cleaning gas is sprayed toward the surface of the substrate through the first gas injection holes under a vacuum state, and the second cleaning gas is sprayed toward the bottom of the substrate or the reaction chamber through the second gas injection holes under a vacuum state, thereby achieving comprehensive and deep cleaning of the substrate and the reaction chamber, improving the cleaning efficiency and cleaning effect, and improving the film uniformity and production yield.

The above general description and the following description are exemplary and explanatory only and are not intended to limit the present application.

BRIEF DESCRIPTION OF THE DRAWINGS

One or more embodiments are exemplarily described by corresponding drawings, which do not limit the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements, and the drawings do not constitute a scale limitation, and wherein:

FIG. 1 is a schematic structural diagram of a semiconductor processing device provided in an embodiment of the present disclosure.

Reference numerals:

1-diffuser; 2-mixer; 3-top plate; 4-bottom plate; 5-reaction chamber; 6-heating plate; 7-exhaust assembly; 8-air flow groove; 9-air flow passage; 10-groove; 11-edge boss; 12-first gas source; 13-second gas source; 14-first jet hole; 15-second jet hole; 16-first ventilation line; 17-second ventilation line; 18-third ventilation line; 19-fourth ventilation line; 20-filter assembly; 21-first control valve; 22-second control valve; 23-first exhaust line; 24-second exhaust line; 25-particle recovery device; 26-exhaust treatment device; 27-gas diffusion part; 28-end surface; 29-gas mixing part; 30-third gas source; 31-three-way valve; 32-fifth ventilation line; 33-sixth ventilation line.

DETAILED DESCRIPTION

In order to be able to understand the features and technical contents of the embodiments of the present disclosure in more detail, the implementation of the embodiments of the present disclosure is described in detail below in conjunction with the accompanying drawings. The attached drawings are for reference only and are not used to limit the embodiments of the present disclosure. In the following technical description, for the convenience of explanation, a full understanding of the disclosed embodiments is provided through multiple details. However, one or more embodiments can still be implemented without these details. In other cases, to simplify the drawings, well-known structures and devices can be simplified for display.

The terms "first", "second", etc. in the specification and claims of the embodiments of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchanged where appropriate, so that the embodiments of the embodiments of the present disclosure described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

In the embodiments of the present disclosure, the terms "upper", "lower", "inside", "middle", "outside", "front", "back" and the like indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings. These terms are mainly intended to better describe the embodiments of the present disclosure and their embodiments, and are not intended to limit the indicated devices, elements or components to have specific directions, or to be constructed and operated in specific directions. Moreover, in addition to being used to indicate directions or positional relationships, some of the above terms may also be used to indicate other meanings. For example, the term "upper" may also be used to indicate a certain dependency or connection relationship in certain circumstances. For those of ordinary skill in the art, the specific meanings of these terms in the embodiments of the present disclosure may be understood according to specific circumstances.

In addition, the terms "disposed", "connected", and "fixed" should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be an internal connection between two devices, elements, or components. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present disclosure can be understood according to the specific circumstances.

Unless otherwise stated, the term "plurality" means two or more.

In the embodiment of the present disclosure, the character "/" indicates that the preceding and following objects are in an "or" relationship. For example, A/B indicates: A or B.

The term "and/or" is a description of the association relationship between objects, indicating that three relationships can exist. For example, A and/or B means: A or B, or, A and B.

It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present disclosure may be combined with each other.

Atomic layer deposition (ALD) is a deposition technology that uses the chemical adsorption and desorption produced by the surface saturation reaction of the precursor on the substrate surface to form a single atomic layer. This technology deposits the material on the substrate surface layer by layer in the form of a single atomic layer, and simply and accurately controls the thickness of the film by controlling the number of reaction cycles, forming atomic layer films of different thicknesses.

At present, the cleanliness of the coating environment is the key to determining the product yield. Ensuring that the coating environment is in a highly clean state is an effective means to avoid defects in the product film layer. Therefore, it is crucial to clean the substrate and the coating chamber in the coating process. The two most commonly used chamber cleaning technologies include in-situ plasma cleaning and ex-situ plasma cleaning. In-situ plasma cleaning generates plasma inside the chamber and removes surface deposits inside the chamber based on the principle of dry reactive etching. It can quickly remove surface deposits, but the charged particles produced by the ionization of the reaction gas used to etch the deposits will also corrode the reaction chamber, resulting in undesirable over-etching and wear on the surface inside the chamber. Ex-situ plasma cleaning uses a plasma source set outside the process chamber to generate active plasma radicals, which are transported from the plasma source to the reaction chamber through a pipeline for cleaning.

In the related art, a semiconductor processing device generally includes a housing, a gas delivery system reaction chamber, a heating plate and an exhaust assembly. The heating plate carries a semiconductor substrate into the reaction chamber, and under a vacuum state, the substrate chemically reacts with the reaction gas delivered by the gas delivery system, including an etching stage, a thin film deposition stage, a cleaning stage or any other stage known to those skilled in the art. The exhaust assembly can be kept in a normally open state to continuously ensure the flow of gas and particles in the reaction chamber.

As shown in FIG. 1 , the semiconductor processing device of the present application adopts a horizontal air intake method, including a diffuser 1, a mixer 2, a reaction chamber 5, a heating plate 6, an exhaust assembly 7, a particle recovery device 25 and an exhaust gas treatment device 26, wherein the mixer 2 is connected to one end of the diffuser 1, and the other end of the diffuser 1 is fluidly connected to the reaction chamber 5 through the end surface 28. The reaction chamber 5 includes a top plate 3 and a bottom plate 4, and the top plate 3 and the bottom plate 4 are relatively spaced to form a reaction space of the reaction chamber 5. The heating plate 6 can rise or fall relative to the bottom plate 4 to deliver the substrate (i.e., substrate or wafer) into the reaction chamber 5 or take it out of the reaction chamber 5. The exhaust assembly 7 is connected to the end of the reaction chamber 5 through the bottom plate 4 to extract gas and particles from the reaction chamber 5. As shown in FIG1 , the reaction gas passes through the gas mixing portion 29 of the mixer 2, the gas diffusion portion 27 of the diffuser 1, the gas flow grooves 8 corresponding to the end surface portion 28, the reaction chamber 5 and the exhaust assembly 7 to the particle recovery device 25, or the reaction gas passes through the mixer 2, the diffuser 1, the gas flow grooves 8, the reaction chamber 5, the exhaust assembly 7 to the gas flow passage 9 of the exhaust gas treatment device 26. In particular, the reaction gas flowing through the mixer 2 and the diffuser 1 flows to the reaction chamber 5 and the exhaust assembly 7 after being redirected by the gas flow grooves 8.

At the same time, as shown in FIG1 , the top plate 3 of the semiconductor processing device of the present application includes a plurality of first gas injection holes 14 facing the reaction chamber 5, and the heating plate 6 of the semiconductor processing device of the present application includes a plurality of second gas injection holes 15 facing the reaction chamber 5. In the cleaning stage, the first gas injection holes 14 spray the first cleaning gas to the surface of the substrate under vacuum, and the second gas injection holes 15 spray the second cleaning gas to the bottom of the substrate or the reaction chamber 5 under vacuum.

The first cleaning gas includes an inert gas and plasma radicals. The second cleaning gas may include an inert gas and plasma radicals, or may be only an inert gas. Specifically, when the second gas jet 15 blows gas toward the bottom of the substrate in a vacuum state, the second cleaning gas is an inert gas and plasma radicals for cleaning. When the second gas jet 15 blows gas toward the reaction chamber 5 in a vacuum state, the second cleaning gas is an inert gas for purging, and the inert gas includes but is not limited to nitrogen and argon.

Optionally, the aperture of the first jet hole 14 and/or the second jet hole 15 is 1 mm to 5 mm. The distribution of the first jet hole 14 and/or the second jet hole 15 includes one of equal-interval distribution, staggered distribution or unequal-interval distribution.

By adopting the semiconductor processing device and semiconductor coating equipment provided by the embodiments of the present disclosure, a plurality of first gas injection holes 14 facing the reaction chamber 5 are arranged on the top plate 3, and a plurality of second gas injection holes 15 facing the reaction chamber 5 are arranged on the heating plate 6. Thus, in the cleaning stage, the first cleaning gas is sprayed toward the surface of the substrate through the first gas injection holes 14 under a vacuum state, and the second cleaning gas is sprayed toward the bottom of the substrate or the reaction chamber 5 under a vacuum state through the second gas injection holes 15. This can achieve comprehensive and deep cleaning of the substrate and the reaction chamber 5, improve the cleaning efficiency and cleaning effect, and improve the uniformity of the thin film and the production yield.

Optionally, the heating plate 6 of the present application includes a groove 10 and an edge boss 11, wherein the groove 10 is configured to carry a substrate, and a plurality of second gas injection holes 15 are distributed along the surface of the groove 10. After the substrate is moved out of the reaction chamber 5, the second cleaning gas is supplied into the reaction chamber 5 to clean the reaction chamber 5. The edge boss 11 forms the periphery of the groove 10, and a plurality of second gas injection holes 15 facing the reaction chamber 5 are provided on the edge boss 11.

Specifically, the heating plate 6 of the present application is a groove 10 structure with a lower middle and a higher edge. The groove 10 is preferably located in the central area of the heating plate 6 for carrying the substrate. The surface of the groove 10 has a plurality of second gas injection holes 15. The surface area of the groove 10 may be slightly larger than the surface area of the substrate. At the same time, after the substrate is moved out of the reaction chamber 5 via the heating plate 6, the plurality of second gas injection holes 15 on the surface of the groove 10 may supply the inert gas from bottom to top into the reaction chamber 5 to fully purge the interior of the reaction chamber 5, and then treat the inert gas via the exhaust assembly 7 and the tail gas treatment device 26.

In this way, the life of the components can be better improved, the frequency of chamber maintenance can be reduced, and it is beneficial to improve equipment output and reduce production costs.

Optionally, in combination with FIG. 1 , the semiconductor processing device of the present application further includes a first gas source 12, a second gas source 13 and a third gas source 30, wherein the first gas source 12 is connected to each first gas injection hole 14 via a first ventilation line 16 and a second ventilation line 17 to provide a first cleaning gas. The second gas source 13 is connected to each second gas injection hole 15 via a fifth ventilation line 32, a fourth ventilation line 19 and a third ventilation line 18 to provide a second cleaning gas. The third gas source 30 is connected to each second gas injection hole 15 via a sixth ventilation line 33, a fourth ventilation line 19 and a third ventilation line 18 to provide a second cleaning gas.

The fourth ventilation line 19, the fifth ventilation line 32 and the sixth ventilation line 33 are connected through the three-way valve 31 to respectively control the connection and disconnection of the fifth ventilation line 32 and the fourth ventilation line 19 or the connection and disconnection of the sixth ventilation line 33 and the fourth ventilation line 19. The first cleaning gas includes an inert gas and plasma radicals. The second cleaning gas may include an inert gas and plasma radicals, or may be only an inert gas.

It should be noted that when the second gas injection hole 15 blows gas toward the bottom of the substrate in a vacuum state, the second cleaning gas is an inert gas and plasma radicals for cleaning. When the second gas injection hole 15 blows gas toward the reaction chamber 5 in a vacuum state, the second cleaning gas is an inert gas for purging. The inert gas includes but is not limited to nitrogen and argon.

In a specific embodiment of the present application, the first gas source 12 can spray an inert gas and plasma radicals to the surface of the substrate under a vacuum state to clean the surface of the substrate. The second gas source 13 can spray an inert gas and plasma radicals to the bottom of the substrate under a vacuum state to clean the bottom of the substrate, so that the dielectric film reacts to generate volatile substances (particles), and then the particles and gas are processed through the exhaust component 7. The third gas source 30 can spray an inert gas to the reaction chamber 5 under a vacuum state to purge the reaction chamber 5, and then the gas is processed through the exhaust component 7.

In this way, different gas sources can be used to perform deep cleaning on the substrate or reaction chamber 5 in a vacuum environment, thereby further improving the cleanliness of the substrate surface and the reaction chamber 5, thereby improving the cleaning effect, increasing the production yield, and reducing coating defects.

Optionally, as shown in FIG. 1 , the exhaust assembly 7 of the present application is connected to the end of the reaction chamber 5 through the bottom plate 4 to extract gas and particles from the reaction chamber 5. The particle recovery device 25 is connected to the first exhaust pipeline 23 of the exhaust assembly 7, and a first control valve 21 is provided at the connection point. The tail gas treatment device 26 is connected to the second exhaust pipeline 24 of the exhaust assembly 7, and a second control valve 22 is provided at the connection point.

In a specific embodiment of the present application, when the first gas jet 14 sprays the first cleaning gas to the surface of the substrate under vacuum, the first control valve 21 and the second control valve 22 are in an open state. When the second gas jet 15 sprays the second cleaning gas to the bottom of the substrate under vacuum, the first control valve 21 and the second control valve 22 are in an open state. At this time, a mixture of particles and gas will be generated in the reaction chamber 5. Therefore, in the cleaning stage, the first control valve 21 and the second control valve 22 are in an open state, and the particles enter the particle recovery device 25 through the first exhaust pipeline 23, so that the particles are gathered in a natural cooling manner, and the particle recovery device 25 collects the particles. At the same time, the gas is filtered through the second exhaust pipeline 24 and the filter assembly 20 and then output to the exhaust gas treatment device 26. The exhaust gas treatment device 26 performs exhaust gas combustion and waste treatment on the purged gas, thereby achieving the final treatment of the gas.

In another specific embodiment of the present application, when the second gas injection hole 15 injects the second cleaning gas into the reaction chamber 5 under vacuum, the first control valve 21 is in a closed state and the second control valve 22 is in an open state. At this time, only gas for purging is generated in the reaction chamber 5. Therefore, in the cleaning stage, the first control valve 21 is in a closed state and the second control valve 22 is in an open state. The gas is filtered through the second exhaust pipeline 24 and the filter assembly 20 and then output to the exhaust gas treatment device 26. The exhaust gas treatment device 26 performs exhaust gas combustion and waste treatment on the purged gas, thereby achieving the final treatment of the gas.

In this way, by providing the particle recovery device 25 and the tail gas treatment device 26, the particles and the gas can be treated independently of each other, thereby reducing the operating pressure of the device and improving the efficiency of the chemical vapor deposition manufacturing process.

An embodiment of the present disclosure provides a semiconductor coating device including a semiconductor processing apparatus as described in the present application, wherein the semiconductor coating device includes an etching device, a chemical vapor deposition device or an atomic layer deposition device.

The above description and the accompanying drawings sufficiently illustrate the embodiments of the present disclosure to enable those skilled in the art to practice them. Other embodiments may include structural and other changes. The embodiments represent only possible variations. Unless explicitly required, individual components and functions are optional, and the order of operations may vary. Portions and features of some embodiments may be included in or replace portions and features of other embodiments. The embodiments of the present disclosure are not limited to the structures described above and shown in the accompanying drawings, and various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims (10)

1. A semiconductor processing apparatus, comprising:

the reaction chamber comprises a top plate and a bottom plate, and the top plate and the bottom plate are oppositely arranged at intervals to form a reaction space of the reaction chamber;

a diffuser disposed above the top plate and in fluid communication with the reaction chamber for uniformly diffusing at least one reactant gas into the reaction chamber;

A heating plate which is raised or lowered with respect to the base plate to transfer a substrate into or out of the reaction chamber;

Wherein the top plate comprises a plurality of first air injection holes facing the reaction chamber, and the heating plate comprises a plurality of second air injection holes facing the reaction chamber; in the cleaning stage, the first air injection holes inject a first cleaning gas to the surface of the substrate in a vacuum state, and the second air injection holes inject a second cleaning gas to the bottom of the substrate or the reaction chamber in a vacuum state.

2. The semiconductor processing apparatus of claim 1, wherein the hotplate comprises:

A groove configured to carry a substrate, a plurality of second gas injection holes distributed along a surface of the groove; and after the substrate is moved out of the reaction chamber, the second cleaning gas is supplied into the reaction chamber to clean the reaction chamber.

3. The semiconductor processing apparatus of claim 2, wherein the hotplate further comprises:

And the edge boss is formed at the periphery of the groove, and a plurality of second air injection holes facing the reaction chamber are formed in the edge boss.

4. The semiconductor processing apparatus of claim 1, further comprising:

A first gas source in communication with each of the first gas injection holes via a first vent line and a second vent line for providing the first cleaning gas; wherein the first cleaning gas comprises an inert gas and plasma radicals.

5. The semiconductor processing apparatus of claim 1, further comprising:

a second gas source in communication with each of the second gas injection holes via a fifth vent line, a fourth vent line, and a third vent line for providing the second cleaning gas; wherein the second cleaning gas comprises plasma radicals.

6. The semiconductor processing apparatus of claim 5, further comprising:

A third gas source in communication with each of the second gas injection holes via a sixth vent line, a fourth vent line, and a third vent line for providing the second cleaning gas; wherein the second cleaning gas comprises an inert gas;

The fourth ventilation pipeline, the fifth ventilation pipeline and the sixth ventilation pipeline are communicated through a three-way valve and used for controlling the on-off of the fifth ventilation pipeline and the fourth ventilation pipeline or the on-off of the sixth ventilation pipeline and the fourth ventilation pipeline respectively.

7. The semiconductor processing apparatus of claim 1, further comprising:

An exhaust assembly, which is communicated to the end of the reaction chamber through the bottom plate, for extracting gas and particles from the reaction chamber;

The particle recovery device is communicated with the first air extraction pipeline of the exhaust assembly, and a first control valve is arranged at the communication position;

and the tail gas treatment device is communicated with the second air extraction pipeline of the exhaust assembly, and a second control valve is arranged at the communication position.

8. The semiconductor processing apparatus according to claim 7, wherein the first control valve and the second control valve are in an open state in a case where the first gas injection hole injects a first cleaning gas toward the surface of the substrate in a vacuum state;

The first control valve and the second control valve are in an open state under the condition that the second gas injection hole injects second cleaning gas to the bottom of the substrate in a vacuum state;

And when the second gas injection hole injects the second cleaning gas to the reaction chamber in a vacuum state, the first control valve is in a closed state, and the second control valve is in an open state.

9. The semiconductor processing apparatus of any one of claims 1 to 8, wherein the first and/or second gas injection holes have a hole diameter of 1mm-5mm; the distribution of the first gas injection holes and/or the second gas injection holes comprises one of equal interval distribution, dislocation distribution or unequal interval distribution.

10. A semiconductor coating apparatus comprising the semiconductor processing device according to any one of claims 1 to 9, wherein the semiconductor coating apparatus comprises an etching apparatus, a chemical vapor deposition apparatus, or an atomic layer deposition apparatus.