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CN118629880A - A method for manufacturing a power chip sintering module, a power chip sintering module, and a carrier jig - Google Patents

A method for manufacturing a power chip sintering module, a power chip sintering module, and a carrier jig Download PDF

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Publication number
CN118629880A
CN118629880A CN202411088882.1A CN202411088882A CN118629880A CN 118629880 A CN118629880 A CN 118629880A CN 202411088882 A CN202411088882 A CN 202411088882A CN 118629880 A CN118629880 A CN 118629880A
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silver paste
power chip
heat dissipation
base block
copper base
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CN118629880B (en
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陈冬弟
毛德祥
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Guangzhou Meadville Electronics Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • H01L21/4871Bases, plates or heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3736Metallic materials

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

本申请涉及功率芯片技术领域,公开了一种功率芯片烧结模块制作方法及功率芯片烧结模块、载板冶具,其方法包括挑起载板冶具上的限位线,将散热铜基块塞入至安装槽内并松开限位线;对散热铜基块进行OSP处理;挑起限位线,将散热铜基块从安装槽内移出;在散热铜基块的顶面的凹槽底部印刷第一银膏;烘烤形成第一银膏层;把功率芯片贴装至第一银膏层的表面;将功率芯片粘接至第一银膏层上;在功率芯片的栅极和源极上分别印刷第二银膏;烘烤形成第二银膏层;在各第二银膏层上贴装覆盖铜片;将铜片粘接至第二银膏层上。本申请具有降低散热铜基块的表面预处理难度,改善功率芯片烧结模块可靠性的效果。

The present application relates to the technical field of power chips, and discloses a method for manufacturing a power chip sintering module, a power chip sintering module, and a carrier jig. The method includes lifting the limit line on the carrier jig, inserting the heat dissipation copper base block into the installation groove and loosening the limit line; performing OSP treatment on the heat dissipation copper base block; lifting the limit line and removing the heat dissipation copper base block from the installation groove; printing a first silver paste at the bottom of the groove on the top surface of the heat dissipation copper base block; baking to form a first silver paste layer; mounting the power chip on the surface of the first silver paste layer; bonding the power chip to the first silver paste layer; printing a second silver paste on the gate and source of the power chip respectively; baking to form a second silver paste layer; mounting a covering copper sheet on each second silver paste layer; bonding the copper sheet to the second silver paste layer. The present application has the effect of reducing the difficulty of surface pretreatment of the heat dissipation copper base block and improving the reliability of the power chip sintering module.

Description

一种功率芯片烧结模块制作方法及功率芯片烧结模块、载板 冶具A method for manufacturing a power chip sintering module, a power chip sintering module, and a carrier plate Judge

技术领域Technical Field

本申请涉及功率芯片技术领域,尤其是涉及一种功率芯片烧结模块制作方法及功率芯片烧结模块、载板冶具。The present application relates to the technical field of power chips, and in particular to a method for manufacturing a power chip sintering module, a power chip sintering module, and a carrier jig.

背景技术Background Art

目前,应用于如新能源汽车等的主驱逆变器基板(又称功率芯片),采用将功率芯片嵌埋到基板内部的散热铜基顶面的凹槽内的烧结方式,先将功率芯片通过银烧结工艺焊接到散热铜基的凹槽底部,制作成为功率芯片烧结模块,再将功率芯片烧结模块作为一个整体包封到基板内部。其中,烧结银层实现了功率芯片的漏极和散热铜基电性连接,确保功率芯片可以正常工作,散热铜基因其金属铜良好的导热性,在功率芯片工作时,能够将热量加速传递,起到快速散热的作用,达到防止封装体内部的功率芯片的热量大量积聚,功率芯片烧结模块结温过高,影响功率芯片烧结模块乃至基板整体可靠性的目的。但是,裸铜在空气中非常容易氧化,导致散热铜基表面的可焊性急剧下降,进而导致烧结过程中的纳米银膏与氧化铜表面的结合力极差,高温下容易发生结合界面开裂造成基板失效的情况。At present, the main drive inverter substrate (also known as power chip) used in new energy vehicles adopts the sintering method of embedding the power chip into the groove on the top surface of the heat dissipation copper base inside the substrate. The power chip is first welded to the bottom of the groove of the heat dissipation copper base through the silver sintering process to make a power chip sintering module, and then the power chip sintering module is encapsulated inside the substrate as a whole. Among them, the sintered silver layer realizes the electrical connection between the drain of the power chip and the heat dissipation copper base, ensuring that the power chip can work normally. The heat dissipation copper base has good thermal conductivity of metal copper. When the power chip is working, it can accelerate the heat transfer and play a role in rapid heat dissipation, so as to prevent the heat accumulation of the power chip inside the package, and the junction temperature of the power chip sintering module is too high, which affects the reliability of the power chip sintering module and even the overall substrate. However, bare copper is very easy to oxidize in the air, resulting in a sharp decrease in the solderability of the heat dissipation copper base surface, which in turn leads to extremely poor bonding between the nano silver paste and the copper oxide surface during the sintering process. At high temperatures, the bonding interface is prone to cracking, causing the substrate to fail.

现有技术中,业界普遍采用低成本的水平生产线表面处理设备,单个散热铜基若过水平线做表面处理的话,行进过程中会掉落到药水缸中,导致散热铜基在银烧结前进行表面预处理存在难度。In the prior art, the industry generally uses low-cost horizontal production line surface treatment equipment. If a single heat dissipation copper base passes through the horizontal line for surface treatment, it will fall into the medicine tank during the process, making it difficult to perform surface pretreatment of the heat dissipation copper base before silver sintering.

针对上述中的相关技术,发明人发现现有的功率芯片烧结模块因散热铜基的表面预处理存在难度而可靠性较差的问题。With respect to the above-mentioned related technologies, the inventors have found that the existing power chip sintering modules have a problem of poor reliability due to the difficulty in pre-treating the surface of the heat dissipation copper base.

发明内容Summary of the invention

为了改善功率芯片烧结模块的可靠性,本申请提供了一种功率芯片烧结模块制作方法及功率芯片烧结模块、载板冶具。In order to improve the reliability of a power chip sintering module, the present application provides a method for manufacturing a power chip sintering module, a power chip sintering module, and a carrier jig.

第一方面,本申请提供一种功率芯片烧结模块制作方法。In a first aspect, the present application provides a method for manufacturing a power chip sintering module.

本申请是通过以下技术方案得以实现的:This application is achieved through the following technical solutions:

一种功率芯片烧结模块制作方法,包括以下步骤,A method for manufacturing a power chip sintering module comprises the following steps:

烧结前,挑起载板冶具的安装槽上的具有延展性的限位线,将散热铜基块塞入至所述安装槽内并松开所述限位线,其中,所述限位线沿所述散热铜基块的顶面的对角线方向设置,所述安装槽的内底部设置有用于限位所述散热铜基块的限位区,所述散热铜基块的顶面设置有用于容纳功率芯片的凹槽;Before sintering, lift the ductile limit line on the mounting groove of the carrier jig, insert the heat dissipation copper base block into the mounting groove and loosen the limit line, wherein the limit line is arranged along the diagonal direction of the top surface of the heat dissipation copper base block, the inner bottom of the mounting groove is provided with a limit area for limiting the heat dissipation copper base block, and the top surface of the heat dissipation copper base block is provided with a groove for accommodating a power chip;

对所述载板冶具上的所述散热铜基块的顶面进行OSP处理,直至所述散热铜基块的顶面通过化学方法附着一层有机涂层;Performing OSP treatment on the top surface of the heat dissipation copper base block on the carrier jig until a layer of organic coating is attached to the top surface of the heat dissipation copper base block by a chemical method;

挑起所述限位线,将所述散热铜基块从所述安装槽内移出;Lift the limit line to move the heat dissipation copper base block out of the installation groove;

在所述散热铜基块的顶面的凹槽底部印刷第一银膏;Printing a first silver paste at the bottom of the groove on the top surface of the heat dissipation copper base block;

烘烤所述第一银膏,形成第一银膏层;baking the first silver paste to form a first silver paste layer;

把功率芯片贴装至所述第一银膏层的表面;Mounting a power chip on the surface of the first silver paste layer;

高温烧结,直至所述功率芯片粘接至所述第一银膏层上,且所述第一银膏层中的溶剂彻底挥发,其中,高温烧结时的温度范围为175℃-350℃;High-temperature sintering until the power chip is bonded to the first silver paste layer and the solvent in the first silver paste layer is completely volatilized, wherein the temperature range of the high-temperature sintering is 175° C.-350° C.;

在所述功率芯片的栅极和源极上分别印刷第二银膏;Printing a second silver paste on the gate and source of the power chip respectively;

烘烤所述第二银膏,形成第二银膏层;baking the second silver paste to form a second silver paste layer;

在各所述第二银膏层上贴装铜片,所述铜片覆盖于所述第二银膏层的表面;Mounting a copper sheet on each of the second silver paste layers, wherein the copper sheet covers the surface of the second silver paste layer;

高温烧结,直至所述铜片粘接至所述第二银膏层上,且所述第二银膏层中的溶剂彻底挥发,其中,高温烧结时的温度范围为175℃-350℃。High-temperature sintering is performed until the copper sheet is bonded to the second silver paste layer and the solvent in the second silver paste layer is completely volatilized, wherein the temperature range of the high-temperature sintering is 175° C.-350° C.

本申请在一较佳示例中可以进一步配置为:印刷第二银膏时,采用以下步骤,In a preferred example, the present application can be further configured as follows: when printing the second silver paste, the following steps are adopted:

以压力10N和速度20mm/s,进行1次3D钢网印刷。Perform 1 pass of 3D steel screen printing at a pressure of 10 N and a speed of 20 mm/s.

本申请在一较佳示例中可以进一步配置为:烘烤第二银膏时,采用以下步骤,In a preferred example, the present application can be further configured as follows: when baking the second silver paste, the following steps are adopted:

在纯氮环境下,以140℃温度烘烤20min。In a pure nitrogen environment, bake at 140°C for 20 minutes.

本申请在一较佳示例中可以进一步配置为:所述铜片覆盖于所述第二银膏层的表面后,高温烧结时,采用以下步骤,In a preferred example, the present application can be further configured as follows: after the copper sheet covers the surface of the second silver paste layer, during high-temperature sintering, the following steps are adopted:

以250℃温度和16Mpa压力,通过烧结机高温烧结300s。The alloy was sintered at 250°C and 16 MPa for 300 seconds using a sintering machine.

第二方面,本申请提供一种功率芯片烧结模块制作方法。In a second aspect, the present application provides a method for manufacturing a power chip sintering module.

本申请是通过以下技术方案得以实现的:This application is achieved through the following technical solutions:

一种功率芯片烧结模块制作方法,包括以下步骤,A method for manufacturing a power chip sintering module comprises the following steps:

烧结前,挑起载板冶具的安装槽上的具有延展性的限位线,将散热铜基块塞入至所述安装槽内并松开所述限位线,其中,所述限位线沿所述散热铜基块的顶面的对角线方向设置,所述安装槽的内底部设置有用于限位所述散热铜基块的限位区,所述散热铜基块的顶面设置有用于容纳功率芯片的凹槽;Before sintering, lift the ductile limit line on the mounting groove of the carrier jig, insert the heat dissipation copper base block into the mounting groove and loosen the limit line, wherein the limit line is arranged along the diagonal direction of the top surface of the heat dissipation copper base block, the inner bottom of the mounting groove is provided with a limit area for limiting the heat dissipation copper base block, and the top surface of the heat dissipation copper base block is provided with a groove for accommodating a power chip;

对所述载板冶具上的所述散热铜基块的顶面进行OSP处理,直至所述散热铜基块的顶面通过化学方法附着一层有机涂层;Performing OSP treatment on the top surface of the heat dissipation copper base block on the carrier jig until a layer of organic coating is attached to the top surface of the heat dissipation copper base block by a chemical method;

挑起所述限位线,将所述散热铜基块从所述安装槽内移出;Lift the limit line to move the heat dissipation copper base block out of the installation groove;

在所述散热铜基块的顶面的凹槽底部印刷第一银膏;Printing a first silver paste at the bottom of the groove on the top surface of the heat dissipation copper base block;

烘烤所述第一银膏,形成第一银膏层;baking the first silver paste to form a first silver paste layer;

把功率芯片贴装至所述第一银膏层的表面;Mounting a power chip on the surface of the first silver paste layer;

高温烧结,直至所述功率芯片粘接至所述第一银膏层上,且所述第一银膏层中的溶剂彻底挥发,其中,高温烧结时的温度范围为175℃-350℃;High-temperature sintering until the power chip is bonded to the first silver paste layer and the solvent in the first silver paste layer is completely volatilized, wherein the temperature range of the high-temperature sintering is 175° C.-350° C.;

在所述功率芯片的栅极和源极上分别贴装银膜;Mounting silver films on the gate and source of the power chip respectively;

在各所述银膜上贴装铜片,所述铜片覆盖于所述银膜的表面;Mounting a copper sheet on each of the silver films, wherein the copper sheet covers the surface of the silver film;

高温烧结,直至所述铜片粘接至所述银膜上,且所述银膜中的溶剂彻底挥发,其中,所述铜片覆盖于所述银膜的表面,高温烧结时的温度范围为175℃-350℃。High-temperature sintering is performed until the copper sheet is bonded to the silver film and the solvent in the silver film is completely volatilized, wherein the copper sheet covers the surface of the silver film, and the temperature range of high-temperature sintering is 175° C.-350° C.

本申请在一较佳示例中可以进一步配置为:贴装银膜时,采用以下步骤,In a preferred example, the present application can be further configured as follows: when mounting the silver film, the following steps are adopted:

设置固晶机的贴片温度为130℃-180℃,贴片压力为20N,贴片速度为20mm/s。Set the die bonding machine's die bonding temperature to 130°C-180°C, die bonding pressure to 20N, and die bonding speed to 20mm/s.

本申请在一较佳示例中可以进一步配置为:所述铜片覆盖于所述银膜的表面后,高温烧结时,采用以下步骤,In a preferred example, the present application can be further configured as follows: after the copper sheet is covered on the surface of the silver film, during high temperature sintering, the following steps are adopted:

以250℃温度和16Mpa压力,通过烧结机高温烧结300s。The alloy was sintered at 250°C and 16 MPa for 300 seconds using a sintering machine.

本申请在一较佳示例中可以进一步配置为:贴装铜片时,采用以下步骤,In a preferred example, the present application can be further configured as follows: when mounting the copper sheet, the following steps are adopted:

设置贴片温度120℃,贴片压力50N,通过固晶机贴装1200ms。Set the chip temperature to 120℃, the chip pressure to 50N, and use the die bonding machine to mount for 1200ms.

第三方面,本申请提供一种载板冶具。In a third aspect, the present application provides a carrier jig.

本申请是通过以下技术方案得以实现的:This application is achieved through the following technical solutions:

一种载板冶具,应用于上述任意一种功率芯片烧结模块制作方法,包括介质层,所述介质层由若干半固化片叠合后高温压合形成,其中,高温压合时的温度范围为175℃-350℃;A substrate jig, applied to any one of the above-mentioned methods for manufacturing a power chip sintering module, comprising a dielectric layer, wherein the dielectric layer is formed by laminating a plurality of prepregs and then laminating them at high temperature, wherein the temperature range of the high temperature laminating is 175°C-350°C;

所述载板冶具上加工有若干安装槽,所述安装槽的尺寸为mm级别且大于所述散热铜基块的尺寸;The carrier jig is processed with a plurality of mounting grooves, the size of which is in the mm level and is larger than the size of the heat dissipation copper base block;

所述安装槽的内底部居中位置凹设有限位区;A limiting area is recessed in the center of the inner bottom of the installation groove;

所述载板冶具上在所述安装槽的外围位置钻设有若干第一通孔和若干第二通孔,若干所述第一通孔位于所述安装槽的对边平分线方向上,若干所述第二通孔位于所述安装槽的对角线方向上,所述第一通孔距离所述安装槽的槽边的距离值等于所述第二通孔距离相邻所的述安装槽的槽边的垂直距离值,且所述距离值和所述垂直距离值均大于0;The carrier jig is provided with a plurality of first through holes and a plurality of second through holes at the outer position of the mounting groove, wherein the plurality of first through holes are located in the direction of the bisector of the opposite sides of the mounting groove, and the plurality of second through holes are located in the direction of the diagonal line of the mounting groove, and the distance value between the first through hole and the groove edge of the mounting groove is equal to the vertical distance value between the second through hole and the groove edge of the adjacent mounting groove, and the distance value and the vertical distance value are both greater than 0;

所述第二通孔内穿设有具有延展性的限位线,所述限位线呈X形交叉于所述安装槽的正上方,所述限位线的线头和线尾固定于所述第二通孔内。A ductile limiting line is passed through the second through hole, and the limiting line is in an X shape and crosses just above the mounting groove, and the head and tail of the limiting line are fixed in the second through hole.

本申请在一较佳示例中可以进一步配置为:所述第二通孔的数量为4个且沿所述安装槽的对角线方向上均匀分布。In a preferred example, the present application can be further configured as follows: the number of the second through holes is 4 and they are evenly distributed along the diagonal direction of the mounting groove.

本申请在一较佳示例中可以进一步配置为:所述第一通孔的数量为4个且沿所述安装槽的对边平分线方向上均匀分布。In a preferred example, the present application can be further configured as follows: the number of the first through holes is 4 and they are evenly distributed along the direction of the bisector of the opposite sides of the mounting groove.

本申请在一较佳示例中可以进一步配置为:所述限位区呈十字形。In a preferred example, the present application can be further configured as follows: the limiting area is in a cross shape.

本申请在一较佳示例中可以进一步配置为:所述限位线的线头和线尾分别位于所述载板冶具的同一对角线方向上的两个所述第二通孔内,且该第二通孔内灌满固化的用于固定所述限位线的线头和线尾的环氧树脂。In a preferred example, the present application can be further configured as follows: the end and tail of the limit line are respectively located in two of the second through holes in the same diagonal direction of the carrier jig, and the second through holes are filled with solidified epoxy resin for fixing the end and tail of the limit line.

第四方面,本申请提供一种功率芯片烧结模块。In a fourth aspect, the present application provides a power chip sintering module.

本申请是通过以下技术方案得以实现的:This application is achieved through the following technical solutions:

一种功率芯片烧结模块,采用上述功率芯片烧结模块制作方法制成,包括散热铜基块,所述散热铜基块的长度为10-12mm,所述散热铜基块的宽度为10-12mm,所述散热铜基块的厚度为1.1-1.3mm,所述散热铜基块的顶面设置有凹槽,所述凹槽的长度为8-9mm,所述凹槽的宽度为6-7mm,所述凹槽的深度为0.2-0.3mm;A power chip sintering module is made by the above-mentioned power chip sintering module manufacturing method, comprising a heat dissipation copper base block, the heat dissipation copper base block has a length of 10-12 mm, a width of 10-12 mm, a thickness of 1.1-1.3 mm, and a groove is provided on the top surface of the heat dissipation copper base block, the length of the groove is 8-9 mm, the width of the groove is 6-7 mm, and the depth of the groove is 0.2-0.3 mm;

所述凹槽内居中位置由下往上依次设置有第一银膏层和功率芯片,所述第一银膏层的长度为7.0-7.5mm,所述第一银膏层的宽度为5.0-5.5mm,所述第一银膏层的厚度为0.02-0.04mm,所述功率芯片的长度为6.90-6.95mm,所述功率芯片的宽度为4.70-4.75mm,所述功率芯片的厚度为0.1-0.2mm;A first silver paste layer and a power chip are sequentially arranged in the center of the groove from bottom to top, the length of the first silver paste layer is 7.0-7.5 mm, the width of the first silver paste layer is 5.0-5.5 mm, the thickness of the first silver paste layer is 0.02-0.04 mm, the length of the power chip is 6.90-6.95 mm, the width of the power chip is 4.70-4.75 mm, and the thickness of the power chip is 0.1-0.2 mm;

所述功率芯片的栅极和源极上分别印刷有第二银膏层,所述第二银膏层完全覆盖所述极和所述源极,所述栅极的长度为0.5-0.6mm,所述栅极的宽度为0.7-0.8mm,所述源极有两个,所述源极的长度为6.1-6.3mm,所述源极的宽度为2.1-2.3mm,所述第二银膏层的厚度为0.02-0.04mm;A second silver paste layer is printed on the gate and source of the power chip respectively, the second silver paste layer completely covers the gate and the source, the length of the gate is 0.5-0.6 mm, the width of the gate is 0.7-0.8 mm, there are two source electrodes, the length of the source electrode is 6.1-6.3 mm, the width of the source electrode is 2.1-2.3 mm, and the thickness of the second silver paste layer is 0.02-0.04 mm;

所述第二银膏层上均覆盖有铜片,所述铜片的厚度为0.02-0.04mm。The second silver paste layer is covered with a copper sheet, and the thickness of the copper sheet is 0.02-0.04 mm.

第五方面,本申请提供一种功率芯片烧结模块。In a fifth aspect, the present application provides a power chip sintering module.

本申请是通过以下技术方案得以实现的:This application is achieved through the following technical solutions:

一种功率芯片烧结模块,采用上述功率芯片烧结模块制作方法制成,包括散热铜基块,所述散热铜基块的长度为10-12mm,所述散热铜基块的宽度为10-12mm,所述散热铜基块的厚度为1.1-1.3mm,所述散热铜基块的顶面设置有凹槽,所述凹槽的长度为8-9mm,所述凹槽的宽度为6-7mm,所述凹槽的深度为0.2-0.3mm;A power chip sintering module, made by the above-mentioned power chip sintering module manufacturing method, comprises a heat dissipation copper base block, the heat dissipation copper base block has a length of 10-12 mm, a width of 10-12 mm, a thickness of 1.1-1.3 mm, a top surface of the heat dissipation copper base block is provided with a groove, the length of the groove is 8-9 mm, the width of the groove is 6-7 mm, and the depth of the groove is 0.2-0.3 mm;

所述凹槽内居中位置由下往上依次设置有第一银膏层和功率芯片,所述第一银膏层的长度为7.0-7.5mm,所述第一银膏层的宽度为5.0-5.5mm,所述第一银膏层的厚度为0.02-0.04mm,所述功率芯片的长度为6.90-6.95mm,所述功率芯片的宽度为4.70-4.75mm,所述功率芯片的厚度为0.1-0.2mm;A first silver paste layer and a power chip are sequentially arranged in the center of the groove from bottom to top, the length of the first silver paste layer is 7.0-7.5 mm, the width of the first silver paste layer is 5.0-5.5 mm, the thickness of the first silver paste layer is 0.02-0.04 mm, the length of the power chip is 6.90-6.95 mm, the width of the power chip is 4.70-4.75 mm, and the thickness of the power chip is 0.1-0.2 mm;

所述功率芯片的栅极和源极上分别烧结有银膜层,所述银膜层完全覆盖所述极和所述源极,所述栅极的长度为0.5-0.6mm,所述栅极的宽度为0.7-0.8mm,所述源极有两个,所述源极的长度为6.1-6.3mm,所述源极的宽度为2.1-2.3mm,所述银膜层的厚度为0.01-0.03mm;Silver film layers are sintered on the gate and source of the power chip respectively, and the silver film layers completely cover the gate and the source. The length of the gate is 0.5-0.6 mm, the width of the gate is 0.7-0.8 mm, there are two source electrodes, the length of the source electrode is 6.1-6.3 mm, the width of the source electrode is 2.1-2.3 mm, and the thickness of the silver film layer is 0.01-0.03 mm;

所述银膜层上均覆盖有铜片,所述铜片的厚度为0.02-0.04mm。The silver film layers are all covered with copper sheets, and the thickness of the copper sheets is 0.02-0.04 mm.

综上所述,与现有技术相比,本申请提供的技术方案带来的有益效果至少包括:In summary, compared with the prior art, the technical solution provided by this application has at least the following beneficial effects:

在银烧结前,借助载板冶具限制散热铜基块于凹槽内,以能够对散热铜基块做表面处理,即使受到喷淋药水的冲击,散热铜基块在行进过程中也不会掉落至药水缸中,极大降低散热铜基块在银烧结前进行表面预处理的难度,增强散热铜基表面的可焊性,以减少因烧结前散热铜基块氧化导致与烧结银膏结合力差而造成基板失效的情况发生,改善功率芯片烧结模块的可靠性;同时,考虑到采用现有的沉银表面预处理工艺后,金属银会残留在散热铜基表面难以去除,故本申请采用OSP工艺对散热铜基进行表面预处理,通过化学方法能够在散热铜基块表面附着一层致密的有机涂层,达到防止散热铜基在银烧结前氧化,保证散热铜基表面可焊性的目的,且在后续的烧结过程中,OSP有机涂层在高温环境下将被熔掉分解与挥发,重新析出铜单质与银膏,进一步形成牢固的铜-银共晶层增加结合力,也解决了金属银会残留在散热铜基表面难以去除的问题;以及,内埋功率芯片的主驱逆变器基板PCB需要借助激光钻孔工艺在功率芯片顶面的栅极和源极上形成φ200um的铜柱,以导通功率芯片和PCB网络,而这一过程中功率芯片顶面的背金层很容易被激光击穿导致背金层下面的芯片线路损坏,造成基板损坏,故在功率芯片的栅极和源极上分别印刷银膏或者分别贴装银膜,再贴装烧结铜片,以在烧结的功率芯片的栅极和源极上的铜片上加工镭射盲孔,形成铜柱与PCB网络实现点信号连接,以增强功率芯片顶面的背金层的强度,减少功率芯片顶面的背金层被激光击穿的情况发生,增强功率芯片烧结模块的可靠性。Before silver sintering, the heat dissipation copper base block is restricted in the groove with the help of a carrier metallurgy so that the heat dissipation copper base block can be surface treated. Even if it is impacted by the spraying solution, the heat dissipation copper base block will not fall into the solution tank during the movement, which greatly reduces the difficulty of surface pretreatment of the heat dissipation copper base block before silver sintering, enhances the solderability of the heat dissipation copper base surface, and reduces the failure of the substrate caused by poor bonding with the sintered silver paste due to oxidation of the heat dissipation copper base block before sintering, thereby improving the reliability of the power chip sintering module; at the same time, considering that after the existing silver immersion surface pretreatment process is adopted, metallic silver will remain on the surface of the heat dissipation copper base and is difficult to remove, the present application adopts the OSP process to perform surface pretreatment of the heat dissipation copper base, and a layer of dense organic coating can be attached to the surface of the heat dissipation copper base block by chemical methods, so as to prevent the heat dissipation copper base from oxidizing before silver sintering and ensure the solderability of the heat dissipation copper base surface, and in the subsequent sintering process, the OSP organic coating will be melted under high temperature environment. The copper and silver paste are re-precipitated to further form a strong copper-silver eutectic layer to increase the bonding force, and the problem that the metal silver will remain on the surface of the heat dissipation copper base and is difficult to remove is solved; and the main drive inverter substrate PCB with embedded power chip needs to use the laser drilling process to form a φ200um copper column on the gate and source of the top surface of the power chip to conduct the power chip and the PCB network. In this process, the back gold layer on the top surface of the power chip is easily penetrated by the laser, resulting in damage to the chip circuit under the back gold layer and damage to the substrate. Therefore, silver paste is printed on the gate and source of the power chip respectively, or silver film is mounted respectively, and then sintered copper sheets are mounted to process laser blind holes on the copper sheets on the gate and source of the sintered power chip to form copper columns and PCB networks to achieve point signal connection, so as to enhance the strength of the back gold layer on the top surface of the power chip, reduce the occurrence of laser breakdown of the back gold layer on the top surface of the power chip, and enhance the reliability of the power chip sintering module.

附图说明BRIEF DESCRIPTION OF THE DRAWINGS

图1为本申请一个示例性实施例提供的一种功率芯片烧结模块制作方法的散热铜基块的表面预处理流程示意图。FIG. 1 is a schematic diagram of a surface pretreatment process of a heat dissipation copper base block in a method for manufacturing a power chip sintering module provided by an exemplary embodiment of the present application.

图2为本申请一个示例性实施例提供的一种功率芯片烧结模块制作方法采用的载板治具的安装槽、第一通孔和第二通孔的俯视示意图。FIG. 2 is a top view schematically showing a mounting groove, a first through hole, and a second through hole of a carrier jig used in a method for manufacturing a power chip sintering module provided by an exemplary embodiment of the present application.

图3为本申请一个示例性实施例提供的一种功率芯片烧结模块制作方法采用的载板治具的整体俯视示意图。FIG. 3 is an overall top view schematic diagram of a carrier jig used in a method for manufacturing a power chip sintering module provided in an exemplary embodiment of the present application.

图4为本申请一个示例性实施例提供的一种功率芯片烧结模块制作方法采用的载板治具的部分实物示意图。FIG. 4 is a partial physical schematic diagram of a carrier jig used in a method for manufacturing a power chip sintering module provided in an exemplary embodiment of the present application.

图5为本申请一个示例性实施例提供的一种功率芯片烧结模块制作方法的散热铜基块的表面预处理示意图。FIG. 5 is a schematic diagram of surface pretreatment of a heat dissipation copper base block in a method for manufacturing a power chip sintering module provided by an exemplary embodiment of the present application.

图6为本申请一个示例性实施例提供的一种功率芯片烧结模块制作方法的烧结流程示意图。FIG. 6 is a schematic diagram of a sintering process of a method for manufacturing a power chip sintering module provided by an exemplary embodiment of the present application.

图7为本申请一个示例性实施例提供的一种功率芯片烧结模块制作方法的增强背金层强度的流程示意图。FIG. 7 is a schematic diagram of a process for enhancing the strength of a back gold layer in a method for manufacturing a power chip sintering module provided by an exemplary embodiment of the present application.

图8为本申请一个示例性实施例提供的一种功率芯片烧结模块的结构示意图。FIG. 8 is a schematic structural diagram of a power chip sintering module provided by an exemplary embodiment of the present application.

图9为本申请又一个示例性实施例提供的一种功率芯片烧结模块制作方法的增强背金层强度的流程示意图。FIG. 9 is a schematic diagram of a process for enhancing the strength of a back gold layer in a method for manufacturing a power chip sintering module provided by another exemplary embodiment of the present application.

图10为本申请又一个示例性实施例提供的一种功率芯片烧结模块的结构示意图。FIG. 10 is a schematic structural diagram of a power chip sintering module provided by yet another exemplary embodiment of the present application.

具体实施方式DETAILED DESCRIPTION

本具体实施例仅仅是对本申请的解释,其并不是对本申请的限制,本领域技术人员在阅读完本说明书后可以根据需要对本实施例做出没有创造性贡献的修改,但只要在本申请的权利要求范围内都受到专利法的保护。This specific embodiment is merely an explanation of the present application and is not a limitation of the present application. After reading this specification, those skilled in the art may make modifications to the present embodiment without any creative contribution as needed. However, as long as it is within the scope of the claims of the present application, it shall be protected by the patent law.

为使本申请实施例的目的、技术方案和优点更加清楚,下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

另外,本文中术语“和/或”,仅仅是一种描述关联对象的关联关系,表示可以存在三种关系,例如,A和/或B,可以表示:单独存在A,同时存在A和B,单独存在B这三种情况。另外,本文中字符“/”,如无特殊说明,一般表示前后关联对象是一种“或”的关系。In addition, the term "and/or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and/or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character "/" in this article, unless otherwise specified, generally means that the associated objects before and after are in an "or" relationship.

经研究发现,现有的表面处理设备,如沉银线和OSP处理线,都是低成本的水平生产线,单个的散热铜基块无法直接过水平线做表面处理,因为散热铜基块的长宽尺寸如11mm×11mm×1.2mm级别,水平线的行辘间距与槽间距均普遍大于10mm,因而如果散热铜基块直接过水平线的话,行进过程中会掉落到药水缸中。Research has found that existing surface treatment equipment, such as silver immersion lines and OSP processing lines, are all low-cost horizontal production lines. A single heat dissipation copper base block cannot be directly passed through the horizontal line for surface treatment. This is because the length and width dimensions of the heat dissipation copper base block are at the level of 11mm×11mm×1.2mm, and the horizontal line's row reel spacing and groove spacing are generally greater than 10mm. Therefore, if the heat dissipation copper base block directly passes through the horizontal line, it will fall into the medicine tank during the process.

下面结合说明书附图对本申请实施例作进一步详细描述。The embodiments of the present application are further described in detail below in conjunction with the drawings in the specification.

参照图1,本申请实施例提供一种功率芯片烧结模块制作方法,所述方法的主要步骤描述如下。1 , an embodiment of the present application provides a method for manufacturing a power chip sintering module, and the main steps of the method are described as follows.

S1:烧结前,挑起载板冶具的安装槽上的具有延展性的限位线,将散热铜基块塞入至所述安装槽内并松开所述限位线,其中,所述限位线沿所述散热铜基块的顶面的对角线方向设置,所述安装槽的内底部设置有用于限位所述散热铜基块的限位区,所述散热铜基块的顶面设置有用于容纳功率芯片的凹槽;S1: before sintering, lift the ductile limit line on the mounting groove of the carrier jig, insert the heat dissipation copper base block into the mounting groove and loosen the limit line, wherein the limit line is arranged along the diagonal direction of the top surface of the heat dissipation copper base block, the inner bottom of the mounting groove is provided with a limit area for limiting the heat dissipation copper base block, and the top surface of the heat dissipation copper base block is provided with a groove for accommodating a power chip;

S2:对所述载板冶具上的所述散热铜基块的顶面进行OSP处理,直至所述散热铜基块的顶面通过化学方法附着一层有机涂层;S2: performing OSP treatment on the top surface of the heat dissipation copper base block on the carrier jig until a layer of organic coating is attached to the top surface of the heat dissipation copper base block by a chemical method;

S3:挑起所述限位线,将所述散热铜基块从所述安装槽内移出;S3: lifting the limit line to move the heat dissipation copper base block out of the installation groove;

具体地,洁净的裸铜表面可以跟纳米银膏烧结,形成牢固的铜-银共晶层。但因裸铜在空气中非常容易氧化,导致散热铜基表面的可焊性急剧下降,进一步导致烧结后烧结银膏与氧化铜表面结合力极差,很容易发生分层。故本方案在银烧结前对散热铜基块进行表面预处理,防止烧结前散热铜基氧化而导致与烧结银膏结合力差。Specifically, the clean bare copper surface can be sintered with the nano silver paste to form a strong copper-silver eutectic layer. However, because bare copper is very easy to oxidize in the air, the solderability of the heat dissipation copper base surface drops sharply, which further leads to the extremely poor bonding between the sintered silver paste and the copper oxide surface after sintering, and it is easy to delaminate. Therefore, this solution performs surface pretreatment on the heat dissipation copper base block before silver sintering to prevent the heat dissipation copper base from oxidizing before sintering, resulting in poor bonding with the sintered silver paste.

又因业界普遍采用低成本的水平生产线表面处理设备,单个散热铜基若过水平线做表面处理的话,行进过程中会掉落到药水缸中,导致散热铜基在银烧结前进行表面预处理存在难度,故本申请为了实现散热铜基块的表面预处理,提供了一种载板冶具,包括介质层,所述介质层由若干半固化片叠合后高温压合形成,高温压合时的温度范围为175℃-350℃。Furthermore, because the industry generally adopts low-cost horizontal production line surface treatment equipment, if a single heat dissipation copper base passes through the horizontal line for surface treatment, it will fall into the medicine tank during the process, resulting in difficulty in surface pretreatment of the heat dissipation copper base before silver sintering. Therefore, in order to achieve surface pretreatment of the heat dissipation copper base block, the present application provides a carrier jig, including a dielectric layer, wherein the dielectric layer is formed by stacking a number of semi-cured sheets and then high-temperature pressing, and the temperature range during high-temperature pressing is 175°C-350°C.

未成型前,载板冶具的原材料为双面覆铜板,其中上铜箔/下铜箔的厚度均为12um,介质层位于上铜箔层和下铜箔层的中间,介质层的厚度2.0mm。Before forming, the raw material of the substrate jig is a double-sided copper-clad laminate, in which the thickness of the upper copper foil/lower copper foil is 12um, the dielectric layer is located between the upper copper foil layer and the lower copper foil layer, and the thickness of the dielectric layer is 2.0mm.

本实施例中,介质层可以由11张EM-37B系列的半固化片叠合后以250℃高温压合形成,半固化片的玻璃纤维布型号采用7628,半固化片中的环氧树脂的重量百分比为42±2%。In this embodiment, the dielectric layer can be formed by stacking 11 EM-37B series prepregs and pressing them at a high temperature of 250° C. The glass fiber cloth model of the prepreg is 7628, and the weight percentage of the epoxy resin in the prepreg is 42±2%.

将原材料裁切成小块后,过酸性蚀刻线以蚀刻掉面铜,上铜箔层和下铜箔层都被蚀刻掉了,成型的载板治具只剩中间的介质层,形成的小块主板材料的长度为250mm、宽度为250mm、厚度为2.0mm,即载板治具的最终的长度、宽度和总厚度。After the raw material is cut into small pieces, the surface copper is etched away through an acid etching line. Both the upper and lower copper foil layers are etched away, and only the middle dielectric layer is left in the formed carrier fixture. The length of the small motherboard material formed is 250mm, the width is 250mm, and the thickness is 2.0mm, which is the final length, width and total thickness of the carrier fixture.

参照图2,所述载板冶具上加工有若干安装槽,所述安装槽的尺寸为mm级别且大于所述散热铜基块的尺寸。本实施例中,载板冶具上设置10行×10列共100个安装槽。安装槽通过CNC数控铣床控深加工形成。Referring to Figure 2, the carrier jig is processed with a plurality of mounting grooves, the size of which is in mm level and is larger than the size of the heat dissipation copper base block. In this embodiment, 100 mounting grooves with 10 rows and 10 columns are arranged on the carrier jig. The mounting grooves are formed by deep processing of a CNC milling machine.

安装槽的长度和宽度均大于散热铜基块的长度和宽度。例如,本实施例中的散热铜基块长度和宽度取11 mm×11mm,则安装槽的长度和宽度可以设计为13mm×13mm。The length and width of the mounting groove are both greater than the length and width of the heat dissipation copper base block. For example, the length and width of the heat dissipation copper base block in this embodiment are 11 mm×11 mm, and the length and width of the mounting groove can be designed to be 13 mm×13 mm.

每个安装槽的内底部居中位置凹设有限位区。A limiting area is recessed at the center of the inner bottom of each installation groove.

在一实施例中,所述限位区呈十字形。限位区为正中间宽幅为3.0mm的十字区域。限位区可以采用CNC数控铣床控深铣至余厚0.5mm。此时,安装槽的有效深度可以设计为1.5mm,本实施例中的散热铜基块的厚度可以为1.2mm,则安装槽的有效深度比散热铜基块的厚度多0.3mm。In one embodiment, the limiting area is in a cross shape. The limiting area is a cross area with a width of 3.0 mm in the middle. The limiting area can be deep-milled to a residual thickness of 0.5 mm using a CNC milling machine. At this time, the effective depth of the mounting groove can be designed to be 1.5 mm. The thickness of the heat dissipation copper base block in this embodiment can be 1.2 mm, and the effective depth of the mounting groove is 0.3 mm more than the thickness of the heat dissipation copper base block.

所述载板冶具上在所述安装槽的外围位置钻设有若干第一通孔和若干第二通孔,若干所述第一通孔位于所述安装槽的对边平分线方向上,若干所述第二通孔位于所述安装槽的对角线方向上,所述第一通孔距离所述安装槽的槽边的距离值等于所述第二通孔距离相邻所的述安装槽的槽边的垂直距离值,且所述距离值和所述垂直距离值均大于0。A plurality of first through holes and a plurality of second through holes are drilled on the carrier jig at the outer position of the mounting groove, wherein the plurality of first through holes are located in the direction of the bisector of the opposite sides of the mounting groove, and the plurality of second through holes are located in the direction of the diagonal of the mounting groove, and the distance value between the first through hole and the groove edge of the mounting groove is equal to the vertical distance value between the second through hole and the groove edge of the adjacent mounting groove, and both the distance value and the vertical distance value are greater than 0.

在一实施例中,所述第二通孔的数量为4个且沿所述安装槽的对角线方向上均匀分布。In one embodiment, the number of the second through holes is 4 and they are evenly distributed along the diagonal direction of the mounting slot.

在一实施例中,所述第一通孔的数量为4个且沿所述安装槽的对边平分线方向上均匀分布。In one embodiment, the number of the first through holes is 4 and they are evenly distributed along the bisector direction of the opposite sides of the mounting groove.

本实施例中,每个安装槽的外围均可以钻设8个直径取2.0mm的通孔。通孔包括第一通孔和第二通孔。其中4个第一通孔位于安装槽的对边平分线上,孔边与槽边最小距离可以为2.0mm。另外4个第二通孔位于安装槽的对角线上,孔边到相邻的2条槽边的垂直距离也设计为2.0mm。In this embodiment, 8 through holes with a diameter of 2.0 mm can be drilled on the periphery of each mounting groove. The through holes include first through holes and second through holes. Among them, 4 first through holes are located on the bisectors of the opposite sides of the mounting groove, and the minimum distance between the hole edge and the groove edge can be 2.0 mm. The other 4 second through holes are located on the diagonal lines of the mounting groove, and the vertical distance from the hole edge to the two adjacent groove edges is also designed to be 2.0 mm.

参照图3,所述第二通孔内穿设有具有延展性的限位线,所述限位线呈X形交叉于所述安装槽的正上方,所述限位线的线头和线尾固定于所述第二通孔内。3 , a ductile limiting line is provided in the second through hole, the limiting line is in an X shape and crosses just above the mounting groove, and the end and the end of the limiting line are fixed in the second through hole.

本实施例中,限位线采用一根直径0.18mm的聚四氟乙烯线,穿过位于各安装槽的对角线上的直径为2.0mm的所有的第二通孔。聚四氟乙烯线呈X形交叉盖在安装槽的正上方位置。In this embodiment, the limit line is a polytetrafluoroethylene wire with a diameter of 0.18 mm, which passes through all the second through holes with a diameter of 2.0 mm located on the diagonal lines of each installation slot. The polytetrafluoroethylene wire crosses in an X shape and covers the position just above the installation slot.

在一实施例中,所述限位线的线头和线尾分别位于所述载板冶具的同一对角线方向上的两个所述第二通孔内,且该第二通孔内灌满固化的用于固定所述限位线的线头和线尾的环氧树脂。In one embodiment, the end and tail of the limiting line are respectively located in two of the second through holes in the same diagonal direction of the carrier jig, and the second through holes are filled with cured epoxy resin for fixing the end and tail of the limiting line.

具体地,聚四氟乙烯线的线头和线尾分别位于图中载板治具的左上角和右下角的2.0mm的第二通孔内,通孔内灌满塞孔树脂(环氧树脂),然后190℃烘烤使树脂固化,将线头和线尾彻底固定在通孔内。如图3所示,灌满环氧树脂的第二通孔以深灰色表征。Specifically, the ends and tails of the polytetrafluoroethylene wire are located in the 2.0 mm second through holes at the upper left and lower right corners of the substrate fixture in the figure, respectively. The through holes are filled with plugging resin (epoxy resin), and then baked at 190°C to solidify the resin, completely fixing the ends and tails of the wire in the through holes. As shown in Figure 3, the second through holes filled with epoxy resin are represented by dark gray.

参照图4,载板治具的部分实物示意如图所示。4 , a partial physical diagram of the carrier fixture is shown in the figure.

通过上述载板冶具的配合,可实现对散热铜基块过水平线的表面预处理。以及,考虑到沉银后金属银会残留在散热铜基表面难以去除,产品中用于包封功率芯片烧结模块的环氧树脂与金属银层的结合力差,会影响产品整体的可靠性,因此本方案不采用在散热铜基表面沉银的工艺,而采用OSP工艺,OSP膜不耐酸碱及高温的特性,具有易去除的优势,对散热铜基进行过水平生产线的OSP表面预处理。Through the cooperation of the above-mentioned carrier jig, the surface pretreatment of the heat dissipation copper base block through the horizontal line can be achieved. Also, considering that the metal silver will remain on the surface of the heat dissipation copper base after silver deposition and is difficult to remove, the epoxy resin used to encapsulate the power chip sintering module in the product has poor bonding with the metal silver layer, which will affect the overall reliability of the product. Therefore, this solution does not use the process of silver deposition on the surface of the heat dissipation copper base, but uses the OSP process. The OSP film is not resistant to acid, alkali and high temperature, and has the advantage of being easy to remove, and the heat dissipation copper base is subjected to OSP surface pretreatment through the horizontal production line.

参照图5,在银膏印刷前,挑起载板冶具的安装槽上的具有延展性的限位线,将散热铜基块塞入至安装槽内并松开限位线。对载板冶具上的散热铜基块的顶面进行OSP处理,直至散热铜基块的顶面通过化学方法附着一层有机涂层,实现对散热铜基块过水平线的OSP表面预处理,在散热铜基块的表面附着一层致密的有机涂层。Referring to FIG5 , before silver paste printing, the ductile limit line on the mounting groove of the carrier jig is lifted, the heat dissipation copper base block is inserted into the mounting groove and the limit line is released. The top surface of the heat dissipation copper base block on the carrier jig is treated with OSP until a layer of organic coating is attached to the top surface of the heat dissipation copper base block by a chemical method, so as to achieve OSP surface pretreatment of the heat dissipation copper base block across the horizontal line, and attach a dense organic coating to the surface of the heat dissipation copper base block.

具体地,将安装槽上的X形聚四氟乙烯线轻轻挑起,散热铜基块从一侧塞入到安装槽内;Specifically, the X-shaped polytetrafluoroethylene wire on the mounting groove is gently lifted, and the heat dissipation copper base block is inserted into the mounting groove from one side;

载板治具带着散热铜基块过OSP水平线,OSP药水从载板治具的上下两个方向喷淋到散热铜基块上,由于受安装槽底部的十字形的限位区和安装槽正上方位置的呈X形交叉分布的限位线的限制,散热铜基块虽然受到喷淋药水的冲击力作用,但散热铜基块不会跑到安装槽以外,更不会在行进过程中掉到药水缸中,防止散热铜基块掉落到安装槽之外。The carrier jig carries the heat dissipation copper base block across the OSP horizontal line, and the OSP solution is sprayed onto the heat dissipation copper base block from the upper and lower directions of the carrier jig. Due to the restrictions of the cross-shaped limiting area at the bottom of the installation groove and the X-shaped cross-distributed limiting lines directly above the installation groove, the heat dissipation copper base block is subject to the impact force of the spraying solution, but the heat dissipation copper base block will not run out of the installation groove, nor will it fall into the solution tank during the movement, preventing the heat dissipation copper base block from falling out of the installation groove.

最后,将安装槽上的X形聚四氟乙烯线轻轻挑起,把散热铜基块从安装槽的一侧移出,完成散热铜基块的表面预处理。Finally, gently lift up the X-shaped polytetrafluoroethylene wire on the mounting groove and move the heat dissipation copper base block out from one side of the mounting groove to complete the surface pretreatment of the heat dissipation copper base block.

本实施例中,有机涂层的有机材料是咪唑有机结晶碱(Imidazoles),以使得散热铜基块的表面附着致密的一层OSP膜, OSP膜通过化学方法附着在裸铜的表面,以防止散热铜基块在银烧结前氧化,保证散热铜基块表面的可焊性。同时,采用本申请的载板冶具搭载散热铜基块进行表面预处理,不仅降低了散热铜基块在银烧结前进行表面预处理的难度,增强了散热铜基表面的可焊,还实现了长宽尺寸如11mm级别的散热铜基块的OSP处理,而现有的OSP处理工艺仅能实现长度和宽度至少为100mm的板级产品表面处理,处理精度得以极大提升。In this embodiment, the organic material of the organic coating is an imidazole organic crystalline base (Imidazoles), so that a dense layer of OSP film is attached to the surface of the heat dissipation copper base block. The OSP film is attached to the surface of the bare copper by a chemical method to prevent the heat dissipation copper base block from being oxidized before silver sintering, thereby ensuring the solderability of the surface of the heat dissipation copper base block. At the same time, the use of the carrier metallurgy of the present application to carry the heat dissipation copper base block for surface pretreatment not only reduces the difficulty of surface pretreatment of the heat dissipation copper base block before silver sintering, enhances the solderability of the heat dissipation copper base surface, but also realizes the OSP treatment of the heat dissipation copper base block with a length and width size of 11mm, while the existing OSP treatment process can only realize the surface treatment of board-level products with a length and width of at least 100mm, and the treatment accuracy is greatly improved.

散热铜基块可过水平生产线做OSP处理,在后续的烧结过程中,OSP有机涂层在高温环境下将被熔掉分解与挥发,重新析出铜单质与银膏形成牢固的铜-银共晶层,具备牢固的结合力,也具有易去除的优势。The heat dissipation copper base block can be treated with OSP through a horizontal production line. In the subsequent sintering process, the OSP organic coating will be melted, decomposed and volatilized in a high temperature environment, and the copper element will be re-precipitated to form a solid copper-silver eutectic layer with the silver paste. It has a strong bonding force and is also easy to remove.

参照图6,S4:在所述散热铜基块的顶面的凹槽底部印刷第一银膏;6, S4: printing a first silver paste at the bottom of the groove on the top surface of the heat dissipation copper base block;

S5:烘烤所述第一银膏,形成第一银膏层;S5: baking the first silver paste to form a first silver paste layer;

S6:把功率芯片贴装至所述第一银膏层的表面;S6: mounting the power chip onto the surface of the first silver paste layer;

S7:高温烧结,直至所述功率芯片粘接至所述第一银膏层上,且所述第一银膏层中的溶剂彻底挥发,其中,高温烧结时的温度范围为175℃-350℃。S7: high-temperature sintering until the power chip is bonded to the first silver paste layer and the solvent in the first silver paste layer is completely volatilized, wherein the temperature range of the high-temperature sintering is 175° C.-350° C.

具体地,印刷第一银膏,将第一银膏加工到散热铜基块的凹槽底部,加工参数可以设置为:3D钢网印刷,印刷1次,压力10N,速度20mm/s。Specifically, the first silver paste is printed and processed to the bottom of the groove of the heat dissipation copper base block. The processing parameters can be set as: 3D steel screen printing, printing 1 time, pressure 10N, speed 20mm/s.

对印刷的第一银膏进行预烘烤,采用氮气预烘烤去除银膏的大部分溶剂,烘烤参数可以设置为纯氮环境,140℃×20min。The first printed silver paste is pre-baked, and nitrogen is used to remove most of the solvent in the silver paste. The baking parameters can be set to a pure nitrogen environment, 140° C.×20 min.

接着,转贴功率芯片,功率芯片通过固晶机贴装到第一银膏上,贴片的温度可以设置为120℃,贴片的压力可以设置为50N,通过固晶机贴装1200ms;本实施例中,功率芯片可以采用MOSFET芯片。Next, the power chip is transferred and mounted on the first silver paste by a die bonding machine. The temperature of the chip can be set to 120°C, the pressure of the chip can be set to 50N, and the die bonding machine is used for 1200ms. In this embodiment, the power chip can be a MOSFET chip.

最后,高温烧结,经烧结机高温烧结后,功率芯片与第一银膏彻底粘接到一起,同时第一银膏中的溶剂彻底挥发,本实施例中,以250℃温度和16Mpa压力,通过烧结机高温烧结300s。Finally, high-temperature sintering is performed. After high-temperature sintering by a sintering machine, the power chip is completely bonded to the first silver paste, and the solvent in the first silver paste is completely evaporated. In this embodiment, the sintering is performed at a temperature of 250° C. and a pressure of 16 MPa for 300 seconds by a sintering machine.

又业界常规的功率芯片的顶面背金层为镍/钯/金,背金层很薄(如:3.0um/0.2um/0.03um),而内埋功率芯片的主驱逆变器PCB均需要在芯片顶面的栅极和源极上形成φ200um的铜柱以导通芯片和PCB网络,一般采用激光钻孔工艺实现。在这一过程中,功率芯片的顶面背金层很容易被激光击穿,进而损坏背金层下面的芯片线路,导致芯片损坏;同时镍/钯/金表面与现有的功率芯片烧结模块上的环氧树脂结合力很差,高温下容易发生结合界面开裂导致基板失效。The conventional back-gold layer on the top surface of the power chip in the industry is nickel/palladium/gold, and the back-gold layer is very thin (such as: 3.0um/0.2um/0.03um), and the main drive inverter PCB with embedded power chips needs to form φ200um copper pillars on the gate and source of the top surface of the chip to conduct the chip and PCB network, which is generally achieved by laser drilling. In this process, the back-gold layer on the top surface of the power chip is easily penetrated by the laser, which in turn damages the chip circuit under the back-gold layer, causing chip damage; at the same time, the nickel/palladium/gold surface has a very poor bonding strength with the epoxy resin on the existing power chip sintering module, and the bonding interface is prone to cracking at high temperatures, causing the substrate to fail.

为解决芯片顶面的镍/钯/金背金层容易在激光钻孔过程中被击穿损坏而影响可靠性的问题,本申请实施例还提供2种新的功率芯片烧结模块的制作方法。In order to solve the problem that the nickel/palladium/gold back-gold layer on the top surface of the chip is easily broken down and damaged during the laser drilling process, thereby affecting the reliability, the embodiments of the present application also provide two new methods for manufacturing power chip sintering modules.

参照图7,S811:在所述功率芯片的栅极和源极上分别印刷第二银膏;7, S811: printing a second silver paste on the gate and source of the power chip respectively;

S812:烘烤所述第二银膏,形成第二银膏层;S812: baking the second silver paste to form a second silver paste layer;

S813:在各所述第二银膏层上贴装铜片,所述铜片覆盖于所述第二银膏层的表面;S813: mounting a copper sheet on each of the second silver paste layers, wherein the copper sheet covers the surface of the second silver paste layer;

S814:高温烧结,直至所述铜片粘接至所述第二银膏层上,且所述第二银膏层中的溶剂彻底挥发,其中,高温烧结时的温度范围为175℃-350℃。S814: high-temperature sintering until the copper sheet is bonded to the second silver paste layer and the solvent in the second silver paste layer is completely evaporated, wherein the temperature range of the high-temperature sintering is 175°C-350°C.

在一实施例中,印刷第二银膏时,采用以下步骤,In one embodiment, when printing the second silver paste, the following steps are adopted:

以压力10N和速度20mm/s,进行1次3D钢网印刷。Perform 1 pass of 3D steel screen printing at a pressure of 10 N and a speed of 20 mm/s.

在一实施例中,烘烤第二银膏时,采用以下步骤,In one embodiment, when baking the second silver paste, the following steps are adopted:

在纯氮环境下,以140℃温度烘烤20min。In a pure nitrogen environment, bake at 140°C for 20 minutes.

在一实施例中,所述铜片覆盖于所述第二银膏层的表面后,高温烧结时,采用以下步骤,In one embodiment, after the copper sheet is covered on the surface of the second silver paste layer, during high temperature sintering, the following steps are adopted:

以250℃温度和16Mpa压力,通过烧结机高温烧结300s。The alloy was sintered at 250°C and 16 MPa for 300 seconds using a sintering machine.

在一实施例中,贴装铜片时,采用以下步骤,In one embodiment, when mounting the copper sheet, the following steps are adopted:

设置贴片温度120℃,贴片压力50N,通过固晶机贴装1200ms。Set the chip temperature to 120℃, the chip pressure to 50N, and use the die bonding machine to mount for 1200ms.

具体地,印刷第二次银膏,将第二银膏加工到功率芯片的栅极和源极上,参数可以设置为3D钢网印刷,印刷1次,压力10N,速度20mm/s。Specifically, print the silver paste for the second time and process the second silver paste onto the gate and source of the power chip. The parameters can be set to 3D steel screen printing, printing once, pressure 10N, speed 20mm/s.

预烘烤第二银膏,采用氮气预烘烤去除第二银膏的大部分溶剂,烘烤参数可以设置为纯氮环境,140℃×20min。Pre-bake the second silver paste, and use nitrogen pre-bake to remove most of the solvent in the second silver paste. The baking parameters can be set to a pure nitrogen environment, 140° C.×20 min.

转贴铜片,铜片通过固晶机贴装到第二银膏上,贴片温度可以为120℃,贴片压力可以为50N,贴装1200ms。The copper sheet is transferred and mounted on the second silver paste through a die bonding machine. The mounting temperature can be 120°C, the mounting pressure can be 50N, and the mounting time is 1200ms.

最后,经烧结机高温烧结后,铜片与第二银膏彻底粘接到一起,同时第二银膏中的溶剂彻底挥发,环境参数可以设置为以250℃温度和16Mpa压力,高温烧结300s,进而完成双层银膏烧结的功率芯片烧结模块的制作流程,能够改善功率芯片的顶面背金层很容易被激光击穿进而损坏背金层下面的芯片线路,导致芯片损坏的问题;同时镍/钯/金表面与功率芯片烧结模块上的环氧树脂结合力很强,整体可靠性更好。Finally, after high-temperature sintering in a sintering machine, the copper sheet and the second silver paste are completely bonded together, and the solvent in the second silver paste is completely evaporated. The environmental parameters can be set to 250°C temperature and 16Mpa pressure, high-temperature sintering for 300s, thereby completing the production process of the power chip sintering module sintered with double-layer silver paste. This can improve the problem that the back gold layer on the top surface of the power chip is easily penetrated by the laser and then damages the chip circuit under the back gold layer, causing chip damage; at the same time, the nickel/palladium/gold surface has a strong bonding strength with the epoxy resin on the power chip sintering module, and the overall reliability is better.

本申请实施例还提供一种功率芯片烧结模块,该功率芯片烧结模块采用上述实施例中任意一种功率芯片烧结模块制作方法制成,该功率芯片烧结模块包括散热铜基块,所述散热铜基块的长度为10-12mm,所述散热铜基块的宽度为10-12mm,所述散热铜基块的厚度为1.1-1.3mm,所述散热铜基块的顶面设置有凹槽,所述凹槽的长度为8-9mm,所述凹槽的宽度为6-7mm,所述凹槽的深度为0.2-0.3mm;The embodiment of the present application also provides a power chip sintering module, which is made by any one of the power chip sintering module manufacturing methods in the above embodiments, and the power chip sintering module includes a heat dissipation copper base block, the heat dissipation copper base block has a length of 10-12 mm, a width of 10-12 mm, a thickness of 1.1-1.3 mm, and a groove is provided on the top surface of the heat dissipation copper base block, the length of the groove is 8-9 mm, the width of the groove is 6-7 mm, and the depth of the groove is 0.2-0.3 mm;

所述凹槽内居中位置由下往上依次设置有第一银膏层和功率芯片,所述第一银膏层的长度为7.0-7.5mm,所述第一银膏层的宽度为5.0-5.5mm,所述第一银膏层的厚度为0.02-0.04mm,所述功率芯片的长度为6.90-6.95mm,所述功率芯片的宽度为4.70-4.75mm,所述功率芯片的厚度为0.1-0.2mm;A first silver paste layer and a power chip are sequentially arranged in the center of the groove from bottom to top, the length of the first silver paste layer is 7.0-7.5 mm, the width of the first silver paste layer is 5.0-5.5 mm, the thickness of the first silver paste layer is 0.02-0.04 mm, the length of the power chip is 6.90-6.95 mm, the width of the power chip is 4.70-4.75 mm, and the thickness of the power chip is 0.1-0.2 mm;

所述功率芯片的栅极和源极上分别印刷有第二银膏层,所述第二银膏层完全覆盖所述极和所述源极,所述栅极的长度为0.5-0.6mm,所述栅极的宽度为0.7-0.8mm,所述源极有两个,所述源极的长度为6.1-6.3mm,所述源极的宽度为2.1-2.3mm,所述第二银膏层的厚度为0.02-0.04mm;A second silver paste layer is printed on the gate and source of the power chip respectively, the second silver paste layer completely covers the gate and the source, the length of the gate is 0.5-0.6 mm, the width of the gate is 0.7-0.8 mm, there are two source electrodes, the length of the source electrode is 6.1-6.3 mm, the width of the source electrode is 2.1-2.3 mm, and the thickness of the second silver paste layer is 0.02-0.04 mm;

所述第二银膏层上均覆盖有铜片,所述铜片的厚度为0.02-0.04mm。The second silver paste layer is covered with a copper sheet, and the thickness of the copper sheet is 0.02-0.04 mm.

参照图8,具体地,散热铜基块的长×宽为11×11mm,厚度1.2mm,铜片顶面设计1个长×宽为8.44×6.24mm,深度0.21mm的矩形凹槽。8 , specifically, the heat dissipation copper base block has a length × width of 11 × 11 mm and a thickness of 1.2 mm, and a rectangular groove with a length × width of 8.44 × 6.24 mm and a depth of 0.21 mm is designed on the top surface of the copper sheet.

凹槽内从下往上依次是第一银膏、MOSFET芯片、第二银膏、铜片。Inside the groove from bottom to top are the first silver paste, MOSFET chip, second silver paste, and copper sheet.

第一银膏层的厚度30μm,银膏丝印面积7.3×5.0mm。The thickness of the first silver paste layer is 30 μm, and the silver paste screen printing area is 7.3×5.0 mm.

MOSFET芯片的长×宽为6.94×4.74mm,厚度0.1mm,栅源漏极设计为1个栅极(Gate) size=519x701µm,位于顶面,背金材料为镍/钯/金(3.0µm/0.2µm/0.03µm);2个源极(Source)size=6227x2226µm,位于顶面,背金材料为镍/钯/金(3.0µm/0.2µm/0.03µm);1个漏极(Drain)size=5100x5100µm,位于底面,背金材料为钛/镍/银(0.1µm/0.3µm/1µm)。The length × width of the MOSFET chip is 6.94 × 4.74 mm, and the thickness is 0.1 mm. The gate, source, and drain are designed as 1 gate (Gate) size = 519x701µm, located on the top surface, and the back gold material is nickel/palladium/gold (3.0µm/0.2µm/0.03µm); 2 sources (Source) size = 6227x2226µm, located on the top surface, and the back gold material is nickel/palladium/gold (3.0µm/0.2µm/0.03µm); 1 drain (Drain) size = 5100x5100µm, located on the bottom surface, and the back gold material is titanium/nickel/silver (0.1µm/0.3µm/1µm).

第二银膏层,厚度30μm,共3个,其中1个第二银膏层位于功率芯片的栅极上,长×宽为519x701µm,即尺寸与栅极等大小;另外2个第二银膏层分别位于功率芯片的2个源极上,长×宽为6227x2226µm,即尺寸均与源极等大小。The second silver paste layer is 30μm thick, with a total of 3 layers. One of the second silver paste layers is located on the gate of the power chip, with a length and width of 519x701µm, that is, the size is the same as the gate; the other two second silver paste layers are located on the two source electrodes of the power chip, with a length and width of 6227x2226µm, that is, the size is the same as the source electrode.

铜片厚度30μm,共3片,其中1片铜片位于功率芯片的栅极上,长×宽为499x681µm,即尺寸比栅极单边小10μm;另外2片铜片分别位于功率芯片的2个源极上,长×宽为6207x2206µm,即尺寸均比源极单边小10μm。The copper sheet is 30μm thick and there are 3 sheets in total. One of the copper sheets is located on the gate of the power chip, with a length and width of 499x681µm, which is 10μm smaller than the single side of the gate. The other two copper sheets are located on the two source electrodes of the power chip, with a length and width of 6207x2206µm, which is 10μm smaller than the single side of the source electrode.

上述功率芯片烧结模块可实现在烧结的芯片栅极、源极上的铜片上加工镭射盲孔,后形成铜柱与PCB网络实现点信号连接。The above-mentioned power chip sintering module can realize processing of laser blind holes on the copper sheets on the sintered chip gate and source, and then form copper pillars to realize point signal connection with the PCB network.

本申请实施例还提供一种功率芯片烧结模块制作方法,所述方法的主要步骤描述如下。The embodiment of the present application also provides a method for manufacturing a power chip sintering module, and the main steps of the method are described as follows.

烧结前,挑起载板冶具的安装槽上的具有延展性的限位线,将散热铜基块塞入至所述安装槽内并松开所述限位线,其中,所述限位线沿所述散热铜基块的顶面的对角线方向设置,所述安装槽的内底部设置有用于限位所述散热铜基块的限位区,所述散热铜基块的顶面设置有用于容纳功率芯片的凹槽;Before sintering, lift the ductile limit line on the mounting groove of the carrier jig, insert the heat dissipation copper base block into the mounting groove and loosen the limit line, wherein the limit line is arranged along the diagonal direction of the top surface of the heat dissipation copper base block, the inner bottom of the mounting groove is provided with a limit area for limiting the heat dissipation copper base block, and the top surface of the heat dissipation copper base block is provided with a groove for accommodating a power chip;

对所述载板冶具上的所述散热铜基块的顶面进行OSP处理,直至所述散热铜基块的顶面通过化学方法附着一层有机涂层;Performing OSP treatment on the top surface of the heat dissipation copper base block on the carrier jig until a layer of organic coating is attached to the top surface of the heat dissipation copper base block by a chemical method;

挑起所述限位线,将所述散热铜基块从所述安装槽内移出;Lift the limit line to move the heat dissipation copper base block out of the installation groove;

在所述散热铜基块的顶面的凹槽底部印刷第一银膏;Printing a first silver paste at the bottom of the groove on the top surface of the heat dissipation copper base block;

烘烤所述第一银膏,形成第一银膏层;baking the first silver paste to form a first silver paste layer;

把功率芯片贴装至所述第一银膏层的表面;Mounting a power chip on the surface of the first silver paste layer;

高温烧结,直至所述功率芯片粘接至所述第一银膏层上,且所述第一银膏层中的溶剂彻底挥发,其中,高温烧结时的温度范围为175℃-350℃;High-temperature sintering until the power chip is bonded to the first silver paste layer and the solvent in the first silver paste layer is completely volatilized, wherein the temperature range of the high-temperature sintering is 175° C.-350° C.;

参照图9,S821:在所述功率芯片的栅极和源极上分别贴装银膜;9, S821: mounting silver films on the gate and source of the power chip respectively;

S822:在各所述银膜上贴装铜片,所述铜片覆盖于所述银膜的表面;S822: mounting a copper sheet on each of the silver films, wherein the copper sheet covers the surface of the silver film;

S823:高温烧结,直至所述铜片粘接至所述银膜上,且所述银膜中的溶剂彻底挥发,其中,所述铜片覆盖于所述银膜的表面,高温烧结时的温度范围为175℃-350℃。S823: high-temperature sintering until the copper sheet is bonded to the silver film and the solvent in the silver film is completely evaporated, wherein the copper sheet covers the surface of the silver film, and the temperature range of high-temperature sintering is 175°C-350°C.

在一实施例中,贴装银膜时,采用以下步骤,In one embodiment, when mounting the silver film, the following steps are adopted:

设置固晶机的贴片温度为130℃-180℃,贴片压力为20N,贴片速度为20mm/s。Set the die bonding machine's die bonding temperature to 130°C-180°C, die bonding pressure to 20N, and die bonding speed to 20mm/s.

在一实施例中,所述铜片覆盖于所述银膜的表面后,高温烧结时,采用以下步骤,In one embodiment, after the copper sheet is covered on the surface of the silver film, the following steps are adopted during high temperature sintering:

以250℃温度和16Mpa压力,通过烧结机高温烧结300s。The alloy was sintered at 250°C and 16 MPa for 300 seconds using a sintering machine.

在一实施例中,贴装铜片时,采用以下步骤,In one embodiment, when mounting the copper sheet, the following steps are adopted:

设置贴片温度120℃,贴片压力50N,通过固晶机贴装1200ms。Set the chip temperature to 120℃, the chip pressure to 50N, and use the die bonding machine to mount for 1200ms.

具体地,完成散热铜基块的顶面OSP处理后,银膏烧结芯片+银膜烧结铜片的功率芯片烧结模块的加工流程如下:Specifically, after the top surface OSP treatment of the heat dissipation copper base block is completed, the processing flow of the power chip sintering module of the silver paste sintered chip + silver film sintered copper sheet is as follows:

1、第一银膏印刷,将第一银膏加工到散热铜基块的凹槽底部,加工参数(3D钢网印刷,印刷1次,压力10N,速度20mm/s);1. Print the first silver paste and process the first silver paste to the bottom of the groove of the heat dissipation copper base block. Processing parameters (3D steel screen printing, 1 printing, pressure 10N, speed 20mm/s);

2、第一银膏预烘,氮气预烘烤去除银膏的大部分溶剂(纯氮环境,140℃×20min);2. Pre-bake the first silver paste, and pre-bake with nitrogen to remove most of the solvent in the silver paste (pure nitrogen environment, 140℃×20min);

3、转贴芯片,芯片通过固晶机贴装到第一银膏上(贴片温度120℃,贴片压力50N,1200ms);3. Transfer the chip, and mount the chip on the first silver paste through a die bonding machine (chip temperature 120°C, chip pressure 50N, 1200ms);

4、高温烧结,经烧结机高温烧结后芯片与第一银膏彻底粘接到一起,同时第一眼高中的溶剂彻底挥发(250℃×16Mpa×300s);4. High temperature sintering: After high temperature sintering by the sintering machine, the chip and the first silver paste are completely bonded together, and the solvent in the first silver paste is completely evaporated (250℃×16Mpa×300s);

5、转贴银膜,用固晶机吸取银膜然后转贴到芯片的栅极和源极上(130℃,压力20N,速度20mm/s);5. Transfer the silver film, use a die bonding machine to absorb the silver film and then transfer it to the gate and source of the chip (130°C, pressure 20N, speed 20mm/s);

6、转贴铜片,铜片通过固晶机贴装到银膜上(贴片温度120℃,贴片压力50N,1200ms);6. Transfer the copper sheet, and mount it on the silver film through a die bonding machine (chip temperature 120℃, chip pressure 50N, 1200ms);

8、高温烧结,经烧结机高温烧结后铜片与银膜彻底粘接到一起,同时银膜中的溶剂彻底挥发(250℃×16Mpa×300s)。8. High temperature sintering: After high temperature sintering in a sintering machine, the copper sheet and the silver film are completely bonded together, and the solvent in the silver film is completely evaporated (250℃×16Mpa×300s).

应理解,上述实施例中各步骤的序号的大小并不意味着执行顺序的先后,各过程的执行顺序应以其功能和内在逻辑确定,而不应对本申请实施例的实施过程构成任何限定。It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

本申请实施例还提供一种功率芯片烧结模块,该功率芯片烧结模块采用上述实施例中任意一种功率芯片烧结模块制作方法制成,包括散热铜基块,所述散热铜基块的长度为10-12mm,所述散热铜基块的宽度为10-12mm,所述散热铜基块的厚度为1.1-1.3mm,所述散热铜基块的顶面设置有凹槽,所述凹槽的长度为8-9mm,所述凹槽的宽度为6-7mm,所述凹槽的深度为0.2-0.3mm;The embodiment of the present application also provides a power chip sintering module, which is made by any one of the power chip sintering module manufacturing methods in the above embodiments, including a heat dissipation copper base block, the heat dissipation copper base block has a length of 10-12mm, the heat dissipation copper base block has a width of 10-12mm, the heat dissipation copper base block has a thickness of 1.1-1.3mm, and the top surface of the heat dissipation copper base block is provided with a groove, the length of the groove is 8-9mm, the width of the groove is 6-7mm, and the depth of the groove is 0.2-0.3mm;

所述凹槽内居中位置由下往上依次设置有第一银膏层和功率芯片,所述第一银膏层的长度为7.0-7.5mm,所述第一银膏层的宽度为5.0-5.5mm,所述第一银膏层的厚度为0.02-0.04mm,所述功率芯片的长度为6.90-6.95mm,所述功率芯片的宽度为4.70-4.75mm,所述功率芯片的厚度为0.1-0.2mm;A first silver paste layer and a power chip are sequentially arranged in the center of the groove from bottom to top, the length of the first silver paste layer is 7.0-7.5 mm, the width of the first silver paste layer is 5.0-5.5 mm, the thickness of the first silver paste layer is 0.02-0.04 mm, the length of the power chip is 6.90-6.95 mm, the width of the power chip is 4.70-4.75 mm, and the thickness of the power chip is 0.1-0.2 mm;

所述功率芯片的栅极和源极上分别烧结有银膜层,所述银膜层完全覆盖所述极和所述源极,所述栅极的长度为0.5-0.6mm,所述栅极的宽度为0.7-0.8mm,所述源极有两个,所述源极的长度为6.1-6.3mm,所述源极的宽度为2.1-2.3mm,所述银膜层的厚度为0.01-0.03mm;Silver film layers are sintered on the gate and source of the power chip respectively, and the silver film layers completely cover the gate and the source. The length of the gate is 0.5-0.6 mm, the width of the gate is 0.7-0.8 mm, there are two source electrodes, the length of the source electrode is 6.1-6.3 mm, the width of the source electrode is 2.1-2.3 mm, and the thickness of the silver film layer is 0.01-0.03 mm;

所述银膜层上均覆盖有铜片,所述铜片的厚度为0.02-0.04mm。The silver film layers are all covered with copper sheets, and the thickness of the copper sheets is 0.02-0.04 mm.

参照图10,具体地,散热铜基块的长×宽为11×11mm,厚度1.2mm,散热铜基块顶面设计1个长×宽为8.44×6.24mm,深度0.2mm的矩形凹槽。10 , specifically, the heat dissipation copper base block has a length × width of 11 × 11 mm and a thickness of 1.2 mm, and a rectangular groove with a length × width of 8.44 × 6.24 mm and a depth of 0.2 mm is designed on the top surface of the heat dissipation copper base block.

凹槽内从下往上依次是第一银膏、MOSFET芯片、银膜和铜片。Inside the groove from bottom to top are the first silver paste, MOSFET chip, silver film and copper sheet.

第一银膏层的厚度为30μm,银膏丝印面积7.3×5.0mm。The thickness of the first silver paste layer is 30 μm, and the silver paste screen printing area is 7.3×5.0 mm.

MOSFET芯片的长×宽为6.94×4.74mm,厚度0.1mm,栅源漏极设计为栅极(Gate)size=519x701µm,1个,位于顶面,背金材料为镍/钯/金(3.0µm/0.2µm/0.03µm);源极(Source)size=6227x2226µm,2个,位于顶面,背金材料为镍/钯/金(3.0µm/0.2µm/0.03µm);漏极(Drain) size=5100x5100µm,1个,位于底面,背金材料为钛/镍/银(0.1µm/0.3µm/1µm)。The length × width of the MOSFET chip is 6.94 × 4.74 mm, and the thickness is 0.1 mm. The gate, source, and drain are designed as follows: Gate size = 519x701µm, 1 piece, located on the top surface, and the back gold material is nickel/palladium/gold (3.0µm/0.2µm/0.03µm); Source size = 6227x2226µm, 2 pieces, located on the top surface, and the back gold material is nickel/palladium/gold (3.0µm/0.2µm/0.03µm); Drain size = 5100x5100µm, 1 piece, located on the bottom surface, and the back gold material is titanium/nickel/silver (0.1µm/0.3µm/1µm).

银膜层烧结前的厚度为65um;烧结后的厚度为20μm,共3个银膜层,其中1个银膜层位于芯片的栅极上,长×宽为519x701µm,即尺寸与栅极等大;另外2个银膜层分别位于2个源极上,长×宽为6227x2226µm,即尺寸与源极等大。采用烧结银膜的方式,对功率芯片的栅极和源极的覆盖致密性更好,且银膜层的厚度比第一银膏层的厚度小,更利于芯片的集成化设计。The thickness of the silver film layer before sintering is 65um; the thickness after sintering is 20μm, with a total of 3 silver film layers, one of which is located on the gate of the chip, with a length × width of 519x701µm, that is, the size is the same as the gate; the other two silver film layers are located on the two source electrodes, with a length × width of 6227x2226µm, that is, the size is the same as the source electrode. The sintering silver film method has a better coverage density for the gate and source of the power chip, and the thickness of the silver film layer is smaller than that of the first silver paste layer, which is more conducive to the integrated design of the chip.

铜片的厚度为30μm,共3片,其中1片铜片位于芯片的栅极上,长×宽为499x681µm,即尺寸比栅极单边小10μm;另外2片铜片分别位于2个源极上,长×宽为6207x2206µm,即尺寸比源极单边小10μm。The thickness of the copper sheet is 30μm, and there are 3 pieces in total. One copper sheet is located on the gate of the chip, with a length and width of 499x681µm, which is 10μm smaller than the single side of the gate; the other two copper sheets are located on the two source electrodes, with a length and width of 6207x2206µm, which is 10μm smaller than the single side of the source electrode.

上述功率芯片烧结模块可实现在烧结的芯片栅极、源极上的铜片上加工镭射盲孔,后形成铜柱与PCB网络实现点信号连接。The above-mentioned power chip sintering module can realize processing of laser blind holes on the copper sheets on the sintered chip gate and source, and then form copper pillars to realize point signal connection with the PCB network.

进一步地,将本申请中的新的功率芯片烧结模块嵌埋到基板内部,将功率芯片烧结模块作为一个整体包封到基板内部。Furthermore, the new power chip sintering module in the present application is embedded in the substrate, and the power chip sintering module is encapsulated as a whole in the substrate.

功率芯片位于散热铜基块顶面的凹槽内。功率芯片顶面的栅极和源极通过PCB的L2层-功率芯片上的φ200um铜柱与PCB网络之间实现互连。功率芯片底面的漏极通过烧结银层与铜基焊接到一起,再通过PCB的L5层-散热铜基背面的φ200um铜柱实现芯片漏极与PCB的电信号和热量传导;铜基作为热量的良好导体起到加速散热的作用,烧结银层实现了芯片漏极和散热铜基的电性能连接和热量快速传导,进而通过“功率芯片→烧结银层→散热铜基→L4/5层密集盲孔→L5层铜→L5/6层密集盲孔→L6层铜”的路径,将热量加速传递到L6层铜上的水冷散热器上,以达到改善封装体内部的功率芯片热量大量积聚,产品结温过高,影响产品整体可靠性的目的。The power chip is located in the groove on the top surface of the heat dissipation copper base block. The gate and source on the top surface of the power chip are interconnected with the PCB network through the L2 layer of the PCB - the φ200um copper pillar on the power chip. The drain on the bottom surface of the power chip is welded to the copper base through the sintered silver layer, and then the electrical signal and heat conduction between the chip drain and the PCB is realized through the L5 layer of the PCB - the φ200um copper pillar on the back of the heat dissipation copper base; the copper base, as a good conductor of heat, plays a role in accelerating heat dissipation, and the sintered silver layer realizes the electrical performance connection and rapid heat conduction between the chip drain and the heat dissipation copper base, and then through the path of "power chip → sintered silver layer → heat dissipation copper base → L4/5 layer dense blind holes → L5 layer copper → L5/6 layer dense blind holes → L6 layer copper", the heat is accelerated to the water-cooled radiator on the L6 layer copper, so as to achieve the purpose of improving the large accumulation of heat in the power chip inside the package, the excessively high junction temperature of the product, and the impact on the overall reliability of the product.

本申请实施例还提供了一种新的功率芯片烧结模块封装前的表面处理方案,即将烧结后的功率芯片烧结模块手动放置在OSP载板治具的cavity内,过水平棕化线, cavity上呈X形的聚四氟乙烯线,起到防止功率芯片烧结模块在过水平棕化线时受药水冲击掉出cavity的作用;因散热铜基块表面OSP膜本身不耐酸碱,在过棕化线时,棕化线的多个药水缸均含有硫酸成分,硫酸可直接清洗掉OSP膜,在清洗掉散热铜基块表面OSP膜的同时,在散热铜基块和铜片表面均形成一层极性的金属铜有机络合物,金属铜有机络合物由棕化药水与裸铜表面发生化学反应产生,厚度是分子级别的,几乎可以忽略不计,覆盖面积为散热铜基和芯片上的裸铜表面的100%覆盖面积,解决OSP膜与环氧树脂结合力差而降低基板产品的整体可靠性的问题,同时大幅度提升铜片表面粗糙度。The embodiment of the present application also provides a new surface treatment solution for the power chip sintering module before packaging, that is, the sintered power chip sintering module is manually placed in the cavity of the OSP carrier jig, and passes through the horizontal browning line. The X-shaped polytetrafluoroethylene line on the cavity prevents the power chip sintering module from falling out of the cavity due to the impact of the potion when passing through the horizontal browning line; because the OSP film on the surface of the heat dissipation copper base block itself is not resistant to acid and alkali, when passing through the browning line, multiple potion cylinders in the browning line contain sulfuric acid components, and sulfuric acid can directly wash off the OSP film. While washing off the OSP film on the surface of the heat dissipation copper base block, a layer of polar metal copper organic complex is formed on the surface of the heat dissipation copper base block and the copper sheet. The metal copper organic complex is produced by a chemical reaction between the browning potion and the bare copper surface. The thickness is at the molecular level and can be almost ignored. The coverage area is 100% of the coverage area of the heat dissipation copper base and the bare copper surface on the chip, which solves the problem of poor bonding between the OSP film and the epoxy resin, thereby reducing the overall reliability of the substrate product, and greatly improves the surface roughness of the copper sheet.

封装后极性的棕化铜表面与极性的树脂相结合,显著提升了界面结合力,保证了产品可靠性。After encapsulation, the polar brown copper surface is combined with the polar resin, which significantly improves the interface bonding strength and ensures product reliability.

综上所述,一种功率芯片烧结模块制作方法通过在银烧结前,借助载板冶具限制散热铜基块于凹槽内,以能够对散热铜基块做表面处理,即使受到喷淋药水的冲击,散热铜基块在行进过程中也不会掉落至药水缸中,极大降低散热铜基块在银烧结前进行表面预处理的难度,增强散热铜基表面的可焊性,以减少因烧结前散热铜基块氧化导致与烧结银膏结合力差而造成基板失效的情况发生,改善功率芯片烧结模块的可靠性;同时,考虑到采用现有的沉银表面预处理工艺后,金属银会残留在散热铜基表面难以去除,故本申请采用OSP工艺对散热铜基进行表面预处理,通过化学方法能够在散热铜基块表面附着一层致密的有机涂层,达到防止散热铜基在银烧结前氧化,保证散热铜基表面可焊性的目的,且在后续的烧结过程中,OSP有机涂层在高温环境下将被熔掉分解与挥发,重新析出铜单质与银膏,进一步形成牢固的铜-银共晶层增加结合力,也解决了金属银会残留在散热铜基表面难以去除的问题;以及,内埋功率芯片的主驱逆变器基板PCB需要借助激光钻孔工艺在功率芯片顶面的栅极和源极上形成φ200um的铜柱,以导通功率芯片和PCB网络,而这一过程中功率芯片顶面的背金层很容易被激光击穿导致背金层下面的芯片线路损坏,造成基板损坏,故在功率芯片的栅极和源极上分别印刷银膏或者分别贴装银膜,再贴装烧结铜片,以在烧结的功率芯片的栅极和源极上的铜片上加工镭射盲孔,形成铜柱与PCB网络实现点信号连接,以增强功率芯片顶面的背金层的强度,减少功率芯片顶面的背金层被激光击穿的情况发生,增强功率芯片烧结模块的可靠性。In summary, a method for manufacturing a power chip sintering module is to restrict the heat dissipation copper base block in a groove by means of a carrier jig before silver sintering, so as to perform surface treatment on the heat dissipation copper base block. Even if the heat dissipation copper base block is impacted by the spraying solution, it will not fall into the solution tank during the movement, which greatly reduces the difficulty of surface pretreatment of the heat dissipation copper base block before silver sintering, enhances the solderability of the heat dissipation copper base surface, and reduces the failure of the substrate caused by poor bonding with the sintering silver paste due to oxidation of the heat dissipation copper base block before sintering, thereby improving the reliability of the power chip sintering module; at the same time, considering that after the existing silver immersion surface pretreatment process is adopted, metallic silver will remain on the surface of the heat dissipation copper base and is difficult to remove, the present application adopts the OSP process to perform surface pretreatment of the heat dissipation copper base, and a layer of dense organic coating can be attached to the surface of the heat dissipation copper base block by a chemical method, so as to prevent the heat dissipation copper base from oxidizing before silver sintering and ensure the solderability of the heat dissipation copper base surface, and in the subsequent sintering process, the OSP organic coating The layer will be melted, decomposed and volatilized in a high temperature environment, and copper and silver paste will be re-precipitated to further form a strong copper-silver eutectic layer to increase the bonding force, and also solve the problem that the metal silver will remain on the surface of the heat dissipation copper base and is difficult to remove; and the main drive inverter substrate PCB with embedded power chips needs to use the laser drilling process to form a φ200um copper column on the gate and source of the top surface of the power chip to conduct the power chip and the PCB network. In this process, the back gold layer on the top surface of the power chip is easily penetrated by the laser, resulting in damage to the chip circuit under the back gold layer and damage to the substrate. Therefore, silver paste is printed on the gate and source of the power chip respectively, or silver film is mounted respectively, and then sintered copper sheets are mounted to process laser blind holes on the copper sheets on the gate and source of the sintered power chip to form copper columns and PCB networks to achieve point signal connection, so as to enhance the strength of the back gold layer on the top surface of the power chip, reduce the occurrence of laser breakdown of the back gold layer on the top surface of the power chip, and enhance the reliability of the power chip sintering module.

一种功率芯片烧结模块制作方法在散热铜基银烧结之前做OSP处理的工艺,在铜基表面形成一层致密的有机涂层,防止铜基在银烧结前氧化,保证铜基表面的可焊性。A method for manufacturing a power chip sintering module includes performing an OSP treatment process before sintering the heat dissipating copper-based silver, forming a dense organic coating on the surface of the copper-based surface to prevent the copper-based surface from being oxidized before the silver-based sintering, and ensuring the solderability of the copper-based surface.

载板治具的设计将每个散热铜基块的移动范围限制在安装槽内,可有效避免铜基受喷淋药水冲击逸出掉到药水缸中,实现了长×宽尺寸为毫米级的散热铜基过水平线做OSP处理的可操作性。The design of the carrier fixture limits the movement range of each heat dissipation copper base block within the installation groove, which can effectively prevent the copper base from escaping into the medicine tank due to the impact of the spraying solution, and realize the operability of OSP treatment of the heat dissipation copper base with a length × width size of millimeters across the horizontal line.

载板治具主板的成分采用玻璃纤维布、环氧树脂和聚四氟乙烯线,都是耐强酸强碱属性的材料,可无限次数过OSP水平线而不被腐蚀,因此可以不限次数循环利用,节能环保,降低制作成本。The mainboard of the carrier fixture is made of glass fiber cloth, epoxy resin and polytetrafluoroethylene wire, all of which are materials resistant to strong acids and alkalis. They can pass the OSP level line an unlimited number of times without being corroded. Therefore, they can be recycled an unlimited number of times, which is energy-saving and environmentally friendly and reduces production costs.

嵌埋新的功率烧结模块的基板,φ200μm盲孔打在厚度30μm的铜片上,而不是传统的功率芯片的镍/钯/金(3.0µm/0.2µm/0.03µm)背金层上,可有效防止背金层下的芯片线路被击穿而损坏,也避免了功率芯片顶面的镍/钯/金(3.0µm/0.2µm/0.03µm)背金层与基板环氧树脂直接接触导致结合力差的情况发生,提高了产品可靠性。The substrate for embedding the new power sintered module has a φ200μm blind hole punched on a 30μm thick copper sheet instead of the nickel/palladium/gold (3.0µm/0.2µm/0.03µm) back gold layer of the traditional power chip. This can effectively prevent the chip circuit under the back gold layer from being broken down and damaged, and also avoid the direct contact between the nickel/palladium/gold (3.0µm/0.2µm/0.03µm) back gold layer on the top surface of the power chip and the epoxy resin of the substrate, resulting in poor bonding, thereby improving product reliability.

功率芯片烧结模块采用OSP治具过水平棕化线,去除铜基表面的OSP膜,棕化模块表面,提升基板可靠性的方法。The power chip sintering module uses an OSP fixture to pass through a horizontal browning line to remove the OSP film on the copper-based surface, brown the module surface, and improve the reliability of the substrate.

所属领域的技术人员可以清楚地了解到,为了描述的方便和简洁,仅以上述各功能单元、模块的划分进行举例说明,实际应用中,可以根据需要而将上述功能分配由不同的功能单元、模块完成,即将所述系统的内部结构划分成不同的功能单元或模块,以完成以上描述的全部或者部分功能。Those skilled in the art will clearly understand that for the sake of convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the system can be divided into different functional units or modules to complete all or part of the functions described above.

Claims (15)

1. A method for manufacturing a power chip sintering module is characterized by comprising the following steps,
Before sintering, picking up a ductile limit line on a mounting groove of a carrier plate jig, inserting a heat dissipation copper base block into the mounting groove and loosening the limit line, wherein the limit line is arranged along the diagonal direction of the top surface of the heat dissipation copper base block, a limit area for limiting the heat dissipation copper base block is arranged at the inner bottom of the mounting groove, and a groove for accommodating a power chip is formed in the top surface of the heat dissipation copper base block;
OSP treatment is carried out on the top surface of the heat dissipation copper base block on the carrier plate jig until the top surface of the heat dissipation copper base block is attached with an organic coating through a chemical method;
Picking up the limit line and moving the radiating copper base block out of the mounting groove;
printing a first silver paste at the bottom of the groove on the top surface of the heat dissipation copper base block;
baking the first silver paste to form a first silver paste layer;
attaching a power chip to the surface of the first silver paste layer;
Sintering at a high temperature until the power chip is adhered to the first silver paste layer, and the solvent in the first silver paste layer is thoroughly volatilized, wherein the temperature range during high-temperature sintering is 175-350 ℃;
printing second silver paste on the grid electrode and the source electrode of the power chip respectively;
baking the second silver paste to form a second silver paste layer;
attaching copper sheets to each second silver paste layer, wherein the copper sheets cover the surfaces of the second silver paste layers;
and sintering at high temperature until the copper sheet is adhered to the second silver paste layer, and thoroughly volatilizing the solvent in the second silver paste layer, wherein the temperature range during high-temperature sintering is 175-350 ℃.
2. The method of manufacturing a power chip sintering module according to claim 1, wherein the second silver paste is printed by using the following steps,
1 Time 3D steel screen printing was performed at a pressure of 10N and a speed of 20 mm/s.
3. The method of manufacturing a power chip sintering module according to claim 1, wherein the second silver paste is baked by the following steps,
Baking at 140 deg.C for 20min under pure nitrogen.
4. The method for manufacturing a power chip sintering module according to claim 1, wherein after the copper sheet is covered on the surface of the second silver paste layer, the following steps are adopted during high-temperature sintering,
Sintering at 250 deg.c and 16MPa for 300s.
5. A method for manufacturing a power chip sintering module is characterized by comprising the following steps,
Before sintering, picking up a ductile limit line on a mounting groove of a carrier plate jig, inserting a heat dissipation copper base block into the mounting groove and loosening the limit line, wherein the limit line is arranged along the diagonal direction of the top surface of the heat dissipation copper base block, a limit area for limiting the heat dissipation copper base block is arranged at the inner bottom of the mounting groove, and a groove for accommodating a power chip is formed in the top surface of the heat dissipation copper base block;
OSP treatment is carried out on the top surface of the heat dissipation copper base block on the carrier plate jig until the top surface of the heat dissipation copper base block is attached with an organic coating through a chemical method;
Picking up the limit line and moving the radiating copper base block out of the mounting groove;
printing a first silver paste at the bottom of the groove on the top surface of the heat dissipation copper base block;
baking the first silver paste to form a first silver paste layer;
attaching a power chip to the surface of the first silver paste layer;
Sintering at a high temperature until the power chip is adhered to the first silver paste layer, and the solvent in the first silver paste layer is thoroughly volatilized, wherein the temperature range during high-temperature sintering is 175-350 ℃;
silver films are respectively attached to the grid electrode and the source electrode of the power chip;
attaching copper sheets to each silver film, wherein the copper sheets cover the surfaces of the silver films;
and sintering at a high temperature until the copper sheet is adhered to the silver film, and the solvent in the silver film is thoroughly volatilized, wherein the copper sheet covers the surface of the silver film, and the temperature range during sintering at the high temperature is 175-350 ℃.
6. The method for manufacturing a power chip sintering module according to claim 5, wherein the silver film is attached by the following steps,
The chip bonding temperature of the die bonder is set to be 130-180 ℃, the chip bonding pressure is 20N, and the chip bonding speed is 20mm/s.
7. The method of manufacturing a power chip sintering module according to claim 5, wherein after the copper sheet is covered on the surface of the silver film, the following steps are adopted during high-temperature sintering,
Sintering at 250 deg.c and 16MPa for 300s.
8. The method for manufacturing a power chip sintering module according to claim 1 or 5, wherein the copper sheet is attached by the following steps,
Setting the temperature of the patch at 120 ℃ and the pressure of the patch at 50N, and mounting for 1200ms through a die bonder.
9. The carrier plate fixture is characterized by comprising a medium layer, wherein the medium layer is formed by laminating a plurality of prepregs and then high-temperature lamination, and the temperature range during the high-temperature lamination is 175-350 ℃;
a plurality of mounting grooves are formed in the carrier plate jig, and the size of each mounting groove is in the mm level and is larger than that of the heat dissipation copper base block;
a limiting area is concavely arranged in the middle position of the inner bottom of the mounting groove;
A plurality of first through holes and a plurality of second through holes are drilled in the peripheral position of the mounting groove on the carrier plate jig, the first through holes are positioned in the opposite side bisector direction of the mounting groove, the second through holes are positioned in the diagonal direction of the mounting groove, the distance value between the first through holes and the groove edge of the mounting groove is equal to the vertical distance value between the second through holes and the groove edge of the adjacent mounting groove, and the distance value and the vertical distance value are both larger than 0;
And a limiting wire with ductility is arranged in the second through hole in a penetrating way, the limiting wire is crossed in an X shape and is right above the mounting groove, and the wire head and the wire tail of the limiting wire are fixed in the second through hole.
10. The carrier fixture of claim 9, wherein the number of second through holes is 4 and is uniformly distributed along a diagonal direction of the mounting groove.
11. The carrier fixture of claim 9, wherein the number of first through holes is 4 and is uniformly distributed along the opposite side bisector direction of the mounting groove.
12. The carrier tool of claim 9, wherein the limit area is cross-shaped.
13. The carrier tool of claim 9, wherein the wire ends and wire tails of the limit wire are respectively located in two second through holes in the same diagonal direction of the carrier tool, and the second through holes are filled with cured epoxy resin for fixing the wire ends and wire tails of the limit wire.
14. The power chip sintering module is characterized by being manufactured by adopting the manufacturing method of the power chip sintering module in claim 1, and comprising a heat dissipation copper base block, wherein the length of the heat dissipation copper base block is 10-12mm, the width of the heat dissipation copper base block is 10-12mm, the thickness of the heat dissipation copper base block is 1.1-1.3mm, the top surface of the heat dissipation copper base block is provided with a groove, the length of the groove is 8-9mm, the width of the groove is 6-7mm, and the depth of the groove is 0.2-0.3mm;
The middle position in the groove is sequentially provided with a first silver paste layer and a power chip from bottom to top, the length of the first silver paste layer is 7.0-7.5mm, the width of the first silver paste layer is 5.0-5.5mm, the thickness of the first silver paste layer is 0.02-0.04mm, the length of the power chip is 6.90-6.95mm, the width of the power chip is 4.70-4.75mm, and the thickness of the power chip is 0.1-0.2mm;
The grid electrode and the source electrode of the power chip are respectively printed with a second silver paste layer, the second silver paste layer completely covers the electrode and the source electrode, the length of the grid electrode is 0.5-0.6mm, the width of the grid electrode is 0.7-0.8mm, the number of the source electrodes is two, the length of the source electrode is 6.1-6.3mm, the width of the source electrode is 2.1-2.3mm, and the thickness of the second silver paste layer is 0.02-0.04mm;
The second silver paste layers are covered with copper sheets, and the thickness of each copper sheet is 0.02-0.04mm.
15. The power chip sintering module is characterized by being manufactured by adopting the manufacturing method of the power chip sintering module according to claim 5, and comprising a heat dissipation copper base block, wherein the length of the heat dissipation copper base block is 10-12mm, the width of the heat dissipation copper base block is 10-12mm, the thickness of the heat dissipation copper base block is 1.1-1.3mm, the top surface of the heat dissipation copper base block is provided with a groove, the length of the groove is 8-9mm, the width of the groove is 6-7mm, and the depth of the groove is 0.2-0.3mm;
The middle position in the groove is sequentially provided with a first silver paste layer and a power chip from bottom to top, the length of the first silver paste layer is 7.0-7.5mm, the width of the first silver paste layer is 5.0-5.5mm, the thickness of the first silver paste layer is 0.02-0.04mm, the length of the power chip is 6.90-6.95mm, the width of the power chip is 4.70-4.75mm, and the thickness of the power chip is 0.1-0.2mm;
The grid electrode and the source electrode of the power chip are respectively sintered with a silver film layer, the silver film layer completely covers the electrode and the source electrode, the length of the grid electrode is 0.5-0.6mm, the width of the grid electrode is 0.7-0.8mm, the number of the source electrodes is two, the length of the source electrode is 6.1-6.3mm, the width of the source electrode is 2.1-2.3mm, and the thickness of the silver film layer is 0.01-0.03mm;
copper sheets are covered on the silver film layers, and the thickness of each copper sheet is 0.02-0.04mm.
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JPH11115963A (en) * 1997-10-13 1999-04-27 Ricoh Co Ltd Thermal expansion / shrinkage carrier tape and taping method
US20030117775A1 (en) * 2001-12-20 2003-06-26 Vrtis Joan K. Coated heat spreaders
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