Disclosure of Invention
The present invention is directed to a wapi-connected low-power module system to solve the above-mentioned problems.
In order to solve the technical problems, the invention provides the following technical scheme:
wapi connect low power consumption modular systems comprising:
The core processor is connected with the security coprocessor; the security coprocessor is used for processing the encryption and decryption algorithm and the security protocol stack of the WAPI;
the system comprises a core processor, a power management unit and a power management unit, wherein the core processor is connected with the power management unit, the power management unit monitors the activity of the system, the core processor is informed of entering a low-power mode when the system is idle, the core processor then adjusts the voltage and the frequency to the low-power level through the power management unit, when a task wake-up signal arrives, the power management unit quickly resumes the power supply, and the core processor returns to the working state;
The power consumption management unit integrates power gating and sleep mode management, controls the power supply of the module, and realizes rapid awakening and deep sleep mode switching; in no data transmission or idle period, the module automatically enters a low power consumption mode, only maintains basic monitoring and standby functions, and quickly wakes up and resumes a working state when a data request exists;
The power consumption management unit is connected with the radio frequency front end, and comprises a low noise amplifier, a power amplifier and a filter, wherein the power consumption management unit is connected with the radio frequency front end: the power consumption management unit controls the power supply of the radio frequency front end, and when no data transmission exists, the power consumption management unit enables the radio frequency front end to enter a low power consumption mode, and only the lowest power consumption standby state is reserved; when data transmission is required, the power consumption management unit immediately activates the radio frequency front end power supply, and high-efficiency transmission is ensured through AGC automatic gain control and dynamic power adjustment.
Further, a hardware accelerator is integrated in the security coprocessor, the security coprocessor automatically processes authentication requests in a WAPI handshake phase, and a quick authentication algorithm is completed by utilizing the built-in hardware acceleration of the security coprocessor through encrypted key exchange, so that data integrity and source verification are ensured.
Further, the power consumption management unit monitors system activity, notifies the core processor to enter a low power consumption mode when the system is idle, the core processor then adjusts voltage and frequency to a low power consumption level through the power consumption management unit, when a task wake-up signal arrives, the power consumption management unit rapidly resumes power supply, and the core processor returns to a working state, comprising:
the power consumption management unit is integrated with a hardware counter and is used for tracking key indexes of CPU activities, memory access frequency and peripheral interaction times; when the count is lower than a preset threshold value, indicating that the system enters an idle state, triggering hardware interrupt, and informing a power consumption management unit to perform the next operation; a software hook is arranged on an operating system, state changes of key processes and threads are monitored, and once the overall activity reduction of the system is identified, a signal is sent to a power consumption management unit through a system API to indicate that energy conservation preparation is entered.
Further, the power consumption management unit monitors system activity, notifies the core processor to enter a low power consumption mode when the system is idle, the core processor then adjusts voltage and frequency to a low power consumption level through the power consumption management unit, when a task wake-up signal arrives, the power consumption management unit rapidly resumes power supply, and the core processor returns to a working state, comprising: the method comprises the steps that a bidirectional communication link is established between a power consumption management unit and a core processor, and after the system idle is detected, the power consumption management unit sends a low-power consumption mode entering instruction to the core processor through the bidirectional communication link; after receiving the instruction, the core processor synchronizes the current task state, saves necessary context, prepares to enter a low-power consumption mode, confirms receipt to the power consumption management unit, and ensures the consistency of the states of the two parties.
Further, the power consumption management unit monitors system activity, notifies the core processor to enter a low power consumption mode when the system is idle, the core processor then adjusts voltage and frequency to a low power consumption level through the power consumption management unit, when a task wake-up signal arrives, the power consumption management unit rapidly resumes power supply, and the core processor returns to a working state, comprising: the power consumption management unit stores a preset voltage and frequency corresponding table, and rapidly searches and sets the most suitable voltage and frequency combination according to a low power consumption mode request of the core processor; the voltage and the frequency are gradually reduced in a gradient mode, and in the adjustment process, the power consumption management unit finely adjusts the voltage and the frequency by monitoring the working state of the processor and feeding back the temperature sensor, so that the lowest power consumption is ensured under the premise of ensuring the stability.
Further, the power consumption management unit monitors system activity, notifies the core processor to enter a low power consumption mode when the system is idle, the core processor then adjusts voltage and frequency to a low power consumption level through the power consumption management unit, when a task wake-up signal arrives, the power consumption management unit rapidly resumes power supply, and the core processor returns to a working state, comprising: when the wake-up signal of the high-priority task arrives, the power consumption management unit responds preferentially, the power supply of the core processor is quickly restored, the instant processing of the key task is ensured, the integrated quick starting circuit is integrated, when the wake-up signal is triggered, the power consumption management unit can immediately restore to the previous working voltage and frequency setting, the core processor quickly returns to full-speed operation from a low-power state, the wake-up delay is reduced, after the core processor resumes operation, the state before the task interrupt is quickly restored by utilizing the previously stored context information, and the execution is continued seamlessly.
Further, "power supply of control module, realize fast wake-up and deep sleep mode switching; in no data transmission or idle period, the module automatically enters a low power consumption mode, only maintains basic monitoring and standby functions, and rapidly wakes up and resumes working state when data request exists, which specifically comprises:
The power consumption management unit is communicated with the radio frequency front end and the security coprocessor to perform power consumption coordination, so that all modules synchronously enter corresponding energy-saving states in a low power consumption mode, the increase of the overall power consumption of the system caused by waking up a single module is avoided, and when one module is waken up, only other modules directly related to the module are activated instead of global waking up.
Further, "power supply of control module, realize fast wake-up and deep sleep mode switching; in no data transmission or idle period, the module automatically enters a low power consumption mode, only maintains basic monitoring and standby functions, and rapidly wakes up and resumes working state when data request exists, which specifically comprises: and the power supplies of the low noise amplifier, the power amplifier and the filter are independently controlled by multi-level power gating, so that only necessary functional modules are activated under different working modes.
Advantageous effects
The application obviously improves the energy efficiency ratio and the battery endurance: through the low-power design, wapi of the application is connected with the low-power module system, so that the overall energy consumption is obviously reduced while the safe transmission of high-efficiency data is ensured. The dynamic voltage and frequency adjustment technology of the core processor, the low-power design of the security coprocessor, the intelligent power distribution and deep sleep mechanism of the power management unit and the efficient transmitting and receiving strategies of the radio frequency front end are combined, so that the energy efficiency ratio of the system is greatly improved, the service life of the battery-driven equipment is prolonged, and the system is particularly suitable for remote sensor networks, mobile equipment and Internet of things terminals with strict requirements on endurance.
Enhanced security and data protection: the integrated hardware accelerator and the security coprocessor specially designed for WAPI not only accelerate the encryption and authentication process and reduce the dependence on a main processor, but also realize the physical and logical security isolation and enhance the resistance of the system to malicious attacks. The method provides solid guarantee for the fields with high requirements on data privacy and safety, such as smart cities, industrial Internet of things and the like.
Fast response and efficient communication: the adopted intelligent wake-up strategy, the rapid starting circuit design, the self-adaptive gain control and the dynamic power adjustment ensure that the module can still respond to the data transmission requirement rapidly in the low-power consumption standby state, realize seamless data exchange, reduce the waiting time and the transmission delay, optimize the user experience and particularly show excellent performance in the wireless communication environment with a high dynamic range.
Flexible system compatibility and ease of use: through standardized interface designs (such as SPI and I 2 C) and an API abstract layer, the module is easy to integrate into the existing system architecture, simplifies the work of a developer, realizes safe data encryption processing without deep knowledge of complex WAPI protocol details, and promotes popularization and application innovation of technology.
In summary, through a series of innovative designs, the WAPI-connection low-power-consumption module system not only solves the problem of overhigh power consumption in the traditional WAPI implementation, but also further improves the safety, response speed, compatibility and environmental adaptability of the system, and provides a comprehensive and advanced solution for wireless communication application scenes with low power consumption and high safety requirements.
Detailed Description
The technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In an embodiment, wapi of the present application is connected to a low-power module system, and referring to fig. 1, the system includes:
1. core processor and security co-processor
The method comprises the steps of selecting a low-power-consumption embedded processor as a main control unit, such as ARM Cortex-M series, and optimizing for low-power-consumption application. Meanwhile, a special security coprocessor is integrated to specially process the encryption and decryption algorithm (such as SMS 4) and the security protocol stack of WAPI so as to lighten the burden of a core processor.
The low power consumption is realized by utilizing a dynamic voltage and frequency adjustment (DVFS) technology to automatically adjust the voltage and frequency of the processor according to the task load, so that unnecessary energy consumption is reduced.
2. Power consumption management unit
The intelligent power management system comprises a power consumption management unit (PMU), a power gating technology and sleep mode management are integrated, and the power supply of the intelligent control module is used for realizing rapid awakening and deep sleep mode switching.
The working principle is that the module automatically enters a low power consumption mode in no data transmission or idle period, only maintains basic monitoring and standby functions, and wakes up and resumes working state rapidly when data request is made.
3. Low-power consumption radio frequency front end
The low-power consumption radio frequency chip, such as RFIC supporting WAPI, is adopted to optimize the design of the radio frequency front end, and the low-power consumption radio frequency chip comprises LNA (low noise amplifier), PA (power amplifier) and a filter, so as to reduce the energy consumption in the transmitting and receiving processes.
Low power consumption is achieved by Automatic Gain Control (AGC) and PA design, and dynamic adjustment of transmit power, ensuring unnecessary energy consumption is reduced while coverage is met.
Connection of core processor to security co-processor: the core processor (e.g., cortex-M series) is coupled to the security co-processor via a high speed internal communication interface, such as SERIAL PERIPHERAL Component Interconnectivity Interface (SPI), or ADVANCED HIGH-performance Bus (AHB). These interfaces allow the fast security co-processor to exchange encrypted data and instructions with the core processor while keeping the task burden of the core processor to a minimum.
Working principle: when an API request or data needs to be encrypted/decrypted, the core processor sends an instruction and original data to the security coprocessor through an interface, the security coprocessor returns an encryption or decryption result after processing, the core processor performs subsequent processing, and the DVFS technology automatically adjusts the working state to save power consumption.
Connection of core processor and power consumption management unit: the core processor is coupled to a Power Management Unit (PMU) via a power management interface, such as I 2 C or a dedicated power management bus, allowing the PMU to adjust power states, such as voltage and current, according to instructions from the processor.
Working principle: the PMU monitors system activity and when the system is idle, informs the core processor to enter a low power mode, and the processor then adjusts voltage and frequency to a low power level via the PMU. When a task wake-up signal arrives, the PMU quickly resumes power supply and the processor returns to an operating state.
The power consumption management unit is connected with the low-power consumption radio frequency front end: the power consumption management unit PMU controls the power supply of the radio frequency front end, and comprises an LNA, a PA and a filter component, and the power consumption management unit PMU is directly connected with the voltage regulator through a switching circuit (such as a PMOSFET tube) to ensure that the radio frequency front end is powered off when the radio frequency front end is not in operation.
Working principle: when no data transmission exists, the PMU enables the radio frequency front end to enter a low-power mode, and only the standby state with the lowest power consumption is reserved. When data transmission is required, the PMU immediately activates a radio frequency front-end power supply, an LNA, a PA and a filter to work, and high-efficiency transmission is ensured through AGC automatic gain control and dynamic power adjustment.
Under the coordination of a core processor, the whole system ensures the data security processing through efficient communication and management, the PMU manages energy supply, and the low-power-consumption radio frequency front end is responsible for efficient wireless communication. Each component is dynamically adjusted according to real-time requirements, and the whole system is ensured to run efficiently with low power consumption through close cooperation of internal communication interfaces.
The specific circuit selection and implementation modes of the core processor, the security coprocessor, the power consumption management unit and the low-power consumption radio frequency front end are as follows:
specific circuit selection of the core processor and the security coprocessor:
The core processor: ARM Cortex-M series such as STM32L4 or STM32L0 are selected, and the microcontrollers are particularly suitable for low-power consumption application and have integrated power management functions.
A security co-processor: ATECC3xx series security chips, designed specifically for security applications, provide hardware acceleration such as AES, RSA acceleration, communicate with the core processor through SPI or I 2 C.
Connection and working principle:
The core processor is in charge of task scheduling and management through SPI or I 2 C bus connection, the security coprocessor processes the encryption algorithm and the protocol stack, the load of the core processor is lightened, DVFS is automatically adjusted during SPI communication, and the voltage and the frequency are modulated according to the task intensity.
Specific circuit selection of the power consumption management unit:
PMU TPSM3438259 series integrates various power management modules, including various power domains, supporting dynamic voltage regulation and fast state switching.
Power gating techniques: the PMOSFET control, such as AO4445x series, is used to match PMU to switch power path.
Working principle:
The PMU is communicated with the core processor through an I 2 C or special interface, voltage and power domains are adjusted according to the system state, the PMU quickly enters dormancy or wakes up, the PMOSFET controls the non-working module to supply power, and the power is cut off when no data exists, so that the power consumption is reduced.
Low-power consumption radio frequency front end the specific circuit is selected:
the radio frequency chip NRF5240 series, low-power consumption Bluetooth/Thread/Zigbee wireless SoC integrates high-efficiency PA and LNA, and supports dynamic power control.
LNA low noise amplifier: ADL5777, low noise figure, optimizes the reception sensitivity.
PA: SKY-PAC28888, high efficiency and dynamic adjustment of output power.
And (3) a filter: SAWA15535, optimizing selectivity and reducing interference.
Working principle:
An NRF chip integrated at the front end of the radio frequency, such as NRF5240, automatically controls LNA, PA and a filter, dynamically adjusts the transmitting power according to the distance and the environment through AGC automatic gain control, enters a low-power consumption mode when no data exists, receives the data, and responds quickly and transmits efficiently.
The following general details of the present application wapi with low-power module system, as shown in fig. 1, the present application wapi with low-power module system includes:
The core processor is connected with the security coprocessor; the security coprocessor is used for processing the encryption and decryption algorithm and the security protocol stack of the WAPI;
Specific details of the security co-processor:
Hardware accelerator integration: the security co-processor internally integrates a hardware accelerator, such as AES (Advanced Encryption Standard) cryptographic accelerator, which is dedicated to hardware acceleration for SMS4 algorithms, and a hardware random number generator (TRNG) to enhance the security and speed of the cryptographic process while reducing the dependence on the host processor.
The security protocol stack hardware implementation: besides encryption and decryption algorithms, the security coprocessor is also internally provided with hardware implementation of a WAPI security protocol stack, including but not limited to key negotiation, identity authentication and session key management key protocol modules, so that the whole process of data transmission is ensured to be safe and reliable, meanwhile, the operation burden of software is reduced, and the power consumption is reduced.
Safety isolation mechanism: the physical or logical security isolation is realized, the security coprocessor is ensured to be independent of the core processor and other modules, the protection capability of the core security data is not affected even if other parts of the system are attacked, and the attack resistance of the whole system is enhanced.
Authentication and encryption flow: in the WAPI handshake phase, the security coprocessor automatically processes authentication requests, utilizes the built-in hardware to accelerate and complete a quick authentication algorithm, such as ECDHMAC calculation (Message Authentication Code), through encrypted key exchange, ensures data integrity and source verification, and simultaneously uses a dynamic key update mechanism to cope with potential key leakage risks.
Low power consumption optimization: the security coprocessor adopts a low-power design, such as a low-leakage transistor process and a deep sleep mode, automatically enters a low-power state in an inactive period, and rapidly wakes up an execution task only when needed, and supplements DVFS technology of the core processor, so that the energy consumption of the system is further reduced as a whole.
System integration and interface details:
Besides high-speed SPI or AHB bus, the communication interface between the security coprocessor and the core processor can also introduce a more efficient special security bus such as SCP (Secure Channel Protocol) for encryption communication, so that the security of data in the transmission process is enhanced, and the low-power consumption characteristic is maintained.
And in the software layer, an API interface layer abstraction is provided, so that an application developer can easily call the encryption function without knowing the details of a security protocol with a complex bottom layer, and the encryption and decryption processing of data is carried out through the security coprocessor, thereby simplifying the development difficulty and improving the popularization and security of the application.
Through the specific implementation details, when the security coprocessor processes the encryption and decryption algorithm and the security protocol stack of the WAPI, high-efficiency and safe data transmission is ensured, the security coprocessor is consistent with the overall low-power-consumption module design, and the deep fusion of technical innovation and performance optimization is realized.
As shown in fig. 1, the low-power module system connected with wapi of the present application further includes a power management unit, the core processor is connected with the power management unit, the power management unit monitors the activity of the system, when the system is idle, the core processor is notified to enter a low-power mode, the core processor then adjusts the voltage and frequency to a low-power level through the power management unit, when a task wake-up signal arrives, the power management unit rapidly resumes the power supply, and the core processor returns to the working state; specific implementation details of the power management unit monitoring system activity include the following:
activity detection mechanism:
Hardware counter and interrupt: the power consumption management unit is integrated with a hardware counter and is used for tracking key indexes of CPU activities, memory access frequency and peripheral interaction times. When the count is lower than a preset threshold value, the system enters an idle state, the hardware interrupt is triggered, and the PMU is informed to carry out the next operation. Software hooks and event listening: software hooks are provided at the operating system to monitor state changes of critical processes and threads, and upon recognizing a reduction in overall system activity, a signal is sent to the PMU via the system API indicating to enter power saving preparation.
Notification mechanism:
Efficient communication protocol: using I 2 C or a proprietary low-power communication protocol, a fast-responding bi-directional communication link is established between the PMU and the core processor. After detecting that the system is idle, the PMU sends a low power mode entry instruction to the core processor over this link.
State synchronization: after receiving the instruction, the core processor synchronizes the current task state, saves necessary context, prepares to enter a low power consumption mode, confirms a receipt to the PMU, and ensures the consistency of the states of the two parties.
Dynamic Voltage and Frequency Scaling (DVFS) implementation:
Voltage frequency configuration table: the PMU stores a preset voltage and frequency correspondence table, and quickly searches and sets the most suitable voltage and frequency combination according to a low-power mode request of the core processor.
Gradient depressurization and frequency reduction: the voltage and the frequency are gradually reduced in a gradient mode, so that unstable systems possibly caused by instantaneous large-amplitude changes are avoided, and meanwhile, energy loss in the power consumption conversion process is minimized.
Real-time feedback control: in the adjustment process, the PMU finely adjusts voltage and frequency by monitoring the working state of the processor and the feedback of the temperature sensor, so that the minimum power consumption is ensured on the premise of ensuring stability.
Wake-up and resume mechanism:
Task wakeup signal priority management: the system is designed with a task priority queue, when a high-priority task wake-up signal arrives, the PMU responds preferentially, and the power supply of the core processor is quickly restored, so that the instant processing of the key task is ensured.
A quick start circuit: the integrated fast start circuit design, when the wake-up signal triggers, the PMU can immediately resume to the previous operating voltage and frequency setting, the core processor quickly returns to full speed operation from the low power consumption state, and the wake-up delay is reduced.
State recovery: and after the core processor resumes operation, the state before the task interruption is quickly restored by utilizing the previously stored context information, and the execution is continued seamlessly, so that the user experience is ensured not to be affected.
Through the detailed designs, the power consumption management unit not only can accurately monitor the system activity and respond in time, but also can maximize the energy-saving effect on the basis of ensuring the system stability, and is perfectly integrated with the whole scheme of the low-power consumption module.
The power consumption management unit integrates power gating and sleep mode management, controls the power supply of the module, and realizes rapid awakening and deep sleep mode switching; in no data transmission or idle period, the module automatically enters a low power consumption mode, only maintains basic monitoring and standby functions, and quickly wakes up and resumes a working state when a data request exists; specific details of "power management unit integrated power gating and sleep mode management":
Intelligent switching strategy for deep sleep mode:
Context awareness and adaptive sleep depth: the power consumption management unit integrates an environment sensing module, such as an illumination sensor, a motion detection sensor or wireless signal intensity sensing, and intelligently judges whether to enter a deeper sleep level according to external environment changes. For example, during the night or in areas of weak signals, the system may automatically enter a deeper sleep mode to save more energy.
Task prejudging and preloading mechanism: through historical data analysis and a learning algorithm, the PMU can predict task demands possibly occurring in a period of time in the future, pre-load resources in advance, reduce loading time after awakening, ensure quick response and optimize energy use.
Inter-module collaborative low power management:
Inter-module power consumption coordination: and the power consumption management unit is communicated with other modules, such as a radio frequency front end and a security coprocessor, so that power consumption coordination is performed, all the modules synchronously enter corresponding energy-saving states under a low power consumption mode, and the increase of the overall power consumption of the system caused by awakening a single module is avoided.
Intelligent wake-up strategy: and an intelligent wake-up strategy is designed to ensure that when one module is waken up, only other modules directly related to the module are activated, but not the global wake-up, so that unnecessary energy consumption is reduced. For example, only when the radio frequency front end has data transmission requirements, the corresponding filter and power amplifier are woken up without affecting the unused peripherals.
Fine control of power gating:
Multi-level power gate control design: and designing multi-level power gating for different subsystems and key components to realize finer power control. For example, for a radio frequency front end, the power supply of the LNA, PA and filters may be controlled separately, ensuring that only the necessary functional modules are activated in the different modes of operation.
Transient response optimization: the transient response time of the PMU is optimized, so that when a wake-up signal arrives, the power supply can be quickly and smoothly adjusted to a level required by the working state, the current peak in the wake-up process is reduced, and the energy consumption is reduced.
Health monitoring and self-maintenance in low power mode:
Health status monitoring: in the low power mode, the PMU continuously monitors the health state of key components, such as battery power, temperature and voltage stability, with extremely low power consumption, so as to ensure long-term stable operation of the system.
Self-repair and recovery strategy: and when the component abnormality is detected or the potential fault is predicted, the PMU automatically takes measures, such as adjusting a power strategy or executing hardware reset, so that the complete shutdown of the system caused by small problems is avoided, and the service life of the module is prolonged.
By combining the supplementary details, the power consumption management unit not only realizes more intelligentization and high efficiency in rapid wake-up and deep sleep mode switching, but also further strengthens the energy utilization efficiency and reliability of the whole low-power consumption module through cross-module cooperation, refined power supply control and self-maintenance mechanisms.
The application also comprises a radio frequency front end, wherein the radio frequency front end comprises a low noise amplifier, a power amplifier and a filter, a power consumption management unit is connected with the radio frequency front end, the power consumption management unit controls the power supply of the radio frequency front end, and when no data transmission exists, the power consumption management unit enables the radio frequency front end to enter a low power consumption mode, and only the minimum power consumption standby state is reserved; when data transmission is required, the power consumption management unit immediately activates the radio frequency front end power supply, and high-efficiency transmission is ensured through AGC automatic gain control and dynamic power adjustment. Specific details of the power supply of the radio frequency front end are controlled by the power consumption management unit:
Intelligent power gating strategy: the connection between the power consumption management unit (PMU) and the radio frequency front end adopts an intelligent power gating strategy, and independent power control of the LNA, the PA and the filter is realized through an integrated PMOSFET (such as AO4445x series) and a precise voltage regulator. During the period of no data transmission, the PMU judges the idle period of data transmission by monitoring the state of a Network Interface Controller (NIC) in real time, and cuts off the power supply of all radio frequency front-end components except the monitoring circuit accordingly, so as to ensure that only the minimum standby power consumption is maintained.
Adaptive Gain Control (AGC): the LNA at the front end of the radio frequency integrates a high-performance AGC module, such as ADL5777, which can continuously monitor the received signal strength in a low-power mode, and rapidly adjust the gain of the LNA when the data transmission requirement arrives, optimize the receiving sensitivity, ensure that the data can be effectively received under various signal strengths, and avoid the extra power consumption caused by the excessively high gain.
Dynamic power adjustment: the PA (e.g., SKY-PAC 28888) has dynamic power adjustment capability, and cooperates with the PMU to provide only the minimum power required to complete the effective data transmission, and reduce the invalid transmit power by rapid power step adjustment according to the actual transmission distance and the environmental conditions, thereby saving energy. Before data transmission, the PMU presets the initial power level of the PA according to the link quality information fed back by the radio frequency front end, and then dynamically fine-tunes according to the real-time link condition.
Fast wake-up and transmit preparation mechanism:
To reduce the wake-up delay, the PMU starts to gradually restore the power to the rf front-end critical components when detecting the initial sign of the data transmission requirement (such as Wi-Fi signaling interaction or network request), rather than waiting until the data packet arrives completely, so that the LNA and PA are in standby state before the data is actually transmitted, and the response time is shortened.
After the radio frequency front end wakes up from the low power consumption mode, the history record of the last working state, including AGC gain setting and PA power level, is quickly referenced, the radio frequency front end is quickly restored to the most approximate optimal working point, and then is finely tuned to the optimal state according to the real-time communication quality, so that high-efficiency and quick data transmission is ensured.
Environmental awareness and adaptation in low power standby mode:
The LNA of the radio frequency front end keeps limited sensing capability to the environment in a standby mode although the power consumption is extremely low, for example, the change of the surrounding electromagnetic environment or a specific wake-up signal is detected, and once a predefined wake-up condition is identified, a quick wake-up signal is immediately triggered to a PMU.
In summary, the connection and control mechanism between the power consumption management unit and the radio frequency front end fully considers the intelligence, the dynamics and the efficiency in design, and ensures that the radio frequency front end reduces the power consumption to the maximum extent under the premise of not sacrificing the data transmission efficiency and the quality through the highly integrated power management, the self-adaptive control strategy and the quick response design.
The application obviously improves the energy efficiency ratio and the battery endurance: through the low-power design, wapi of the application is connected with the low-power module system, so that the overall energy consumption is obviously reduced while the safe transmission of high-efficiency data is ensured. The dynamic voltage and frequency adjustment technology of the core processor, the low-power design of the security coprocessor, the intelligent power distribution and deep sleep mechanism of the power management unit and the efficient transmitting and receiving strategies of the radio frequency front end are combined, so that the energy efficiency ratio of the system is greatly improved, the service life of the battery-driven equipment is prolonged, and the system is particularly suitable for remote sensor networks, mobile equipment and Internet of things terminals with strict requirements on endurance.
Enhanced security and data protection: the integrated hardware accelerator and the security coprocessor specially designed for WAPI not only accelerate the encryption and authentication process and reduce the dependence on a main processor, but also realize the physical and logical security isolation and enhance the resistance of the system to malicious attacks. The method provides solid guarantee for the fields with high requirements on data privacy and safety, such as smart cities, industrial Internet of things and the like.
Fast response and efficient communication: the adopted intelligent wake-up strategy, the rapid starting circuit design, the self-adaptive gain control and the dynamic power adjustment ensure that the module can still respond to the data transmission requirement rapidly in the low-power consumption standby state, realize seamless data exchange, reduce the waiting time and the transmission delay, optimize the user experience and particularly show excellent performance in the wireless communication environment with a high dynamic range.
Flexible system compatibility and ease of use: through standardized interface designs (such as SPI and I 2 C) and an API abstract layer, the module is easy to integrate into the existing system architecture, simplifies the work of a developer, realizes safe data encryption processing without deep knowledge of complex WAPI protocol details, and promotes popularization and application innovation of technology.
In summary, through a series of innovative designs, the WAPI-connection low-power-consumption module system not only solves the problem of overhigh power consumption in the traditional WAPI implementation, but also further improves the safety, response speed, compatibility and environmental adaptability of the system, and provides a comprehensive and advanced solution for wireless communication application scenes with low power consumption and high safety requirements.
It should be noted that, in the present specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment is mainly described in a different point from other embodiments. In particular, for the apparatus and system embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, with reference to the description of the method embodiments in part. The apparatus and system embodiments described above are merely illustrative, in which elements illustrated as separate elements may or may not be physically separate, and elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
The foregoing is only one specific embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the technical scope of the present application should be included in the scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims. The protection scope of the claims is subject to.