Detailed Description
Preferred embodiments of the present invention will be described in more detail below. While the preferred embodiments of the present invention are described below, it should be understood that the present invention may be embodied in various forms and should not be limited to the embodiments set forth herein.
In the present invention, unless otherwise indicated, terms of orientation such as "upper and lower" are used to generally refer to the upper and lower portions of the device in normal use, and "inner and outer" are used with respect to the profile of the device. Furthermore, the terms "first, second, third and the like" are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first, second, third" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
The invention provides a boost converter suitable for power supply of a DAC output stage, wherein the DAC output stage comprises an output PMOS tube M1 and a load resistor R OUT, the source electrode of the output PMOS tube M1 is electrically connected with the output voltage V1 of the boost converter, the drain electrode is electrically connected with one end of the load resistor R OUT, the other end of the load resistor R OUT is electrically connected with the ground GND, as shown in fig. 2, the boost converter comprises:
the input of the high-side voltage sampling circuit is electrically connected with the drain electrode of the output PMOS tube M1, and the high-side voltage sampling circuit is used for converting the source-drain voltage of the output PMOS tube M1 into a voltage signal V2 based on ground;
And the input of the boost circuit is electrically connected with the output end of the high-side voltage sampling circuit and is used for converting the voltage signal V2 based on the ground into the output voltage V1 of the boost converter.
According to the invention, the control loop sequentially converts the source-drain voltage of the output PMOS tube M1 into a voltage signal V2 based on ground, and converts the voltage signal V2 based on ground into the output voltage V1 of the boost converter, so that the power consumption of the output PMOS tube M1 is dynamically regulated and reduced.
According to the invention, the high-side voltage sampling circuit comprises a first operational amplifier EA1, a feedback PMOS tube M2, a first resistor R1 and a second resistor R2;
The non-inverting input end of the first operational amplifier EA1 is electrically connected with the drain electrode of the output PMOS tube M1, and the output is electrically connected with the grid electrode of the feedback PMOS tube M2;
One end of the first resistor R1 is electrically connected with the output voltage V1 of the boost converter, and the other end of the first resistor R1 is electrically connected with the source electrode of the feedback PMOS tube M2 and the inverting input end of the first operational amplifier EA 1;
the drain electrode of the feedback PMOS tube M2 is electrically connected with one end of the second resistor R2;
The other end of the second resistor R2 is electrically connected to the ground GND.
In the invention, the first operational amplifier EA1 may adopt a circuit structure shown in fig. 4, and the circuit works between the output voltage V1 of the high-voltage rail boost converter and the ground GND, and the output thereof controls the gate of the feedback PMOS tube M2 in the boost converter, so that the voltage at two ends of R1 in the boost converter is equal to the voltage at two ends of the source and drain of the output PMOS tube M1 in the boost converter, thereby realizing the high-side voltage sampling function.
According to the invention, the relation between the source-drain voltage of the output PMOS tube M1 and the voltage signal V2 based on the ground is as follows;
V2=(V1-VOUT)*R2/R1;
wherein, V 1-VOUT is the source-drain voltage of the output PMOS tube, V 2 is the voltage signal based on the ground, V 1 is the output voltage of the boost converter, V OUT is the drain potential of the output PMOS tube, R 1 is the first resistance value, and R 2 is the second resistance value.
According to the present invention, a booster circuit includes an error conversion circuit, a duty cycle adjustment circuit, and a main body conversion circuit.
Preferably, the error conversion circuit includes:
The inverting input end of the second operational amplifier EA2 is electrically connected with the drain electrode of the feedback PMOS tube M2, and the non-inverting input end of the second operational amplifier EA2 is electrically connected with a fixed potential;
one end of the compensation resistor Rc is electrically connected with the output of the second operational amplifier EA 2;
One end of the compensation capacitor Cc is electrically connected to the other end of the compensation resistor Rc, and the other end is electrically connected to the ground GND.
In the present invention, the second operational amplifier EA2 may have a circuit configuration shown in fig. 5.
According to the present invention, a duty cycle adjustment circuit includes:
the negative input end of the comparator COMP1 is electrically connected with the output end of the second operational amplifier EA 2;
the trigger Q1, the R end is electrically connected with the output of the comparator COMP1, and the S end is electrically connected with the clock signal;
the grid electrode of the NMOS tube M3 is electrically connected with the output end of the trigger Q1, and the source electrode of the NMOS tube M3 is electrically connected with the ground GND;
The input of the current detector is electrically connected with the drain electrode of the NMOS tube M3.
In the present invention, the comparator COMP1 may adopt a circuit configuration shown in fig. 6.
According to the present invention, the duty cycle adjustment circuit further includes:
The first input end of the ramp wave compensator COM1 is electrically connected with the output end of the current detector, the second input end of the ramp wave compensator COM1 is electrically connected with the compensating ramp wave, and the output end of the ramp wave compensator COMP1 is electrically connected with the positive input end of the comparator COMP 1.
According to the present invention, a main body conversion circuit includes:
one end of the inductor L is electrically connected with the power supply V0;
the input end of the diode D is electrically connected with the other end of the inductor L and the drain electrode of the NMOS tube M3 at the same time, and the output end of the diode D is used as the providing end of the output voltage V1 of the boost converter;
the main body capacitor C1 has one end electrically connected to the output terminal of the diode D and the other end electrically connected to the ground GND.
According to the invention, the source-drain voltage of the output PMOS tube M1 is converted into a voltage signal V2 based on ground through a high-side voltage sampling circuit, the voltage signal V2 based on ground and a fixed voltage difference value are converted into voltage control signals, meanwhile, the voltage control signals and a current detection circuit output signal for performing ramp compensation are compared through a comparator COMP1 to control the duty ratio of the NMOS tube M3, and finally, the voltage value of the output voltage V1 of the boost converter is regulated through the duty ratio, so that the voltage at the source-drain two ends of the output PMOS tube M1 is independent of the load resistor R OUT and the output current, and the output stage power consumption of the digital-to-analog converter is reduced.
In the present invention, the key node voltage pair of the boost converter is shown in fig. 3.
The invention also provides a boost conversion method which is applied to DAC output stage power supply and is performed in the boost converter, comprising the following steps:
Converting the source-drain voltage of the output PMOS tube M1 into a voltage signal V2 based on ground;
The ground-based voltage signal V2 is converted into a boost converter output voltage V1.
Preferably, converting the source-drain voltage of the output PMOS transistor M1 into the ground-based voltage signal V2 includes:
Converting the source-drain voltage of the output PMOS tube M1 into a voltage signal V2 based on ground through a high-side voltage sampling circuit, wherein the voltage signal V2 based on ground is in direct proportion to the source-drain voltage of the output PMOS tube M1;
Converting the ground-based voltage signal V2 to the boost converter output voltage V1 includes:
converting the ground-based voltage signal V2 and the fixed voltage difference into a voltage control signal;
comparing the voltage control signal with the output signal of the current detection circuit for performing ramp compensation through a comparator COMP1 to control the duty ratio of an NMOS tube M3;
the voltage value of the boost converter output voltage V1 is adjusted by the duty cycle.
The present invention will be described in more detail with reference to the following examples.
Examples
As shown in fig. 2, the present embodiment provides a boost converter suitable for power supply of a DAC output stage, where the DAC output stage includes an output PMOS tube M1 and a load resistor R OUT, a source of the output PMOS tube M1 is electrically connected to the boost converter output voltage V1, a drain is electrically connected to one end of the load resistor R OUT, and the other end of the load resistor R OUT is electrically connected to the ground GND, including:
the input of the high-side voltage sampling circuit is electrically connected with the drain electrode of the output PMOS tube M1, and the high-side voltage sampling circuit is used for converting the source-drain voltage of the output PMOS tube M1 into a voltage signal V2 based on ground;
the input of the boost circuit is electrically connected with the output end of the high-side voltage sampling circuit and is used for converting a voltage signal V2 based on ground into a boost converter output voltage V1;
In this embodiment, the high-side voltage sampling circuit includes a first operational amplifier EA1, a feedback PMOS tube M2, a first resistor R1, and a second resistor R2;
The non-inverting input end of the first operational amplifier EA1 is electrically connected with the drain electrode of the output PMOS tube M1, and the output is electrically connected with the grid electrode of the feedback PMOS tube M2;
One end of the first resistor R1 is electrically connected with the output V1 of the boost converter, and the other end of the first resistor R1 is electrically connected with the source electrode of the feedback PMOS tube M2 and the inverting input end of the first operational amplifier EA1 at the same time;
the drain electrode of the feedback PMOS tube M2 is electrically connected with one end of the second resistor R2;
The other end of the second resistor R2 is electrically connected with the ground GND;
In this embodiment, the first operational amplifier EA1 is configured as shown in fig. 4, and the circuit is operated between the output V1 of the high-voltage rail boost converter and the ground GND, and the output thereof controls the gate of the feedback PMOS transistor M2 in the boost converter, so that the voltage at two ends of R1 in the boost converter is equal to the voltage at two ends of the source and drain of the output PMOS transistor M1 in the boost converter, thereby implementing the high-side voltage sampling function;
The relation between the source-drain voltage of the output PMOS tube M1 and the voltage signal V2 based on the ground is as follows;
V2=(V1-VOUT)*R2/R1;
Wherein, V 1-VOUT is the source-drain voltage of the output PMOS tube, V 2 is the voltage signal based on the ground, V 1 is the output voltage of the boost converter, V OUT is the drain potential of the output PMOS tube, R 1 is the first resistance value, and R 2 is the second resistance value;
in this embodiment, the booster circuit includes an error conversion circuit, a duty ratio adjustment circuit, and a main body conversion circuit;
The error conversion circuit includes:
The inverting input end of the second operational amplifier EA2 is electrically connected with the drain electrode of the feedback PMOS tube M2, and the non-inverting input end of the second operational amplifier EA2 is electrically connected with the fixed potential of 0.8V;
one end of the compensation resistor Rc is electrically connected with the output of the second operational amplifier EA 2;
one end of the compensation capacitor Cc is electrically connected with the other end of the compensation resistor Rc, and the other end of the compensation capacitor Cc is electrically connected with the ground GND;
the second operational amplifier EA2 adopts the circuit configuration shown in fig. 5;
The duty cycle adjustment circuit includes:
the negative input end of the comparator COMP1 is electrically connected with the output end of the second operational amplifier EA 2;
the trigger Q1, the R end is electrically connected with the output of the comparator COMP1, and the S end is electrically connected with the clock signal;
the grid electrode of the NMOS tube M3 is electrically connected with the output end of the trigger Q1, and the source electrode of the NMOS tube M3 is electrically connected with the ground GND;
The input of the current detector is electrically connected with the drain electrode of the NMOS tube M3;
the first input end of the oblique wave compensator COM1 is electrically connected with the output end of the current detector, the second input end of the oblique wave compensator COM1 is electrically connected with the compensating oblique wave, and the output end of the oblique wave compensator COMP1 is electrically connected with the positive input end of the comparator COMP 1;
in this embodiment, the comparator COMP1 may adopt the circuit configuration shown in fig. 6;
The main body conversion circuit includes:
one end of the inductor L is electrically connected with the power supply V0;
the input end of the diode D is electrically connected with the other end of the inductor L and the drain electrode of the NMOS tube M3 at the same time, and the output end of the diode D is used as the providing end of the output voltage V1 of the boost converter;
the main body capacitor C1 has one end electrically connected to the output terminal of the diode D and the other end electrically connected to the ground GND.
In this embodiment, the first operational amplifier EA1 converts the voltage signal V 1-VOUT into a current signal, then converts the current signal into a voltage signal V 2=(V1-VOUT)*R2/R1 based on ground through R2, and controls the voltage signal V2 to 0.8V through a feedback loop formed by the second operational amplifier EA2 and the comparator COMP1, so as to obtain V 1-VOUT=0.8V*R1/R2, which can ensure that the source-drain voltage of the output PMOS transistor M1 is a constant value, which is independent of the value I OUT and the value R OUT, thereby reducing the power consumption of the output PMOS transistor M1;
for V OUT=IOUT*ROUT at the output end of the current output type digital-to-analog converter, the current value in the feedback PMOS tube M2 is controlled by the voltage difference of V 1-VOUT, namely I M2=(V1-VOUT)/R1, and the current signal I M2 in the feedback PMOS tube M2 is transmitted to the resistor R2 at the ground end to obtain a voltage signal V2 which is proportional to the voltage difference of V 1-VOUT, namely V 2=(V1-VOUT)*R2/R1;
The second operational amplifier EA2, the comparator COMP1, the NMOS tube M3, the diode D and the inductor L form a boost circuit, the circuit adopts a peak current control mode with oblique wave compensation, the second operational amplifier EA2 converts an error signal of 0.8V-V 2 into a voltage control signal V C, the voltage control signal and an output signal of the current electric measuring circuit are compared with each other through the comparator COMP1 to control the duty ratio of the NMOS tube M3, so as to control the voltage value of the output voltage V1 of the boost converter, the control loop controls the voltage signal V2 based on the ground to 0.8V, (V 1-VOUT)*R2/R1 =0.8V, namely the voltage V 1-VOUT at the source and drain ends of the output PMOS tube M1 is controlled to 0.8V by R 1/R2 by the loop, which has no relation with the I OUT value and the R OUT value, and therefore the power consumption of the output stage of the digital-to-analog converter is reduced;
As shown in fig. 3, when I OUT increases, V OUT follows the increase V OUT=IOUT*ROUT, and because the loop response requires time, V 1-VOUT decreases, and when the loop re-controls V2 to 0.8V, the value of V 1-VOUT is restored to be constant, so that the voltage across the source and drain of the output PMOS transistor M1 is fixed and is irrelevant to the value of I OUT、ROUT;
When I OUT decreases, V OUT follows the decrease in V OUT=IOUT*ROUT, V 1-VOUT increases due to the time required for loop response, and when the loop again controls V2 to 0.8V, the value of V 1-VOUT is restored to be constant, so that the voltage across the source and drain of the output PMOS tube M1 is fixed and is irrelevant to the values of I OUT and R OUT.
The boost converter suitable for DAC output stage power supply provided by the embodiment of the invention sequentially converts the source-drain voltage of the output PMOS tube into a voltage signal based on ground through the control loop, converts the voltage signal based on ground into the output voltage of the boost converter, and dynamically adjusts and reduces the power consumption of the output PMOS tube.
The foregoing description of embodiments of the invention has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described.