CN119208277A - A high frequency TSV silicon adapter board and design method thereof - Google Patents
A high frequency TSV silicon adapter board and design method thereof Download PDFInfo
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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- G—PHYSICS
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- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- G06F2115/00—Details relating to the type of the circuit
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- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
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Abstract
The invention provides a high-frequency TSV silicon adapter plate and a design method thereof, wherein two ends of a ground wire silicon through hole and a ground wire redundant silicon through hole in the high-frequency TSV silicon adapter plate are respectively electrically coupled with a grounding pad; the signal line silicon through hole and the signal line redundant silicon through hole are respectively electrically coupled with the signal line bonding pad, the ground wire silicon through hole and the ground wire redundant silicon through hole are first silicon through holes, the signal line silicon through hole and the signal line redundant silicon through hole are second silicon through holes, and a preset distance exists between the first silicon through hole and the second silicon through hole. The invention designs the high-frequency TSV silicon adapter plate, wherein the first silicon through holes and the second silicon through holes are in quasi-coaxial distribution, the impedance discontinuity problem between the silicon through holes and the transmission lines in the high-frequency TSV silicon adapter plate is reduced by adjusting the distance between the first silicon through holes and the second silicon through holes, the radio frequency performance of the high-frequency TSV silicon adapter plate is improved, meanwhile, the redundant silicon through holes which are only used in the digital signal transmission field at present to improve the fault tolerance rate are designed in the silicon adapter plate for the first time, the signal silicon through holes and the redundant silicon through holes share a bonding pad, the radio frequency performance of the silicon adapter plate is optimized, and the process reliability of the high-frequency TSV silicon adapter plate is improved.
Description
Technical Field
The invention belongs to the technical field of semiconductor integrated circuit manufacturing, and particularly relates to a high-frequency TSV silicon adapter plate and a design method thereof.
Background
High frequency impedance discontinuities in an integrated circuit can cause reflection losses such that a portion of the signal will be reflected and another portion will be distorted and continue to propagate, thus greatly affecting the radio frequency transmission performance of the signal path of the integrated circuit. With the improvement of the integration level of the circuit, the wiring density of the transmission path is correspondingly increased, the number of wiring crossing layers is increased, and the number of wiring crossing layers is increased, so that hardware has insufficient space to optimize, and reflection loss cannot be effectively improved by the traditional method. In particular at the chip-package and package-board interface, the capacitive parasitics created by vias, traces, pads and solder balls are large, resulting in impedance discontinuities and impedance resonances,
In the prior art, in the field of PCBs (Printed Circuit Board, printed circuit boards), impedance control is generally possible through the design of anti-pads. However, the anti-bonding pad design is suitable for a multi-layer metal layer structure, an anti-bonding pad area is dug out by paving a large copper sheet outside the metal layer so as to realize impedance control, but the silicon transfer plate only has a front metal layer and a back metal layer, and the silicon through holes pass through intermediate medium silicon to realize signal interconnection of the front metal layer and the back metal layer, so that when the anti-bonding pad design is carried out by paving copper outside the metal layer of the silicon transfer plate, a reference ground structure can only be formed on the front metal layer and the back metal layer, and a closed ground cavity structure can not be formed around TSVs (Through Silicon Via and the silicon through holes) of the silicon transfer plate, so that the radio frequency performance of the silicon transfer plate can be seriously influenced when the anti-bonding pad is designed. Meanwhile, in the process of manufacturing, the interconnection failure may be caused by the reasons of misalignment of the bonding pads or insufficient filling of conductive materials, and the risk of the interconnection failure can be reduced by adopting a redundant through silicon via design, but when the redundant TSVs applied to the digital field are directly designed into the silicon adapter plate, the radio frequency impedance characteristics of the silicon adapter plate are easily deteriorated, so that the redundant TSVs are not generally designed in the silicon adapter plate by the person skilled in the art.
Therefore, the problem that impedance at the connection position of the TSV and the transmission line of the high-frequency TSV silicon adapter plate cannot be solved through the anti-bonding pad, meanwhile, when the redundant TSV designed for improving the signal fault tolerance rate is adopted, the problem that the radio frequency impedance is easily deteriorated is solved, so that the radio frequency transmission performance of the high-frequency TSV silicon adapter plate is seriously affected in a radio frequency application scene, the high-frequency TSV silicon adapter plate is more obviously reflected in the high-integration high-frequency TSV silicon adapter plate, the redundant TSV is difficult to improve the fault tolerance rate, and the process reliability of the high-frequency TSV silicon adapter plate is poor.
Therefore, a structure or method capable of solving the problem of impedance discontinuity in the high-frequency TSV silicon interposer, realizing impedance optimization and improving the reliability of the through-silicon via manufacturing process is needed.
It should be noted that the foregoing description of the background art is only for the purpose of providing a clear and complete description of the technical solutions of the present application and is thus convenient for a person skilled in the art to understand, and it should not be construed that the above technical solutions are known to the person skilled in the art merely because these solutions are described in the background art section of the present application.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide a high-frequency TSV interposer and a design method thereof, which are used for solving the problems of discontinuous impedance and low reliability of the through-silicon via process in the high-frequency TSV interposer in the prior art.
In order to achieve the above object, the present invention provides a high-frequency TSV silicon interposer including a ground wire through-silicon via, a signal wire through-silicon via, a ground wire redundant through-silicon via and/or a signal wire redundant through-silicon via, a ground transmission line, a signal transmission line, a ground pad, and a signal wire pad;
the two ends of the signal wire through silicon via are respectively and electrically coupled with one signal wire bonding pad;
When the ground wire redundant through silicon vias exist, two ends of the ground wire redundant through silicon vias are respectively electrically coupled with the grounding pad where the ground wire through silicon vias are located, wherein each grounding pad where the ground wire through silicon vias are located comprises n ground wire redundant through silicon vias, and n is an integer greater than or equal to 0;
When the signal line redundant through silicon vias exist, two ends of the signal line redundant through silicon vias are respectively electrically coupled with the signal line bonding pads where the signal line through silicon vias are located, wherein each signal line bonding pad where the signal line through silicon vias are located comprises m signal line redundant through silicon vias, and m is an integer greater than or equal to 0;
The ground wire through silicon vias and the ground wire redundant through silicon vias are first through silicon vias, the signal wire through silicon vias and the signal wire redundant through silicon vias are second through silicon vias, the first through silicon vias and the second through silicon vias are perpendicular to a first plane, and a preset distance exists between each first through silicon via and each second through silicon via;
The ground pad is electrically connected with the ground transmission line, and the signal line pad is electrically connected with the signal transmission line.
Alternatively, m and n are not both 0.
Optionally, the ground pad where one of the ground wire through silicon vias is located includes 1 ground wire redundant through silicon via, and the signal wire pad where one of the signal wire through silicon vias is located includes 1 signal wire redundant through silicon via.
Optionally, the projection of each first through silicon via on the first plane is on a first circle, the projection of each second through silicon via on the first plane is on a second circle, and the first circle and the second circle are concentric circles.
Optionally, a line between each of the first through-silicon vias and the closest second through-silicon via coincides with a radial direction of the first circle.
Optionally, the diameter length of each first through silicon via is 5 micrometers-20 micrometers, and the thickness of each first through silicon via is 25 micrometers-200 micrometers.
Optionally, the diameter length of each second through silicon via is 5 micrometers-20 micrometers, and the thickness of each second through silicon via is 25 micrometers-200 micrometers.
Optionally, projections of the first through silicon vias on the first plane are all located in projections of the ground pads on the first plane.
Optionally, a projection of the second through silicon via on the first plane is located within a projection of the signal line pad on the first plane.
The invention also provides a design method of the high-frequency TSV silicon adapter plate, which is used for designing any one of the high-frequency TSV silicon adapter plates, and comprises the following steps:
The simulation model of the high-frequency TSV silicon adapter plate is designed, the high-frequency TSV silicon adapter plate comprises a ground wire silicon through hole, a signal wire silicon through hole, ground wire redundant silicon through holes and/or signal wire redundant silicon through holes, a ground transmission line, a signal transmission line, a ground bonding pad and a signal wire bonding pad, wherein the ground wire silicon through hole and the signal wire silicon through holes are perpendicular to a first plane, two ends of the ground wire silicon through hole are respectively electrically coupled with one ground bonding pad, two ends of the signal wire silicon through hole are respectively electrically coupled with one signal wire bonding pad, when the ground wire redundant silicon through holes exist, the two ends of the ground wire redundant silicon through holes are respectively electrically coupled with the ground bonding pad where the ground wire silicon through holes exist, each ground wire silicon through hole is provided with n ground wire redundant silicon through holes, n is an integer greater than or equal to 0, and when the signal wire redundant silicon through holes exist, two ends of the signal wire redundant silicon through holes are respectively electrically coupled with the signal wire bonding pad where the signal wire silicon through holes are located, and m is an integer greater than or equal to 0, and the signal wire through holes are respectively arranged between the signal wire and the second silicon through hole and the signal wire through hole through holes;
Adjusting the distance between the first silicon through hole and the second silicon through hole, simulating the adjusted simulation model, and measuring an S11 curve, an S21 curve and a time reflectometer measuring impedance curve of the simulation model;
Selecting the number of ground wire redundant through silicon vias and/or signal wire redundant through silicon vias and the distance between the first through silicon vias and the second through silicon vias, wherein the number corresponds to the minimum change of a reference line of matching impedance in a time domain reflectometer measurement impedance curve, the minimum S11 reflection coefficient in an S11 curve and the minimum radio frequency insertion loss in an S21 curve;
And taking the number of the selected ground wire redundant through silicon vias and/or the number of the selected signal wire redundant through silicon vias and the distance between the first through silicon vias and the second through silicon vias as the number and the distance between the first through silicon vias and the second through silicon vias in the high-frequency TSV silicon interposer.
As described above, the high-frequency TSV silicon interposer and the design method thereof of the present invention have the following beneficial effects:
According to the invention, the distance between the first silicon through hole and the second silicon through hole is adjusted by designing the positions of the redundant silicon through holes and the silicon through holes in the high-frequency TSV silicon adapter plate, so that the problem of discontinuous impedance between the silicon through holes and the transmission lines in the high-frequency TSV silicon adapter plate is reduced under the condition that an anti-bonding pad is not available for adjustment, and the radio frequency performance of the high-frequency TSV silicon adapter plate is improved;
The invention designs the redundant silicon through holes which are only used in the digital signal transmission field to improve the fault tolerance rate in the silicon adapter plate for the first time, and the signal silicon through holes and the redundant silicon through holes share the bonding pad, so that the radio frequency performance of the silicon adapter plate is optimized, and meanwhile, the signal fault tolerance rate and the process reliability of the silicon adapter plate are improved;
According to the invention, the first through silicon vias and the second through silicon vias are arranged in quasi-coaxial distribution, so that the effect of reducing the problem of impedance discontinuity can be further improved.
Drawings
Fig. 1 is a schematic structural diagram of a high-frequency TSV interposer in embodiment 1 of the present invention.
Fig. 2 is a graph showing the comparison of S11 reflection coefficient curves of transmission lines and through-silicon via signals of a high frequency TSV interposer for different numbers of first through-silicon vias and second through-silicon vias in example 1 of the present invention.
Fig. 3 shows graphs comparing S21 insertion loss curves of transmission lines and through-silicon via signals of high frequency TSV through-silicon interposer for different numbers of first through-silicon vias and second through-silicon vias in example 1 of the present invention.
Fig. 4 is a schematic structural diagram of a high-frequency TSV interposer in an example of embodiment 1 of the present invention.
Fig. 5 is a schematic structural diagram of a high-frequency TSV interposer in an example of embodiment 1 of the present invention.
Fig. 6 is a schematic structural diagram of a high-frequency TSV interposer in an example of embodiment 1 of the present invention.
Fig. 7 is a schematic structural diagram of a high-frequency TSV interposer in an example of embodiment 2 of the present invention.
Fig. 8 is a schematic structural diagram of a high-frequency TSV interposer in an example of embodiment 2 of the present invention.
Fig. 9 is a schematic diagram showing a structure of a high-frequency TSV interposer in an example of embodiment 4 of the present invention.
Fig. 10 is a graph showing the comparison of TDR measured impedance curves of transmission lines and through-silicon via signals through a high frequency TSV interposer for different first through-silicon via and second through-silicon via distances in an example of embodiment 4 of the present invention.
Fig. 11 is a graph showing the comparison of S11 reflection coefficient curves of transmission lines and through-silicon via signals of a high frequency TSV interposer with different first through-silicon via and second through-silicon via distances in an example of embodiment 4 of the present invention.
Description of element reference numerals
10. The device comprises a first through silicon via, a ground wire redundant through silicon via, a 20 second through silicon via, a 21 signal wire through silicon via, a 22 signal wire redundant through silicon via, a 31 ground transmission line, a 32 signal transmission line, a 41 ground pad, a 42 signal wire pad.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
As described in detail in the embodiments of the present invention, the schematic drawings showing the structure of the apparatus are not partially enlarged to general scale, and the schematic drawings are merely examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in actual fabrication.
For ease of description, spatially relative terms such as "under", "below", "beneath", "above", "upper" and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures.
In the context of the present application, a structure described as a first feature being "on" a second feature may include embodiments where the first and second features are formed in direct contact, as well as embodiments where additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings rather than the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
Example 1:
The embodiment provides a high-frequency TSV silicon interposer, as shown in FIG. 1, which comprises a ground wire through silicon via 11, a signal wire through silicon via 21, a ground wire redundant through silicon via 12 and/or a signal wire redundant through silicon via 22, a ground transmission line 31, a signal transmission line 32, a ground pad 41 and a signal wire pad 42;
The two ends of the ground wire through silicon vias 11 are respectively and electrically coupled with one grounding pad 41, and the two ends of the signal wire through silicon vias 21 are respectively and electrically coupled with one signal wire pad 42;
When the ground wire redundant through-silicon vias 12 exist, two ends of the ground wire redundant through-silicon vias 12 are respectively electrically coupled with the grounding pad 41 where the ground wire through-silicon vias 11 are positioned, wherein each grounding pad 41 where the ground wire through-silicon vias 11 are positioned comprises n ground wire redundant through-silicon vias 12, and n is an integer greater than or equal to 0;
When the signal line redundant through silicon vias 22 exist, two ends of the signal line redundant through silicon vias 22 are respectively electrically coupled with the signal line bonding pads 42 where the signal line through silicon vias 21 are positioned, wherein each signal line bonding pad 42 where the signal line through silicon vias 21 are positioned comprises m signal line redundant through silicon vias 22, and m is an integer greater than or equal to 0;
The ground wire through silicon vias 11 and the ground wire redundant through silicon vias 12 are first through silicon vias 10, the signal wire through silicon vias 21 and the signal wire redundant through silicon vias 22 are second through silicon vias 20, the first through silicon vias 10 and the second through silicon vias 20 are perpendicular to a first plane, and a preset distance exists between each first through silicon via 10 and each second through silicon via 20;
The ground pad 41 is electrically connected to the ground transmission line 31, and the signal line pad 42 is electrically connected to the signal transmission line 32.
In the prior art, the discontinuity of high-frequency impedance in the integrated circuit can cause reflection loss, so that one part of signals are reflected, and the other part of signals are distorted and continuously transmitted, thus greatly affecting the radio frequency transmission performance of the signal channel of the integrated circuit. In the field of PCBs (Printed Circuit Board, printed circuit boards), impedance control is typically possible through the design of anti-pads. However, the anti-bonding pad design is suitable for a multi-layer metal layer structure, an anti-bonding pad area is dug out by paving a large copper sheet outside the metal layer so as to realize impedance control, but the silicon transfer plate only has a front metal layer and a back metal layer, and the silicon through holes pass through intermediate medium silicon to realize signal interconnection of the front metal layer and the back metal layer, so that when the anti-bonding pad design is carried out by paving copper outside the metal layer of the silicon transfer plate, a reference ground structure can only be formed on the front metal layer and the back metal layer, and a closed ground cavity structure can not be formed around TSVs (Through Silicon Via and the silicon through holes) of the silicon transfer plate, so that the radio frequency performance of the silicon transfer plate can be seriously influenced when the anti-bonding pad is designed. Meanwhile, in the process of manufacturing, the interconnection failure may be caused by reasons such as misalignment of the bonding pads or insufficient filling of conductive materials, and the risk of the interconnection failure can be reduced by adopting a redundant through silicon via design, but when the redundant TSVs applied to the digital field are directly designed into the silicon adapter plate, the radio frequency impedance characteristics of the silicon adapter plate are easily deteriorated, so that the redundant TSVs are not generally designed in the silicon adapter plate by the person in the field, and no research on the influence of the redundant TSV structure on the radio frequency performance of the silicon adapter plate is available at present.
According to the invention, the capacitance impedance formed by the first silicon through hole 10 and the second silicon through hole 20 in the high-frequency TSV silicon adapter plate can be adjusted by setting the distance between the first silicon through hole 10 and the second silicon through hole 20, so that the problem of impedance discontinuity between the silicon through hole and a transmission line in the high-frequency TSV silicon adapter plate can be remarkably reduced under the condition that the high-frequency TSV silicon adapter plate cannot be provided with an anti-bonding pad due to process limitation, and the radio frequency performance of the high-frequency TSV silicon adapter plate is greatly improved; meanwhile, in a circuit with higher integration level, because interconnection failure is caused by the fact that the bonding pads of the TSVs are aligned and misplaced or the whole failure of a product is caused by insufficient filling of conductive materials, redundant TSVs are arranged, the deterioration of the radio frequency performance of the silicon adapter plate can be avoided by designing the distance between the redundant TSVs and other silicon through holes, and the product yield can be effectively improved.
Specifically, the high-frequency TSV interposer in the present invention refers to a high-frequency TSV interposer including TSVs.
Specifically, the redundant ground wire through silicon vias 11 and the redundant signal wire through silicon vias 21 are provided to solve the problem of discontinuous impedance of the high-frequency TSV silicon interposer, but the increase of the redundant through silicon vias also improves the circuit reliability of the high-frequency TSV silicon interposer, breaks through the technical bias that the redundant TSV is applied in the high-frequency TSV silicon interposer to avoid the deterioration of the radio frequency performance of the high-frequency TSV silicon interposer in the prior art, and realizes the dual improvement of the radio frequency performance and the signal fault tolerance.
Specifically, the number of the ground wire through-silicon vias 11 and the number of the signal wire through-silicon vias 21 are integers greater than or equal to 1, and can be designed according to the requirement of circuit design, and the positions of the ground wire redundant through-silicon vias 12 and the signal wire redundant through-silicon vias 22 are determined according to the ground wire through-silicon vias 11 and the signal wire through-silicon vias 21.
In this embodiment, n is an integer of 1 or more, and m is an integer of 1 or more.
Specifically, the number of the ground redundant through-silicon vias 12 and the signal line redundant through-silicon vias 22 may be set according to the requirement of the circuit in the high-frequency patch panel for the signal fault tolerance.
Specifically, the number and distance between the first through silicon vias 10 and the second through silicon vias 20 described in the present invention are only structural designs of the connection between one transmission line and the through silicon vias in the high-frequency TSV silicon interposer, similar structural design methods can be adopted at the connection between each transmission line and the through silicon vias of the high-frequency TSV silicon interposer, and different numbers and distances between the first through silicon vias 10 and the second through silicon vias 20 can be selected according to the requirements at different connection positions.
Specifically, "the two ends of the ground through-silicon via 11 are electrically coupled to one of the ground pads 41" means that one end of the ground through-silicon via 11 is electrically coupled to one of the ground pads 41 and the other end is electrically coupled to the other ground pad 41, "the two ends of the signal through-silicon via 21 are electrically coupled to one of the signal line pads 42" means that one end of the signal through-silicon via 21 is electrically coupled to one of the signal line pads 42 and the other end is electrically coupled to the other signal line pad 42.
Specifically, the first through silicon via 10, the second through silicon via 20, the ground redundant through silicon via 12, and the signal line redundant through silicon via 21 are all Through Silicon Vias (TSVs), the ground redundant through silicon via 12 and the signal line redundant through silicon via 21 are all redundant TSVs, and the ground transmission line 31 and the signal transmission line 32 are transmission lines.
In one embodiment, as shown in fig. 1, at the connection between each transmission line and the through silicon via of one high frequency TSV silicon interposer, one of the ground pads 41 includes 2 first through silicon vias 10 thereon, and one of the signal line pads 42 includes 2 second through silicon vias 20 thereon.
Specifically, when the distance between the first through-silicon vias 10 and the second through-silicon vias 20 and the size of the ground pad 41 and the signal line pad 42 are fixed, as shown in fig. 2, a graph comparing the reflection coefficient curves of the transmission line of the through-silicon vias of the high-frequency TSV through-silicon vias 10 and the signal S11 of the through-silicon vias of the second through-silicon vias 20 is shown, wherein 1S1G represents the high-frequency interposer including 1 first through-silicon vias 10 and 1 second through-silicon vias 20, 2S2G represents the high-frequency interposer including 2 first through-silicon vias 10 and 2 second through-silicon vias 20, 4S4G represents the high-frequency interposer including 4 first through-silicon vias 10 and 4 second through-silicon vias 20, and it can be seen that the reflection coefficient curves of the transmission line of the through-silicon vias of the high-frequency TSV through-silicon vias including 2 first through-silicon vias 10 and 2 second through-silicon vias 20 are all below-10 dB within 60GHz, and are in a matched state, indicating that the transmission line of the signal S11 through-silicon vias including 2 first through-silicon vias 10 and 2 through-silicon vias are the best matched;
And, as shown in fig. 3, a graph comparing the insertion loss curves of the transmission line of the high-frequency TSV through-silicon-via board and the signal S21 of the through-silicon-via board for comparing the different numbers of the first through-silicon-via 10 and the second through-silicon-via 20 is shown, wherein 1S1G represents the high-frequency interposer including 1 first through-silicon-via 10 and 1 second through-silicon-via 20, 2S2G represents the high-frequency interposer including 2 first through-silicon-via 10 and 2 second through-silicon-via 20, 4S4G represents the high-frequency interposer including 4 first through-silicon-via 10 and 4 second through-silicon-via 20, it can be seen that the insertion loss curves of the transmission line of the high-frequency TSV through-silicon-via board and the signal S21 of the through-silicon-via board including 2 first through-silicon-via 10 and 2 second through-silicon-via 20 are all minimum within 60GHz, and it can be determined that the radio-frequency performance of the high-frequency TSV board obtained by the first through-silicon-via 10 and the second through-silicon-via 20 set by this number is the best.
In one embodiment, as shown in fig. 4, at the connection between one transmission line and a through silicon via of the high-frequency TSV silicon adapter board, the first through silicon via 10 includes 1 ground wire through silicon via 11 and 1 ground wire redundant through silicon via 12, and the second through silicon via 20 includes 1 signal wire through silicon via 21 and 1 signal wire redundant through silicon via 22.
In one embodiment, as shown in fig. 5, at the connection between each transmission line and the through silicon via of one high frequency TSV silicon interposer, one of the ground pads 41 includes 4 first through silicon vias 10 and one of the signal line pads 42 includes 4 second through silicon vias 20.
In one embodiment, as shown in fig. 6, at the connection between one transmission line and a through silicon via of the high-frequency TSV silicon adapter board, the first through silicon via 10 includes 1 ground wire through silicon via 11 and 3 ground wire redundant through silicon vias 12, and the second through silicon via 20 includes 1 signal wire through silicon via 21 and 3 signal wire redundant through silicon vias 22.
In one embodiment, the projection of each first through-silicon via 10 on the first plane is on a first circle, and the projection of each second through-silicon via 20 on the first plane is on a second circle, and the first circle and the second circle are concentric circles.
According to the invention, the first silicon through holes 10 and the second silicon through holes 20 are arranged in the quasi-coaxial distribution, so that the capacitance impedance formed by the first silicon through holes 10 and the second silicon through holes 20 is more obvious, the influence of the distance between the first silicon through holes 10 and the second silicon through holes 20 on impedance is obvious, the problem of discontinuous impedance at the joint of the silicon through holes and the transmission line on the high-frequency TSV silicon adapter plate can be further solved, meanwhile, the ordered experimental design of the spacing between the corresponding first silicon through holes 10 and the second silicon through holes 20 is more convenient, the efficiency of designing the redundant silicon through holes in the high-level TSV silicon adapter plate is improved, and the radio frequency performance and the space utilization rate of the high-frequency TSV silicon adapter plate can be improved.
In one embodiment, the line between each of the first through-silicon vias 10 and the closest of the second through-silicon vias 20 coincides with the radial direction of the first circle.
According to the invention, the first through silicon vias 10 and the nearest second through silicon vias 20 are distributed along the radial direction, so that the capacitance impedance formed by the first through silicon vias 10 and the second through silicon vias 20 is more obvious, the influence of the distance between the first through silicon vias 10 and the second through silicon vias 20 on the impedance is more great, the impedance adjustment between the two corresponding first through silicon vias 10 and the second through silicon vias 20 can be further facilitated, and the problem of discontinuous impedance in the high-frequency adapter plate can be better solved.
In one embodiment, the signal line pad 42 is circular, and the ground pad 41 is annular concentric with the signal line pad 42.
In one embodiment, the diameter of each first through silicon via 10 is 5 micrometers to 20 micrometers, and the thickness of each first through silicon via 10 is 25 micrometers to 200 micrometers.
In one embodiment, each of the second through-silicon vias 20 has a diameter length of 5 micrometers to 20 micrometers, and each of the second through-silicon vias 20 has a thickness of 25 micrometers to 200 micrometers.
In one embodiment, the projections of the first through silicon vias 10 on the first plane are all located within the projection of the ground pads 41 on the first plane.
In one embodiment, the projection of the second through silicon via 20 onto the first plane is within the projection of the signal line pad 42 onto the first plane.
According to the invention, the first through silicon vias 10 and the second through silicon vias 20 are arranged in the projection of the corresponding grounding bonding pads 41 and the corresponding signal line bonding pads 42, so that the bonding pads can completely bear the corresponding through silicon vias, the welding yield of the high-frequency TSV silicon interposer is ensured, and the radio frequency performance of the high-frequency TSV silicon interposer is further improved.
Example 2:
The present embodiment provides a high-frequency TSV silicon interposer, which has substantially the same other features as the high-frequency TSV silicon interposer in embodiment 1, except that:
In this embodiment, the high-frequency TSV adapter plate does not include the signal line redundant through-silicon vias 22, each of the signal line pads 42 where the signal line through-silicon vias 21 are located includes 0 signal line redundant through-silicon vias 22, and each of the ground pads 41 where the ground line through-silicon vias 11 are located includes n ground line redundant through-silicon vias 12, where n is an integer greater than or equal to 1.
In one embodiment, as shown in fig. 7, at the connection between each transmission line and the through silicon via of one high frequency TSV silicon interposer, one of the ground pads 41 includes 2 first through silicon vias 10 thereon, and one of the signal line pads 42 includes 1 second through silicon via 20 thereon.
In one embodiment, as shown in fig. 8, at the connection between one transmission line and a through silicon via of the high-frequency TSV, the first through silicon via 10 includes 1 ground wire through silicon via 11 and 1 ground wire redundant through silicon via 12, and the second through silicon via 20 is a signal wire through silicon via 21.
Example 3:
The present embodiment provides a high-frequency TSV silicon interposer, which has substantially the same other features as the high-frequency TSV silicon interposer in embodiment 1, except that:
In this embodiment, the high-frequency TSV adapter plate does not include the ground wire redundant through-silicon vias 12, each of the ground pads 41 where the ground wire through-silicon vias 11 are located includes 0 ground wire redundant through-silicon vias 12, and each of the signal wire pads 42 where the signal wire through-silicon vias 21 are located includes m signal wire redundant through-silicon vias 22, where m is an integer greater than or equal to 1.
In one embodiment, at the connection between each transmission line and through silicon vias of one high frequency TSV interposer, one of the ground pads 41 includes 1 first through silicon via 10 and one of the signal line pads 42 includes 2 second through silicon vias 20.
In one embodiment, at the connection between one transmission line and a through silicon via of the high frequency TSV silicon interposer, the first through silicon via 10 is a ground through silicon via 11, and the second through silicon via 20 includes 1 signal line through silicon via 21 and 1 signal line redundant through silicon via 22.
Example 4:
The present embodiment provides a high-frequency TSV silicon interposer, which has substantially the same other features as the high-frequency TSV silicon interposer in embodiment 1, except that:
In this embodiment, the high-frequency TSV board does not include the ground wire redundant through-silicon vias 12 and the signal wire redundant through-silicon vias 22, and each of the ground pads 41 where the ground wire through-silicon vias 11 are located includes 0 ground wire redundant through-silicon vias 12, and each of the signal wire pads 42 where the signal wire through-silicon vias 21 are located includes 0 signal wire redundant through-silicon vias 22.
In one embodiment, as shown in fig. 9, at the connection between a transmission line and a through silicon via of the high-frequency TSV silicon adapter board, one of the grounding pads 41 includes 1 first through silicon via 10, the first through silicon via 10 is a ground through silicon via 11, and one of the signal line pads 42 includes 1 second through silicon via 20, the second through silicon via 20 is a signal line through silicon via 21.
In one embodiment, the predetermined distance between the ground through-silicon vias 11 and the signal through-silicon vias 21 is 60 microns.
Specifically, as shown in fig. 10, when the preset distances space between the ground through-silicon vias 11 and the signal through-silicon vias 21 are 40 micrometers, 60 micrometers, 80 micrometers, and 90 micrometers respectively, the corresponding curves of the signal TDR (Time Domain Reflectometry, time domain reflectometer) of the transmission line passing through the high-frequency TSV through-silicon interposer and the through-silicon vias are compared, the change of the characteristic impedance of the transmission line with time measured by the time domain reflectometer can be seen that the impedance continuity between the transmission line characteristic impedance and the matching impedance 50Ω is the best when the preset distance is 60 micrometers;
As shown in fig. 11, when the preset distances space between the ground through-silicon via 11 and the signal through-silicon via 21 are 40 microns, 60 microns, 80 microns, and 90 microns, respectively, the reflection coefficient curve of the signal S11 passing through the transmission line of the high-frequency TSV through-silicon interposer and the through-silicon via is the graph corresponding to the comparison, and it can be seen that the reflection coefficient is the smallest and the impedance matching degree is the best when the preset distance is 60 microns.
It can be seen that, by adjusting the distance between the first through-silicon via 10 and the second through-silicon via 20, the impedance continuity and the impedance matching effect can be adjusted, and the high-frequency TSV interposer in embodiments 1-3 is also reflected in the side surface, and the impedance continuity and the radio frequency performance can be improved by adjusting the distance between the first through-silicon via 10 and the second through-silicon via 20.
Example 5:
The present embodiment provides a method for designing a high-frequency TSV silicon interposer, which is used for designing the high-frequency TSV silicon interposer described in any one of embodiments 1 to 4.
The method for designing the high-frequency TSV silicon interposer according to the present invention will be described in detail, wherein the order is not strictly representative of the order of the method for designing the high-frequency TSV silicon interposer protected by the present invention, and those skilled in the art can vary depending on the actual manufacturing steps.
Firstly, step 1 is carried out, a simulation model of the high-frequency TSV silicon interposer is designed, the high-frequency TSV silicon interposer comprises a ground wire silicon through hole 11, a signal wire silicon through hole 21, ground wire redundancy silicon through holes 12 and/or signal wire redundancy silicon through holes 22, a ground transmission line 31, a signal transmission line 32, a ground pad 41 and a signal wire pad 42, the ground wire silicon through holes 11 and the signal wire silicon through holes 21 are perpendicular to a first plane, two ends of the ground wire silicon through hole 11 are respectively electrically coupled with one ground pad 41, two ends of the signal wire silicon through hole 21 are respectively electrically coupled with one signal wire pad 42, when the ground wire redundancy silicon through hole 12 exists, two ends of the ground wire redundancy silicon through hole 12 are respectively electrically coupled with the ground pad 41 where the ground wire silicon through holes 11 are located, n ground wire redundancy silicon through holes 12 and n are integers larger than or equal to 0 on the ground pad 41 where each ground wire silicon through hole 11 is located, when the signal wire redundancy silicon through hole 22 exists, two ends of the signal wire silicon through hole 11 and the signal wire through hole 22 are respectively electrically coupled with the signal wire through holes 21 and the signal wire through holes 20 where the signal wire through holes 21 and the signal wire through holes 22 are respectively located at the distance of 0m, and the signal wire through holes 20 are respectively equal to the signal through holes 20 and the signal wire through holes 20.
Preferably, the simulation model is an electronic model, so that the measurement efficiency is improved, and the trial-and-error cost is reduced. Specifically, the simulation model can be set to be a solid structure, so that the consistency of a measurement result and the actual structure is ensured, and the solution effect on the impedance discontinuity problem of the actual high-frequency TSV silicon adapter plate is improved.
And then, step 2 is carried out, the number of the ground wire redundant through silicon vias 12 and/or the signal wire redundant through silicon vias 22 is adjusted, the distance between the first through silicon vias 10 and the second through silicon vias 20 is adjusted, the adjusted simulation model is simulated, and the S11 curve, the S21 curve and the time reflectometer measuring impedance curve of the simulation model are measured.
Next, step 3 is performed, where the time domain reflectometer is selected to measure the number of the ground redundant through-silicon vias 12 and/or the signal line redundant through-silicon vias 22 corresponding to the minimum change of the matching impedance as the reference line in the impedance curve, the minimum S11 reflection coefficient in the S11 curve, and the minimum radio frequency insertion loss in the S21 curve, and the distance between the first through-silicon vias 10 and the second through-silicon vias 20.
In one embodiment, the matching impedance is 50Ω, and the high frequency TSV silicon interposer includes 50Ω matching microstrip lines.
Finally, step4 is performed, where the number of the selected ground redundant through silicon vias 12 and/or the selected signal redundant through silicon vias 22, and the distance between the first through silicon vias 10 and the second through silicon vias 20 are used as the number and the pitch of the first through silicon vias 10 and the second through silicon vias 20 in the high-frequency TSV interposer.
In summary, the high-frequency TSV silicon adapter plate and the design method thereof can be used for designing the first silicon through hole and the second silicon through hole in the high-frequency TSV silicon adapter plate to be in quasi-coaxial distribution, adjusting the distance between the first silicon through hole and the second silicon through hole by arranging the positions of the redundant silicon through holes and the silicon through holes, so that the problem of discontinuous impedance between the silicon through holes and transmission lines in the high-frequency TSV silicon adapter plate can be reduced under the condition of adjusting the size of quasi-coaxial areas, and the radio frequency performance of the high-frequency TSV silicon adapter plate is improved.
Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (10)
1. The high-frequency TSV silicon adapter plate is characterized by comprising a ground wire through silicon via, a signal wire through silicon via, a ground wire redundant through silicon via and/or a signal wire redundant through silicon via, a ground transmission line, a signal transmission line, a ground bonding pad and a signal wire bonding pad;
the two ends of the signal wire through silicon via are respectively and electrically coupled with one signal wire bonding pad;
When the ground wire redundant through silicon vias exist, two ends of the ground wire redundant through silicon vias are respectively electrically coupled with the grounding pad where the ground wire through silicon vias are located, wherein each grounding pad where the ground wire through silicon vias are located comprises n ground wire redundant through silicon vias, and n is an integer greater than or equal to 0;
When the signal line redundant through silicon vias exist, two ends of the signal line redundant through silicon vias are respectively electrically coupled with the signal line bonding pads where the signal line through silicon vias are located, wherein each signal line bonding pad where the signal line through silicon vias are located comprises m signal line redundant through silicon vias, and m is an integer greater than or equal to 0;
The ground wire through silicon vias and the ground wire redundant through silicon vias are first through silicon vias, the signal wire through silicon vias and the signal wire redundant through silicon vias are second through silicon vias, the first through silicon vias and the second through silicon vias are perpendicular to a first plane, and a preset distance exists between each first through silicon via and each second through silicon via;
The ground pad is electrically connected with the ground transmission line, and the signal line pad is electrically connected with the signal transmission line.
2. The high frequency TSV silicon interposer of claim 1 wherein m and n are not both 0.
3. The high frequency TSV silicon interposer of claim 2 wherein one of said ground pads on which said ground through-silicon via is located includes 1 ground redundant through-silicon via and one of said signal wire pads on which said signal wire through-silicon via is located includes 1 signal wire redundant through-silicon via.
4. The high frequency TSV interposer of claim 1 wherein the projection of each of said first through-silicon vias onto said first plane is on a first circle and the projection of each of said second through-silicon vias onto said first plane is on a second circle, said first and second circles being concentric circles.
5. The high frequency TSV silicon interposer of claim 4 wherein the connection between each of the first through-silicon vias and the nearest second through-silicon vias coincides with a radial direction of the first circle.
6. The high frequency TSV interposer of claim 1 wherein each of said first through-silicon vias has a diameter of 5-20 microns and a thickness of 25-200 microns.
7. The high frequency TSV interposer of claim 1 wherein each of said second through-silicon vias has a diameter of 5-20 microns and a thickness of 25-200 microns.
8. The high frequency TSV silicon interposer of claim 1 wherein the projections of the first through silicon vias on the first plane are all within the projection of the ground pads on the first plane.
9. The high frequency TSV interposer of claim 1 wherein the projection of the second through silicon via on the first plane is within the projection of the signal line pad on the first plane.
10. A design method for a high-frequency TSV silicon interposer, characterized in that the design method is used for designing the high-frequency TSV silicon interposer according to any one of claims 1 to 9, the design method comprising:
The simulation model of the high-frequency TSV silicon adapter plate is designed, the high-frequency TSV silicon adapter plate comprises a ground wire silicon through hole, a signal wire silicon through hole, ground wire redundant silicon through holes and/or signal wire redundant silicon through holes, a ground transmission line, a signal transmission line, a ground bonding pad and a signal wire bonding pad, wherein the ground wire silicon through hole and the signal wire silicon through holes are perpendicular to a first plane, two ends of the ground wire silicon through hole are respectively electrically coupled with one ground bonding pad, two ends of the signal wire silicon through hole are respectively electrically coupled with one signal wire bonding pad, when the ground wire redundant silicon through holes exist, the two ends of the ground wire redundant silicon through holes are respectively electrically coupled with the ground bonding pad where the ground wire silicon through holes exist, each ground wire silicon through hole is provided with n ground wire redundant silicon through holes, n is an integer greater than or equal to 0, and when the signal wire redundant silicon through holes exist, two ends of the signal wire redundant silicon through holes are respectively electrically coupled with the signal wire bonding pad where the signal wire silicon through holes are located, and m is an integer greater than or equal to 0, and the signal wire through holes are respectively arranged between the signal wire and the second silicon through hole and the signal wire through hole through holes;
Adjusting the distance between the first silicon through hole and the second silicon through hole, simulating the adjusted simulation model, and measuring an S11 curve, an S21 curve and a time reflectometer measuring impedance curve of the simulation model;
Selecting the number of ground wire redundant through silicon vias and/or signal wire redundant through silicon vias and the distance between the first through silicon vias and the second through silicon vias, wherein the number corresponds to the minimum change of a reference line of matching impedance in a time domain reflectometer measurement impedance curve, the minimum S11 reflection coefficient in an S11 curve and the minimum radio frequency insertion loss in an S21 curve;
And taking the number of the selected ground wire redundant through silicon vias and/or the number of the selected signal wire redundant through silicon vias and the distance between the first through silicon vias and the second through silicon vias as the number and the distance between the first through silicon vias and the second through silicon vias in the high-frequency TSV silicon interposer.
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