CN119275123B - Etching compensation method, device, electronic device and storage medium for layout - Google Patents
Etching compensation method, device, electronic device and storage medium for layout Download PDFInfo
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- CN119275123B CN119275123B CN202411786012.1A CN202411786012A CN119275123B CN 119275123 B CN119275123 B CN 119275123B CN 202411786012 A CN202411786012 A CN 202411786012A CN 119275123 B CN119275123 B CN 119275123B
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/26—Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement
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Abstract
本申请实施例公开了一种版图的蚀刻补偿方法、装置、电子设备及存储介质。该方案可以获取蚀刻后的芯片版图，针对芯片版图中待补偿的目标位置获取与目标位置关联的多个特征信息以及特征参数，依次从多个特征信息中选取两个特征信息，建立两个特征信息与第一补偿值之间的二维表，以得到多个二维表，根据特征参数从多个二维表中依次确定每个二维表对应的第二补偿值，根据多个第二补偿值和多个特征信息对目标补偿值的影响因子计算目标补偿值，根据目标补偿值对目标位置进行补偿。本申请实施例从多个特征信息中获取每两个特征信息对应的补偿值，再结合多个特征信息对目标补偿值的影响因子计算目标补偿值，提高了蚀刻偏差补偿的准确性。
The embodiment of the present application discloses a method, device, electronic device and storage medium for etching compensation of a layout. The scheme can obtain a chip layout after etching, obtain multiple feature information and feature parameters associated with the target position to be compensated in the chip layout, select two feature information from the multiple feature information in turn, establish a two-dimensional table between the two feature information and the first compensation value to obtain multiple two-dimensional tables, determine the second compensation value corresponding to each two-dimensional table in turn from the multiple two-dimensional tables according to the feature parameters, calculate the target compensation value according to the multiple second compensation values and the multiple feature information's influence factors on the target compensation value, and compensate the target position according to the target compensation value. The embodiment of the present application obtains the compensation value corresponding to each two feature information from multiple feature information, and then calculates the target compensation value in combination with the influence factors of multiple feature information on the target compensation value, thereby improving the accuracy of etching deviation compensation.
Description
Technical Field
The application relates to the technical field of chip manufacturing, in particular to a layout etching compensation method and device, electronic equipment and a storage medium.
Background
Etch bias (Etch bias) is a dimensional change (e.g., including line width and pitch) of patterns caused by etching processes in integrated circuit fabrication, where the etched wafer size ideally needs to be consistent with the design dimensions. The etching deviation compensation process is to collect the measured data of the critical dimension after photoetching and etching of different linewidth and spacing patterns on the wafer, establish an etching deviation rule table based on the measured data of the critical dimension, and finally run a deviation compensation program for the design layout based on the etching deviation rule table.
In an actual etching compensation process, an etching deviation rule table is widely used for performing etching deviation compensation on a design layout. As the nodes of the chip manufacturing process continue to evolve, more and more factors need to be considered for single layer pattern etch bias compensation. In addition to the line width and pitch size of the compensated pattern, the length of the edge of the side of the compensated pattern, the edge pitch of the side of the compensated pattern, and the like are also required to be considered. Based on the existing two-dimensional table of etching deviation rules, the rows and columns of the table can only carry out etching compensation process on two consideration factors of the graph at one time, such as the line width/space, the line width/length, the line width/critical edge length and the like of the graph. However, in the etching process of the complex patterning process, the etching deviation of a certain layer is affected by the different factors listed above, so that the etching deviation of a single layer cannot be accurately compensated by only establishing a single etching deviation rule table and performing etching deviation compensation according to the conventional method. In this case, even if compensation for the etching deviation is completed, the pattern etched on the wafer after the process is completed may deviate significantly from the target pattern.
Disclosure of Invention
The application provides a layout etching compensation method, a layout etching compensation device, electronic equipment and a storage medium, which can consider the influence of a plurality of characteristic information on etching compensation, thereby solving the problem that a single two-dimensional etching deviation rule table in the prior art cannot adapt to the influence of multiple factors and improving the accuracy of etching deviation compensation.
The application provides an etching compensation method of a layout, which comprises the following steps:
acquiring an etched chip layout, and acquiring a plurality of characteristic information and characteristic parameters associated with a target position to be compensated in the chip layout;
sequentially selecting two pieces of characteristic information from the plurality of pieces of characteristic information, and establishing a two-dimensional table between the two pieces of characteristic information and a first compensation value to obtain a plurality of two-dimensional tables;
Sequentially determining a second compensation value corresponding to each two-dimensional table from the plurality of two-dimensional tables according to the characteristic parameters;
and calculating a target compensation value according to a plurality of second compensation values and influence factors of a plurality of characteristic information on the target compensation value, and compensating the target position according to the target compensation value.
Optionally, the plurality of feature information includes at least one of a pitch, a line width, a length, a critical-edge pitch, a critical-edge line width, and a critical-edge length of the current edge.
Optionally, establishing a two-dimensional table between the two feature information and the first compensation value includes:
acquiring a plurality of first measured values of the two characteristic information in different test chip layouts and a plurality of second measured values after etching the test chip;
calculating a plurality of deviation values according to the first measured value and the second measured value, and taking the plurality of deviation values as a plurality of first compensation values corresponding to the two characteristic information;
and establishing a two-dimensional table according to a plurality of first compensation values corresponding to the two pieces of characteristic information.
Optionally, determining, according to the characteristic parameter, a second compensation value corresponding to each two-dimensional table sequentially from the plurality of two-dimensional tables, including:
in each two-dimensional table, determining a first interval corresponding to the first characteristic parameter and a second interval corresponding to the second characteristic parameter;
and determining a second compensation value corresponding to the two-dimensional table according to the first interval and the second interval.
Optionally, the number of the plurality of two-dimensional tables is greater than or equal to the number of the plurality of feature information.
Optionally, the target compensation value is calculated according to the following fitting function:
Wherein Bias A is a target compensation value of the target position a, Σ is a sum symbol, N takes a value of 1 or i, when n=1, the target compensation value representing the target position a is a sum of a plurality of second compensation values, when n=i, the target compensation value representing the target position a is an average value of the plurality of second compensation values, F i(xi,yi) is an influence factor of a plurality of feature information on the target compensation value, and T i(xi,yi) is a second compensation value corresponding to the plurality of feature information.
Optionally, compensating the target position according to the target compensation value includes:
Determining a target direction and a moving distance according to the target compensation value;
And moving the target position in the chip layout according to the target direction and the moving distance.
The application also provides an etching compensation device of the layout, which comprises:
the device comprises an acquisition module, a compensation module and a compensation module, wherein the acquisition module is used for acquiring an etched chip layout and acquiring a plurality of characteristic information and characteristic parameters associated with a target position to be compensated in the chip layout;
The building module is used for sequentially selecting two pieces of characteristic information from the plurality of pieces of characteristic information, and building a two-dimensional table between the two pieces of characteristic information and the first compensation value to obtain a plurality of two-dimensional tables;
The determining module is used for sequentially determining a second compensation value corresponding to each two-dimensional table from the plurality of two-dimensional tables according to the characteristic parameters;
And the calculating module is used for calculating a target compensation value according to a plurality of second compensation values and influence factors of a plurality of characteristic information on the target compensation value and compensating the target position according to the target compensation value.
The application also provides electronic equipment which is characterized by comprising a memory and a processor, wherein the memory stores a computer program, and the processor executes the steps in the etching compensation method of any layout provided by the application by calling the computer program stored in the memory.
The present application also provides a storage medium, wherein the storage medium stores a computer program adapted to be loaded by a processor to perform the steps in the method for etching compensation of a layout according to any one of the present application.
The etching compensation method of the layout provided by the application can acquire the etched chip layout, acquire a plurality of characteristic information and characteristic parameters associated with the target position aiming at the target position to be compensated in the chip layout, sequentially select two characteristic information from the plurality of characteristic information, establish a two-dimensional table between the two characteristic information and the first compensation value to obtain a plurality of two-dimensional tables, sequentially determine a second compensation value corresponding to each two-dimensional table from the plurality of two-dimensional tables according to the characteristic parameters, calculate the target compensation value according to the plurality of second compensation values and influence factors of the plurality of characteristic information on the target compensation value, and compensate the target position according to the target compensation value. According to the embodiment of the application, the compensation value corresponding to each two pieces of characteristic information is obtained from the plurality of pieces of characteristic information, and the target compensation value is calculated by combining the influence factors of the plurality of pieces of characteristic information on the target compensation value, so that the problem that a single two-dimensional etching deviation rule table cannot adapt to the influence of multiple factors in the prior art is solved, and the accuracy of etching deviation compensation is improved.
Drawings
In order to more clearly illustrate the technical solutions of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic flow chart of a layout etching compensation method according to an embodiment of the present application;
FIG. 2 is a schematic diagram of another flow chart of an etching compensation method for a layout according to an embodiment of the present application;
FIG. 3 is a schematic diagram of characteristic parameters in a chip layout according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a layout etching compensation device according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the application. Rather, they are merely examples of apparatus and methods consistent with aspects of the application as detailed in the accompanying claims.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the element(s) defined by the phrase "comprising one does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other like elements in different embodiments of the application having the same meaning as may be defined by the same meaning as they are explained in this particular embodiment or by further reference to the context of this particular embodiment.
It should be understood that, although the steps in the flowcharts in the embodiments of the present application are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited in order and may be performed in other orders, unless explicitly stated herein. Moreover, at least some of the steps in the figures may include multiple sub-steps or stages that are not necessarily performed at the same time, but may be performed at different times, the order of their execution not necessarily occurring in sequence, but may be performed alternately or alternately with other steps or at least a portion of the other steps or stages.
It should be noted that, in this document, step numbers such as 101 and 102 are used for the purpose of more clearly and briefly describing the corresponding contents, and not to constitute a substantial limitation on the sequence, and those skilled in the art may execute 102 first and then execute 101 when they are implemented, which is within the scope of the present application.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
The embodiment of the application provides an etching compensation method of a layout, an execution main body of the etching compensation method of the layout can be an etching compensation device of the layout provided by the embodiment of the application or a server integrated with the etching compensation device of the layout, wherein the etching compensation device of the layout can be realized in a hardware or software mode.
As shown in fig. 1, fig. 1 is a first flow chart of an etching compensation method for a layout according to an embodiment of the present application, where a specific flow of the etching compensation method for a layout may be as follows:
101. And acquiring the etched chip layout, and acquiring a plurality of characteristic information and characteristic parameters associated with the target position aiming at the target position to be compensated in the chip layout.
In an embodiment, the target position to be compensated in the chip layout may be a certain edge of the layout image, and the plurality of feature information may include at least one of a pitch, a line width, a length, a critical edge pitch, a critical edge line width, and a critical edge length of the current edge. The function of the feature information is to provide basic data for the subsequent construction of accurate etch bias rule correction two-dimensional tables. In addition to the above feature information, information such as the shape of the layout image (e.g., rectangle, circle, polygon, etc.), the angle of the layout image, the curvature of the layout image, etc., may be included, which is more accurate for analysis and etching compensation.
Further, for the measurement of the above-mentioned characteristic parameters, professional measuring equipment and software may be used. For example, in the field of semiconductor manufacturing, it is possible to measure characteristic parameters such as the size and shape of a pattern by an optical microscope, an electron microscope, or the like. In order to ensure the accuracy and the integrity of the acquired characteristic information, the embodiment can also perform multiple verification and comparison on the measured characteristic parameters. For example, the same characteristic information may be measured using different measuring devices or methods, and then the measurement results are compared to exclude the effect of measurement errors.
In an embodiment, after the etched chip layout is obtained, a preprocessing measure may be further adopted to improve the accuracy of the subsequent feature parameter measurement. For example, the layout can be subjected to image enhancement processing, so that the definition and contrast of the image are improved, and the extraction and measurement of the characteristic information are facilitated. In addition, the layout can be calibrated, and the accuracy of the measuring equipment and software is ensured.
102. Two pieces of characteristic information are sequentially selected from the plurality of pieces of characteristic information, and a two-dimensional table between the two pieces of characteristic information and the first compensation value is established to obtain a plurality of two-dimensional tables.
In one embodiment, the two-dimensional tables are modified by using the etching deviation rule of the target position to be compensated (pitch, line width, length, edge distance, edge line width, edge length, etc.) as variables. For example, a two-dimensional table of a pitch and a line width is used for providing a first compensation value corresponding to a pitch and a line width of different patterns, a two-dimensional table of a pitch and a line length is used for providing a first compensation value corresponding to a side length of different patterns, and the like, and other factors which influence etching deviation can be combined into a two-dimensional table two by two at random, so that a plurality of two-dimensional tables are obtained. The first compensation value can be obtained by measuring corresponding parameters before and after etching the test chip layout.
The number of the plurality of two-dimensional tables is greater than or equal to the number of the plurality of feature information. For example, when 3 pieces of characteristic information are acquired, 3 two-dimensional tables can be obtained by combining every two through different arrangements, and when 4 pieces of characteristic information are acquired, at least 4 two-dimensional tables and at most 6 two-dimensional tables can be obtained by combining every two through different arrangements.
103. And determining a second compensation value corresponding to each two-dimensional table in turn from the two-dimensional tables according to the characteristic parameters.
In an embodiment, the plurality of two-dimensional tables respectively represent the first compensation values corresponding to the variable x and the variable y in the tables under the influence of factors, and then a plurality of characteristic parameters associated with the target position to be compensated in the chip layout can be brought into the two-dimensional tables, so that the second compensation value output by each two-dimensional table is searched. Specifically, for each two-dimensional table, a corresponding row and column may be found according to the characteristic parameters of the target position. For example, in the line width/space two-dimensional table, a corresponding row is found according to the line width value of the target position, a corresponding column is found according to the space value, and the value at the intersection of the two is the second compensation value corresponding to the two-dimensional table. The same method is applicable to other two-dimensional tables, such as a line width/side length two-dimensional table, a side length/critical side spacing two-dimensional table, and the like. For example, for target position A, the second compensation values in the two-dimensional table formed in variable combination x1/y1,x2/y2,x3/y3,x4/y4,……,xn/yn may be represented as TA(x1,y1),TA(x2,y2),TA(x3,y3),TA(x4,y4),...,TA(xn,yn).
In an embodiment, the variables x and y in the two-dimensional table may be arranged in a range interval manner, and if the characteristic parameter is at a boundary of a certain range in the two-dimensional table, the second compensation value may be determined according to a specific rule. For example, averaging, interpolation, etc. may be used to determine a more accurate second compensation value.
Further, different two-dimensional tables may also have different weights or priorities, which need to be taken into account when determining the final second compensation value. For example, some feature information may have a greater influence on etching bias, and the weight of its corresponding two-dimensional table may be set higher.
104. And calculating a target compensation value according to the plurality of second compensation values and the influence factors of the plurality of characteristic information on the target compensation value, and compensating the target position according to the target compensation value.
Because the same graph has different second compensation values under the influence of different characteristic information, the final target compensation value to be calculated can be calculated by constructing a fitting function, and the fitting function can be used for comprehensively calculating the influence factors of the plurality of second compensation values and the plurality of characteristic information on the target compensation value. The influence factor represents the influence degree of different characteristic information on the target compensation value of the actual etching deviation under the actual complex condition. And finally, compensating the target position to be compensated in the chip layout according to the target compensation value.
In this embodiment, each feature information and corresponding size parameter of a target position in the etched chip layout are automatically measured and calculated, then a corresponding two-dimensional table is matched, different compensation values of the target position under different size parameters are obtained, and then an actual comprehensive compensation correction value of the target position is obtained by combining influence factors of each feature information input in advance, so that the layout is actually moved according to the obtained comprehensive compensation correction value.
According to the etching compensation method of the layout provided by the embodiment of the application, the etched chip layout can be obtained, a plurality of pieces of characteristic information and characteristic parameters related to the target position are obtained aiming at the target position to be compensated in the chip layout, two pieces of characteristic information are sequentially selected from the plurality of pieces of characteristic information, a two-dimensional table between the two pieces of characteristic information and the first compensation value is established to obtain a plurality of two-dimensional tables, a second compensation value corresponding to each two-dimensional table is sequentially determined from the plurality of two-dimensional tables according to the characteristic parameters, the target compensation value is calculated according to the plurality of second compensation values and the influence factors of the plurality of characteristic information on the target compensation value, and the target position is compensated according to the target compensation value. According to the embodiment of the application, the compensation value corresponding to each two pieces of characteristic information is obtained from the plurality of pieces of characteristic information, and the target compensation value is calculated by combining the influence factors of the plurality of pieces of characteristic information on the target compensation value, so that the problem that a single two-dimensional etching deviation rule table cannot adapt to the influence of multiple factors in the prior art is solved, and the accuracy of etching deviation compensation is improved.
The method according to the previous embodiments will be described in further detail below.
Referring to fig. 2, fig. 2 is a schematic diagram of a second flow chart of an etching compensation method for a layout according to an embodiment of the application. The method comprises the following steps:
201. and acquiring the etched chip layout, and acquiring a plurality of characteristic information and characteristic parameters associated with the target position aiming at the target position to be compensated in the chip layout.
For example, referring to fig. 3, the etched chip layout may be obtained, the present embodiment performs etching compensation for the target position BD edge in the layout ABCD, and in fig. 3, it may be determined that the plurality of feature information associated with the BD edge includes the line width W, the space S, the length L, and the critical edge spacing l_adj. Further, measurement of the above 4 pieces of feature information revealed that the length L of the BD was 400 nm, the line width W of the BD side was 700 nm, the spacing S of the BD side was 350 nm, and the adjacent side spacing l_adj of the BD side was 500 nm.
202. Two characteristic information are sequentially selected from the plurality of characteristic information, a plurality of first measured values of the two characteristic information are obtained in different test chip layouts, and a plurality of second measured values after the test chip is etched are obtained.
203. And calculating a plurality of deviation values according to the first measured value and the second measured value, and taking the deviation values as a plurality of first compensation values corresponding to the two characteristic information.
204. And establishing a two-dimensional table according to a plurality of first compensation values corresponding to the two characteristic information to obtain a plurality of two-dimensional tables.
205. And determining a first interval corresponding to the first characteristic parameter and a second interval corresponding to the second characteristic parameter in each two-dimensional table.
206. And determining a second compensation value corresponding to the two-dimensional table according to the first interval and the second interval.
Specifically, feature information before and after etching can be measured for different test chip layouts, so that a plurality of first measurement values before etching and a plurality of second measurement values after etching of each feature information are obtained, and a difference value between the first measurement values and the second measurement values is calculated as a plurality of deviation values, namely a first compensation value, of the feature information under different parameters. Then, two pieces of characteristic information can be selected from the plurality of pieces of characteristic information, so that a two-dimensional table formed by a plurality of first compensation values corresponding to the two pieces of characteristic information is established, and each two pieces of different pieces of characteristic information can construct a corresponding two-dimensional table, such as a line width/interval table, a line width/length table, a length/adjacent edge interval table and the like.
For example, the two-dimensional table of etching deviation rules corresponding to line widths/pitches may be as follows:
TABLE 1 etching bias rule two-dimensional table corresponding to line width/space
In the two-dimensional table, each row is a first compensation value corresponding to a certain line width range, and each column is a first compensation value corresponding to a certain interval range. Taking the BD side as an example, the line width W of the BD side is 700 nm, and the space S between BD sides is 350 nm, then the etching deviation compensation value of the BD side at the corresponding W/S, that is, the second compensation value is-2 nm.
The two-dimensional table of etch bias rules for line width/length correspondence may be as follows:
TABLE 2 etching bias rule two-dimensional table corresponding to line width/length
In the two-dimensional table, each row is a first compensation value corresponding to a certain line width range, and each column is a first compensation value corresponding to a certain side length range. Taking the BD side as an example, the line width W of the BD side is 700 nm, and the length L of the BD side is 400 nm, then the etching deviation compensation value of the BD side at the corresponding W/L, that is, the second compensation value is-1 nm.
The two-dimensional table of etching deviation rules corresponding to the length/critical edge spacing can be shown as the following table:
TABLE 3 etching bias rule two-dimensional table corresponding to length/critical edge spacing
In the two-dimensional table, each row is a first compensation value corresponding to a certain length range, and each column is a first compensation value corresponding to a certain edge-to-edge spacing range. Taking the BD edge as an example, the length L of the BD is 400 nm, and the adjacent edge distance l_adj of the BD edge is 500 nm, then the etching deviation compensation value of the BD edge at the corresponding L/l_adj, that is, the second compensation value is-1 nm.
207. And calculating the target compensation value according to the second compensation values and the influence factors of the characteristic information on the target compensation value.
For the BD edge of the target position in the layout ABCD, the second compensation values output in the line width/space table, the line width/length table and the length/critical edge space table are respectively-2 nm, -1nm and-1 nm. The target compensation value can then be calculated according to the following fitting function:
Wherein Bias A is a target compensation value of the target position a, Σ is a sum symbol, N takes a value of 1 or i, when n=1, the target compensation value representing the target position a is a sum of a plurality of second compensation values, when n=i, the target compensation value representing the target position a is an average value of the plurality of second compensation values, F i(xi,yi) is an influence factor of a plurality of feature information on the target compensation value, and T i(xi,yi) is a second compensation value corresponding to the plurality of feature information.
208. And determining a target direction and a moving distance according to the target compensation value, and moving a target position in the chip layout according to the target direction and the moving distance.
Because the same graph has different second compensation values under the influence of different characteristic information, the final target compensation value to be calculated can be calculated by constructing a fitting function, and the fitting function can be used for comprehensively calculating the influence factors of the plurality of second compensation values and the plurality of characteristic information on the target compensation value. The influence factor represents the influence degree of different characteristic information on the target compensation value of the actual etching deviation under the actual complex condition. And finally, compensating the target position to be compensated in the chip layout according to the target compensation value.
According to the etching compensation method of the layout provided by the embodiment of the application, the etched chip layout can be obtained, a plurality of feature information and feature parameters which are related to the target position are obtained aiming at the target position to be compensated in the chip layout, two feature information are sequentially selected from the plurality of feature information, a plurality of first measurement values of the two feature information are obtained in different test chip layouts, a plurality of second measurement values of the test chip after etching are obtained, a plurality of deviation values are calculated according to the first measurement values and the second measurement values, the plurality of deviation values are used as a plurality of first compensation values corresponding to the two feature information, a two-dimensional table is built according to the plurality of first compensation values corresponding to the two feature information, a plurality of two-dimensional tables are obtained, a first interval corresponding to the first feature parameter and a second interval corresponding to the second feature parameter are determined in each two-dimensional table, a second compensation value corresponding to the two-dimensional table is determined according to the first interval and the second interval, a target compensation value is calculated according to the influence factors of the plurality of the second compensation values and the plurality of feature information on the target compensation values, and the target movement distance is determined according to the target movement direction and the target movement distance in the target layout. According to the embodiment of the application, the compensation value corresponding to each two pieces of characteristic information is obtained from the plurality of pieces of characteristic information, and the target compensation value is calculated by combining the influence factors of the plurality of pieces of characteristic information on the target compensation value, so that the problem that a single two-dimensional etching deviation rule table cannot adapt to the influence of multiple factors in the prior art is solved, and the accuracy of etching deviation compensation is improved.
In order to implement the method, the embodiment of the application also provides an etching compensation device of the layout, and the etching compensation device of the layout can be integrated in terminal equipment such as a mobile phone, a tablet personal computer and the like.
For example, as shown in fig. 4, a schematic structural diagram of an etching compensation device for a layout according to an embodiment of the present application is shown. The etching compensation device of the layout can comprise:
The obtaining module 301 is configured to obtain an etched chip layout, and obtain, for a target position to be compensated in the chip layout, a plurality of feature information and feature parameters associated with the target position;
The establishing module 302 is configured to sequentially select two feature information from the plurality of feature information, and establish a two-dimensional table between the two feature information and the first compensation value, so as to obtain a plurality of two-dimensional tables;
A determining module 303, configured to sequentially determine, according to the characteristic parameter, a second compensation value corresponding to each two-dimensional table from the plurality of two-dimensional tables;
The calculating module 304 is configured to calculate a target compensation value according to the second compensation values and the influence factors of the characteristic information on the target compensation value, and compensate the target position according to the target compensation value.
As can be seen from the foregoing, the etching compensation device for a layout provided by the embodiment of the present application may obtain an etched chip layout, obtain, for a target position to be compensated in the chip layout, a plurality of feature information and feature parameters associated with the target position, sequentially select two feature information from the plurality of feature information, establish a two-dimensional table between the two feature information and the first compensation value, so as to obtain a plurality of two-dimensional tables, sequentially determine a second compensation value corresponding to each two-dimensional table from the plurality of two-dimensional tables according to the feature parameters, calculate a target compensation value according to the plurality of second compensation values and influence factors of the plurality of feature information on the target compensation value, and compensate the target position according to the target compensation value. According to the embodiment of the application, the compensation value corresponding to each two pieces of characteristic information is obtained from the plurality of pieces of characteristic information, and the target compensation value is calculated by combining the influence factors of the plurality of pieces of characteristic information on the target compensation value, so that the problem that a single two-dimensional etching deviation rule table cannot adapt to the influence of multiple factors in the prior art is solved, and the accuracy of etching deviation compensation is improved.
All the above technical solutions may be combined to form an optional embodiment of the present application, and will not be described in detail herein.
Those of ordinary skill in the art will appreciate that all or a portion of the steps of the various methods of the above embodiments may be performed by instructions, or by instructions controlling associated hardware, which may be stored in a computer-readable storage medium and loaded and executed by a processor.
To this end, an embodiment of the present application provides a computer readable storage medium having stored therein a plurality of computer programs that can be loaded by a processor to perform the steps in any of the etching compensation methods of the layout provided by the embodiment of the present application. For example, the computer program may perform the steps of:
acquiring an etched chip layout, and acquiring a plurality of characteristic information and characteristic parameters associated with a target position to be compensated in the chip layout;
sequentially selecting two pieces of characteristic information from the plurality of pieces of characteristic information, and establishing a two-dimensional table between the two pieces of characteristic information and a first compensation value to obtain a plurality of two-dimensional tables;
Sequentially determining a second compensation value corresponding to each two-dimensional table from the plurality of two-dimensional tables according to the characteristic parameters;
and calculating a target compensation value according to a plurality of second compensation values and influence factors of a plurality of characteristic information on the target compensation value, and compensating the target position according to the target compensation value.
The specific implementation of each operation above may be referred to the previous embodiments, and will not be described herein.
The storage medium may include a Read Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, an optical disk, or the like.
The computer program stored in the storage medium can execute the steps in the etching compensation method of any layout provided by the embodiment of the present application, so that the beneficial effects of the etching compensation method of any layout provided by the embodiment of the present application can be achieved, which are detailed in the previous embodiments and are not described herein.
The embodiment of the application also provides an electronic device, which comprises a memory and a processor, wherein the memory is used for storing a computer program, and the processor is used for calling and running the computer program from the memory, so that the device provided with the chip executes the method in the various possible implementation modes.
For example, the computer device may be a terminal device having a corresponding function, such as a mobile phone, a tablet computer, a personal computer, a cloud computer, or the like. Referring to fig. 5, fig. 5 is a schematic structural diagram of a computer according to an embodiment of the application.
The computer device 400 may include a memory 401, a processor 402, and the like. Those skilled in the art will appreciate that the computer device structure shown in FIG. 5 is not limiting of the computer device and may include more or fewer components than shown, or may be combined with certain components, or a different arrangement of components.
Memory 401 may be used to store applications and data. The memory 401 stores an application program including executable code. Applications may constitute various functional modules. The processor 402 executes various functional applications and data processing by running application programs stored in the memory 401.
The processor 402 is a control center of the computer device, connects various parts of the entire computer device using various interfaces and lines, and performs various functions of the computer device and processes data by running or executing application programs stored in the memory 401, and calling data stored in the memory 401, thereby performing overall monitoring of the computer device.
In this embodiment, the processor 402 in the computer device loads executable codes corresponding to the processes of one or more application programs into the memory 401 according to the following instructions, and the processor 402 executes the application programs stored in the memory 401, so as to execute:
acquiring an etched chip layout, and acquiring a plurality of characteristic information and characteristic parameters associated with a target position to be compensated in the chip layout;
sequentially selecting two pieces of characteristic information from the plurality of pieces of characteristic information, and establishing a two-dimensional table between the two pieces of characteristic information and a first compensation value to obtain a plurality of two-dimensional tables;
Sequentially determining a second compensation value corresponding to each two-dimensional table from the plurality of two-dimensional tables according to the characteristic parameters;
and calculating a target compensation value according to a plurality of second compensation values and influence factors of a plurality of characteristic information on the target compensation value, and compensating the target position according to the target compensation value.
It can be understood that the above scenario is merely an example, and does not constitute a limitation on the application scenario of the technical solution provided by the embodiment of the present application, and the technical solution of the present application may also be applied to other scenarios. For example, as one of ordinary skill in the art can know, with the evolution of the system architecture and the appearance of new service scenarios, the technical solution provided by the embodiment of the present application is also applicable to similar technical problems.
The steps in the method of the embodiment of the application can be sequentially adjusted, combined and deleted according to actual needs. The modules in the device of the embodiment of the application can be combined, divided and deleted according to actual needs.
In the present application, the same or similar term concept, technical solution and/or application scenario description will be generally described in detail only when first appearing and then repeatedly appearing, and for brevity, the description will not be repeated generally, and in understanding the present application technical solution and the like, reference may be made to the previous related detailed description thereof for the same or similar term concept, technical solution and/or application scenario description and the like which are not described in detail later.
In the present application, the descriptions of the embodiments are emphasized, and the details or descriptions of the other embodiments may be referred to.
The technical features of the technical scheme of the application can be arbitrarily combined, and all possible combinations of the technical features in the above embodiment are not described for the sake of brevity, however, as long as there is no contradiction between the combinations of the technical features, the application shall be considered as the scope of the description of the application.
In the above embodiments, it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions in accordance with embodiments of the present application are produced in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable devices. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital subscriber line), or wireless (e.g., infrared, wireless, microwave, etc.). Computer readable storage media can be any available media that can be accessed by a computer or data storage devices, such as servers, data centers, etc., that contain an integration of one or more available media. Usable media may be magnetic media (e.g., floppy disk, storage disk, tape), optical media (e.g., DVD), or semiconductor media (e.g., solid state storage disk Solid STATE DISK), etc.
The foregoing describes the layout etching compensation method, apparatus, electronic device and storage medium in detail, and specific examples are applied to illustrate the principles and implementation of the present application, and the foregoing examples are only for aiding in understanding of the method and core concept of the present application, and meanwhile, for those skilled in the art, according to the concept of the present application, there are variations in the specific implementation and application scope, so the disclosure should not be construed as limiting the application.
Claims (8)
1. An etching compensation method of a layout is characterized by comprising the following steps:
acquiring an etched chip layout, and acquiring a plurality of characteristic information and characteristic parameters associated with a target position to be compensated in the chip layout;
Sequentially selecting two characteristic information from the plurality of characteristic information, establishing a two-dimensional table between the two characteristic information and a first compensation value to obtain a plurality of two-dimensional tables, wherein the establishment of the two-dimensional table between the two characteristic information and the first compensation value comprises the steps of acquiring a plurality of first measurement values of the two characteristic information in different test chip layouts, a plurality of second measurement values after etching the test chip, calculating a plurality of deviation values according to the first measurement values and the second measurement values, taking the plurality of deviation values as a plurality of first compensation values corresponding to the two characteristic information, and establishing the two-dimensional table according to a plurality of first compensation values corresponding to the two characteristic information;
Determining a first interval corresponding to a first characteristic parameter and a second interval corresponding to a second characteristic parameter in each two-dimensional table, and determining a second compensation value corresponding to the two-dimensional table according to the first interval and the second interval;
and calculating a target compensation value according to a plurality of second compensation values and influence factors of a plurality of characteristic information on the target compensation value, and compensating the target position according to the target compensation value.
2. The method of etching compensation of a layout according to claim 1, wherein the plurality of feature information includes at least one of a pitch, a line width, a length, a critical-edge pitch, a critical-edge line width, and a critical-edge length of the current edge.
3. The etching compensation method of a layout according to claim 1, wherein the number of the plurality of two-dimensional tables is greater than or equal to the number of the plurality of feature information.
4. The method of etching compensation of a layout according to claim 1, wherein the target compensation value is calculated according to the following fitting function:
Wherein Bias A is a target compensation value of the target position a, Σ is a sum symbol, N takes a value of 1 or i, when n=1, the target compensation value representing the target position a is a sum of a plurality of second compensation values, when n=i, the target compensation value representing the target position a is an average value of the plurality of second compensation values, F i(xi,yi) is an influence factor of a plurality of feature information on the target compensation value, and T i(xi,yi) is a second compensation value corresponding to the plurality of feature information.
5. The method for etching compensation of a layout according to claim 1, wherein compensating the target position according to the target compensation value comprises:
Determining a target direction and a moving distance according to the target compensation value;
And moving the target position in the chip layout according to the target direction and the moving distance.
6. An etching compensation device for a layout, comprising:
the device comprises an acquisition module, a compensation module and a compensation module, wherein the acquisition module is used for acquiring an etched chip layout and acquiring a plurality of characteristic information and characteristic parameters associated with a target position to be compensated in the chip layout;
The device comprises a building module, a first compensation module and a second compensation module, wherein the building module is used for sequentially selecting two pieces of characteristic information from the plurality of pieces of characteristic information, building a two-dimensional table between the two pieces of characteristic information and the first compensation value to obtain a plurality of two-dimensional tables, the building module is used for building the two-dimensional table between the two pieces of characteristic information and the first compensation value, the two-dimensional table comprises a plurality of first measurement values of the two pieces of characteristic information and a plurality of second measurement values of the etched test chip, calculating a plurality of deviation values according to the first measurement values and the second measurement values, taking the plurality of deviation values as a plurality of first compensation values corresponding to the two pieces of characteristic information, and building the two-dimensional table according to the plurality of first compensation values corresponding to the two pieces of characteristic information;
The determining module is used for sequentially determining second compensation values corresponding to each two-dimensional table from the plurality of two-dimensional tables according to the characteristic parameters, and comprises the steps of determining a first interval corresponding to a first characteristic parameter and a second interval corresponding to a second characteristic parameter in each two-dimensional table, and determining the second compensation values corresponding to the two-dimensional tables according to the first interval and the second interval;
And the calculating module is used for calculating a target compensation value according to a plurality of second compensation values and influence factors of a plurality of characteristic information on the target compensation value and compensating the target position according to the target compensation value.
7. An electronic device comprising a memory in which a computer program is stored and a processor which performs the steps in the method of etching compensation of a layout according to any of claims 1-5 by calling the computer program stored in the memory.
8. A storage medium storing a computer program adapted to be loaded by a processor for performing the steps of the method of etching compensation of a layout according to any of claims 1-5.
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| CN120542363A (en) * | 2025-07-25 | 2025-08-26 | 华芯程(杭州)科技有限公司 | Method, device, electronic device and storage medium for calculating SSA rules of layout |
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| CN118732419A (en) * | 2024-08-30 | 2024-10-01 | 华芯程(杭州)科技有限公司 | Method, device, equipment and medium for compensating wafer surface topography for photolithography deviation |
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| US7966585B2 (en) * | 2006-12-13 | 2011-06-21 | Mentor Graphics Corporation | Selective shielding for multiple exposure masks |
| US9500945B1 (en) * | 2015-06-09 | 2016-11-22 | Globalfoundries Singapore Pte. Ltd. | Pattern classification based proximity corrections for reticle fabrication |
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| CN118732419A (en) * | 2024-08-30 | 2024-10-01 | 华芯程(杭州)科技有限公司 | Method, device, equipment and medium for compensating wafer surface topography for photolithography deviation |
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