Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The technical scheme of the application obtains, stores, uses, processes and the like the data, which all meet the relevant regulations of national laws and regulations.
In consideration of the problems in the prior art, the application provides a data processing method and device of a cross-platform data communication board card, which realize unified interface abstraction by creating a driving interface object layer and an application program interface layer. The protocol identification module and the protocol template library are innovatively designed, and flexible protocol analysis and conversion are supported. And a user state event simulation mechanism and a buffer area grading mechanism are introduced, a lock-free concurrent queue is adopted to process real-time data, the disk map stores overflow data, and the dynamic expansion and contraction of processing threads are realized through a load balancing scheduler. The method breaks through the platform limit and the performance bottleneck of the traditional communication board card, and provides a high-efficiency and reliable data processing solution for an industrial automation system.
In order to break through the platform limit and performance bottleneck of the traditional communication board, and provide an efficient and reliable data processing solution for an industrial automation system, the application provides an embodiment of a data processing method of a cross-platform data communication board, referring to fig. 1, the data processing method of the cross-platform data communication board specifically comprises the following contents:
Step S101, creating a driving interface object layer, packaging an interface function prototype in the driving interface object layer into an application program interface layer, building a protocol identification module and a protocol template library, analyzing communication data characteristics by the protocol identification module to obtain a protocol type identifier, loading a protocol analysis rule from the protocol template library according to the protocol type identifier, and writing the protocol analysis rule into a protocol conversion engine;
Optionally, the embodiment realizes a set of efficient cross-platform communication board card driving interface architecture, and firstly, the implementation process of the driving interface architecture is described in detail from the creation of a driving interface object layer. In industrial automation sites, there are many different types of data acquisition boards, such as analog acquisition cards, digital IO cards, bus communication cards, etc., which have different hardware characteristics and communication protocols.
In order to realize unified management, the embodiment firstly constructs a hardware abstraction layer of the board card. And extracting key parameters such as a register mapping table, interrupt configuration, DMA channels and the like by analyzing the hardware description file of the board card, and establishing a hardware feature database. Based on the characteristic information, a hierarchical interface class structure is designed, and comprises a basic interface class, a functional interface class and an expansion interface class. The basic interface class defines the bottom operations such as reading and writing registers, configuration interrupt and the like, the functional interface class realizes the business functions such as data acquisition, signal processing and the like, and the expansion interface class supports the special functions of a specific board card.
The encapsulation of the interface function prototype employs an innovative dynamic binding mechanism. First, a unified function prototype template is defined, containing type declarations of input parameters, output parameters, and return values. And then establishing a function mapping table and storing the corresponding relation between the interface function and the actual implementation. During operation, the polymorphism of the interface is realized through the dynamic binding of the function pointer. The design only needs to realize corresponding interface functions when the board card is newly added for supporting, and upper application codes are not required to be modified.
The protocol identification module is designed by adopting a layering processing strategy. In physical layer, synchronization and verification of data frame are realized, in link layer, slicing and recombination of data packet are carried out, and in application layer, extraction and identification of protocol characteristics are realized. The feature extraction uses a sliding window algorithm to scan the data stream in real time. The extracted features comprise frame header format, function code distribution, data structure and other features, and the features constitute fingerprint features of the protocol.
The protocol template library stores protocol definitions in an XML format and supports hierarchical description of protocols. Each protocol template comprises four parts of protocol identification, data structure definition, analysis rules and conversion rules. The protocol identifier defines the unique identifier and version information of the protocol, the data structure defines the data format of the protocol, the analysis rule defines the data analysis method, and the conversion rule defines the mapping relation of protocol conversion.
The embodiment innovatively realizes a dynamic loading mechanism of the protocol analysis rule. And after the protocol type is identified, retrieving the corresponding parsing rule from the protocol template library. Rule loading adopts an incremental mode, and only necessary rule sets are loaded. By establishing the rule cache, the access speed of frequently used rules is improved. The rule loading process supports concurrent access, and a read-write lock mechanism is adopted to ensure data consistency.
The protocol conversion engine implements a pipeline processing architecture. The data firstly enters a preprocessing pipeline for data format standardization, then enters an analysis pipeline for analyzing the data structure according to the loaded rule, and finally enters a conversion pipeline for converting the data into a target format. Data are transmitted among the pipelines through the message queues, so that asynchronous processing is realized, and the processing efficiency is improved.
In terms of the division of the application program interface layer, the present embodiment divides the interfaces into three subsets according to the functional characteristics. The data acquisition interface subset is responsible for data acquisition and signal processing, including functions of sampling rate configuration, trigger mode setting, data caching and the like, the data communication interface subset processes network communication to realize reliable transmission of data, and the protocol communication interface subset is responsible for protocol processing, including protocol analysis, encapsulation and conversion.
Each subset of interfaces implements independent resource management and exception handling mechanisms. And managing the life cycle of the resource by adopting the reference count, so as to avoid resource leakage. The access control of thread safety is realized, and the correctness in a multithreading environment is ensured. By means of event notification mechanism, cooperation between subsets is realized.
The design of the embodiment effectively solves the problem of communication of heterogeneous equipment in an industrial field. The method and the device have the advantages that the difference of different hardware platforms is shielded through unified interface encapsulation, the processing of various industrial protocols is supported through flexible protocol identification and analysis mechanisms, and the modularization degree and maintainability of the system are improved through reasonable interface division.
The integrated application of these techniques significantly improves the communication performance and reliability of the system. In an actual industrial field, the system can quickly identify and process different types of communication protocols and support plug and play of the device. Through the layered interface design, the system can adapt to different types of industrial equipment, and unified data acquisition and control are realized. In particular, in a complex industrial environment, the flexible protocol processing mechanism provides powerful support for device interconnection and interworking.
Step S102, a user state event simulation mechanism is constructed, an input/output event monitoring interface is defined in the application program interface layer, a buffer grading mechanism is established in the input/output event monitoring interface, the buffer grading mechanism comprises a rapid buffer zone and an overflow buffer zone, the rapid buffer zone adopts a lock-free concurrency queue to store real-time data, the overflow buffer zone adopts disk mapping to store overrun data, a plurality of task processing threads are arranged in the lock-free concurrency queue, the task processing threads dynamically stretch and retract according to a system load threshold, and data are shunted to the overflow buffer zone when the data volume of the rapid buffer zone exceeds a preset threshold;
optionally, the embodiment realizes a set of efficient user state event processing mechanism, and mainly aims at the scene of high concurrency data acquisition and processing in the industrial automation field. First, the implementation process of the user mode event simulation mechanism will be described in detail.
The present embodiment builds an event driven framework at the application interface layer. By establishing an event descriptor table, various event types including data acquisition events, communication events, abnormal events and the like are defined. Each event descriptor contains information such as event ID, priority, processing function, etc. And monitoring the change of the hardware state register by adopting a polling mode, and generating a corresponding event message when the state change is detected.
The input/output event listening interface is designed in a viewer mode. Two core components of the event publisher and the event subscriber are realized. The event publisher is responsible for collecting and distributing the events and supporting the broadcasting and multicasting of the events, and the event subscriber is responsible for registering event processing functions and supporting dynamic subscription and unsubscribing. By establishing the event routing table, accurate delivery of the event is realized.
The buffer classification mechanism is a core innovation point of the present embodiment. The fast buffer is realized based on a lock-free concurrency queue, and CAS (Compare And Swap) operations are adopted to ensure concurrency safety. The queue nodes are organized in an array, and each node contains a data block pointer and a status flag. In order to improve the utilization efficiency of the memory, a node pool mechanism is realized, and multiplexing of the nodes is realized through pre-allocation and recovery.
The overflow buffer is implemented using a memory mapped file. First, a mapping file with a fixed size is created, and the file is mapped to a virtual memory space. The mapping memory is managed through the page replacement algorithm, so that the automatic persistence of the data is realized. When the data quantity of the quick buffer area exceeds a threshold value, a data migration mechanism is triggered, and the data are written into the overflow buffer area in batches.
The present embodiment innovatively implements a multithreaded processing mechanism in a lock-free concurrency queue. Each processing thread maintains an independent task queue, and task load balancing is achieved through a work-stealing algorithm. The initial size of the thread pool is set according to the CPU core number, and the thread number is dynamically adjusted by monitoring the system load index. When the system load is detected to be too high, the thread recovery is triggered, and when the task backlog is generated, a new processing thread is created.
The data distribution mechanism is controlled by a token bucket algorithm. The data inflow rate is calculated by monitoring the change in the data amount of the cache. And when the data quantity exceeds a preset threshold value, starting a shunt strategy. And the data blocks are packed and written into the overflow buffer area in a batch processing mode in the shunting process. And meanwhile, maintaining a data index table, and recording the position information of the data in the overflow buffer area.
The load balancing scheduler implements an innovative task allocation strategy. And calculating the load score of the thread by acquiring indexes such as CPU utilization rate, task queue length, processing delay and the like of the processing thread. And constructing a priority queue based on the load scores, and realizing the priority scheduling of the tasks. The scheduler updates the thread state regularly, and the real-time performance of task allocation is ensured.
The embodiment realizes an adaptive task allocation algorithm. The load proportion of each thread is calculated first and is used as a weight factor for task allocation. And then selecting a proper target thread according to the priority and timeliness requirements of the data. For data with high real-time requirement, the data is preferentially distributed to the threads with lighter loads, and for non-real-time data, the data can be temporarily stored in an overflow buffer area to wait for processing.
In the aspect of exception handling, the embodiment realizes a complete fault-tolerant mechanism. When the processing thread exits abnormally, the thread can be automatically restored and tasks can be reassigned. By checkpointing mechanisms, data processing restorability is ensured. For data overflowing the buffer area, data consistency verification is realized, and data loss or damage is avoided.
The design of the embodiment effectively solves the problem of high concurrency data processing in the industrial field. The method realizes high-efficiency storage of data through a hierarchical buffer mechanism, improves concurrency of data processing through a lock-free concurrency queue, and ensures reasonable utilization of system resources through dynamic load balancing.
The integrated application of these techniques significantly improves the data processing capabilities of the system. In an actual industrial field, the system can stably process high-speed data flow, and the real-time performance and reliability of data are ensured. Particularly, in the data burst scene, through reasonable data distribution and load balancing, the overload of the system is effectively avoided, and the continuity and reliability of industrial control are ensured.
Step S103, the realized interface is transferred to an abstract board card object of an application program interface layer in a function pointer mode, the application program interface layer receives a data acquisition instruction and a control instruction of industrial automation equipment, and the data acquisition instruction and the control instruction are issued to a corresponding communication board card through the function pointer to execute corresponding operation.
Optionally, the embodiment realizes a set of flexible interface transmission and instruction processing mechanism, and is mainly oriented to the unified management requirement of the multi-type communication board card in the industrial automation field. The technology implementation process is described in detail below.
The present embodiment first builds a function pointer mapping table. The mapping table is stored by adopting a hash structure, wherein a key value is an interface identifier, and a value is a corresponding function pointer. The mapping table supports dynamic updating, and when a new or modified interface is implemented, the corresponding function pointer can be updated in real time. In order to ensure concurrency safety, a read-write lock mechanism is adopted to protect access of the mapping table.
In the implementation of abstract board card objects, a combination mode design is employed. Each board object contains a set of base attributes and a set of operation interfaces. The basic attribute comprises information such as board type, communication parameters, state marks and the like, and the operation interface set is organized through a function pointer array and supports multiple operation types. By establishing an interface version management mechanism, the backward compatibility of the interface is ensured.
The transfer process of the function pointer adopts a registration-callback mode. First, a unified interface registration function is defined at the application program interface layer, which receives an interface identifier and a function pointer as parameters. When the board card driver is loaded, the implemented interface is registered to the interface layer through a registration function. The registration process may perform parameter validity checking and type matching verification.
The present embodiment innovatively implements an instruction parsing mechanism. When an instruction of an industrial automation device is received, first an instruction classification is performed. The data acquisition instruction mainly comprises sampling parameter configuration, trigger control, data reading and the like, and the control instruction comprises output control, mode switching, state setting and the like. The instruction parser extracts the opcode and parameters in the instruction, generating a standardized instruction description structure.
Instruction routing employs a multi-level distribution strategy. Firstly, selecting a corresponding processing module according to the instruction type, and then selecting a specific board card object according to the target board card identification. And obtaining the corresponding operation function address by inquiring the function pointer mapping table. In order to improve the query efficiency, a caching mechanism of the mapping table is realized, and frequently used function pointers are stored in a cache.
In the process of executing the instruction, the embodiment realizes a complete transaction management mechanism. Each instruction execution process is packaged into a transaction, and comprises the steps of pre-execution state preservation, operation execution, result verification, state recovery and the like. When execution fails, the method can automatically roll back to a pre-execution state. The execution process is recorded through the transaction log, so that problem tracking and diagnosis are supported.
The parameter transfer adopts intelligent pointer management. And in the process of function call, the intelligent pointer is used for packaging parameter data, so that automatic release of resources is ensured. For large-block data transmission, a zero-copy technology is adopted, and a data buffer area is directly transferred through memory mapping, so that unnecessary data copying is avoided.
The present embodiment implements an asynchronous execution mechanism. For time-consuming operation, the method is executed in an asynchronous calling mode, so that the blocking of the main thread is avoided. And the asynchronous execution result is returned through the callback function, so that chained processing is supported. The timeout management mechanism is realized, and when the execution time exceeds a preset threshold value, the operation can be actively interrupted.
In terms of error handling, a layered exception handling mechanism is implemented. At the function pointer call layer, the possible access boundary crossing and null pointer exception are captured, at the instruction execution layer, the parameter error and execution failure exception are processed, and at the transaction management layer, the state consistency exception is processed. The anomaly information contains detailed error codes and descriptive information.
This embodiment is particularly concerned with real-time requirements. For control instructions with high priority, a fast channel mechanism is realized, and the control instructions are directly executed by bypassing a conventional instruction queue. And ensuring the timely processing of the key instructions through a priority scheduling algorithm. The instruction merging mechanism is realized, and continuous instructions of the same type are optimized.
The integrated application of these techniques significantly improves the reliability and efficiency of the system. In an actual industrial field, the embodiment can stably process various control instructions, and real-time performance and reliability of instruction execution are guaranteed. Particularly, under a complex control scene, stable operation of an industrial control system is ensured through a flexible interface calling mechanism and perfect exception handling.
The design of the embodiment effectively solves the core problem of communication control of industrial automation equipment. The unified management of various communication boards is realized through a unified interface transmission mechanism, the accurate execution of control instructions is ensured through a reliable instruction processing mechanism, and the fault tolerance of the system is improved through a perfect exception processing mechanism. The application of these techniques provides for greater reliability and flexibility in industrial control systems.
From the above description, it can be seen that the method for processing data of a cross-platform data communication board provided by the embodiment of the application can realize unified interface abstraction by creating a driver interface object layer and an application program interface layer. The protocol identification module and the protocol template library are innovatively designed, and flexible protocol analysis and conversion are supported. And a user state event simulation mechanism and a buffer area grading mechanism are introduced, a lock-free concurrent queue is adopted to process real-time data, the disk map stores overflow data, and the dynamic expansion and contraction of processing threads are realized through a load balancing scheduler. The method breaks through the platform limit and the performance bottleneck of the traditional communication board card, and provides a high-efficiency and reliable data processing solution for an industrial automation system.
In an embodiment of the data processing method of the cross-platform data communication board card of the present application, referring to fig. 2, the following may be further specifically included:
Step S201, a board basic parameter configuration table and a board operation interface definition table are established in a driving layer, class definition codes of a driving interface object layer are generated according to the board basic parameter configuration table, the board operation interface definition table is analyzed to obtain an interface function prototype list, the interface function prototype list is packaged to an application program interface layer through a function pointer mapping table, and a mapping relation between a board operation function and an interface layer function is established;
Step S202, constructing a protocol analysis engine, wherein the protocol analysis engine reads a protocol feature identification rule preset in a protocol template library, performs feature extraction on a communication data packet header to obtain a protocol type identification, retrieves a matched protocol analysis rule set from the protocol template library according to the protocol type identification, loads the protocol analysis rule set into a rule analyzer of a protocol conversion engine, and analyzes and converts data according to the loaded rule.
Optionally, the embodiment realizes a complete board card driving interface generation and protocol analysis mechanism, and aims at the unified management requirement of different types of communication boards in the industrial automation field. The technology implementation process is described in detail below.
When the driving layer builds the board basic parameter configuration table, a hierarchical structure design is adopted. The configuration table comprises three layers of hardware layer parameters, communication layer parameters and functional layer parameters. The hardware layer parameters define physical characteristics of the board card, such as register mapping, interrupt configuration, DMA channels, etc., the communication layer parameters include communication protocol types, baud rates, data formats, etc., and the functional layer parameters describe functional characteristics of the board card, such as sampling rates, trigger modes, data formats, etc.
The embodiment adopts a templated design when the board card operation interface is defined. The interface definition table adopts XML format description and contains information such as interface name, parameter list, return value type and the like. And by defining unified interface description grammar, supporting the interface expression of different types of template cards. The interface definition supports inheritance and combination relation, and is convenient for multiplexing and expanding the interface.
The class definition code generation of the driver interface object layer adopts an automatic mode. Firstly, analyzing a board basic parameter configuration table, and extracting key parameter information. Then, attribute definitions, method declarations, and access controls for the classes are automatically generated based on the predefined code templates. The generated code contains necessary notes and document information, so that maintainability of the code is improved.
The realization of the function pointer mapping table adopts a multi-level hash structure. The first-level hash table uses the type of the board card as a key, the second-level hash table uses the interface identifier as a key, and the value is a corresponding function pointer. This architecture supports fast interface lookup and invocation. Meanwhile, a dynamic updating mechanism of the mapping table is realized, and interface registration and cancellation during operation are supported.
In the implementation of the protocol parsing engine, a protocol feature library is first constructed. The feature library stores feature patterns of various industrial protocols, including frame formats, function codes, verification modes, and the like. And the decision tree algorithm is adopted for feature matching, so that the accuracy and the efficiency of protocol identification are improved. The feature extraction process supports fuzzy matching, and can handle variants and extensions of protocols.
The protocol type identification employs a multi-stage matching strategy. The method comprises the steps of carrying out quick filtering in the first stage, quickly removing unmatched protocols based on key fields of a packet head, carrying out accurate matching in the second stage, carrying out detailed feature comparison on the rest candidate protocols, and verifying in the final stage, so that the correctness of a recognition result is ensured.
The embodiment innovatively realizes a dynamic loading mechanism of the protocol analysis rule. The rule set adopts a modularized organization and comprises a basic analysis rule, a data conversion rule and a verification rule. The rule loading process supports incremental updates, loading only the necessary rule modules. And the access efficiency of frequently used rules is improved through a rule caching mechanism.
In the implementation of the rule parser, a pipeline processing model is employed. The data is firstly subjected to preprocessing stage to normalize the data format, then enters into analysis stage to analyze the data structure according to the loaded rule, and finally, the conversion stage is used for converting the analysis result into the target format. The whole process supports parallel processing, and the analysis efficiency is improved.
The data conversion process implements a flexible mapping mechanism. By establishing a data field mapping table, a conversion relationship between a source format and a target format is defined. Complex data conversion rules are supported, such as data type conversion, unit conversion, transcoding, etc. The configurability of data conversion is realized, and the method is convenient to adapt to different application requirements.
This embodiment is particularly concerned with performance optimization of protocol parsing. The data caching mechanism is realized, the analysis result is cached, and repeated analysis is avoided. And the memory copy in the data transmission process is reduced by adopting a zero copy technology. And the processing efficiency of a large amount of data is improved through a parallel processing mechanism.
The exception handling aspect implements a complete error detection and recovery mechanism. For protocol analysis errors, the error position and the error cause can be accurately positioned, and the re-analysis of data is supported. The data integrity check is realized, and the accuracy of the analysis result is ensured. Tracking and diagnosis of problems is supported through a logging mechanism.
The combined use of these techniques significantly improves the adaptability and reliability of industrial communication systems. In an actual industrial field, the embodiment can accurately identify and process various communication protocols and support plug and play of equipment. Particularly, under a complex multi-protocol environment, the reliability and efficiency of data communication are ensured through a flexible protocol analysis mechanism.
The design of the embodiment effectively solves the problem of protocol adaptation in the communication of industrial automation equipment. The method realizes the standardization of the driving layer through a unified interface generation mechanism, supports the processing of various communication protocols through a flexible protocol analysis mechanism, and improves the efficiency of data processing through optimized performance design. The application of these techniques provides industrial control systems with greater interoperability and extensibility.
In an embodiment of the data processing method of the cross-platform data communication board card of the present application, referring to fig. 3, the following may be further specifically included:
Step 301, a board type identification module is established, the board type identification module reads a board hardware characteristic parameter table, analyzes board function attribute identification bits to obtain board type information, extracts a corresponding interface function set from an interface function library according to the board type information, and generates an access control table of a data acquisition interface subset, an access control table of a data communication interface subset and an access control table of a protocol communication interface subset;
Step S302, an interface organization manager is constructed, the interface organization manager reads interface function definitions in each access control table, an interface dependency graph is built, interface functions are grouped based on the interface dependency graph, the grouped interface functions are packaged into class library files of corresponding subsets, the class library files are registered in an application program interface layer, and a call mapping table is built.
Optionally, the embodiment realizes a set of intelligent board card type identification and interface management mechanism, and is mainly oriented to unified management requirements of various communication boards in industrial automation equipment. The technology implementation process is described in detail below.
In the embodiment, firstly, a board hardware characteristic parameter table is constructed, and hierarchical data structure design is adopted. The parameter table contains a base feature layer, a functional feature layer, and an extended feature layer. The basic feature layer stores basic parameters such as hardware identification codes, version numbers, manufacturer information and the like, the functional feature layer describes the functional types, communication interface types, data processing capacity and the like of the board card, and the expansion feature layer contains special functional parameters in specific application scenes.
In the board card type identification process, an innovative feature matching algorithm is realized. Firstly, reading a hardware register of the board card to obtain a functional attribute identification bit. And extracting the type information in the identification bit by a bitmap analysis technology. The fuzzy matching mechanism is realized, and the compatibility problem of different versions of boards can be processed. When a new type of board card is encountered, the identification rule is updated through a feature learning algorithm.
The interface function extraction adopts an intelligent screening mechanism. And according to the board card type information, retrieving the matched function set from the interface function library. The function screening process considers the function dependency relationship, and ensures the integrity of the extracted function set. Function version management is realized, and coexistence and switching of interfaces of different versions are supported.
The access control table is generated in a multidimensional matrix structure. The access control table of the data acquisition interface subset comprises functional items such as acquisition parameter configuration, trigger control, data reading and the like, the access control table of the data communication interface subset comprises functional items such as communication parameter setting, data receiving and transmitting, cache management and the like, and the access control table of the protocol communication interface subset comprises functional items such as protocol analysis, data conversion, protocol encapsulation and the like.
The present embodiment employs a graph theory algorithm in the implementation of the interface organization manager. Firstly, an interface dependency graph is constructed, nodes represent interface functions, and edges represent dependency relations among the functions. And analyzing the dependency chain through a depth-first search algorithm, and identifying strong dependency and weak dependency. And the circular dependency detection is realized, and the interface call deadlock is avoided.
The interface grouping process adopts a cluster analysis method. Based on the topology of the dependency graph, the interface functions are grouped using a community discovery algorithm. The grouping process divides highly correlated interface functions into the same group taking into account functional dependencies and call frequencies. The dynamic grouping mechanism is realized, and grouping adjustment in the running process is supported.
The encapsulation of the class library file adopts a templatized design. The class libraries of each subset contain interface declarations, implementation code, and document specifications. And supporting the transplantation of different platforms through the conditional compiling of the preprocessing instruction control interface. The version control mechanism is realized, and the consistency and traceability of the class library are ensured.
In the class library registration process, a dynamic loading mechanism is realized. The application program interface layer maintains a class library registry and records the information of the loaded class library. And establishing call mapping of the interface function through a symbol analysis technology. The hot plug support is realized, and class libraries are allowed to be dynamically loaded and unloaded at runtime.
The call mapping table adopts a multi-level cache structure. The first-level cache stores direct call addresses of common interfaces, and the second-level cache stores complete mapping relations. And the cache content is optimized through a prediction algorithm, so that the interface calling efficiency is improved. And the concurrent access control is realized, and the correctness in the multithreading environment is ensured.
This embodiment is particularly concerned with exception handling mechanisms. In the interface calling process, the complete error detection and recovery flow is realized. By establishing an error code mapping table, different types of exceptions are processed uniformly. And the call chain tracking is realized, and the problem positioning and diagnosis are supported.
The aspect of performance optimization adopts a plurality of innovative technologies. The call cost is reduced through function inline optimization, the starting time is reduced by using a delay loading mechanism, the asynchronous processing of interface call is realized, and the concurrency performance is improved.
The comprehensive application of the technologies significantly improves the maintainability and expansibility of the industrial control system. In an actual industrial field, the embodiment can accurately identify various communication boards, automatically configure proper interface functions and support plug and play of equipment. Particularly, under a complex multi-device environment, the stable operation of the system is ensured through an intelligent interface management mechanism.
The design of the embodiment effectively solves the core problem of the interface management of the industrial automation equipment. The device is automatically configured through a unified board card identification mechanism, maintainability of the system is improved through intelligent interface organization management, and interface calling efficiency is improved through optimized performance design. The application of these techniques provides greater flexibility and reliability to the industrial control system.
In an embodiment of the data processing method of the cross-platform data communication board card of the present application, referring to fig. 4, the following may be further specifically included:
step S401, creating an event monitor at an application program interface layer, wherein the event monitor defines an input event processing function and an output event processing function, detects the change of a status register of a board card in a polling mode, converts the detected change of the status into an event message, establishes a corresponding relation between event type and processing function recorded by an event message distribution table, and calls the corresponding event processing function according to the event message distribution table;
step S402, constructing a hierarchical buffer manager, wherein the hierarchical buffer manager creates a lock-free concurrency queue based on a CAS algorithm as a quick buffer, creates a persistence storage area based on a memory mapping file as an overflow buffer, sets a capacity threshold and a data storage period of the quick buffer, and transfers data to the overflow buffer when the data volume of the quick buffer exceeds the capacity threshold or the data storage time exceeds the storage period.
Optionally, the embodiment realizes a set of efficient event monitoring and buffer management mechanism, and is mainly oriented to the scene of high-frequency data acquisition and real-time processing in industrial automation equipment. The technology implementation process is described in detail below.
The present embodiment first establishes a state mapping table in the event listener. The table adopts a bitmap structure, and records the meaning and change rule of each status bit of the board card. Direct access to the status registers is achieved through a hardware abstraction layer interface. The polling process adopts a self-adaptive strategy, and the polling interval is dynamically adjusted according to the state change frequency, so that the instantaneity is ensured, and the resource waste is avoided.
The design of the event processing function adopts a template method mode. The input event processing function is mainly responsible for data acquisition, signal processing and data verification, and the output event processing function is responsible for data transmission, state updating and result confirmation. Each processing function comprises three stages of preprocessing, core processing and post-processing, and the customized extension of the processing flow is supported.
The state change detection adopts a differential comparison algorithm. And comparing the current state with the last state by maintaining a state snapshot, and identifying the changed state bit. The priority ordering of the state changes is realized, and the priority processing of the important state changes is ensured. And for the composite state change, adopting a state machine analysis technology to perform decomposition treatment.
The generation of event messages employs a structured design. Each event message contains fields for time stamp, event type, status value, priority, etc. Multiplexing of the message objects is achieved through a message pool mechanism, and memory allocation overhead is reduced. The message compression mechanism is realized, and the merging processing is carried out on the similar events which continuously occur.
The present embodiment innovatively implements an event message distribution mechanism. The distribution table adopts a multi-level hash structure and supports fuzzy matching and accurate matching of event types. By establishing an event processing pipeline, asynchronous processing and parallel processing of the events are realized. The event priority scheduling is realized, and the timely processing of key events is ensured.
In the implementation of the hierarchical buffer manager, the cache builds a lock-free concurrency queue based on CAS (Compare And Swap) algorithm. The queue nodes are organized in an array, and each node contains a data block pointer and a status flag. And the concurrent access control is realized through the atomic operation, so that the performance overhead caused by using the traditional lock mechanism is avoided.
The capacity management of the cache adopts a dynamic adjustment strategy. By monitoring the data inflow rate and the processing rate, the buffer usage trend is predicted. When the possible overflow is predicted, the data migration is triggered in advance, and buffer area blocking caused by burst data is avoided. The memory defragmentation mechanism is realized, and the memory utilization efficiency is improved.
The overflow buffer implements persistent storage based on the memory mapped file. First, a mapping file of a fixed size is created, which is mapped to the virtual address space of the process. And managing the mapping memory through a page replacement algorithm to realize automatic persistence of data. And an asynchronous writing mechanism is adopted, so that the influence of IO operation on performance is reduced.
The data migration process implements a batch processing mechanism. When the migration condition is triggered, batch migration is performed according to the unit of data blocks. Continuous writing in the migration process is realized through a double-buffer technology. And maintaining a data index table, recording the position information of the data in the overflow buffer area, and supporting quick retrieval.
This embodiment is particularly concerned with data consistency issues. During data migration, a transaction mechanism is employed to ensure atomicity of migration operations. The check point mechanism is realized, and the data recovery when the migration fails is supported. And processing the data conflict in the concurrent access scene through a version control mechanism.
The aspect of performance optimization adopts a plurality of innovative technologies. The SIMD instruction accelerates data copying, memory pre-allocation is used for reducing dynamic allocation overhead, data compression storage is realized, and storage efficiency is improved. Meanwhile, an intelligent pre-reading mechanism is realized, and data blocks which possibly need to be accessed are loaded in advance.
The integrated application of these techniques significantly improves the data processing capabilities of industrial control systems. In an actual industrial field, the embodiment can stably process high-frequency acquisition data and ensure the real-time performance and the integrity of the data. Particularly, under the data burst scene, the data loss and the system blocking are effectively avoided through a hierarchical buffer mechanism.
The design of the embodiment effectively solves the core problem of high-speed data acquisition and processing in industrial automation equipment. The system realizes real-time monitoring of the equipment state through an efficient event monitoring mechanism, improves the reliability of data processing through innovative buffer management, and improves the processing capacity of the system through optimized performance design. The application of these techniques provides industrial control systems with greater data processing capabilities and reliability.
In an embodiment of the data processing method of the cross-platform data communication board card of the present application, referring to fig. 5, the following may be further specifically included:
Step S501, a thread pool manager is constructed, wherein the thread pool manager creates processing thread groups and sets the initial number of threads, a task waiting queue and a task distributing queue are built in a thread pool, the CPU occupancy rate and the memory utilization rate of a monitoring system calculate the system load value, the number of active threads is dynamically adjusted according to the system load value, idle threads are recovered when the system load value exceeds a preset threshold, and new processing threads are created when the system load value is lower than the preset threshold and the task waiting queue has tasks to be processed;
Step S502, creating a load balancing scheduler, wherein the load balancing scheduler collects the task queue length and the processing time delay of each processing thread, calculates the thread load score, establishes a thread priority queue storage thread load score, calculates task allocation weights based on the thread load score, and allocates the data to be processed in the fast buffer and the overflow buffer to the task queues of the corresponding processing threads according to the task allocation weights.
Optionally, the embodiment realizes a set of intelligent thread management and load balancing mechanism, and is mainly oriented to the efficient scheduling requirement of complex data processing tasks in industrial automation equipment. The technology implementation process is described in detail below.
The present embodiment first establishes a resource monitoring mechanism in the thread pool manager. And constructing a multidimensional load assessment model by collecting system indexes such as CPU utilization rate, memory occupancy rate, IO waiting time and the like. And calculating the system load trend by adopting a sliding window method, and predicting short-term load change by combining an exponential smoothing algorithm to realize accurate monitoring of resource use.
The initialization of the thread pool adopts a hierarchical design. The core thread group is responsible for processing regular tasks and the dynamic thread group is responsible for processing burst tasks. The core thread number is set according to the CPU core number, so that the basic processing capability is ensured. The thread life cycle is maintained through the thread state manager, and the operations of creating, suspending, restoring and destroying the threads are supported.
The task queue management adopts a multi-level queue structure. The task waiting queue is realized by using a priority queue, and the task priority is supported to be dynamically adjusted. The task dispatch queue employs a work stealing algorithm that allows idle threads to acquire tasks from other busy thread queues. The task timeout management is realized, and the task is prevented from being blocked for a long time.
The embodiment innovatively realizes a thread dynamic telescopic mechanism. Different thread adjustment policies are defined by setting a plurality of load threshold intervals. When the load of the system continuously exceeds the upper threshold, triggering a thread recovery process, and when the load is reduced to the lower threshold and a task to be processed exists, starting a thread expansion process. The thread number change adopts a progressive strategy, so that severe fluctuation is avoided.
The thread reclamation process implements an intelligent selection mechanism. And preferentially recycling the thread with the longest idle time, and selecting a recycling object by maintaining a thread liveness record. The method realizes an elegant exit mechanism and ensures that the thread is recycled after finishing the current task. And the thread context information is reserved in the recovery process, so that the quick recovery is supported.
The new thread creation adopts a template instantiation mode. Thread priority and affinity are set by thread factory unified management thread creation process. The thread preheating mechanism is realized, and the thread running environment is initialized in advance. And the thread Chi Fuyong strategy is adopted, so that the thread creation and destruction overhead is reduced.
The implementation of the load balancing scheduler employs an adaptive algorithm. First, the performance index of each processing thread is collected, including the task queue length, average processing delay, CPU utilization, etc. The thread load score is obtained through weighted calculation, and the historical processing capacity and the current load state are considered in the score calculation.
The thread priority queue is implemented by using a red black tree, and supports quick sequencing and updating of thread load scores. The queue stores thread identifiers and load scores, maintaining the queue order by periodic updates. The priority preemption mechanism is realized, and the high-priority task is allowed to interrupt the processing of the low-priority task.
The calculation of task allocation weights adopts normalization processing. Based on the thread load scores, the task reception probabilities for each thread are calculated using a soft maximum function. The weight calculation considers the task type and the processing difficulty, and different weight coefficients are given to different types of tasks. Dynamic weight adjustment is realized, and allocation strategies are optimized according to task processing effects.
The data distribution process implements a batch processing mechanism. And the data to be processed are read in batches from the quick buffer area and the overflow buffer area, and are distributed to each processing thread according to the weight proportion obtained by calculation. By data locality optimization, related data is preferentially allocated to the same thread processing. The task affinity mechanism is realized, and the cache utilization efficiency is improved.
This embodiment is particularly concerned with the real-time nature of task processing. And by setting the task deadline, the dynamic promotion of the priority of the task is realized. For tasks near the deadline, a task migration mechanism is triggered to transfer the tasks to a lighter-loaded thread for processing. The task pre-scheduling mechanism is realized, and the task execution sequence is planned in advance.
The exception handling aspect implements a complete fault tolerance mechanism. And when detecting that the thread is abnormal, automatically starting the backup thread to take over the task. The breakpoint recovery of the task is supported through a task checkpoint mechanism. The task retry strategy is realized, and the failed task is intelligently retried.
The integrated application of these techniques significantly improves the task processing capabilities of industrial control systems. In an actual industrial field, the embodiment can efficiently process complex data processing tasks and ensure reasonable utilization of system resources. Particularly, under the load fluctuation scene, the stable operation of the system is ensured through an intelligent scheduling mechanism.
The design of the embodiment effectively solves the core problem of task scheduling in industrial automation equipment. The method realizes the elastic expansion of the processing capacity through a dynamic thread management mechanism, improves the utilization efficiency of resources through an intelligent load balancing strategy, and improves the processing performance through an optimized task allocation mechanism. The application of these techniques provides industrial control systems with greater task processing power and reliability.
In an embodiment of the data processing method of the cross-platform data communication board card of the present application, referring to fig. 6, the following may be further specifically included:
Step S601, constructing a board abstract layer interface manager, wherein the board abstract layer interface manager creates a board function description file, analyzes the board function description file to obtain an interface function statement list, constructs a function pointer mapping table to store a memory address of an interface implementation function, registers the function pointer mapping table into an abstract board object of an application program interface layer, and establishes a dependency relationship of interface function call link table record function call;
Step S602, an instruction analysis processor is created, the instruction analysis processor receives a data acquisition instruction and a control instruction from industrial automation equipment, parses the instruction to obtain an operation code and a parameter list, retrieves a corresponding interface function address from a function pointer mapping table according to the operation code, and calls an actual board card operation function to execute the operation required by the instruction through the interface function address.
Optionally, the embodiment realizes a complete board card abstract layer interface management and instruction processing mechanism, and mainly faces to the unified management requirement of multiple types of board cards in industrial automation equipment. The technology implementation process is described in detail below.
The embodiment first establishes a template structure of the board card function description file. The description file adopts an XML format and comprises a basic information section, an interface statement section and a configuration parameter section. The basic information section records the information of the type, version, manufacturer and the like of the board card, the interface declaration section defines all operation interfaces supported by the board card, including function names, parameter types, return value types and the like, and the configuration parameter section stores initialization parameters and runtime parameters of the board card.
The parsing of the list of interface function declarations adopts lexical analysis techniques. By constructing a finite state machine, keywords, identifiers, and special symbols in the function declaration are identified. The analysis process supports function reloading, and can process interface functions with the same name and different parameters. The parameter type checking mechanism is realized, and the correctness of the interface declaration is ensured.
The realization of the function pointer mapping table adopts a multi-level hash structure. The first-stage hash table uses the operation type as a key, the second-stage hash table uses a specific interface identifier as a key, and the value is the memory address of the corresponding function. The mapping table supports dynamic updating, and when the interface implementation changes, the corresponding function pointer can be updated in real time.
The present embodiment innovatively implements an interface registration mechanism. An interface registry is established in an abstract board card object of an application program interface layer. The registration process includes interface verification, version check, and conflict detection. Coexistence of multi-version interfaces is supported through a version management mechanism. The method realizes the life cycle management of the interface and supports the dynamic registration and cancellation of the interface.
The interface function call link table adopts a graph structure design. Nodes represent interface functions and edges represent call relationships. And analyzing the call chain through a depth-first search algorithm, and identifying the circular dependency and the deadlock risk. The method realizes a call chain optimization mechanism and reduces unnecessary function call levels.
The implementation of the instruction parsing processor adopts a pipeline processing model. The received instructions are first preprocessed, including format verification and character transcoding. Then enter the parse phase, use the recursion descent parser to extract the operation code and parameters. The grammar fault-tolerant mechanism is realized, and the fine deviation of the instruction format can be processed.
The operation code analysis adopts a pattern matching algorithm. And establishing an operation code dictionary and storing all operation types supported. Quick matching is realized through the dictionary tree structure, and fuzzy matching and alias matching are supported. The method realizes the operation code version management and processes the compatibility of instruction sets with different versions.
The processing of the parameter list adopts a type safety design. And a parameter type checking and converting mechanism is realized, and the parameter format is ensured to meet the interface requirement. And checking the parameter value range and the dependency relationship through a parameter verification rule. Default processing of parameters and optional parameter processing are supported.
This embodiment is particularly concerned with performance optimization of interface calls. The function pointer caching mechanism is realized, and frequently used interface addresses are stored in a cache. And combining continuous similar instructions through an instruction batch processing mechanism, so that the calling times of the interface are reduced. Asynchronous call support is realized, and concurrent processing capacity is improved.
The aspect of error handling implements a multi-layer protection mechanism. At the instruction parsing layer, syntax errors and parameter errors are captured, at the interface calling layer, function calling exceptions are processed, and at the execution layer, operation failure exceptions are processed. Problem localization and diagnosis is supported through error tracking mechanisms.
The execution of the board card operation function adopts a transaction management mode. Each operation is packaged as a transaction, including the steps of pre-execution checking, operation execution, result verification, and state rollback. The execution process is recorded through the transaction log, and the retry and recovery of the operation are supported.
The embodiment realizes instruction priority management. For control class instructions, the priority is higher than for data acquisition instructions. And organizing instructions to be executed through the priority queue, so as to ensure timely response of key operations. The instruction overtime processing is realized, and long-time blocking is avoided.
The integrated application of these techniques significantly improves the reliability and efficiency of industrial control systems. In an actual industrial field, the embodiment can accurately process various control instructions and data acquisition instructions, and real-time performance and reliability of instruction execution are guaranteed. Particularly, under a complex control scene, the stable operation of the system is ensured through a unified interface management and instruction processing mechanism.
The design of the embodiment effectively solves the core problems of interface management and instruction processing of industrial automation equipment. The device operation standardization is realized through unified abstract layer interface management, the execution efficiency of control instructions is improved through an efficient instruction processing mechanism, and the reliability of the system is improved through a perfect exception processing mechanism. The application of these techniques provides for greater adaptability and maintainability of the industrial control system.
In an embodiment of the data processing method of the cross-platform data communication board card of the present application, referring to fig. 7, the following may be further specifically included:
Step S701, constructing an instruction distributor, wherein the instruction distributor analyzes a target board identifier of a data acquisition instruction and a control instruction, acquires a device descriptor of a target board from a board registry, establishes a board operation handle according to the device descriptor, acquires a corresponding board operation function address from a function pointer mapping table through the board operation handle, and generates a board instruction execution queue to store an instruction sequence to be executed;
Step S702, an instruction execution scheduler is created, the instruction execution scheduler reads instructions in an instruction execution queue of the board card, extracts operation types and operation parameters of the instructions, calls corresponding function pointers to execute the operation functions of the board card, creates an instruction execution state table to record the execution process and the execution result of the instructions, and returns the instruction execution state table to an application program interface layer for state update.
Optionally, the embodiment realizes a complete set of instruction distribution and execution scheduling mechanism, and mainly faces to the accurate control requirement of complex instruction sequences in industrial automation equipment. The technology implementation process is described in detail below.
The embodiment first builds a hierarchical structure of the board registry. The registry adopts a tree structure, the root node is a device manager, the middle node is a board card type, and the leaf node is a specific board card instance. Each board instance contains attributes such as device descriptors, communication parameters, status information, etc. And the quick positioning and access of the board card are realized through an indexing mechanism.
The parsing of the device descriptor adopts a template matching method. The descriptor contains information such as hardware identification, communication interface, functional characteristics, etc. And identifying the type of the board card through a feature extraction algorithm, and establishing a mapping relation between the board card features and the operation functions. Version management of descriptors is realized, and compatibility processing of different version boards is supported.
The embodiment innovatively realizes a board card operation handle mechanism. The handle object encapsulates the operation interface and state information of the board card and provides a unified access mode. The life cycle of the handle is managed through the reference count, and the sharing and recycling of the handle are supported. Handle pool management is realized, and handle allocation and release efficiency is optimized.
The management of instruction sequences adopts a multi-stage queue structure. The instructions are assigned to different execution queues according to instruction priority and timing requirements. The high priority queue is used for emergency control instructions, the medium priority queue is used for regular control instructions, and the low priority queue is used for data acquisition instructions. Dynamic scheduling among queues is realized, and timely execution of key instructions is ensured.
The implementation of the instruction execution scheduler employs an event-driven model. An instruction execution state machine is established defining the lifecycle state of the instruction. The execution flow of the instruction is controlled through the state transition rule, and the execution flow comprises the stages of instruction analysis, parameter verification, execution preparation, result processing and the like. The state backtracking mechanism is realized, and the interruption and the recovery of instruction execution are supported.
The operation type identification adopts a feature matching algorithm. An operation type dictionary is established, and all supported operation modes are stored. The method realizes the rapid identification of the operation type through a decision tree algorithm and supports the decomposition processing of the compound operation. The extension mechanism of the operation type is realized, and new operation support is conveniently added.
The parameter processing adopts a type security mechanism. And the parameter format conversion and the validity verification are realized, and the requirements of the parameter Fu Geban card are ensured. And the association relation among parameters is analyzed through the parameter dependence graph, so that parameter conflict is avoided. And the dynamic adjustment of parameters is supported, and the method is suitable for different operation scenes.
The function pointer calling process implements a complete protection mechanism. Exception handling and resource management are encapsulated by a function call wrapper. And the overtime control of function call is realized, and the deadlock risk is avoided. And a retry strategy of function call is supported, and the execution reliability is improved.
This embodiment is particularly concerned with the management of instruction execution states. The state table adopts a matrix structure and records information of each stage of instruction execution. Including start time, execution progress, resource occupancy, completion status, etc. And the execution effect is evaluated in real time through a state analysis algorithm, so that the quick response of the abnormal situation is supported.
Various innovations are realized in the aspect of performance optimization. By means of the instruction batch processing mechanism, similar instructions are combined, and execution overhead is reduced. The instruction pre-execution analysis is realized, and possible execution conflicts are identified in advance. And a parallel execution strategy is adopted, so that the instruction processing efficiency is improved.
The status update employs an asynchronous notification mechanism. And the execution state is transferred through the message queue, so that the blocking of the main processing flow is avoided. The state compression storage is realized, and the state information transmission overhead is reduced. And the batch update of the states is supported, and the update efficiency is improved.
Exception handling achieves multi-layer protection. The operation exception is captured at the instruction execution layer, the update exception is handled at the state management layer, and the transport exception is handled at the communication layer. By means of an exception propagation mechanism, it is ensured that exceptions can be handled and reported correctly.
The integrated application of these techniques significantly improves the instruction processing capabilities of industrial control systems. In an actual industrial field, the embodiment can efficiently process a complex instruction sequence, and ensure the accuracy and reliability of instruction execution. Particularly, under a high-load scene, the stable operation of the system is ensured through an intelligent scheduling mechanism.
The design of the embodiment effectively solves the core problem of instruction processing of industrial automation equipment. The method realizes accurate control of the instruction through a unified instruction distribution mechanism, improves the instruction execution efficiency through an efficient scheduling strategy, and improves the reliability of the system through perfect state management. The application of these techniques provides industrial control systems with greater instruction processing capability and stability.
In order to break through the platform limit and performance bottleneck of the traditional communication board, and provide an efficient and reliable data processing solution for an industrial automation system, the application provides an embodiment of a cross-platform data communication board data processing device for implementing all or part of the contents of the cross-platform data communication board data processing method, and referring to fig. 8, the cross-platform data communication board data processing device specifically includes the following contents:
The interface object processing module 10 is used for creating a driving interface object layer, packaging an interface function prototype in the driving interface object layer into an application program interface layer, establishing a protocol identification module and a protocol template library, analyzing communication data characteristics by the protocol identification module to obtain a protocol type identifier, loading a protocol analysis rule from the protocol template library according to the protocol type identifier, and writing the protocol analysis rule into a protocol conversion engine;
The event simulation module 20 is configured to construct a user state event simulation mechanism, define an input/output event monitoring interface at the application program interface layer, and establish a buffer classification mechanism at the input/output event monitoring interface, where the buffer classification mechanism includes a fast buffer area and an overflow buffer area, the fast buffer area uses a lock-free concurrency queue to store real-time data, and the overflow buffer area uses a disk map to store overrun data;
The communication execution module 30 is configured to transfer the implemented interface to an abstract board object of an application program interface layer in a function pointer form, where the application program interface layer receives a data acquisition instruction and a control instruction of the industrial automation device, and issues the data acquisition instruction and the control instruction to a corresponding communication board through the function pointer to execute a corresponding operation.
As can be seen from the above description, the cross-platform data communication board data processing device provided by the embodiment of the present application can implement unified interface abstraction by creating a driver interface object layer and an application program interface layer. The protocol identification module and the protocol template library are innovatively designed, and flexible protocol analysis and conversion are supported. And a user state event simulation mechanism and a buffer area grading mechanism are introduced, a lock-free concurrent queue is adopted to process real-time data, the disk map stores overflow data, and the dynamic expansion and contraction of processing threads are realized through a load balancing scheduler. The method breaks through the platform limit and the performance bottleneck of the traditional communication board card, and provides a high-efficiency and reliable data processing solution for an industrial automation system.
In order to break through the platform limit and performance bottleneck of the traditional communication board from the hardware level and provide an efficient and reliable data processing solution for an industrial automation system, the application provides an embodiment of an electronic device for realizing all or part of contents in the cross-platform data communication board data processing method, wherein the electronic device specifically comprises the following contents:
The system comprises a processor (processor), a memory (memory), a communication interface (Communications Interface) and a bus, wherein the processor, the memory and the communication interface are used for completing communication among the processors, the memory and the communication interface through the bus, the communication interface is used for realizing information transmission among a cross-platform data communication board data processing device, a core service system, a user terminal, related equipment such as a related database and the like, and the logic controller can be a desktop computer, a tablet personal computer, a mobile terminal and the like. In this embodiment, the logic controller may refer to an embodiment of the method for processing data of a cross-platform data communication board card in the embodiment and an embodiment of the device for processing data of a cross-platform data communication board card in the embodiment, and the contents thereof are incorporated herein and will not be repeated here.
It is understood that the user terminal may include a smart phone, a tablet electronic device, a network set top box, a portable computer, a desktop computer, a Personal Digital Assistant (PDA), a vehicle-mounted device, a smart wearable device, etc. Wherein, intelligent wearing equipment can include intelligent glasses, intelligent wrist-watch, intelligent bracelet etc..
In practical application, part of the data processing method of the cross-platform data communication board card can be executed on the side of the electronic equipment as described above, or all operations can be completed in the client equipment. Specifically, the selection may be made according to the processing capability of the client device, and restrictions of the use scenario of the user. The application is not limited in this regard. If all operations are performed in the client device, the client device may further include a processor.
The client device may have a communication module (i.e. a communication unit) and may be connected to a remote server in a communication manner, so as to implement data transmission with the server. The server may include a server on the side of the task scheduling center, and in other implementations may include a server of an intermediate platform, such as a server of a third party server platform having a communication link with the task scheduling center server. The server may include a single computer device, a server cluster formed by a plurality of servers, or a server structure of a distributed device.
Fig. 9 is a schematic block diagram of a system configuration of an electronic device 9600 according to an embodiment of the present application. As shown in fig. 9, the electronic device 9600 can include a central processor 9100 and a memory 9140, the memory 9140 being coupled to the central processor 9100. It is noted that this fig. 9 is exemplary, and that other types of structures may be used in addition to or in place of the structures to implement telecommunications functions or other functions.
In one embodiment, the cross-platform data communication board data processing method functions may be integrated into the central processor 9100. The central processor 9100 may be configured to perform the following control:
Step S101, creating a driving interface object layer, packaging an interface function prototype in the driving interface object layer into an application program interface layer, building a protocol identification module and a protocol template library, analyzing communication data characteristics by the protocol identification module to obtain a protocol type identifier, loading a protocol analysis rule from the protocol template library according to the protocol type identifier, and writing the protocol analysis rule into a protocol conversion engine;
step S102, a user state event simulation mechanism is constructed, an input/output event monitoring interface is defined in the application program interface layer, a buffer grading mechanism is established in the input/output event monitoring interface, the buffer grading mechanism comprises a rapid buffer zone and an overflow buffer zone, the rapid buffer zone adopts a lock-free concurrency queue to store real-time data, the overflow buffer zone adopts disk mapping to store overrun data, a plurality of task processing threads are arranged in the lock-free concurrency queue, the task processing threads dynamically stretch and retract according to a system load threshold, and data are shunted to the overflow buffer zone when the data volume of the rapid buffer zone exceeds a preset threshold;
step S103, the realized interface is transferred to an abstract board card object of an application program interface layer in a function pointer mode, the application program interface layer receives a data acquisition instruction and a control instruction of industrial automation equipment, and the data acquisition instruction and the control instruction are issued to a corresponding communication board card through the function pointer to execute corresponding operation.
From the above description, it can be seen that the electronic device provided by the embodiment of the present application implements unified interface abstraction by creating a driver interface object layer and an application program interface layer. The protocol identification module and the protocol template library are innovatively designed, and flexible protocol analysis and conversion are supported. And a user state event simulation mechanism and a buffer area grading mechanism are introduced, a lock-free concurrent queue is adopted to process real-time data, the disk map stores overflow data, and the dynamic expansion and contraction of processing threads are realized through a load balancing scheduler. The method breaks through the platform limit and the performance bottleneck of the traditional communication board card, and provides a high-efficiency and reliable data processing solution for an industrial automation system.
In another embodiment, the cross-platform data communication board data processing device may be configured separately from the central processor 9100, for example, the cross-platform data communication board data processing device may be configured as a chip connected to the central processor 9100, and the cross-platform data communication board data processing method functions are implemented by control of the central processor.
As shown in fig. 9, the electronic device 9600 may further include a communication module 9110, an input unit 9120, an audio processor 9130, a display 9160, and a power supply 9170. It is noted that the electronic device 9600 does not necessarily include all the components shown in fig. 9, and furthermore, the electronic device 9600 may include components not shown in fig. 9, to which reference is made in the prior art.
As shown in fig. 9, the central processor 9100, sometimes referred to as a controller or operational control, may include a microprocessor or other processor device and/or logic device, which central processor 9100 receives inputs and controls the operation of the various components of the electronic device 9600.
The memory 9140 may be, for example, one or more of a buffer, a flash memory, a hard drive, a removable media, a volatile memory, a non-volatile memory, or other suitable device. The information about failure may be stored, and a program for executing the information may be stored. And the central processor 9100 can execute the program stored in the memory 9140 to realize information storage or processing, and the like.
The input unit 9120 provides input to the central processor 9100. The input unit 9120 is, for example, a key or a touch input device. The power supply 9170 is used to provide power to the electronic device 9600. The display 9160 is used for displaying display objects such as images and characters. The display may be, for example, but not limited to, an LCD display.
The memory 9140 may be a solid state memory such as Read Only Memory (ROM), random Access Memory (RAM), SIM card, etc. But also a memory which holds information even when powered down, can be selectively erased and provided with further data, an example of which is sometimes referred to as EPROM or the like. The memory 9140 may also be some other type of device. The memory 9140 includes a buffer memory 9141 (sometimes referred to as a buffer). The memory 9140 may include an application/function storage portion 9142, the application/function storage portion 9142 storing application programs and function programs or a flow for executing operations of the electronic device 9600 by the central processor 9100.
The memory 9140 may also include a data store 9143, the data store 9143 for storing data, such as contacts, digital data, pictures, sounds, and/or any other data used by an electronic device. The driver storage portion 9144 of the memory 9140 may include various drivers of the electronic device for communication functions and/or for performing other functions of the electronic device (e.g., messaging applications, address book applications, etc.).
The communication module 9110 is a transmitter/receiver that transmits and receives signals via the antenna 9111. The communication module 9110 (transmitter/receiver) is coupled to the central processor 9100 to provide input signals and receive output signals, as in the case of conventional mobile communication terminals.
Based on different communication technologies, a plurality of communication modules 9110, such as a cellular network module, a bluetooth module, and/or a wireless local area network module, etc., may be provided in the same electronic device. The communication module 9110 (transmitter/receiver) is also coupled to a speaker 9131 and a microphone 9132 via an audio processor 9130 to provide audio output via the speaker 9131 and to receive audio input from the microphone 9132 to implement usual telecommunications functions. The audio processor 9130 can include any suitable buffers, decoders, amplifiers and so forth. In addition, the audio processor 9130 is also coupled to the central processor 9100 so that sound can be recorded locally through the microphone 9132 and sound stored locally can be played through the speaker 9131.
The embodiment of the present application further provides a computer readable storage medium capable of implementing all the steps in the cross-platform data communication board card data processing method in which the execution subject in the above embodiment is a server or a client, where the computer readable storage medium stores a computer program, and when the computer program is executed by a processor, the computer program implements all the steps in the cross-platform data communication board card data processing method in which the execution subject in the above embodiment is a server or a client, for example, the processor implements the following steps when executing the computer program:
Step S101, creating a driving interface object layer, packaging an interface function prototype in the driving interface object layer into an application program interface layer, building a protocol identification module and a protocol template library, analyzing communication data characteristics by the protocol identification module to obtain a protocol type identifier, loading a protocol analysis rule from the protocol template library according to the protocol type identifier, and writing the protocol analysis rule into a protocol conversion engine;
step S102, a user state event simulation mechanism is constructed, an input/output event monitoring interface is defined in the application program interface layer, a buffer grading mechanism is established in the input/output event monitoring interface, the buffer grading mechanism comprises a rapid buffer zone and an overflow buffer zone, the rapid buffer zone adopts a lock-free concurrency queue to store real-time data, the overflow buffer zone adopts disk mapping to store overrun data, a plurality of task processing threads are arranged in the lock-free concurrency queue, the task processing threads dynamically stretch and retract according to a system load threshold, and data are shunted to the overflow buffer zone when the data volume of the rapid buffer zone exceeds a preset threshold;
step S103, the realized interface is transferred to an abstract board card object of an application program interface layer in a function pointer mode, the application program interface layer receives a data acquisition instruction and a control instruction of industrial automation equipment, and the data acquisition instruction and the control instruction are issued to a corresponding communication board card through the function pointer to execute corresponding operation.
As can be seen from the above description, the computer readable storage medium provided by the embodiments of the present application implements unified interface abstraction by creating a driver interface object layer and an application program interface layer. The protocol identification module and the protocol template library are innovatively designed, and flexible protocol analysis and conversion are supported. And a user state event simulation mechanism and a buffer area grading mechanism are introduced, a lock-free concurrent queue is adopted to process real-time data, the disk map stores overflow data, and the dynamic expansion and contraction of processing threads are realized through a load balancing scheduler. The method breaks through the platform limit and the performance bottleneck of the traditional communication board card, and provides a high-efficiency and reliable data processing solution for an industrial automation system.
The embodiment of the present application further provides a computer program product capable of implementing all the steps in the cross-platform data communication board card data processing method in which the execution subject in the above embodiment is a server or a client, where the computer program/instructions implement the steps of the cross-platform data communication board card data processing method when executed by a processor, for example, the computer program/instructions implement the steps of:
Step S101, creating a driving interface object layer, packaging an interface function prototype in the driving interface object layer into an application program interface layer, building a protocol identification module and a protocol template library, analyzing communication data characteristics by the protocol identification module to obtain a protocol type identifier, loading a protocol analysis rule from the protocol template library according to the protocol type identifier, and writing the protocol analysis rule into a protocol conversion engine;
step S102, a user state event simulation mechanism is constructed, an input/output event monitoring interface is defined in the application program interface layer, a buffer grading mechanism is established in the input/output event monitoring interface, the buffer grading mechanism comprises a rapid buffer zone and an overflow buffer zone, the rapid buffer zone adopts a lock-free concurrency queue to store real-time data, the overflow buffer zone adopts disk mapping to store overrun data, a plurality of task processing threads are arranged in the lock-free concurrency queue, the task processing threads dynamically stretch and retract according to a system load threshold, and data are shunted to the overflow buffer zone when the data volume of the rapid buffer zone exceeds a preset threshold;
step S103, the realized interface is transferred to an abstract board card object of an application program interface layer in a function pointer mode, the application program interface layer receives a data acquisition instruction and a control instruction of industrial automation equipment, and the data acquisition instruction and the control instruction are issued to a corresponding communication board card through the function pointer to execute corresponding operation.
From the above description, it can be seen that the computer program product provided by the embodiments of the present application implements unified interface abstraction by creating a driver interface object layer and an application program interface layer. The protocol identification module and the protocol template library are innovatively designed, and flexible protocol analysis and conversion are supported. And a user state event simulation mechanism and a buffer area grading mechanism are introduced, a lock-free concurrent queue is adopted to process real-time data, the disk map stores overflow data, and the dynamic expansion and contraction of processing threads are realized through a load balancing scheduler. The method breaks through the platform limit and the performance bottleneck of the traditional communication board card, and provides a high-efficiency and reliable data processing solution for an industrial automation system.
It will be apparent to those skilled in the art that embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (devices), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While the principles and embodiments of the present invention have been described in detail in the foregoing application of the principles and embodiments of the present invention, the above examples are provided for the purpose of aiding in the understanding of the principles and concepts of the present invention and may be varied in many ways by those of ordinary skill in the art in light of the teachings of the present invention, and the above descriptions should not be construed as limiting the invention.