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CN119486001A - Backplane, hard disk backplane and server - Google Patents

Backplane, hard disk backplane and server Download PDF

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Publication number
CN119486001A
CN119486001A CN202411491605.5A CN202411491605A CN119486001A CN 119486001 A CN119486001 A CN 119486001A CN 202411491605 A CN202411491605 A CN 202411491605A CN 119486001 A CN119486001 A CN 119486001A
Authority
CN
China
Prior art keywords
hard disk
connector
signal cable
signal
cable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202411491605.5A
Other languages
Chinese (zh)
Inventor
於海军
沈刚
吕文清
买强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China Great Wall Technology Group Co ltd
Original Assignee
China Great Wall Technology Group Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by China Great Wall Technology Group Co ltd filed Critical China Great Wall Technology Group Co ltd
Priority to CN202411491605.5A priority Critical patent/CN119486001A/en
Publication of CN119486001A publication Critical patent/CN119486001A/en
Pending legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
    • H05K7/14Mounting supporting structure in casing or on frame or rack
    • H05K7/1438Back panels or connecting means therefor; Terminals; Coding means to avoid wrong insertion
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
    • H05K7/14Mounting supporting structure in casing or on frame or rack
    • H05K7/1438Back panels or connecting means therefor; Terminals; Coding means to avoid wrong insertion
    • H05K7/1447External wirings; Wiring ducts; Laying cables
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
    • H05K7/14Mounting supporting structure in casing or on frame or rack
    • H05K7/1438Back panels or connecting means therefor; Terminals; Coding means to avoid wrong insertion
    • H05K7/1447External wirings; Wiring ducts; Laying cables
    • H05K7/1451External wirings; Wiring ducts; Laying cables with connections between circuit boards or units

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)

Abstract

本申请提供一种背板、硬盘背板及服务器,涉及服务器设计技术领域,其中,背板应用于服务器,该背板包括:至少一个电路板、设置在每个电路板上的至少一个硬盘接插件和至少一条信号线缆;信号线缆用于传输PCIe信号,信号线缆的一端通过PCB走线与至少一个硬盘接插件连接,另一端用于连接主板上的线缆接插件。本申请提供的技术方案可以提高配置硬盘数量的灵活性。

The present application provides a backplane, a hard disk backplane and a server, which relate to the technical field of server design, wherein the backplane is applied to the server, and the backplane includes: at least one circuit board, at least one hard disk connector arranged on each circuit board and at least one signal cable; the signal cable is used to transmit PCIe signals, one end of the signal cable is connected to at least one hard disk connector through PCB routing, and the other end is used to connect to the cable connector on the mainboard. The technical solution provided by the present application can improve the flexibility of configuring the number of hard disks.

Description

Backboard, hard disk backboard and server
Technical Field
The present application relates to the field of server design technologies, and in particular, to a circuit board, a hard disk back plate, and a server.
Background
The Non-volatile memory standard (Non-Volatile Memory Express, NVMe) is a logic interface specification of a solid state disk using a peripheral component interconnect express (PERIPHERAL COMPONENT INTERCONNECT EXPRESS, PCIe) bus interface, has the characteristics of low delay, low power consumption and parallelism, and is widely applied to the interface and host communication technology of a server.
In a server, PCIeNVMe backplanes are typically configured to 8-disk, 12-disk, 24-disk, etc. specifications. The hard disk configuration of the PCIeNVMe back plate is relatively fixed, and when the configuration requirements of customers on different numbers of hard disks are met, the adaptation and performance test are required to be carried out again, so that the configuration flexibility is poor.
Disclosure of Invention
In view of the above, the present application provides a circuit board, a hard disk back plate and a server for improving the flexibility of configuring the number of hard disks.
In order to achieve the above object, according to a first aspect, an embodiment of the present application provides a back board, which is applied to a server, the back board including at least one circuit board, at least one hard disk connector disposed on each circuit board, and at least one signal cable;
The signal cable is used for transmitting PCIe signals, one end of the signal cable is connected with at least one hard disk connector through a PCB wiring, and the other end of the signal cable is used for being connected with a cable connector on a main board.
In a possible implementation manner of the first aspect, the signal cable includes a high-speed signal line, where the high-speed signal line is used to transmit the PCIe signal, and one end of the high-speed signal line is connected to a high-speed signal pin of the PCB trace, and the other end of the high-speed signal line is connected to a high-speed signal pin of the cable connector.
In a possible implementation manner of the first aspect, the signal cable further includes a power cord, where the power cord is used to provide power to the hard disk connector, and one end of the power cord is connected to the power connector of the motherboard, and the other end of the power cord is connected to a power pin of the PCB trace.
In a possible implementation manner of the first aspect, the signal cable is soldered with the PCB trace board.
In a possible implementation manner of the first aspect, the signal cable is a PCIe x8 cable.
In a possible implementation manner of the first aspect, each of the signal cables connects two hard disk connectors.
In a possible implementation manner of the first aspect, a signal cable is disposed on the circuit board.
In a possible implementation manner of the first aspect, the hard disk connector is used for plugging an NVMe hard disk.
In a second aspect, an embodiment of the present application provides a hard disk backplate, where the hard disk backplate includes a backplate according to the first aspect or any implementation manner of the first aspect, and a hard disk connected to the backplate.
In a third aspect, an embodiment of the present application provides a server, where the server includes the hard disk backplate according to the second aspect and a motherboard connected to the hard disk backplate.
The backboard provided by the embodiment of the application is applied to a server and comprises at least one circuit board, at least one hard disk connector and at least one signal cable, wherein the at least one hard disk connector and the at least one signal cable are arranged on each circuit board, the signal cable is used for transmitting PCIe signals, one end of the signal cable is connected with the at least one hard disk connector through a PCB (printed circuit board) wiring, and the other end of the signal cable is used for connecting the cable connectors on a main board. In the scheme, the backboard is disassembled into one or more sub backboard (namely circuit boards), one end of the signal cable is connected with at least one hard disk connector through the PCB wiring, and the other end of the signal cable can be directly connected with the cable connector on the main board, so that the use of the cable connector on the circuit board can be reduced, and the flexibility of the backboard hard disk configuration is improved.
Drawings
Fig. 1 is a schematic structural diagram of a first back plate according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a second backboard according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of a third backboard according to an embodiment of the present application;
Fig. 4 is a schematic structural diagram of a hard disk back plate according to an embodiment of the present application;
Fig. 5 is a schematic structural diagram of a server according to an embodiment of the present application.
Reference numerals illustrate:
10-circuit board, 11-hard disk connector, 12-signal cable, 121-high-speed signal wire and 122-power wire;
20-motherboard, 21-cable connector, 22-power connector;
100-hard disk backboard, 110-backboard and 120-hard disk.
Detailed Description
Embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application. The terminology used in the description of the embodiments of the application is for the purpose of describing particular embodiments of the application only and is not intended to be limiting of the application. The following embodiments may be combined with each other, and some embodiments may not be repeated for the same or similar concepts or processes.
As one of the core infrastructures of information technology (Information Technology, IT), along with the explosion of global data volume brought by digital economy, storage technology is evolving continuously to meet the demands of users in the digital economy era for large capacity, high performance, high reliability and high security storage. The Solid state disk (Solid STATE DRIVE, SSD), a semiconductor using flash memory as a storage medium, has a continuously increased output duty ratio, and gradually becomes a main stream storage hard disk in the market, and accordingly, the interface and host communication technology is also converted from the conventional serial hard disk (SERIAL ADVANCED Technology Attachment, SATA) and advanced host controller interface (Advanced Host Controller Interface, AHCI) to PCIe and NVMe.
Because of the ever-increasing high-speed transmission requirements, the PCIeNVMe protocol standard (or specification) is also continually updated and iterated, and interfaces with PCIeGen and PCIeGen as standards are presented. The theoretical maximum transmission rate of PCIeGen5 doubles compared to PCIeGen, supporting more concurrent data flows and lower latency, which means PCIeGen has both faster speed and better expansibility of data transmission.
Currently, the physical forms of the back plane of PCIeNVMe are also varied according to the different forms of the overall chassis system and the different demands of clients, such as 2u 8 small disk, 2u 24 small disk, 2u 25 small disk, and 2u 12 large disk. The hard disk configuration of the PCIeNVMe back plate is relatively fixed, and when the configuration requirements of customers on different numbers of hard disks are met, the adaptation and performance test are required to be carried out again, so that the configuration flexibility is poor.
In view of the above, the embodiment of the application provides a back plate, which may include at least one circuit board, at least one hard disk connector disposed on each circuit board, and at least one signal cable. The embodiment of the application can improve the flexibility of configuring the number of the hard disks.
The signal cable is used for transmitting PCIe signals, one end of the signal cable is connected with at least one hard disk connector through a circuit board (Printed Circuit Board, PCB) wire, and the other end of the signal cable is used for being connected with a cable connector on the main board.
Fig. 1 is a schematic structural diagram of a first back plate according to an embodiment of the present application. As shown in fig. 1, the back plate includes one circuit board 10, and a plurality of (here, illustratively, two) hard disk connectors 11 are included on each circuit board 10. One end of the signal cable 12 is connected to the two hard disk connectors 11 through PCB traces (not shown), and the other end is connected to the cable connector 21 on the motherboard 20. The signal cable 12 can effectively reduce attenuation of signal transmission, so that PCIe signal quality can be improved to meet higher signal requirements.
The signal cable 12 and the cable connector 21 can be connected by plugging and unplugging. For example, the end of the signal cable 12 connected to the cable connector 21 may be referred to as a first end, and the end of the signal cable 12 connected to the PCB trace may be referred to as a second end, wherein the first end of the signal cable 12 may be a female end, and then the end of the cable connector 21 may be a male end. Of course, the second end of the signal cable 12 may be a male end, and then one end of the cable connector 21 may be a female end, which is not particularly limited in the present application. The second end of the signal cable 12 may be soldered with the PCB trace, so that the reliability of the connection between the signal cable 12 and the PCB trace may be improved.
The hard disk connector 11 can be used for connecting storage devices such as a solid state disk and the like so as to conveniently read and write data. In the back plane, PCB traces may be used for switching of the signal cable 12 to connect the hard disk connector 11 on the circuit board 10 with the signal cable 12 for signal transmission and control. In some embodiments, the PCB trace may be located on the circuit board 10, which may simplify the structure of the back plate. In other embodiments, a PCB board may be provided to connect the PCB board with pins of the hard disk connector 11, and the signal cable 12 may be connected to a PCB trace on the PCB board, where each PCB board may correspond to at least one hard disk connector 11.
In one possible implementation, a processor (not shown) may be provided on the motherboard 20. The Processor may include a central processing unit (Central Processing Unit, CPU), a digital signal Processor (DIGITAL SIGNAL Processor, DSP), etc., and the type of the Processor is not particularly limited by the present application. The signal cable 12 may be used to transmit PCIe signals (which may also be referred to as high speed differential signals) between the processor and the hard disk connector 11 for high speed interconnection.
To increase the signal transmission speed between the circuit board 10 and the main board 20, the signal cable 12 may include a high-speed signal line 121. Illustratively, the high speed signal line 121 may be used to transmit PCIe signals. In the prior art, a connector for connecting a cable is usually disposed on the circuit board 10, and considering that PCIe signal attenuation is caused by the connector, one end of the high-speed signal line 121 may be connected to a high-speed signal pin of the PCB trace, and the other end may be connected to a high-speed signal pin of the cable connector 21. Therefore, the quality of the transmission signal can be improved, the limit of the connector on the circuit board 10 to the backboard structure can be reduced, and the difficulty of changing the backboard structure and quantity is reduced.
In addition, the signal testing difficulty of the backboard is also reduced due to the reduction of connectors. The transmission distance of the signal cable 12 is prolonged, so that the transmission speed of PCIe signals can be increased, and the response speed of the whole system of the server can be increased.
In addition, by connecting the high-speed signal line 121 with the high-speed signal pin of the PCB trace, impedance control can also be performed by the PCB trace to reduce signal distortion caused by signal reflection.
In one possible implementation, the high-speed signal lines 121 may also be directly connected to corresponding high-speed signal pins of the hard disk connector 11 to reduce attenuation of the transmission signals by the PCB trace.
In some embodiments, the signal cable 12 may also include a low speed signal line. The low-speed signal line can be connected with a low-speed signal pin of the PCB wire and used for transmitting low-speed signals.
Each cable connector 21 may be connected to at least one hard disk connector 11 via a signal cable 12, the specific number of connections being related to the processing power main board design of the processor and the performance of the signal cable 12. That is, as the number of hard disk connectors 11 increases, the number of signal cables 12 and the number of cable connectors 21 may also increase in positive correlation. In actual operation, the number of the hard disk connectors 11 to which each signal cable 12 is connected may be set according to actual needs.
Through the above embodiment, the number of the signal cables 12 can be reduced, the wiring of the backboard is facilitated, and the space occupation of the signal cables 12 to the server can be reduced, so that the server has more heat dissipation air channels, and the heat dissipation efficiency is improved.
In some embodiments, the number of circuit boards 10 may also include multiple, thereby facilitating the manufacturer to reduce the cost of separate designs and testing while meeting customer requirements for different numbers of hard disks. Fig. 2 is a schematic structural diagram of a second back plate according to an embodiment of the present application, as shown in fig. 2, each circuit board 10 may be provided with a signal cable 12, and each signal cable 12 may be connected to two hard disk connectors 11. Specifically, the signal cable 12 may be a PCIe x8 cable, and in the case that the back board is a hard disk back board, the hard disk connector 11 may be used to plug in an NVMe hard disk. That is, each circuit board 10 corresponds to two hard disk connectors 11, and two NVMe hard disks can be plugged.
For example, a client needs to configure a server with four NVMe hard disks, and according to the backboard in the embodiment of the application, the client needs can be satisfied by configuring only two circuit boards 10, and the circuit boards capable of being plugged with four hard disks do not need to be produced again, so that not only can the production cost be reduced, but also the configuration efficiency can be improved. The plurality of circuit boards 10 may be fixed by a structural member or may be fixed by other means, and the present application is not particularly limited thereto.
In addition, the cable connector 21 is connected with the hard disk connector 11 through the signal cable 12, so that the number of NVME hard disks can be conveniently and flexibly configured, and the difficulty of structure adjustment can be reduced, so that the hard disks can be vertically and horizontally inserted, the mounting mode and number of the backboard can be conveniently changed by a manufacturer according to the actual use environment and the requirements of clients, the difficulty of backboard adaptation and signal testing is reduced, and the research and development period and cost of the backboard are reduced.
Fig. 3 is a schematic structural diagram of a third back panel according to an embodiment of the present application, as shown in fig. 3, the back panel in this embodiment is different from the back panel according to the foregoing embodiment mainly in that the signal cable 12 may further include a power cord 122, the power cord 122 is used for providing a power signal to the hard disk connector 11, one end of the power cord 122 is connected with the power connector 22 of the motherboard 20, and the other end is connected with a power pin of the PCB trace.
It should be understood that the signal transmission line of the back plane in the embodiment of the present application is not limited to the high-speed signal line 121 and the power line 122, and may include a clock signal line for transmitting a clock signal in the circuit board 10, for example, and the present application is not limited thereto.
The backboard provided by the embodiment of the application is applied to a server and comprises a circuit board, at least one hard disk connector and at least one signal cable, wherein the at least one hard disk connector and the at least one signal cable are arranged on the circuit board, the signal cable is used for transmitting PCIe signals, one end of the signal cable is connected with the at least one hard disk connector through a PCB (printed circuit board) wiring, and the other end of the signal cable is connected with the cable connector on a mainboard, so that the design flexibility of the number of hard disks to be configured can be improved, and the research and development period and the cost of the backboard are reduced.
Based on the same inventive concept, the embodiment of the present application further provides a hard disk back plate, and fig. 4 is a schematic structural diagram of the hard disk back plate provided in the embodiment of the present application, as shown in fig. 4, the hard disk back plate may include the back plate 110 and the hard disk 120 connected to the back plate 110 in the foregoing embodiment.
Since the hard disk back plate in the present embodiment includes the back plate in the foregoing embodiment, that is, the hard disk back plate in the present embodiment has all the technical features and technical effects of the foregoing embodiment of the back plate, reference is specifically made to the foregoing embodiment, and details are not repeated herein.
The embodiment of the present application further provides a server, and fig. 5 is a schematic structural diagram of the server provided in the embodiment of the present application, as shown in fig. 5, where the server includes the hard disk backplate 100 and the motherboard 20 connected with the hard disk backplate 100 described in the above embodiment.
Since the server in this embodiment includes the hard disk back plate in the foregoing embodiment, that is, the server in this embodiment has all the technical features and technical effects of the foregoing embodiment of the hard disk back plate, reference is specifically made to the foregoing embodiment, and details are not repeated herein.
The above disclosure is only a few examples of the present application, and it is not intended to limit the scope of the present application, but it is understood by those skilled in the art that all or a part of the above embodiments may be implemented and equivalent changes may be made in the claims of the present application.
It should be understood that in the description of the application and the claims that follow, the terms "comprising," "including," "having," and any variations thereof are intended to cover a non-exclusive inclusion, which is meant to be "including but not limited to," unless otherwise specifically emphasized.
In the description of the present application, "/" means that the related objects are in a "or" relationship, for example, a/B may represent a or B, and "and/or" in the present application means that the related objects are related in three relationships, for example, a and/or B may represent that a exists alone, while a and B exist alone, and that A, B may be singular or plural, unless otherwise stated.
Also, in the description of the present application, unless otherwise indicated, "a plurality" means two or more than two. "at least one of the following" or similar expressions thereof, means any combination of these items, including any combination of single or plural items.
In addition, in the description of the present application, it should be understood that the terms "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "vertical", "top", "bottom", "inner", "outer", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application.
In the present application, unless explicitly specified and defined otherwise, the terms "connected," "connected," and the like are to be construed broadly, and may be, for example, mechanically connected or electrically connected, may be directly connected or indirectly connected through an intermediary, may be in communication with each other between two elements or may be in an interaction relationship between two elements, and unless explicitly specified otherwise, it will be understood to those of ordinary skill in the art that the above terms are in the specific meaning of the present application as the case may be.
Furthermore, in the description of the present specification and the appended claims, the terms "first," "second," and the like are used to distinguish between similar objects, and are not necessarily used to describe a particular order or sequence, nor are they to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. It is to be understood that the data so used may be interchanged where appropriate, such that the embodiments described herein may be implemented in other sequences than those illustrated or otherwise described, and that the features defining "first" and "second" may be expressly or implicitly include at least one such feature.
In embodiments of the application, words such as "exemplary" or "such as" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "for example" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise.
It should be noted that the above embodiments are merely for illustrating the technical solution of the present application and not for limiting the same, and although the present application has been described in detail with reference to the above embodiments, it should be understood by those skilled in the art that the technical solution described in the above embodiments may be modified or some or all of the technical features may be equivalently replaced, and these modifications or substitutions do not make the essence of the corresponding technical solution deviate from the scope of the technical solution of the embodiments of the present application.

Claims (10)

1. The backboard is characterized by being applied to a server and comprising at least one circuit board, at least one hard disk connector and at least one signal cable, wherein the at least one hard disk connector and the at least one signal cable are arranged on each circuit board;
The signal cable is used for transmitting PCIe signals, one end of the signal cable is connected with at least one hard disk connector through a PCB wiring, and the other end of the signal cable is used for being connected with a cable connector on a main board.
2. The backplane of claim 1, wherein the signal cable comprises a high speed signal line for transmitting the PCIe signal, one end of the high speed signal line being connected to a high speed signal pin of the PCB trace and the other end being connected to a high speed signal pin of the cable connector.
3. The back panel of claim 2, wherein the signal cable further comprises a power cord for providing power to the hard disk connector, one end of the power cord being connected to the power connector of the motherboard and the other end being connected to the power pin of the PCB trace.
4. The back plate of claim 1, wherein the signal cable is soldered with the PCB trace.
5. The backplane of claim 1, wherein the signal cable is a PCIe x8 cable.
6. The backplane of claim 1, wherein each of the signal cables connects two hard disk connectors.
7. The back plate of claim 1, wherein a signal cable is disposed on the circuit board.
8. The back plate of any of claims 1-7, wherein the hard disk connector is configured to plug in an NVMe hard disk.
9. A hard disk back plate, comprising the back plate according to any one of claims 1 to 8 and a hard disk attached to the back plate.
10. A server, comprising the hard disk back plate according to claim 9 and a main board connected with the hard disk back plate.
CN202411491605.5A 2024-10-23 2024-10-23 Backplane, hard disk backplane and server Pending CN119486001A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202411491605.5A CN119486001A (en) 2024-10-23 2024-10-23 Backplane, hard disk backplane and server

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202411491605.5A CN119486001A (en) 2024-10-23 2024-10-23 Backplane, hard disk backplane and server

Publications (1)

Publication Number Publication Date
CN119486001A true CN119486001A (en) 2025-02-18

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202411491605.5A Pending CN119486001A (en) 2024-10-23 2024-10-23 Backplane, hard disk backplane and server

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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN120335566A (en) * 2025-06-20 2025-07-18 苏州元脑智能科技有限公司 Server device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN120335566A (en) * 2025-06-20 2025-07-18 苏州元脑智能科技有限公司 Server device

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