CN119486297B - Image sensor and preparation method thereof - Google Patents
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- CN119486297B CN119486297B CN202510045386.6A CN202510045386A CN119486297B CN 119486297 B CN119486297 B CN 119486297B CN 202510045386 A CN202510045386 A CN 202510045386A CN 119486297 B CN119486297 B CN 119486297B
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Abstract
The invention discloses an image sensor and a preparation method thereof, and belongs to the technical field of semiconductors. The image sensor comprises a substrate, a well region, a plurality of photoelectric sensing regions, a deep well region, a first doping region, a second doping region, a floating diffusion region, a transmission grid and a field plate structure, wherein the first surface and the second surface are oppositely arranged, the well region extends from the first surface to the substrate, the plurality of photoelectric sensing regions are arranged in the well region at intervals, the deep well region is arranged in the well region between two adjacent photoelectric sensing regions, the first doping region extends from the first surface to the well region, the second doping region is arranged around the first doping region, the floating diffusion region is arranged on one side of the photoelectric sensing region, the transmission grid is arranged on the first surface between the adjacent floating diffusion region and the photoelectric sensing region, and the field plate structure is arranged on the first surface between the two adjacent photoelectric sensing regions. The image sensor and the preparation method thereof provided by the invention can strengthen the isolation effect between adjacent pixel units and improve the imaging quality of the image sensor.
Description
Technical Field
The invention relates to the field of semiconductors, in particular to an image sensor and a preparation method thereof.
Background
The image sensor is an optical device which utilizes the photoelectric conversion principle to decompose the light image of a photosensitive area into a plurality of pixels and convert the pixels into corresponding electric signals, and is widely applied to mobile phone cameras, digital cameras, vehicle-mounted optical imaging systems and other electronic optical devices. The complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) image sensor is a typical solid imaging sensor, can be compatible with the CMOS process, and has the advantages of small volume, low power consumption, low price and the like. The CMOS image sensor is composed of a pixel array, a row/column driver, time sequence control logic, an AD converter, a digital interface and the like, wherein the pixel array is composed of a plurality of pixel units, and each pixel unit comprises a photodiode and a plurality of transistors.
In order to improve the mutual interference between the adjacent pixel units in the pixel array, an isolation structure needs to be arranged between the adjacent pixel units, and the isolation structure can be at least one of a shallow trench isolation structure, a backside deep trench isolation structure, a high doped well region and the like. Although the isolation effect of the shallow trench isolation structure is better than that of the high doped well region, the shallow trench isolation structure introduces dark current problem, so that the high doped well region still needs to be arranged between part of adjacent pixel units as the isolation structure. However, when the highly doped well region is used as an isolation structure, an image overflow phenomenon is easy to occur, so that white spots or white color blocks appear on an image, and the imaging quality of an image sensor is seriously affected. Therefore, how to optimize the structure of the highly doped well region and improve the image overflow phenomenon is a urgent problem to be solved.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide an image sensor and a method for manufacturing the same, which can enhance the isolation effect between adjacent pixel units, avoid the occurrence of image overflow phenomenon, and improve the imaging quality of the image sensor.
In order to solve the technical problems, the invention is realized by the following technical scheme.
The invention provides an image sensor, comprising at least:
a substrate including a first surface and a second surface disposed opposite each other;
A well region extending from the first surface into the substrate;
the photoelectric sensing areas are arranged in the well area at intervals;
The deep well region is arranged in the well region between two adjacent photoelectric sensing regions;
A first doped region extending from the first surface into the well region;
A second doped region disposed around the first doped region between the first surface and the deep well region;
A floating diffusion region arranged at one side of the photoelectric sensing region;
A transfer gate disposed on the first surface between the adjacent floating diffusion region and the photo-sensing region, and
The field plate structure is arranged on the first surface between two adjacent photoelectric sensing areas and covers the first doping area and the second doping area.
In an embodiment of the present invention, the second doped region extends from the first surface toward the direction in which the deep well region is located, and the second doped region is disposed in contact with an interface in the substrate and a side of the deep well region near the first surface.
In an embodiment of the present invention, an interface of the first doped region in the substrate is disposed on the deep well region, and a preset distance exists between the first doped region and the deep well region.
In an embodiment of the present invention, the first doped region, the second doped region and the deep well region share a same symmetry axis.
In an embodiment of the present invention, the well region, the deep well region and the second doped region are P-type doped regions, and the first doped region is an N-type doped region.
In an embodiment of the present invention, a doping concentration of the first doped region is greater than a doping concentration of the second doped region, the doping concentration of the second doped region is greater than a doping concentration of the deep well region, and the doping concentration of the deep well region is greater than the doping concentration of the well region.
In an embodiment of the invention, the image sensor further includes a pinning layer extending from the first surface into the photo-sensing region.
In an embodiment of the present invention, the pinning layer is a P-type doped region, and a doping concentration of the pinning layer is greater than a doping concentration of the second doped region.
In an embodiment of the present invention, a material of the field plate structure is the same as a material of the transmission gate.
The invention also provides a preparation method of the image sensor, which at least comprises the following steps:
providing a substrate, wherein the substrate comprises a first surface and a second surface which are oppositely arranged;
forming a well region within the substrate, the well region extending from the first surface into the substrate;
Forming a plurality of photoelectric sensing regions in the well region at intervals;
forming a deep well region in the well region between two adjacent photoelectric sensing regions;
forming a first doped region in the deep well region, the first doped region extending from the first surface into the deep well region;
Forming a second doped region around the first doped region;
forming a floating diffusion region at one side of the photoelectric sensing region;
forming a transfer gate on the first surface between the adjacent floating diffusion region and the photo-sensing region, and
A field plate structure is formed on the first surface between two adjacent photoelectric sensing regions, and the field plate structure covers the first doped region and the second doped region.
In summary, the present application provides an image sensor and a method for manufacturing the same, and by improving the structure of the image sensor, the unexpected technical effect of the present application is to improve the isolation effect between adjacent photoelectric sensing areas, avoid the image overflow phenomenon, and avoid the occurrence of white spots or white blocks in the image, thereby improving the imaging quality of the image sensor.
Of course, it is not necessary for any of the above described advantages to be achieved simultaneously in practicing any of the embodiments of the invention.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a top view of an image sensor according to an embodiment of the invention.
FIG. 2 is a schematic diagram of forming a well region in an embodiment.
FIG. 3 is a schematic diagram illustrating formation of a photo-sensing region in an embodiment.
FIG. 4 is a schematic diagram of forming a deep well region in an embodiment.
FIG. 5 is a schematic diagram illustrating formation of a first photoresist layer according to an embodiment.
FIG. 6 is a schematic diagram illustrating formation of a first doped region in an embodiment.
FIG. 7 is a schematic diagram of forming a second window in an embodiment.
FIG. 8 is a schematic diagram illustrating formation of a second doped region in an embodiment.
FIG. 9 is a schematic diagram illustrating formation of a second photoresist layer according to an embodiment.
FIG. 10 is a schematic diagram of forming a pinning layer in one embodiment.
Fig. 11 is a schematic diagram illustrating formation of a gate oxide layer and a gate material layer in an embodiment.
FIG. 12 is a schematic diagram illustrating formation of a third photoresist layer according to an embodiment.
FIG. 13 is a schematic diagram of forming a transfer gate and a field plate structure in one embodiment.
Fig. 14 is a schematic view of forming a sidewall in an embodiment.
FIG. 15 is a schematic diagram of forming a floating diffusion region in one embodiment.
FIG. 16 is a schematic diagram illustrating formation of a fourth photoresist layer according to another embodiment.
Fig. 17 is a schematic diagram illustrating formation of a second doped region in another embodiment.
FIG. 18 is a schematic diagram of forming a fifth photoresist layer according to another embodiment.
Fig. 19 is a schematic view illustrating formation of a first doped region in another embodiment.
Fig. 20 is a schematic representation of electron transitions between adjacent photo-sensing regions in a comparative example.
FIG. 21 is a schematic diagram of electron transitions between adjacent photo-sensing regions in an embodiment.
Description of the reference numerals:
11. Substrate, 111, first surface, 112, second surface, 12, well region, 13, photoelectric sensing region, 131, first photoelectric region, 132, second photoelectric region, 14, deep well region, 15, first doped region, 151, first photoresist layer, 152, first window, 153, second window, 16, second doped region, 17, floating diffusion region, 18, pinning layer, 181, second photoresist layer, 1811, first region, 1812, second region, 1813, third region, 19, gate oxide layer, 20, gate material layer, 21, transmission gate, 211, third photoresist layer, 2111, first subsection, 2112, second subsection, 22, field plate structure, 23, fourth photoresist layer, 231, third window, 24, fifth photoresist layer, 241, fourth window, 25, side wall, 251, first side wall, 252, second side wall, 253, third side wall.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict.
It should be understood that the present invention may be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
The technical solution of the present invention will be described in further detail below with reference to the embodiments and the accompanying drawings, and it is apparent that the described embodiments are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1 and 15, the present invention provides an image sensor, which includes, for example, a substrate 11, a well region 12, a photo-sensing region 13, a deep well region 14, a first doped region 15, a second doped region 16, a floating diffusion region 17, a transmission gate 21, a field plate structure 22, and the like. The substrate 11 includes a first surface 111 and a second surface 112 that are disposed opposite to each other, the well region 12 extends from the first surface 111 into the substrate 11, a plurality of photo sensing regions 13 are disposed in the well region 12 at intervals, a deep well region 14 is disposed in the well region 12 between two adjacent photo sensing regions 13, a first doped region 15 extends from the first surface 111 into the well region 12, a second doped region 16 is disposed between the first surface 111 and the deep well region 14 around the first doped region 15, a floating diffusion region 17 is disposed on one side of the photo sensing regions 13, a transmission gate 21 is disposed on the first surface 111 between two adjacent photo sensing regions 13 and the floating diffusion region 17, and a field plate structure 22 is disposed on the first surface 111 between two adjacent photo sensing regions 13 and covers the first doped region 15 and the second doped region 16. According to the image sensor provided by the invention, the first doped region 15 is arranged, a new potential well can be introduced into the second doped region 16, the field plate structure 22 is arranged to increase the potential barrier height of the second doped region 16, and overflowing electrons in the photoelectric sensing region 13 can be effectively prevented from being transferred into the adjacent photoelectric sensing region 13, so that the phenomenon of image overflowing is avoided, and the imaging quality of the image sensor is improved. The present invention also provides a method for manufacturing an image sensor, which is described by taking a cross-sectional view taken along A-A in fig. 1 as an example.
Referring to fig. 2, in an embodiment of the present invention, a substrate 11 includes a base (not shown) such as a P-type semiconductor, and an epitaxial layer (not shown) disposed on the base, wherein the epitaxial layer is doped P-type, and the thickness of the epitaxial layer is 2 μm-6 μm, 4 μm or 5 μm, for example. Wherein the substrate 11 includes a first surface 111 and a second surface 112 disposed opposite to each other, and the second surface 112 is a surface of the epitaxial layer. In this embodiment, the well region 12, the photo-sensing region 13, the deep well region 14, the first doped region 15, the second doped region 16, and the floating diffusion region 17, which are disposed later, are all disposed within the epitaxial layer.
Referring to fig. 2, in an embodiment of the present invention, first ions are implanted from the first surface 111 into the substrate 11 to form the well region 12. The well region 12 extends from the first surface 111 into the substrate 11, and the kind and concentration of the first ions may be selected according to practical situations. In this embodiment, the first ion is, for example, a P-type ion such as boron (B) or indium (In).
Referring to fig. 2 to 3, in an embodiment of the invention, after forming the well region 12, second ions are implanted into the well region 12 to form the photo-sensing region 13. The photo-sensing regions 13 are, for example, a plurality of photo-sensing regions 13, and the plurality of photo-sensing regions 13 are disposed in the well region 12 at intervals and extend in a direction in which the second surface 112 is located, a predetermined distance is kept between the top of the photo-sensing region 13 and the first surface 111, and a distance between the bottom of the photo-sensing region 13 and the second surface 112 is, for example, smaller than a distance between the bottom of the well region 12 and the second surface 112. In the present embodiment, the second ion and the first ion are different, for example, the second ion is an N-type ion such As phosphorus (P) or arsenic (As), for example, two photo-sensing regions 13 are illustrated, and the two photo-sensing regions 13 include a first photo-sensing region 131 and a second photo-sensing region 132, for example, and the first photo-sensing region 131 and the second photo-sensing region 132 each extend in a direction in which the second surface 112 is located. By providing the photo-sensing region 13, an optical signal received by the image sensor can be converted into an electrical signal.
Referring to fig. 3 to fig. 4, in an embodiment of the invention, after forming the photo-sensing regions 13, third ions are implanted into the well region 12 between two adjacent photo-sensing regions 13 to form the deep well region 14, the deep well region 14 extends from the inside of the well region 12 toward the direction of the second surface 112, and the distance between the bottom of the photo-sensing region 13 and the second surface 112 is smaller than, for example, the distance between the bottom of the deep well region 14 and the second surface 112, and the invention does not limit the height relationship between the top of the photo-sensing region 13 and the top of the deep well region 14, and the top of the photo-sensing region 13 may be flush with the top of the deep well region 14, may be lower than the top of the deep well region 14, or may be higher than the top of the deep well region 14. In this embodiment, the top of the photo-sensing region 13 is, for example, higher than the top of the deep well region 14, the third ion is, for example, a P-type ion such as B or In, and the doping concentration of the deep well region 14 is, for example, greater than the doping concentration of the well region 12. Specifically, the ratio of the doping concentration of the deep well region 14 to the doping concentration of the well region 12 is, for example, (1.05-1.3): 1, and is, for example, 1.3:1, 1.2:1, or 1.1:1. The deep well region 14 is provided to isolate adjacent photo-sensing regions 13.
Referring to fig. 4, after forming the deep well 14, a pre-cleaning process is performed on the substrate 11 to remove particles and a native oxide layer on the first surface 111. The invention is not limited to the pre-cleaning process, and can be selected according to practical situations.
Referring to fig. 4 to 9 and fig. 16 to 19, in an embodiment of the present invention, after the substrate 11 is pre-cleaned, the first doped region 15 and the second doped region 16 are formed. The forming sequence of the first doped region 15 and the second doped region 16 is not limited in the present invention, and may be selected according to practical needs.
Referring to fig. 4 to 9, in an embodiment of the invention, after the substrate 11 is pre-cleaned, for example, the first doped region 15 is formed and then the second doped region 16 is formed. Specifically, as shown in fig. 4 to 6, a photoresist layer is formed on the first surface 111, for example, the photoresist layer is patterned by exposing and developing the photoresist layer by an i-line light source machine, a first photoresist layer 151 is formed, a first window 152 is formed in the first photoresist layer 151, the first window 152 exposes a portion of the well region 12 on the deep well region 14, and then a fourth ion is implanted into the well region 12 exposed in the first window 152 by using the first photoresist layer 151 as a mask, so as to form the first doped region 15. The thickness of the first photoresist layer 151 is, for example, 0.5 μm to 1.5 μm, the width of the first window 152 is, for example, 0.1 μm to 0.2 μm, the fourth ions are, for example, P or As N-type ions, the first doped region 15 extends from the first surface 111 into the well region 12, the interface of the first doped region 15 in the substrate 11 is disposed in the well region 12 on the deep well region 14, a predetermined distance is kept between the interface and the top of the deep well region 14, the width of the first doped region 15 is smaller than the width of the deep well region 14, and the first doped region 15 and the deep well region 14 share the same symmetry axis.
Referring to fig. 6 to 8, in an embodiment of the invention, after forming the first doped region 15, modifying and etching the first photoresist layer 151, for example, bombarding a portion of the first photoresist layer 151 with a high-angle plasma, removing a portion of the first photoresist layer 151 at two sides of the first window 152, expanding the width of the first window 152, forming a second window 153, exposing the well region 12 at two sides of the first doped region 15 by the second window 153, then implanting fifth ions into the well region 12 exposed by the second window 153 with the modified first photoresist layer 151 as a mask, forming a second doped region 16, and then removing the first photoresist layer 151 by, for example, plasma bombardment and wet etching. The width of the second window 153 is, for example, 0.2 μm to 0.5 μm, the number of times of implantation of the fifth ion is, for example, multiple times, the implantation dose of the fifth ion is, for example, larger than the implantation dose of the fourth ion, the second doped region 16 is disposed on the deep well region 14 around the first doped region 15 by multiple times of ion implantation and ion diffusion, and extends from the first surface 111 toward the direction of the deep well region 14, and the interface of the second doped region 16 in the substrate 11 is disposed in contact with the top of the deep well region 14 to enhance the isolation effect between the two adjacent photo-sensing regions 13, the second doped region 16, the first doped region 15 and the deep well region 14 share the same symmetry axis, and the width of the second doped region 16 is, for example, larger than the width of the first doped region 15, for example, larger than or equal to the width of the deep well region 14. In this embodiment, the width of the second doped region 16 is, for example, equal to the width of the deep well region 14, the first doped region 15 and the deep well region 14 are separated by the second doped region 16, the fifth ion is, for example, a P-type ion such as B or In, the doping concentration of the second doped region 16 is, for example, greater than the doping concentration of the deep well region 14, and the doping concentration of the second doped region 16 is, for example, less than the doping concentration of the first doped region 15. Specifically, the ratio of the doping concentration of the second doped region 16 to the doping concentration of the deep well region 14 is, for example, (1.05-1.2): 1, for example, 1.2:1 or 1.1:1, etc., and the ratio of the doping concentration of the second doped region 16 to the doping concentration of the first doped region 15 is, for example, (0.2-0.7): 1, for example, 0.5:1 or 0.7:1, etc. In this embodiment, the first photoresist layer 151 is used as a mask in the process of forming the first doped region 15 and the second doped region 16, so that the manufacturing process can be simplified, and the manufacturing cost can be saved.
Referring to fig. 8 to 10, after forming the second doped region 16, a second photoresist layer 181 is formed on the first surface 111, the second photoresist layer 181 includes a first region 1811, a second region 1812, and a third region 1813, where the first region 1811 covers a portion of the well region 12 on a side of the first photoelectric region 131 away from the second photoelectric region 132, the second region 1812 covers the first doped region 15 and the second doped region 16, the third region 1813 covers a portion of the well region 12 on a side of the second photoelectric region 132 away from the first photoelectric region 131, and sixth ions are implanted into the exposed well region 12 with the second photoresist layer 181 as a mask, so as to form the pinning layer 18. The pinning layer 18 extends from the first surface 111 into the photo-sensing region 13, and the width of the pinning layer 18 is greater than the width of the photo-sensing region 13, the pinning layer 18 is located In the photo-sensing region 13 at the interface of the substrate 11, the sixth ion is a P-type ion such as B or In, and the doping concentration of the pinning layer 18 is greater than the doping concentration of the second doping region 16. Specifically, the ratio of the doping concentration of the pinning layer 18 to the doping concentration of the second doped region 16 is, for example, (1.5-2.5): 1, and is, for example, 1.8:1 or 2:1, and the doping concentration of the pinning layer 18 is, for example, 1×10 12atmos/cm3-2×1012atmos/cm3. By providing the pinning layer 18, dark current generated by defects on the surface layer of the photo-sensing region 13 is isolated.
Referring to fig. 10, in an embodiment of the present invention, after the pinning layer 18 is formed, the second photoresist layer 181 is removed, for example, by wet etching, then the first surface 111 is cleaned, for example, by RCA cleaning, then various organic or inorganic particles on the first surface 111 are removed, for example, by a furnace pre-cleaning process, and then various types of implanted dopant ions are activated, for example, by a Rapid Thermal Processing (RTP) process, so as to form the above structure. The temperature of the RTP process is 1000-1100 ℃, 1050 or 1030, for example, and the time of the RTP process is 20-30 s, 24s or 26s, for example.
Referring to fig. 10 to 11, in an embodiment of the present invention, after activating the doping ions, a gate oxide layer 19 is formed on the first surface 111. The gate oxide layer 19 is formed, for example, by a thermal oxidation method, an in-situ vapor growth method, a chemical vapor deposition method, or the like, and the material of the gate oxide layer 19 is, for example, silicon oxide, for example, silicon dioxide or silicon oxynitride, and the thickness of the gate oxide layer 19 may be set according to practical situations. In this embodiment, the thickness of the gate oxide layer 19 is, for example, 70 a-100 a.
Referring to fig. 11, in an embodiment of the present invention, after forming the gate oxide layer 19, a gate material layer 20 is formed on the gate oxide layer 19. The gate material layer 20 is formed by, for example, chemical vapor deposition, physical vapor deposition, electroplating, atomic layer deposition, etc., and the thickness of the gate material layer 20 may be set according to practical situations, and the material of the gate material layer 20 includes, for example, polysilicon, etc. In the present embodiment, the thickness of the gate material layer 20 is, for example, 200nm to 250nm.
Referring to fig. 11 to 13, after forming the gate material layer 20, a third photoresist layer 211 is formed on the gate material layer 20, the third photoresist layer 211 includes a first portion 2111 and a second portion 2112, the first portion 2111 covers a portion of the gate material layer 20 on a side of the first photo-electric region 131 away from the deep well region 14, and a portion of the gate material layer 20 on a side of the second photo-electric region 132 away from the deep well region 14, the second portion 2112 covers the gate material layer 20 between two adjacent photo-sensing regions 13, and then the exposed gate oxide layer 19 and the gate material layer 20 are etched with the third photoresist layer 211 as a mask to form a transmission gate 21 and a field plate structure 22. The transmission gate 21 is located on the substrate 11 at a side of the photo-sensing region 13 away from the deep well region 14, the field plate structure 22 is located on the substrate 11 between two adjacent photo-sensing regions 13, and the field plate structure 22 is located on the substrate 11 of the first doped region 15 and the second doped region 16.
Referring to fig. 13 to 14, after forming the transmission gate 21 and the field plate structure 22, a gate sidewall process is used to form a sidewall 25 on the first surface 111 at both sides of the transmission gate 21 and the field plate structure 22, and the material of the sidewall 25 includes, for example, silicon oxide, silicon nitride or a stack of silicon oxide and silicon nitride. In this embodiment, the spacers 25 include, for example, a first spacer 251, a second spacer 252, and a third spacer 253, where the first spacer 251 is, for example, disposed on the first surface 111 on both sides of the transmission gate 21 and the field plate structure 22, the first spacer 251 is, for example, silicon oxide, the first spacer 251 is, for example, 30 a-70 a thick, the second spacer 252 is, for example, disposed on the first spacer 251 and is spaced apart from the transmission gate 21 or the field plate structure 22 by a predetermined distance, the top of the second spacer 252 is aligned with the top of the transmission gate 21, the second spacer 252 is, for example, silicon nitride, the second spacer 252 is, for example, 150 a-200 a thick, the third spacer 253 is, for example, disposed between the second spacer 252 and the transmission gate 21, and between the second spacer 252 and the field plate structure 22, the third spacer 253 is, for example, silicon oxide, and the third spacer 253 is, for example, 500 a-600 a thick. By providing the side wall 25, the image sensor is prevented from generating a leakage phenomenon.
Referring to fig. 15, after forming the sidewall 25, seventh ions are implanted into the well region 12 on the side of the transfer gate 21 away from the photo-sensing region 13 by a source/drain implantation process to form the floating diffusion region 17. The floating diffusion region 17 extends from the first surface 111 into the well region 12, and the transmission gate 21 is located on the first surface 111 between the floating diffusion region 17 and the photo-sensing region 13, where parameters such as the width and depth of the floating diffusion region 17, and the type and concentration of the seventh ion may be selected according to practical situations. In this embodiment, the seventh ion is different from the first ion, for example, the first ion is an N-type ion such As P or As.
Referring to fig. 15, in an embodiment of the present invention, after forming the floating diffusion region 17, the following interlayer dielectric, contact hole, metal interconnection layer and other processes may be performed, which will not be described herein.
Referring to fig. 4 and fig. 16 to 19, in another embodiment of the present invention, after the substrate 11 is pre-cleaned, for example, the second doped region 16 is formed and then the first doped region 15 is formed. Specifically, as shown in fig. 16 to 17, a fourth photoresist layer 23 is formed on the first surface 111, a third window 231 is formed in the fourth photoresist layer 23, the third window 231 exposes the well region 12 on the deep well region 14, then fifth ions are implanted into the well region 12 exposed by the third window 231 with the fourth photoresist layer 23 as a mask, so as to form a second doped region 16, and then the fourth photoresist layer 23 is removed. The thickness of the fourth photoresist layer 23 is, for example, 0.5 μm to 1.5 μm, the width of the third window 231 is, for example, 0.2 μm to 0.5 μm, the second doped region 16 is located in the well region 12 on the deep well region 14, the second doped region 16 is disposed at the interface in the substrate 11 and in contact with the top of the deep well region 14, the width of the second doped region 16 is equal to the width of the deep well region 14, and the second doped region 16 and the deep well region 14 share the same symmetry axis.
Referring to fig. 15 and fig. 17 to fig. 19, in another embodiment of the invention, after forming the second doped region 16, a pre-cleaning process is performed on the first surface 111 to remove particles and a native oxide layer on the first surface 111, then a fifth photoresist layer 24 is formed on the first surface 111, a fourth window 241 is formed in the fifth photoresist layer 24, a portion of the second doped region 16 is exposed in the fourth window 241, then a fourth ion is implanted into the second doped region 16 exposed in the fourth window 241 by using the fifth photoresist layer 24 as a mask, so as to form a first doped region 15, and then the fifth photoresist layer 24 is removed. The thickness of the fifth photoresist layer 24 is, for example, 0.5 μm to 1.5 μm, the width of the fourth window 241 is, for example, 0.1 μm to 0.2 μm, the first doped region 15 extends from the first surface 111 into the second doped region 16, the first doped region 15 and the deep well region 14 are separated by the second doped region 16, the width of the first doped region 15 is, for example, smaller than the width of the deep well region 14, and the first doped region 15, the second doped region 16 and the deep well region 14 share the same symmetry axis.
Referring to fig. 15 and 19, in another embodiment of the present invention, after forming the first doped region 15, the pinning layer 18, the gate oxide layer 19, the gate material layer 20, the transmission gate 21, the field plate structure 22, the sidewall 25 and the floating diffusion region 17 are further formed, and the specific forming method is the same as that of the previous embodiment and will not be described herein.
Referring to fig. 15, 20 and 21, in an embodiment of the present application, the first doped region 15 is connected to a high potential, for example, and the field plate structure 22 is connected to a low potential, for example. In the present embodiment, the potential of the first doped region 15 is, for example, the power voltage (V dd), and the potential of the field plate structure 22 is, for example, -V dd. Specifically, as shown in fig. 20, if the first doped region 15 and the field plate structure 22 are not disposed in the image sensor, when the image sensor is exposed strongly, as electrons in the second photoelectric region 132 (the second PD) accumulate to reach the full well, the redundant electrons cross the potential barrier Φ1 of the second doped region 16 (PPW) to reach the first photoelectric region 131 (the first PD), and interfere with the first photoelectric region 131, so that white spots or white blocks appear in the image, and an image overflow phenomenon occurs, which affects the imaging quality of the image sensor. Referring to fig. 15, 20 and 21, in the present application, a new electric field is introduced by disposing the field plate structure 22 on the second doped region 16, when the field plate structure 22 is connected to a low potential, the barrier height of the second doped region 16 is pulled up from Φ1 to Φ2, and the number of electrons transitioning from the second photoelectric region 132 to the first photoelectric region 131 is reduced, so that the image overflow phenomenon is alleviated. In addition, in the present application, by disposing the first doped region 15 (HD) in the second doped region 16, when the first doped region 15 is connected to a high potential, the first doped region 15 forms a new potential well, and when electrons in the second photoelectric region 132 cross the potential barrier of the second doped region 16 and fall into the new potential well formed by the first doped region 15, the potential well formed by the first doped region 15 collects electrons overflowed from the second photoelectric region 132 and is extracted by an external voltage, so that the difficulty of the electrons in transition between the first photoelectric region 131 and the second photoelectric region 132 is increased, thereby effectively improving the image overflow phenomenon and improving the imaging quality of the image sensor.
In summary, the present application provides an image sensor and a method for manufacturing the same, which have the unexpected technical effects of enhancing the isolation effect between adjacent photo-sensing regions and avoiding the occurrence of image overflow phenomenon by forming a first doped region, a second doped region and a field plate structure, thereby improving the imaging quality of the image sensor.
The embodiments of the invention disclosed above are intended only to help illustrate the invention. The examples are not intended to be exhaustive or to limit the invention to the precise forms disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best understand and utilize the invention. The invention is limited only by the claims and the full scope and equivalents thereof.
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| CN116802813A (en) * | 2021-02-18 | 2023-09-22 | 索尼半导体解决方案公司 | Solid-state camera devices and electronic equipment |
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| JP2011114302A (en) * | 2009-11-30 | 2011-06-09 | Sony Corp | Method of manufacturing semiconductor device, semiconductor device, solid-state imaging device, and solid-state imaging apparatus |
| KR102009931B1 (en) * | 2012-07-06 | 2019-08-13 | 에스케이하이닉스 주식회사 | Cmos image sensor and method for fabricating the same |
| CN103855177B (en) * | 2014-03-11 | 2016-08-24 | 格科微电子(上海)有限公司 | Imageing sensor |
| CN109950265A (en) * | 2019-03-25 | 2019-06-28 | 德淮半导体有限公司 | Imaging sensor and its manufacturing method, control method |
| CN112530986B (en) * | 2020-12-04 | 2024-08-09 | 上海韦尔半导体股份有限公司 | Image sensor pixel structure capable of reducing dark current and electrical crosstalk |
| US12262563B2 (en) * | 2022-03-22 | 2025-03-25 | Omnivision Technologies, Inc. | Pixel cell having anti-blooming structure and image sensor |
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| CN116802813A (en) * | 2021-02-18 | 2023-09-22 | 索尼半导体解决方案公司 | Solid-state camera devices and electronic equipment |
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