CN119480865A - MIP chip structure and process method thereof, and display device - Google Patents
MIP chip structure and process method thereof, and display device Download PDFInfo
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- CN119480865A CN119480865A CN202310968586.XA CN202310968586A CN119480865A CN 119480865 A CN119480865 A CN 119480865A CN 202310968586 A CN202310968586 A CN 202310968586A CN 119480865 A CN119480865 A CN 119480865A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10H20/00
- H01L25/0756—Stacked arrangements of devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
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Abstract
The invention relates to the technical field of LEDs, in particular to a MIP chip structure and a process method thereof, and a display device, comprising the steps of providing a substrate, coating photoresist on the whole substrate, and forming a metal wiring pattern by means of exposure, development and etching by a mask plate; the method comprises the steps of forming a metal wiring pattern, removing photoresist, forming a metal wiring after removing photoresist, bonding chips with the same emergent ray to the metal wiring pattern, coating a flat glue layer on the whole layer after the chip bonding is completed, and packaging the chips, repeating the steps for three times, manufacturing the metal wiring pattern, forming the metal wiring pattern, bonding the chips with the same emergent ray, coating the flat glue layer, forming three layers of metal wiring patterns which are vertically spaced at a certain distance and are connected together at one end, wherein each layer of metal wiring bonding is connected with the chips with the same emergent ray, and the chips with different emergent rays are vertically laminated, so that the overall size of the chips is effectively reduced, and the MIP chip structure with smaller size is realized.
Description
Technical Field
The invention relates to the technical field of LEDs, in particular to a MIP chip structure, a process method thereof and a display device.
Background
The LED direct display technology is a trend of entering micro LEDs. The LED crystal size required by the micro-spacing LED direct display product is smaller and smaller, and with the improvement of the LED technology, the screen brightness requirement can be met by using smaller LED crystal particles, so that the cost can be greatly reduced. However, at present, micro commercial use has many problems, namely, the problem of MicroLED of yield, the problem of MicroLED of uneven wavelength, the problem of MicroLED full color, and the problem of MicroLED of urgent need. The proposal of MIP technology can effectively solve the problems. MIP is the integration of MicroLED on a substrate, with bond pad packaging being routed through metal so that MicroLED can be applied to the product. But the major dimensions of MIP are between RGB MiniLED and RGB MicroLED directly applied dimensions due to the wire-bonding etc. process. How to reduce the size of the MIP is a problem that needs to be solved to promote MicroLED application scene expansion at present.
Disclosure of Invention
The invention aims to provide an MIP chip structure, a process method thereof and a display device, so as to reduce the size of the MIP chip.
In order to achieve the above object, the technical scheme adopted by the embodiment of the invention is as follows:
In a first aspect, an embodiment of the present invention provides an MIP chip structure, where the MIP chip structure includes a substrate, a metal wiring, where the metal wiring is disposed on the substrate, the metal wiring includes a first metal wiring, a second metal wiring, and a third metal wiring, the first metal wiring, the second metal wiring, and the third metal wiring are disposed at a certain distance from each other in a vertical direction, and one end of each of the first metal wiring, the second metal wiring, and the third metal wiring is connected together, and a plurality of chips with different light rays, where the chips with the same light ray are respectively bonded and connected to the first metal wiring, the second metal wiring, and the third metal wiring.
The embodiment of the invention also provides a process method of the MIP chip structure, which comprises the steps of providing a substrate, coating photoresist on the whole substrate and etching a metal wiring pattern, evaporating a layer of metal, removing the photoresist to form metal wiring, bonding a plurality of chips with the same emergent ray to the metal wiring, repeating the steps to respectively form three layers of metal wiring which are vertically spaced by a certain distance and are connected together at one end, and bonding the chips with different emergent rays at each layer of metal wiring.
In a third aspect, an embodiment of the present invention further provides a display device, where the display device includes the MIP chip structure described above.
A MIP chip structure and its process method and display device are provided by the embodiment of the invention, firstly, a substrate is provided, then a whole plate is coated with photoresist, a metal wiring pattern is formed by means of exposure, development and etching, a layer of metal is evaporated on the metal wiring pattern, a metal wiring can be formed after the photoresist is removed, a chip of the same emergent ray is bonded and connected with the metal wiring, a flat glue layer is coated on the whole layer after the chip bonding is completed, the chip packaging is completed, the steps are repeated for three times, a metal wiring pattern, a chip of the emergent ray is formed, a flat glue layer is coated, three layers of metal wiring which are vertically spaced at a certain distance and are connected together at one end are formed, each layer of metal wiring is bonded and connected with the chip of the same emergent ray, and the chip of different emergent rays is vertically laminated, so that the whole size of the chip is effectively reduced, and the MIP chip structure with smaller size is realized.
In order to make the above objects, features and advantages of the present invention more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a process method of an MIP chip structure according to an embodiment of the present invention.
Fig. 2 shows a schematic structural diagram of a substrate according to an embodiment of the present invention.
Fig. 3 shows a schematic diagram of forming a metal trace pattern according to an embodiment of the present invention.
Fig. 4 shows a schematic diagram of forming a first metal wiring according to an embodiment of the present invention.
Fig. 5 shows a schematic diagram of R chip bonding according to an embodiment of the present invention.
Fig. 6 illustrates a schematic diagram of forming a planar glue layer according to an embodiment of the present invention.
Fig. 7 shows a schematic diagram of forming a second metal wiring according to an embodiment of the present invention.
Fig. 8 shows a G-chip bonding schematic diagram according to an embodiment of the present invention.
Fig. 9 shows a schematic diagram of forming a flat glue layer according to an embodiment of the invention.
Fig. 10 shows a schematic diagram of formation of a blue light absorbing film according to an embodiment of the present invention.
Fig. 11 shows a third metal wiring forming schematic diagram provided by an embodiment of the present invention.
Fig. 12 shows a schematic diagram of B-chip bonding according to an embodiment of the present invention.
Fig. 13 shows an RGB chip arrangement schematic diagram according to an embodiment of the present invention.
Fig. 14 shows a schematic diagram of a metal wiring arrangement provided in an embodiment of the present invention.
Fig. 15 shows another metal wiring arrangement mode according to the embodiment of the present invention.
Fig. 16 shows a schematic structural diagram of a MIP chip structure according to an embodiment of the present invention.
The diagram is:
300-MIP chip structure, 310-substrate, 320-first metal wiring, 330-second metal wiring, 340-third metal wiring, 350-chips with different emergent rays, 360-flat glue layer and 370-blue light absorption film.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present invention.
It should be noted that like reference numerals and letters refer to like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, in the description of the present invention, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.
The MIP (MicroLED IN PACKAGE) is a structure in which R (red light), G (green light) and B (blue light) with the single size of less than 50um are packaged together, namely, the MIP structure is a structure obtained by selecting three MicroLED chips with the colors of red, green and blue respectively and packaging the three MicroLED chips (a plurality of chips can be packaged, and the MIP structure is not limited to 3 chips). Because the size of a single MicroLED chip is too small, the realization difficulty is great no matter the chip is transferred to the driving backboard through Van der Waals force or the laser is directly transferred to the driving backboard, but compared with miniLED, microLED has better light emitting performance and effect, and in order to improve the transfer yield, the current state of the art is attached, so that after a plurality of MicroLED chips are packaged to form an MIP structure, the chips are adsorbed or adhered and transferred through transfer equipment, thereby not only ensuring the good light efficiency performance of MicroLED, but also improving the transfer efficiency.
The following describes in detail the implementation procedure of the process method of the MIP chip structure with reference to fig. 1:
S110, providing a substrate.
As shown in fig. 2, a substrate 310 is provided, and the substrate 310 may be a sapphire substrate, a silicon substrate, a semiconductor material substrate, a glass substrate, or other carrier substrate, and further, the material of the sapphire substrate includes Al 2O3.
S120, coating photoresist on the whole substrate and etching out a metal wiring pattern.
As shown in fig. 3, photoresist is coated on the substrate 310 entirely by means of photoresist uniformity, and it should be noted that the photoresist includes positive photoresist and negative photoresist, the illuminated portion of the positive photoresist may be removed by the solution, and the non-illuminated portion of the negative photoresist may be removed by the solution. And then placing a mask plate above the substrate, and removing the photoresist of the part to be removed by means of exposure, development and solution removal to obtain a metal wiring pattern, wherein the metal wiring pattern is the pattern formed by the photoresist of the reserved part.
S130, evaporating a layer of metal, and removing the photoresist to form a first metal wiring.
As shown in fig. 4, a metal layer is deposited on the whole surface of the photoresist in the remaining portion, the deposited metal is uniformly distributed along the metal trace pattern, and after the deposition, all the photoresist is removed by solution removal, or all the photoresist is removed by laser lift-off, so that the first metal wiring 320 can be formed on the substrate. Further, the first metal wiring 320 includes a first N-type electrode and a first P-type electrode, which are disposed alternately and are not electrically connected to each other.
And S140, bonding and connecting the chips with the same emergent ray on the first metal wiring.
It should be noted that, in the embodiment of the present invention, after wafers (wafers) are formed into extensions and cut to form a plurality of chips, the wafers are directly bonded to a substrate in a transfer manner, so that on one hand, the transfer efficiency is improved, and on the other hand, the single-transfer chips have consistent colors.
As shown in fig. 5, in the embodiment of the present invention, the whole surface of the wafer with the whole red (R) chip is bonded to the first metal wiring, that is, two electrodes of the red chip are respectively bonded to the first N-type electrode and the first P-type electrode of the first metal wiring, and after bonding, the wafer substrate is peeled off through the whole laser surface.
It should be noted that the structure shown in fig. 5 is only an example and not a limitation. For example, light emitting chips of other light emitting colors, such as blue light chips, may be bonded to the first metal wire.
S150, coating a layer of flat glue layer, wherein the flat glue layer wraps the chip covering the same emergent ray.
As shown in fig. 6, after the bonding of the red light chip is completed, a layer of flat glue layer 360 is coated on the whole layer in a glue homogenizing manner, the red light chip is wrapped by the flat glue layer 360, and the thickness of the flat glue layer 360 is 2-5um higher than the outer surface of the red light chip. The arrangement of the flat adhesive layer can protect the red light chip, prevent the red light chip from being displaced or scratched, and ensure the upper surface of the whole layer of red light chip to be flattened so as to facilitate the manufacture of the next layer of process.
And S160, continuously coating photoresist on the whole plate on the flat adhesive layer, etching a metal wiring pattern, evaporating a layer of metal, and removing the photoresist to form a second metal wiring.
As shown in fig. 7, photoresist is continuously coated on the cured flat glue layer 360, and the glue removal is performed in the manner as described in S120 to obtain a metal trace pattern. At the same time, the flat glue layer 360 is etched to expose a portion of the first metal wiring 320. Further, a metal layer is deposited on the whole surface, the deposited metal is uniformly distributed along the metal trace pattern and the openings, after the deposition, all the photoresist is dissolved and removed by a solution removing method, or all the photoresist is removed by a laser stripping method, so that a second metal wiring 330 is formed on the substrate, and the second metal wiring 330 is connected with the first metal wiring 320 through at least one end of the metal deposited in the openings. Further, the second metal wiring 330 includes a second N-type electrode and a second P-type electrode, which are disposed alternately and are not electrically connected to each other. Further, the connection of the second metal wire 330 to the first metal wire 320 through at least one end of the metal deposited in the opening may be that the second N-type electrode of the second metal wire 330 is connected to the first N-type electrode of the first metal wire 320 or that the second P-type electrode of the second metal wire 330 is connected to the first P-type electrode of the first metal wire 320.
S170, bonding and connecting another chip with the same emergent light to the second metal wiring.
As shown in fig. 8, a wafer carrying a full-plate green (G) chip is bonded to the second metal wiring 330, that is, two electrodes of the green chip are respectively bonded to the second N-type electrode and the second P-type electrode of the second metal wiring 330, and after bonding, the wafer substrate is peeled off through the whole laser surface.
It should be noted that the structure shown in fig. 8 is only an example and not a limitation. For example, light emitting chips of other light emitting colors, such as blue chips or red chips, may be bonded to the second metal wiring 330.
S180, coating a layer of flat glue layer, wherein the flat glue layer wraps and covers another chip with the same emergent ray.
As shown in fig. 9, after the green light chip is bonded, a layer of flat glue layer 360 is coated on the whole layer by way of glue homogenizing, the green light chip is wrapped by the flat glue layer 360, and the thickness of the flat glue layer 360 is 2-5um higher than the outer surface of the green light chip. The arrangement of the flat adhesive layer 360 can protect the green light chip, prevent the green light chip from being displaced or scratched, and ensure the upper surface of the whole green light chip to be flattened so as to facilitate the manufacture of the next layer of process.
And S190, continuing to form a blue light absorption film on the flat glue layer.
As shown in fig. 10, a blue light absorbing film 370 is continuously formed on the cured flat adhesive layer 360 wrapping the green light chip by spin coating. It should be noted that the wavelength range of red light is 622-760 nm, the wavelength range of green light is 492-577 nm, the wavelength range of blue light is 435-450 nm, it is visible that blue light is short wavelength, red light and green light are long wavelength, the blue light of short wavelength easily excites the green light chip or red light chip to emit light, otherwise, the red light chip or the red light chip emits red light or green light is long wavelength, and the blue light chip is not easily excited to emit light. Since the process is repeated after the green light chip is bonded, and the blue light chip is bonded continuously, in order to avoid that the light emitted downwards falsely triggers the green light chip or the red light chip to emit light when the blue light chip emits light, and the display effect is affected, a blue light absorbing film 370 is formed on the flat adhesive layer 360 wrapping the green light chip before the metal wiring bonding the blue light chip is formed, so that the light emitted downwards is absorbed when the blue light chip emits light, and the light emitted by the green light chip or the red light chip is prevented from falsely triggering.
And S200, continuously coating photoresist on the whole blue light absorption film, etching a metal wiring pattern, evaporating a layer of metal, and removing the photoresist to form a third metal wiring.
As shown in fig. 11, photoresist is continuously coated on the cured blue light absorbing film 370, and photoresist removal is performed as described in S120 to obtain a metal trace pattern. At the same time, the blue light absorbing film 370 and the flat glue layer 360 surrounding the green light chip are etched to expose a portion of the second metal wiring 330. Further, a metal layer is deposited on the entire surface, the deposited metal is uniformly distributed along the metal trace pattern and the openings, and after the deposition, all the photoresist is dissolved and removed by a solution removing method or all the photoresist is removed by a laser lift-off method, so that a third metal wiring 340 is formed on the substrate, and the third metal wiring 340 is connected to the second metal wiring 330 through at least one end of the metal deposited in the openings. Further, the third metal wiring 340 includes a third N-type electrode and a third P-type electrode, which are disposed alternately, and are not electrically connected to each other. Further, the third metal wiring 340 is connected to the second metal wiring 330 through at least one end of the metal deposited in the opening, which may be that the third N-type electrode of the third metal wiring 340 is connected to the second N-type electrode of the second metal wiring 330 or that the third P-type electrode of the third metal wiring 340 is connected to the second P-type electrode of the second metal wiring 330. The first metal wiring 320, the second metal wiring 330, and the third metal wiring 340 are connected together to form a common N-electrode connection, or the first P-electrode, the second P-electrode, and the third P-electrode connection.
S210, bonding and connecting another chip with the same emergent light to the third metal wiring.
As shown in fig. 12, a wafer carrying a full-plate blue light (B) chip is bonded to a third metal wiring 340, that is, two electrodes of the blue light chip are bonded to a third N-type electrode and a third P-type electrode of the third metal wiring 340, respectively, and after bonding, the wafer substrate is peeled off by laser whole surface.
Note that the structure shown in fig. 12 is merely an example, and is not limited thereto. For example, light emitting chips of other light emitting colors, such as green light chips or red light chips, may be bonded to the third metal wiring 340.
In the embodiment of the present invention, the MIP structure formed by packaging the chips with three different colors of RGB is given as an example, and it is easy to understand that the MIP structure may also be configured not to be limited to three chips, but to three colors according to actual requirements, for example, the MIP structure may be configured as RGBW (red, green, blue, white), or the like. Furthermore, the MIP chip structure provided by the embodiment of the invention is manufactured by adopting a lamination process, and RGB is subjected to superposition design in the vertical direction, so that the MIP chip structure can be reduced to below 200um, and the MIP chip structure can be used for manufacturing a display screen with smaller space.
In addition, in the MIP chip structure, the RGB chips may be arranged in a staggered manner in the vertical direction (as shown in fig. 12), or may be located on the same straight line in the vertical direction (as shown in fig. 13), and the arrangement manner in the vertical direction may be adjusted according to the actual requirement.
Further, in the embodiment of the invention, there are various arrangements of the first metal wiring 320, the second metal wiring 330 and the third metal wiring 340, one is shown in fig. 14, the P-type electrodes of the first metal wiring 320, the second metal wiring 330 and the third metal wiring 340 are respectively arranged at each corner position on the substrate, the N-type electrodes are respectively arranged as common electrodes, the RGB chip is respectively arranged at one corner position on the substrate and is correspondingly bonded to the P-type electrodes and the N-type electrodes of the first metal wiring 320, the second metal wiring 330 and the third metal wiring 340, the other is shown in fig. 15, the P-type electrodes of the first metal wiring 320, the second metal wiring 330 and the third metal wiring 340 are all positioned on the same side and on the same vertical line, the N-type electrodes are respectively arranged at the other side opposite to the P-type electrodes, and the RGB chip is correspondingly bonded to the first metal wiring 320, the second metal wiring 330 and the third metal wiring 340 between the P-type electrodes and the N-type electrodes. In the embodiment of the present invention, the common N-type electrode is taken as an example, the first metal wiring 320, the second metal wiring 330 and the third metal wiring 340 may be disposed as common P-type electrodes, and the specific arrangement manner is not limited to the above two examples, and other common N-type electrodes or common P-type electrodes may be disposed.
Fig. 16 is a schematic diagram of a MIP chip structure 300 according to an embodiment of the present invention. The MIP chip structure 300 includes:
The substrate 310 may be a sapphire substrate, or a silicon substrate, a semiconductor material substrate, a glass substrate, or other carrier substrate, and when the substrate is a sapphire substrate, the material thereof includes Al 2O3.
The metal wiring comprises a first metal wiring 320, a second metal wiring 330 and a third metal wiring 340, wherein the first metal wiring 320, the second metal wiring 330 and the third metal wiring 340 are positioned in the vertical direction and are spaced apart from each other by a certain distance, and a space formed by a certain distance is used for accommodating chips which are bonded after each layer of metal wiring is formed and correspond to emergent rays, and a flat glue layer for wrapping the chips. The first metal wiring 320 is disposed on the substrate 310 and includes a first N-type electrode and a first P-type electrode, the second metal wiring 330 is disposed at a distance vertically above the first metal wiring 320, the second metal wiring 330 includes a second N-type electrode and a second P-type electrode, the third metal wiring 340 is disposed at a distance vertically above the second metal wiring 330, and the third metal wiring includes a third N-type electrode and a third P-type electrode. In the embodiment of the present invention, one ends of the first metal wiring 320, the second metal wiring 330 and the third metal wiring 340 are connected together, that is, the first N-type electrode, the second N-type electrode and the third N-type electrode are connected together, or the first P-type electrode, the second P-type electrode and the third P-type electrode are connected together, so as to be provided as a common electrode.
In addition, in the embodiment of the invention, the first metal wiring, the second metal wiring and the third metal wiring have multiple arrangements, one of which is shown in fig. 14, the P-type electrodes of the first metal wiring, the second metal wiring and the third metal wiring are respectively arranged at each corner position on the substrate, the N-type electrodes are arranged as common electrodes, the RGB chip is respectively arranged at one corner position on the substrate and is correspondingly bonded to the P-type electrodes and the N-type electrodes of the first metal wiring, the second metal wiring and the third metal wiring, the other of which is shown in fig. 15, the P-type electrodes of the first metal wiring, the second metal wiring and the third metal wiring are all positioned on the same vertical line, the N-type electrodes of the first metal wiring, the second metal wiring and the third metal wiring are arranged as common electrodes and are positioned at the other side opposite to the P-type electrodes, and the RGB chip is correspondingly bonded to the P-type electrodes and the N-type electrodes of the first metal wiring, the second metal wiring and the third metal wiring. In the embodiment of the present invention, the common N-type electrode is taken as an example, the first metal wiring, the second metal wiring, and the third metal wiring may be also set as the common P-type electrode, and the specific arrangement manner is not limited to the above two examples, and the wiring manner of other common N-type electrodes or common P-type electrodes may be used.
The chip 350 for emitting different light, the flat glue layer 360 and the blue light absorbing film 370, in the embodiment of the invention, the chip 350 for emitting different light includes an RGB three-color chip. After the first metal wiring 320 is formed, the R chip is bonded to the first N-type electrode and the first P-type electrode of the first metal wiring 320, and then a flat glue layer 360 is formed to cover the R chip. Repeating the above steps, after the second metal wiring 330 is formed, bonding the G chip to the second N-type electrode and the second P-type electrode of the second metal wiring 330, and forming a flat glue layer 360 to cover the G chip. The thickness of the flat glue layer 360 is 2-5um higher than the outer surface of the chip, and the flat glue layer 360 is arranged to protect the chip and prevent the chip from being displaced or scratched, and to ensure the planarization of the upper surface of the whole chip so as to facilitate the manufacture of the next process.
And forming a blue light absorbing film 370 on the flat adhesive layer 360 wrapping and covering the G chip, wherein the wavelength range of the red light is 622-760 nm, the wavelength range of the green light is 492-577 nm, the wavelength range of the blue light is 435-450 nm, the blue light is short wavelength, the red light and the green light are long wavelength, the blue light with short wavelength easily excites the green light chip or the red light chip to emit light, otherwise, the red light or the green light emitted by the red light chip or the green light chip is long wavelength, and the blue light chip is not easy to excite the blue light chip to emit light. Since the process is repeated after the green light chip is bonded, and the blue light chip is bonded continuously, in order to avoid that the light emitted downwards falsely triggers the green light chip or the red light chip to emit light when the blue light chip emits light and influence the display effect, a blue light absorption film is formed on a flat adhesive layer wrapping the green light chip before metal wiring of the bonded blue light chip is formed, so that the light emitted downwards is absorbed when the blue light chip emits light, and the light emitted by the green light chip or the red light chip is prevented from falsely triggering.
Further, a third metal wiring 340 is formed on the blue light absorbing film 370, and the B chip is bonded to the third N-type electrode and the third P-type electrode of the third metal wiring 340.
In this MIP chip structure, the RGB chips may be arranged in a staggered manner in the vertical direction (as shown in fig. 12), or may be located on the same straight line in the vertical direction (as shown in fig. 13), and the arrangement manner of the RGB chips in the vertical direction may be adjusted according to the actual requirement. Because the MIP chip structure adopts a laminated design, the chip size can be reduced to below 200um, and the MIP chip structure can be used for manufacturing a display screen with smaller P0.2-P0.4 space, and has wider application range.
In addition, the embodiment of the invention also provides a display device, which comprises the MIP chip structure, namely, the MIP chip structure is bonded on the driving substrate in the display device and is used for displaying light. It is readily understood that the display device may be, but is not limited to, a display device such as a computer, television, outdoor display screen, or the like.
In summary, the invention provides a MIP chip structure and a process method thereof, and a display device, wherein a substrate is provided, then a photoresist is coated on the whole substrate, a metal wiring pattern is formed by exposing, developing and etching the photoresist, a layer of metal is evaporated on the metal wiring pattern, a metal wiring can be formed after the photoresist is removed, a chip with the same emergent ray is bonded and connected with the metal wiring, a flat glue layer is coated on the whole layer after the chip bonding is completed, the chip packaging is completed, the steps are repeated for three times, the metal wiring pattern is manufactured, the metal wiring, the chip with the same emergent ray is bonded, the flat glue layer is coated, three layers of metal wiring with a certain distance in the vertical direction and one end connected together are formed, and each layer of metal wiring is bonded and connected with the chip with the same emergent ray.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention. It should be noted that like reference numerals and letters refer to like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A MIP chip structure is characterized in that, the MIP chip structure comprises:
A substrate;
the metal wiring is arranged on the substrate, and comprises a first metal wiring, a second metal wiring and a third metal wiring, wherein the first metal wiring, the second metal wiring and the third metal wiring are arranged at certain intervals in the vertical direction, and one ends of the first metal wiring, the second metal wiring and the third metal wiring are connected together;
The chips with different emergent rays are respectively connected with the first metal wiring, the second metal wiring and the third metal wiring in a bonding mode.
2. The MIP chip structure of claim 1, wherein,
The first metal wiring is arranged on the substrate and comprises a first N-type electrode and a first P-type electrode;
The second metal wiring is arranged above the first metal wiring at a certain distance, and comprises a second N-type electrode and a second P-type electrode;
The third metal wiring is arranged above the second metal wiring at a certain distance, and comprises a third N-type electrode and a third P-type electrode;
The first N-type electrode, the second N-type electrode and the third N-type electrode are connected together, or the first P-type electrode, the second P-type electrode and the third P-type electrode are connected together.
3. The MIP chip structure of claim 2, wherein said plurality of different light emitting chips comprises a red light chip, a green light chip and a blue light chip;
The two electrodes of the red light chip are respectively and electrically connected with a first N-type electrode and a first P-type electrode of the first metal wiring in a bonding way;
The two electrodes of the green light chip are respectively and electrically connected with a second N-type electrode and a second P-type electrode of the second metal wiring in a bonding way;
and two electrodes of the blue light chip are respectively and electrically connected with a third N-type electrode and a third P-type electrode of the third metal wiring in a bonding way.
4. The MIP chip structure of any one of claims 1-3, further comprising a planar glue layer,
The flat adhesive layer is uniformly paved around the chips with different emergent rays and wraps the chips with different emergent rays.
5. The MIP chip structure of claim 4, wherein said planar glue layer is 2-5um higher than said chip outer surface for different outgoing light rays.
6. The MIP chip structure of any one of claims 1-3, further comprising a blue light absorbing film,
The blue light absorption film is arranged at the position vertically below the blue light chip for emitting blue light.
7. A display device comprising a MIP chip structure according to any one of claims 1-6.
8. A process method of a MIP chip structure, the method comprising:
Step one, providing a substrate;
coating photoresist on the whole substrate and etching a metal wiring pattern;
Evaporating a layer of metal, and removing the photoresist to form metal wiring;
fourthly, bonding and connecting chips with the same kind of emergent light to the metal wiring ;
Repeating the second to fourth steps to form three layers of metal wiring which are vertically spaced at a certain distance and are connected together at one end, wherein each layer of metal wiring is bonded with chips connected with different emergent rays.
9. The process of claim 8, wherein the step of bonding the chips of the same type of outgoing light to the metal wiring further comprises:
and uniformly coating a layer of flat adhesive layer, wherein the flat adhesive layer wraps and covers the chips with the same kind of emergent rays, and the thickness of the flat adhesive layer is 2-5um higher than the outer surface of the chips with the same kind of emergent rays.
10. The process of claim 9, wherein prior to forming the metal wiring bonded to the blue light chip emitting blue light, further comprising:
And forming a blue light absorption film on the flat adhesive layer of the chip wrapping other emergent rays on the previous layer.
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| CN202310968586.XA CN119480865A (en) | 2023-08-01 | 2023-08-01 | MIP chip structure and process method thereof, and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202310968586.XA CN119480865A (en) | 2023-08-01 | 2023-08-01 | MIP chip structure and process method thereof, and display device |
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