CN119483548A

CN119483548A - Angle extraction circuit, method and chip

Info

Publication number: CN119483548A
Application number: CN202411552355.1A
Authority: CN
Inventors: 武建峰; 钱振煌
Original assignee: Quanzhou Kuntaixin Microelectronic Technology Co ltd
Current assignee: Quanzhou Kuntaixin Microelectronic Technology Co ltd
Priority date: 2022-01-10
Filing date: 2022-01-10
Publication date: 2025-02-18
Also published as: CN114370814B; CN114370814A

Abstract

The invention belongs to the technical field of sensor signal processing, and particularly discloses an angle extraction circuit, an angle extraction method and a chip. The angle extraction circuit comprises an analog-to-digital converter, a signal generator, a filter and a phase comparison unit, wherein the analog-to-digital converter is used for receiving a voltage signal and carrying out analog-to-digital conversion on the voltage signal, the voltage signal contains angle information output by an angle sensor, the signal generator is used for generating a modulating signal and a reference signal, the modulating signal is a square wave and is used for modulating the voltage signal to obtain a modulated signal, the filter is used for adding the first modulated signal and the second modulated signal and then inputting the first modulated signal and the second modulated signal into the filter to extract the angle information, and the phase comparison unit is used for receiving the reference signal output by the signal generator and the output signal of the filter and comparing the reference signal and the output signal to obtain the phase difference of the output signal relative to the reference signal. The invention has simple calculation process and greatly reduces hardware resources required by the calculation process.

Description

Angle extraction circuit, method and chip

Technical Field

The invention belongs to the technical field of sensor signal processing, and particularly relates to an angle extraction circuit, an angle extraction method and a chip.

Technical Field

In the hall angle sensor manufactured by using the hall principle, the hall element starts to rotate from a reference position under the action of an electric field force, and the rotated angle theta is the content which needs to be output by the hall angle sensor. In the prior art, the value of the angle is usually calculated using the CORDIC (Coordinate Rotation Digital Computer ) algorithm. The method is based on the preset (namely formula tan alpha ⁱ＝2^-i) that the tangent (tan) value of the angle theta is equal to the power n of 1/2 in a certain interval, a series of fixed angle values are used, and the value of the angle theta rotated by the Hall angle sensor is obtained through a step-by-step accumulation method. Finally, the CORDIC algorithm also performs a filtering in order to remove part of the noise.

However, the calculation process of the method is relatively complex, a large amount of memory is required to record table data for table lookup instructions, and a corresponding digital system is also relatively complex, so that more resources are consumed. For chip manufacturing, the more resources consumed means the more difficult the miniaturization of the chip. In order to reduce the difficulty of angle calculation, there is a need for an angle calculation method that is more resource-efficient and that can maintain the existing level of calculation accuracy.

Disclosure of Invention

In order to solve the above-mentioned drawbacks, the present invention provides an angle extraction circuit for extracting an angle value output by an angle sensor, including.

The first analog-to-digital converter is used for receiving a first voltage signal and performing analog-to-digital conversion on the first voltage signal, and the first voltage signal contains angle information output by the angle sensor;

The second analog-to-digital converter is used for receiving a second voltage signal and performing analog-to-digital conversion on the second voltage signal, and the second voltage signal contains angle information output by the angle sensor;

A signal generator for generating a modulated signal and a reference signal, wherein the modulated signal is a square wave, a first modulated signal is used for modulating the first voltage signal after analog-to-digital conversion to obtain a first modulated signal, and a second modulated signal is used for modulating the second voltage signal after analog-to-digital conversion to obtain a second modulated signal;

a filter to which the first modulated signal and the second modulated signal are added and which is input to extract the angle information;

and the phase comparison unit is used for receiving the reference signal output by the signal generator and the output signal of the filter and comparing the reference signal with the output signal so as to acquire the phase difference of the output signal relative to the reference signal.

In the above circuit, the filter includes a multi-stage filter.

In the above circuit, the filter includes a four-stage IIR filter.

In the above circuit, the characteristic function of the filter is:

REG_n＝k×REG_n-1+(1-k)×new,

Where REG _n is the value currently output by the filter, REG _n-1 is the last output value of the filter, new is the input value of the filter, and k is the control coefficient.

In the above circuit, the phase comparison unit is a phase shift counter, and the phase shift counter starts counting from a rising/falling edge of the reference signal to an ending counting of the rising/falling edge of the output signal of the filter.

The invention also provides an angle extraction method for extracting the angle value output by the angle sensor, which comprises the following steps:

an analog-to-digital conversion step of converting a first voltage signal and a second voltage signal from the angle sensor into digital signals, wherein the first voltage signal and the second voltage signal contain angle information output by the angle sensor;

A modulation step of modulating the first voltage signal converted into a digital signal and the second voltage signal converted into a digital signal with a first modulation signal and a second modulation signal, respectively, to obtain a first modulated signal and a second modulated signal, wherein the first modulation signal and the second modulation signal are square waves;

A filtering step, namely adding the first modulated signal and the second modulated signal, and inputting the added first modulated signal and the added second modulated signal into a filter for filtering so as to extract the angle information;

And a phase comparison step of receiving a reference signal and comparing the reference signal with the output signal obtained in the filtering step to obtain a phase difference of the output signal relative to the reference signal.

In the above method, in the filtering step, filtering is performed using a multi-stage filter.

In the above method, in the filtering step, filtering is performed by using a filter including a four-stage IIR filter.

In the above method, the characteristic function of each stage of filter of the multistage recursive filter is:

REG_n＝k×REG_n-1+(1-k)×new,

Correspondingly, the invention also provides a chip, which comprises an angle sensing unit and a signal processing unit, wherein the signal processing unit receives the angle information output by the angle sensing unit and extracts an angle value from the angle information according to the method.

Compared with the prior art, the invention provides the same-frequency modulation signal and the reference signal through the signal generator, wherein the modulation signal adopts square waves, and the reference signal adopts sine waves or cosine waves. The modulation signal is used for modulating the angle information output by the angle sensing unit to output a signal waveform containing the angle information, and the waveform is generally a step wave. The high-frequency component carried in the square wave is removed through multistage IIR filtering to obtain a waveform of a standard sin (t+theta), a reference signal sin t (or cos t) is used for being compared with the waveform of the sin (t+theta) after filtering, and the delay (namely the phase difference theta) of the sin (t+theta) relative to the sin t is obtained through a counting mode, so that the angle information output by the angle sensing unit is obtained. The algorithm is simple, only shift and addition operations are needed in the filter part, and only a simple counter is needed in the comparison waveform part. In addition, by simplifying the modulation signals sin t and cos t into square waves with the same frequency, the modulation part omits the multiplication process and only needs an adder. Therefore, the invention has simple calculation process and greatly reduces the hardware resources required by the calculation process.

In addition, the invention uses a multi-stage filter in the process of calculating the angle, has the function of noise filtering, does not need to additionally use a filter to filter the noise after the calculation is finished, and saves one step compared with the prior art.

Drawings

FIG. 1 is a hardware block diagram of some embodiments of the invention;

FIG. 2 is a schematic diagram of the sensing unit in FIG. 1;

FIG. 3a is a schematic block diagram of an angle extraction circuit according to some embodiments of the invention;

FIG. 3b is a schematic block diagram of the substitution of the sine/cosine signal in the circuit shown in FIG. 3a with a co-frequency square wave;

FIG. 4 is a comparison of waveforms at the five positions A, B, C, D, E shown in FIG. 3 b;

FIG. 5 is a graph of square wave versus standard sine wave;

FIGS. 6-10 are graphs comparing waveforms of the output waveform of the four-stage filter shown in FIG. 3b with waveforms of the reference waveform Ref after being filtered by the four-stage filter, respectively;

Fig. 11 is a schematic circuit diagram of the present invention for acquiring the angle θ by counting.

DETAILED DESCRIPTION OF EMBODIMENT (S) OF INVENTION

In order to make the objects and features of the present invention more comprehensible, embodiments accompanied with figures are described in detail below. Additional advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. While the description of the invention will be described in connection with the preferred embodiments, it is not intended to limit the inventive features to the implementation. Rather, the purpose of the invention described in connection with the embodiments is to cover other alternatives or modifications, which may be extended by the claims based on the invention. The following description contains many specific details for the purpose of providing a thorough understanding of the present invention. The invention may be practiced without these specific details. Furthermore, some specific details are omitted from the description in order to avoid obscuring the invention. Moreover, embodiments of the invention and features of embodiments are allowed to be combined with or replaced with each other without conflict.

It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention. Also, in the present specification, like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition and explanation thereof is necessary in the following figures.

It should be further noted that the step numbering in the present invention is for ease of reference, and not to limit the order of precedence. The steps of the respective order are emphasized, and will be specifically described in specific terms.

In describing embodiments of the present invention with reference to the accompanying drawings, the terms "upper", "lower", "inner", "bottom", and the like refer to an orientation or positional relationship based on that shown in the drawings, or that is conventionally put in place when the inventive product is used, merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the apparatus or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention.

For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

FIG. 1 is a block diagram of some embodiments of the inventions. The angle extraction circuit provided by the invention comprises an induction unit 101, an analog-to-digital conversion unit 102, a signal processing unit 103 and a digital-to-analog conversion unit 104.

The sensing unit 101 includes an angle sensor for sensing the direction of a magnetic field, and outputs a voltage or current including information on the direction of the magnetic field. The present embodiment will be described with reference to an output voltage. In some embodiments, the angle sensor may be a Hall element, an anisotropic magnetoresistance (Anisotropic Magneto resistance, AMR) element, a giant magnetoresistance (Giant Magneto resistance, GMR) element, and a tunnel magnetoresistance (Tunnel Magneto Resistance, TMR). In particular, reference is made to fig. 2. Fig. 2 is a schematic diagram of the sensing unit 101 in fig. 1. In the figure, hall elements HD 1-HD 2 are respectively arranged on an X axis and a Y axis of a planar coordinate system. When a current is applied to each of the hall elements HD1 to HD2, if a magnetic field B as shown in the drawing exists in a direction parallel to the XY axis plane, an induced voltage having a different magnitude is generated in each of the hall elements HD1 to HD 2. The magnitude of the induced voltage is related to the components of the magnetic field B in the X-axis and Y-axis directions, so that the direction of the magnetic field B can be estimated according to the difference of the induced voltages on the Hall elements HD 1-HD 2. And the direction of the X axis is the direction of an angle of 0 DEG, so that the included angle theta between the direction of the externally applied magnetic field B and the X axis can be determined by analyzing the voltage value of each Hall element HD 1-HD 2.

Returning to fig. 1, the sensing unit 1 outputs hall voltages including information of the angle θ generated on the hall elements HD1 to HD 2.

To facilitate the subsequent digital filtering, the analog-to-digital conversion unit 102 is used to perform analog-to-digital conversion on the induced voltage. The analog-to-digital conversion unit 102 may comprise, for example, an 8-bit, 16-bit ADC (Analog Digital Converter, analog-to-digital converter). The greater the number of bits of the ADC, the greater the accuracy of the values of the subsequent calculated relative angle θ.

After receiving the digital hall voltage output by the analog-to-digital conversion unit 102, the signal processing unit 103 modulates and digitally filters the digital hall voltage, and after multi-stage low-pass filtering, the filtering effect is stable, and the phase shift of the output sin (t+θ) curve (including the phase shift) relative to the standard sin t curve (i.e., the curve with the phase shift of 0) is stable, so that the phase shift is the included angle θ between the direction of the externally applied magnetic field B and the X axis. Specifically, the signal processing unit 103 may include a signal generator 26, a modulation and filtering unit 1032, and a phase comparison unit 211. In one embodiment, sensing unit 101 outputs a set of voltage signals, e.g., sin θ and cos θ. The signal generator 26 may output standard (excluding phase shift) cos t and sin t signals as modulation signals, to modulate the signal sin θ and the signal cos θ respectively, and add the two modulated signals to obtain a modulated signal sin t×cos θ+cos t×sin θ (i.e. the signal at the E point in fig. 3 a). The phase comparison unit 211 may compare the modulated signal sin (t+θ) with the standard signal cos t or sin t output by the signal generator 26, so as to obtain an actual value (typically a digital signal) of the included angle θ. If the standard signal cos t or sin t is further replaced by a square wave with the same frequency, a multiplier can be omitted in the process of designing the filter, and the use of resources in a chip is saved. The square wave with the same frequency means that the frequency of the square wave is the same as that of the standard signal, and the zero crossing point is also overlapped with the zero crossing point of the standard signal. For example, reference may be made to the graph of the square wave versus the standard sine wave shown in fig. 5, where the three zero crossings of the square wave instead of the standard sine wave are the same as the sine wave, and the positive and negative amplitudes of the square wave are the same as the sine wave. Similar to a square wave is the envelope of a sine wave. If the standard signal is a standard cosine wave, the square wave is also adjusted accordingly. Specifically, an amplifier with a gain that can be considered as infinity can be added to the output of the signal generator 26, and the amplitudes of the standard signals cos t and sin t are clamped at a fixed value, thereby forming a square wave. For example, the standard signal sin t shown by the broken line in fig. 5 is amplified to obtain a square wave shown by the solid line.

Returning to fig. 1, the digital-to-analog conversion unit 104 is an optional unit. When the analog value of the included angle θ needs to be output, the digital value of the included angle θ output by the phase comparison unit 211 is converted into the analog value by the digital-to-analog conversion unit 104.

The following is described in connection with fig. 3a and 3 b. Fig. 3a is a schematic block diagram of an angle extraction circuit according to some embodiments of the invention. Fig. 3b is a schematic block diagram of the substitution of the sine/cosine signal in the circuit shown in fig. 3a with a co-frequency square wave.

In fig. 3a and 3b, the first analog-to-digital converter 21 receives one voltage signal (first voltage signal), outputs a digital signal cos θ after digital-to-analog conversion, and the second analog-to-digital converter 22 receives the other voltage signal (second voltage signal), and outputs a digital signal sin θ after digital-to-analog conversion. Specifically, the number of bits of the first analog-to-digital converter 21 and the second analog-to-digital converter 22 may be 8 bits, 10 bits, 12 bits, or the like, and the more the number of bits, the more accurate the value of the included angle θ that is subsequently output. In the embodiment shown in fig. 3a, the signal generator 26 may be a digital signal generator, directly outputting the modulated signals sin t and cos t in digital form for modulating the signals cos θ and sin θ. However, for the chip manufacturing industry, the use of hardware is that the hardware resources required for implementing the multiplier are relatively large, and the resource waste is easily caused. In order to save hardware resources and facilitate the process of modulation (i.e. multiplication) inside the chip, the embodiment shown in fig. 3b uses a square wave of the same frequency (see the description of the square wave and fig. 5 above) instead of the modulated signals sin t and cos t, and after addition, the modulated signal obtained at point E in fig. 3b is reduced to (sin t×cos θ+cos t×sin θ)That is, the part that would otherwise need to use the multiplier can now be replaced by addition or subtraction (i.e., using only the adder). That is, in fig. 3b, the multiplication of cos θ with square wave 1 and sin θ with square wave 2 is not implemented in a hardware unit of a multiplier, but only requires several judger and adder hardware. Therefore, the embodiment reduces the use of a plurality of logic gates on the hardware level, and reduces the use rate of system resources. Those skilled in the art will recognize that the simplified modulated signalThe simplified modulated signal has a high frequency component introduced therein relative to the modulated signal sin t x cos θ + cos t x sin θ. Thus, in order to keep the modulated signal undistorted, the present embodiment also provides a multi-stage filter for filtering out additional high frequency components. Specifically, in the present embodiment, four-stage IIR (Infinite Impulse Response ) filters, namely, a primary filter 27, a secondary filter 28, a tertiary filter 29, and a quaternary filter 30 are used. Wherein each filter occupies one register, namely a first register, a second register, a third register and a fourth register. The previous value of the register of the previous stage filter and the previous value of the register of the current stage filter are weighted and stored in the register of the current stage filter. As with fig. 3a and 3b, the characteristic functions of the primary filter 27 are:

REG1_n＝k×REG1_n-1+(1-k)×new,

Where REG1 _n is the current value of the first register of the primary filter 27, REG1 _n-1 is the previous value of the first register of the primary filter 27 (i.e., the result of the previous recursion), new is the input value of the primary filter 27 (i.e., the signal value at E in FIGS. 3a and 3 b), k is the control coefficient according to which the weights of REG1 _n-1 and new are k and (1-k), respectively.

The characteristic functions of the second order filter 28 are:

REG2_n＝k×REG2_n-1+(1-k)×REG1_n-1,

Where REG2 _n is the current value of the second register of the secondary filter 28, REG2 _n-1 is the value of the second register of the secondary filter 28 at the previous time (i.e., the result of the previous recursion), REG1 _n-1 is the input value of the secondary filter 28 (i.e., the signal value at point A in FIGS. 3a and 3 b), k is the control coefficient according to which the weights of REG2 _n-1 and REG1 _n-1 are k and (1-k), respectively.

The characteristic functions of the three-stage filter 29 are:

REG3_n＝k×REG3_n-1+(1-k)×REG2_n-1,

Where REG3 _n is the current value of the third register of the three-stage filter 29, REG3 _n-1 is the value of the third register at the previous time (i.e., the result of the previous recursion), REG2 _n-1 is the input value of the three-stage filter 29 (i.e., the signal value at point B in FIGS. 3a and 3B), k is the control coefficient according to which the weights of REG3 _n-1 and REG2 _n-1 are k and (1-k), respectively.

The characteristic functions of the four-stage filter 210 are:

REG4_n＝k×REG4_n-1+(1-k)×REG3_n-1,

Where REG4 _n is the current value of the fourth register of the four-stage filter 210, REG4 _n-1 is the value of the fourth register at the previous time (i.e., the result of the previous recursion), REG3 _n-1 is the input value of the four-stage filter 210 (i.e., the signal value at point C in FIGS. 3a and 3 b), k is the control coefficient according to which the weights of REG4 _n-1 and REG3 _n-1 are k and (1-k), respectively.

Through experiments, the signal curve after four-stage filtering can basically and completely filter out the high-frequency component added by using square waves instead of sine waves (cosine waves), so that the signal output by the four-stage filter 210 is a relatively complete modulated signal sin (t+θ), and then the signal is compared with a standard signal sin t (or cos t) to obtain the value of the included angle θ. Of course, if the accuracy requirement on the included angle θ is higher, several stages of filters can be added according to the characteristic function so as to filter out high-frequency signals more.

Further, in the above filter, the control coefficient k is set to be a valueWhere x is a positive integer less than 256, the filter can be implemented by using only an adder and a shift register, which greatly reduces the use of hardware resources, and for the chip manufacturing industry, can implement chip miniaturization or use resources for implementing other circuits.

The phase comparison unit 211 receives the standard signal sin t (or cos t) output from the signal generator 26 and the modulated signal sin (t+θ) output from the four-stage filter 210. Wherein sin t (or cos t) can be used as a reference signal to be simplified into a square wave with the same frequency. As will be more clearly explained in connection with fig. 11.

Fig. 11 is a schematic circuit diagram of the present invention for obtaining the value of the angle θ by counting. The modulated signal sin (t+θ) is input to the zero-crossing detection 110, the rising edge (or the falling edge) thereof is extracted, and is input to the counter 111, and the counter 111 counts up on the rising edges (or the falling edges) of sin t and sin (t+θ), so that the phase offset (i.e., the value of the included angle θ) of the modulated signal sin (t+θ) can be calculated. Or in other embodiments phase detection may be implemented using a phase detector.

It can be said that in the above embodiment, the functions of the multiplier and the adder are realized only by the adder and the shift register, the process of angle extraction (calculation process) is greatly simplified, and correspondingly, the hardware resources required to be used in the above embodiment are also greatly reduced, and the complexity of the circuit is simplified.

In addition, since a multi-stage filter is used in the calculation process, the filter can filter out additional high-frequency signals and simultaneously filter out noise. Compared with the scheme that noise filtering is needed after the value of the included angle theta is obtained in the prior art, the invention also saves an independent noise filtering process.

Fig. 4 is a graph of the waveforms at five points A, B, C, D, E shown in fig. 3 b. The figure is obtained by simulating the calculation process of the four-level IIR filter described above in a mathematical calculation software matlab. Wherein the control coefficient k in the characteristic function takes the value asThe modulated signal in digital form of the signal at point E is shown as a step wave in fig. 4, i.e. the input signal of the primary filter 27. The signal at the point a is the waveform of the approximately triangular wave in fig. 4, which is the signal filtered by the primary filter 27. The signal at point B is approximately sinusoidal in fig. 4, but has a significantly distorted waveform, which is a signal filtered by the second filter 28. The signals at points C and D have been very close to sine waves, which in turn are filtered by three-stage filter 29 and four-stage filter 210.

To more clearly show the filtering effect of the four-stage filter, fig. 6-10 show a comparison of the filtering effect of the reference signal Ref and the modulated signal for a single period.

In FIG. 6, the reference signal Ref is a square wave with a fixed frequency (corresponding to the reference signal Ref input to the phase comparison unit 211 in FIG. 3 b), and the modulated signal is simplified by the above-mentioned method of using the square wave with the same frequency instead of the modulated signals sin t and cos t (the simplified modulated signal)The waveform is a step wave.

Fig. 7 shows a broken line waveform in which the reference signal Ref in the form of a square wave is deformed to be approximately a triangular wave and the modulated signal sin (t+θ) in the form of a step wave becomes irregular after being filtered by the first filter 27.

Fig. 8 shows that the reference signal Ref is distorted to an approximate sine wave after being filtered by the second filter 28, and the modulated signal sin (t+θ) is also distorted to an approximate sine wave. But both waveforms are significantly distorted relative to the standard sine wave.

Fig. 9 shows that the reference signal Ref is distorted to an approximate sine wave after being filtered by the three-stage filter 29, and the modulated signal sin (t+θ) is also distorted to an approximate sine wave. Both waveforms are not significantly distorted relative to the standard sine wave.

Fig. 10 shows that the reference signal Ref is transformed into an approximate cosine wave and the modulated signal sin (t+θ) is also transformed into an approximate cosine wave after being filtered by the four-stage filter 210. Both waveforms are not significantly distorted relative to the standard sine wave.

Through laboratory simulation, even though the waveforms of the reference signal Ref and the modulated signal sin (t+θ) are not obviously changed after passing through the fifth and sixth filters, i.e., recursion can be ended, phase comparison can be performed on the basis of the waveforms shown in fig. 10, so as to obtain the value of the included angle θ.

While the invention has been shown and described with reference to a few embodiments thereof, it will be apparent to one of ordinary skill in the art that the foregoing is a further detailed description of the invention in conjunction with the specific embodiments, and it is not intended to limit the practice of the invention to such description. Various changes and modifications in form and detail may be made therein by those skilled in the art, including a few simple inferences or alternatives, without departing from the spirit and scope of the present invention. Therefore, the present invention is intended to include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims

1. An angle extraction circuit for extracting an angle value output from an angle sensor, comprising:

2. The circuit of claim 1, wherein the filter comprises a multi-stage filter.

3. The circuit of claim 1 or 2, wherein the filter comprises a four-stage IIR filter.

4. The circuit of claim 1, wherein the filter has a characteristic function of:

REG_n＝k×REG_n-1+(1-k)×new,

5. The circuit of claim 1, wherein the phase comparison unit is a phase shift counter that starts counting from a rising/falling edge of the reference signal to an ending count of a rising/falling edge of the output signal of the filter.

6. An angle extraction method for extracting an angle value output by an angle sensor is characterized by comprising the following steps:

7. The method of claim 6, wherein in the filtering step, filtering is performed using a multi-stage filter.

8. The method of claim 6, wherein in the filtering step, filtering is performed using a filter comprising a four-stage IIR filter.

9. The method of claim 6, wherein the characteristic function of each stage of the multistage recursive filter is:

REG_n＝k×REG_n-1+(1-k)×new,

10. A chip comprising an angle sensing unit, and further comprising a signal processing unit, wherein the signal processing unit receives angle information output by the angle sensing unit and extracts an angle value from the angle information according to the method of any one of claims 6-9.