[go: up one dir, main page]

CN119538832B - Ferroelectric capacitor modeling method for circuit simulation - Google Patents

Ferroelectric capacitor modeling method for circuit simulation

Info

Publication number
CN119538832B
CN119538832B CN202411601845.6A CN202411601845A CN119538832B CN 119538832 B CN119538832 B CN 119538832B CN 202411601845 A CN202411601845 A CN 202411601845A CN 119538832 B CN119538832 B CN 119538832B
Authority
CN
China
Prior art keywords
fecap
model
mna
rhs
column
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202411601845.6A
Other languages
Chinese (zh)
Other versions
CN119538832A (en
Inventor
李博
陈凯
陈冰
韩根全
刘艳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xidian University
Original Assignee
Xidian University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xidian University filed Critical Xidian University
Priority to CN202411601845.6A priority Critical patent/CN119538832B/en
Publication of CN119538832A publication Critical patent/CN119538832A/en
Application granted granted Critical
Publication of CN119538832B publication Critical patent/CN119538832B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/11—Complex mathematical operations for solving equations, e.g. nonlinear equations, general mathematical optimization problems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Data Mining & Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computational Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Databases & Information Systems (AREA)
  • Algebra (AREA)
  • Computing Systems (AREA)
  • Operations Research (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)

Abstract

本发明公开了一种面向电路仿真的铁电电容建模方法，包括以下步骤；步骤1：修正节点分析法，使得MNA与Fecap的MNA model建模联系；步骤2：Fecap元件的MNA model形成过程，基于MNA，利用Fecap的L‑K模型公式得到补偿方程，用于求解未知变量的方程，得到最终的Fecap元件的导纳矩阵G和已知量向量列RHS，得到Fecap的MNAmodel。本发明基于MNA，利用Fecap的物理模型公式以及基尔霍夫电流定律、基尔霍夫电压定律来表示未知变量，形成Fecap的模型代码，使Fecap的SPICE仿真更精准更快速。

The present invention discloses a ferroelectric capacitor modeling method for circuit simulation, comprising the following steps: Step 1: Modifying the nodal analysis method to link MNA with the MNA model of Fecap; Step 2: Forming the MNA model of the Fecap element, based on the MNA, using the Fecap L-K model formula to obtain a compensation equation, which is used to solve the equation for the unknown variable, to obtain the final Fecap element admittance matrix G and the known quantity vector column RHS, thereby obtaining the Fecap MNA model. Based on the MNA, the present invention uses the Fecap physical model formula and Kirchhoff's current law and Kirchhoff's voltage law to represent the unknown variables, forming the Fecap model code, and making the Fecap SPICE simulation more accurate and faster.

Description

Ferroelectric capacitor modeling method for circuit simulation
Technical Field
The invention belongs to the technical field of ferroelectric capacitor (Fecap) modeling, and particularly relates to a circuit simulation-oriented ferroelectric capacitor (Fecap) modeling method.
Background
Ferroelectric capacitors (fecaps) and ferroelectric field effect transistors (fefets) are emerging electronic components with unique electrical properties such as non-volatile memory and circuit programmability. In addition, ferroelectric RAM (FeRAM) based on FeCap is receiving wide attention in the industry for its excellent performance and process compatibility. These features make them potential competitors to new memory Computing (CIM) for energy-efficient hardware acceleration.
With advances in process technology, electronic Design Automation (EDA) tools are increasingly needed to support the design and verification of fem circuits based on FeCap/fefets.
Currently, the mainstream industrial SPICE circuit simulation tools are all realized based on an improved node analysis (MNA) formula, and MNA is an analysis method based on node voltage, which combines Kirchhoff Voltage Law (KVL), kirchhoff Current Law (KCL) and constitutive equations of elements, solves unknown quantities in a circuit by establishing an equation set, expresses the circuit equation in a matrix form, and is convenient for computer program processing and solving.
In the prior art, an MNA model of ferroelectric capacitor applied to SPICE is realized by adopting MNA, if the MNA model is not available, a designer must manually create an equivalent circuit model for an emerging device, and the resolving speed of the circuit equivalent model in a simulation tool is also behind the MNA model.
Accordingly, the present invention addresses the simulation tool model problems and needs currently faced by the above-mentioned ferroelectric circuits.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention aims to provide a ferroelectric capacitor (Fecap) modeling method oriented to circuit simulation, which is based on MNA, and utilizes a physical model formula (L-K model) of Fecap, kirchhoff Current Law (KCL) and Kirchhoff Voltage Law (KVL) to represent unknown variables (node voltage, branch current and branch polarization) to form a model code of Fecap, so that the SPICE simulation of Fecap is more accurate and rapid.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
A modeling method of ferroelectric capacitor (Fecap) facing circuit simulation comprises the following steps;
step 1, introducing a modified node analysis Method (MNA) into MNA model modeling of Fecap;
step 2, MNA model forming process of Fecap element;
Based on a modified node analysis Method (MNA), a compensation equation is obtained by utilizing an L-K model formula of Fecap and is used for solving an equation of an unknown variable to obtain an admittance matrix G and a known quantity vector column RHS of a final Fecap element, and the admittance matrix G and the known quantity vector column RHS are combined to obtain an MNA model of Fecap.
In the step 1, the specific process of modeling the MNA model of the MNA and Fecap is as follows:
Solving unknown variables by using Kirchhoff Current Law (KCL), kirchhoff Voltage Law (KVL) and characteristic equations of the element itself, which is also called introducing a compensation equation, so as to obtain an admittance matrix G of the element, a variable column X and a known quantity column RHS, wherein the admittance matrix G and the known quantity column RHS are combined to obtain an MNA model of the element, and each time an unknown variable is added, a new row and a new column are generated in the admittance matrix G, and corresponding unknown quantity is generated at a corresponding position of the variable column X.
In combination with the physical characteristics of the ferroelectric capacitor (Fecap), when the ferroelectric capacitor is introduced into the circuit, the polarization state and current of the ferroelectric capacitor are new unknowns (the original unknowns are two node voltages), and an admittance matrix G of 4X4 and a variable column X of 1X4 (VN +(t),VN-(t),i(t),p(t))T and an RHS column of 1X 4) are obtained, and then the admittance matrix G and the known column RHS are combined to obtain an MNA model of FECAP.
The step 2 specifically comprises the following steps:
2.1 Based on the generalization of the L-K model Fecap, obtaining the general formula of the Fecap model, so as to facilitate the subsequent linearization process;
2.2 Utilizing a backward Euler method and an N.R. iteration method to compensate equations of Fecap (which are nonlinear devices) for solving equations of unknown variables, carrying out linearization processing based on MNA, and carrying out linearization processing on the compensating equations of Fecap so as to meet solving requirements of a Spice simulation tool and form a final MNA model;
2.3 Combining Fecap terminal voltages, polarization states, and model formulas to arrive at a specific expression of the functions F1 and F2 to form the final MNA model of Fecap.
The step 2.1) is as follows:
selecting an LK model, the relationship between polarization P and unit energy G is described by the following Landau free energy equation;
wherein E is the electric field, and the L-K model is further derived:
Where ρ is the thermodynamic coefficient, T FE represents the thickness of the ferroelectric layer, v=et FE is the voltage across the ferroelectric layer, and α, β, γ are coefficients related to the material properties, combined with the analysis of the L-K model described above, and the general formula of the Fecap model is listed in terms of terminal voltage and polarization state of Fecap:
V(t)=F1(I(t),P(t)) (1)
wherein the current I and polarization P flowing through Fecap are internal state variables of Fecap, respectively, V represents terminal voltage, and F1 and F2 represent arbitrary functions;
To this end, equations (1) and (2) have been obtained for solving Fecap the unknown variables based on MNA, since current and polarization variables are introduced into column vector X, corresponding rows and columns are generated when generating admittance matrix G, and next, the model is subjected to linearization processing to extract admittance matrix G, variable column vector X, and known quantity column vector RHS.
In said 2.2), the semiconductor devices in SPICE can be generally classified into two types, i.e., linear devices and nonlinear devices;
The linear and nonlinear components of the device depend on the relation between the terminal voltage of the device and the current flowing through the device, and the nonlinear circuit containing nonlinear elements needs to be subjected to linearization processing on model formulas of the nonlinear circuit;
The general formula of Fecap model was linearized using the Newton. Raphson iteration and the backward Euler method.
The method comprises the following steps:
1) First, the terminal voltage is represented by the node voltage;
2) Using n.r. iteration, taylor first order expansion of the F1 function at the operating point (I (n),P(n)) can be obtained:
Wherein F 1 (n)(t)＝F1(I(n)(t),P(n) (t)), further transforming formula (3) for facilitating extraction of matrix elements
Wherein VN+, VN-, I (t), P (t) are variables to be solved to be put into X column vectors, corresponding coefficients thereof are taken as elements of an admittance matrix, related terms of all n iterations on the right are taken as known quantities to be put into RHS column vectors, and for the subsequent model description, the known terms are equivalent to Irhs
For equation (2), linearizing dP/dt by using a backward Euler method, and performing F 2 function processing the same as F 1 function processing to obtain a first-order Taylor expansion at a working point (V (n)(t),P(n) (t)), wherein the first-order Taylor expansion is obtained:
Wherein h is a time step, F 2 (n)(t)＝F2(V(n)(t),P(n)(t)),V(t)＝VN+(t)-VN- (t), and performing transformation on formula (5)
Extracting the elements with the coefficients G before the variables I (t), P (t) and V N+(t)、VN- (t), and equally, for the subsequent model description, equating the known term to be Prhs and putting the element into RHS column vector
For currents flowing through nodes V N+ and V N- to flow in the positive direction, assuming the flow into node V N+ is in the positive direction, there are the variables V N+： I (t) and V N-： -I (t) with only I (t), the coefficients are 1 and-1, and no known term is provided.
According to the above description, coefficients before extracting unknown variables form an admittance matrix G:
column vector X formed by unknown variables:
Column vector RHS formed from a known quantity:
to this end, the admittance matrices G and RHS of composite Fecap MNA model have been obtained, and next, the F1 and F2 functions are obtained to write the model into the SPICE simulation program.
The step 2.3) specifically comprises the following steps:
For the F 1 function, the terminal voltage of Fecap is contributed by the potential difference of the parasitic resistance inside the ferroelectric and the ferroelectric layer potential difference, so the L-K model formula based on Fecap is available:
wherein AFE is the surface area of the ferroelectric capacitor, and for F 2 function, dp/dt in the L-K model formula of transformation Fecap is as follows:
combining the admittance matrices G and RHS, since the F1 and F2 functions are known, then an MNA model with the exact parameters Fecap is obtained;
The corresponding matrix parameters are only written into modeling codes specified by SPICE to obtain the built-in MNA model Fecap in SPICE.
The invention has the beneficial effects that:
the invention adopts the improved node analysis Method (MNA) to realize Fecap MNA model which can be applied to the industrial SPICE simulation tool, the step 2 is based on the MNA, and Fecap MNA model which can be analyzed and calculated by the SPICE simulator is obtained by utilizing the L-K model formula of Fecap, so that the ferroelectric capacitor can be directly simulated in the SPICE program to obtain more accurate electrical characteristics, and the potential and the competitiveness of the ferroelectric device in the design of a simulated memory circuit are greatly improved.
The Fecap MNA model designed by the invention accords with the simulation solving principle of the SPICE single component, and can show the advantage of higher speed in the simulation solving of the equivalent circuit SPICE of Fecap.
Drawings
FIG. 1 is a flow chart of the invention for obtaining Fecap MNA Model the required admittance matrix G and column vector RHS based on MNA using the general formula of Fecap L-K model.
FIG. 2 is a simplified diagram of the present invention for obtaining F1 and F2 functions to form a concrete Fecap MNA Model.
Fig. 3 is a schematic diagram of the admittance matrix G and RHS combination.
Detailed Description
The invention is described in further detail below with reference to the accompanying drawings.
As shown in fig. 1 and 2, a method for modeling a ferroelectric capacitor (Fecap) for circuit simulation includes the following steps;
step 1, revising a node analysis Method (MNA) so that the MNA is connected with MNA model modeling of Fecap;
The step 1 specifically comprises the following steps:
first, a specific procedure of NA (node analysis method) is described:
when SPICE (simulation program with integrated circuit key) simulation is performed, firstly, the topology structure of a circuit is required to be described through a netlist file of SPICE, and the netlist file describes all nodes contained in the topology structure of the circuit and branches formed among all nodes and elements on the branches in a code form;
SPICE, after obtaining the topology structure of the circuit through analyzing the netlist, can list equations for the current-voltage relation in the circuit. Commonly used methods are Kirchhoff Current Law (KCL) and kirchhoff voltage law KVL. The solution of the equation set is relatively convenient in a computer in the form of a matrix and a vector, namely, the coefficients before the unknown variable (node voltage) is extracted form a matrix Y, also called an admittance matrix, the unknown variable is converted into a column vector V, and the rest (known quantity) is converted into a column vector I, so that the circuit analysis result is expressed as
Y*V=I(1.1)
Since the components in the circuit can describe the branch current according to the node voltage of the branch, the same form as the formula (1.1) can be written, and the same result as the result of (1.1) can be obtained when the admittance matrix of the components is added according to the same node, so that in the Spice simulation tool, the admittance matrix of the components is important, and the time for forming the circuit admittance matrix during simulation can be greatly reduced. However, when there is an unknown amount of an element in the circuit that cannot be represented by the node voltage, the circuit is not solved and the node analysis method is no longer applicable.
The MNA (modified node analysis) is different from NA in that more unknown variables can be introduced, then the unknown variables are solved by using characteristic equations of KCL, KVL and the element itself, which is also called introducing a compensation equation, so as to obtain an admittance matrix G of the element, a variable column X and a known quantity column RHS, where the G and RHS are combined to form an MNA model of the element, and it should be noted that each additional unknown variable generates a new row and a new column in the G, and at the same time, a corresponding unknown quantity is generated at a corresponding position of X.
In combination with the physical characteristics of the ferroelectric capacitor, when it is introduced into the circuit, the polarization state and current of the ferroelectric capacitor are new unknowns (the original unknowns are two node voltages), so that an admittance matrix G (fig. 1) of 4X4 is obtained, a variable column X (VN +(t),VN-(t),i(t),p(t))T and an RHS column of 1X4 (fig. 1) of 1X4 are obtained, and then G and RHS are combined to obtain an MNA model of FECAP (fig. 2).
Step 2, an MNA model forming process of the Fecap element is carried out, a compensation equation is obtained by utilizing an L-K model formula of Fecap based on MNA, and an equation of an unknown variable is solved, so that a final admittance matrix G of the Fecap element and an MNA model of a known quantity vector column RHS to Fecap are obtained;
The step 2 specifically comprises the following steps:
2.1 Fecap, obtaining a general formula of a Fecap model based on the general formula of the L-K model of Fecap, so as to facilitate subsequent linearization treatment;
the main FeCap models are the Preisach model and the Landau-Khalatnikov (L-K) model. Here, the LK model is selected for illustration because it has a clear physical meaning. The L-K model can accurately describe the polarization response of the ferroelectric material under an external electric field, and the relationship between the polarization P and the unit energy G can be described by the following Landau free energy equation;
wherein E is the electric field, and the L-K model is further derived:
Where ρ is the thermodynamic coefficient, T FE represents the thickness of the ferroelectric layer, v=et FE is the voltage across the ferroelectric layer, and α, β, γ are coefficients related to the material properties. Specific values of these model parameters can be determined by fitting experimental measurement data. Next, the general formula of the Fecap model is listed based on the terminal voltage and polarization state of Fecap in combination with the analysis of the L-K model described above:
V(t)=F1(I(t),P(t)) (1)
where I (current through Fecap) and P (polarization) are internal state variables of Fecap, respectively, V represents terminal voltage, F1, F2 represent arbitrary functions, and a specific L-K model is subsequently introduced in 2.2. To this end, equations (1) and (2) have been obtained for solving Fecap the unknown variables based on MNA (since current and polarization variables are introduced in column vector X, corresponding rows and columns are generated when generating admittance matrix G), and the next step is to linearize the model to extract admittance matrix G, variable column vector X, and known quantity column vector RHS.
2.2 Utilizing a backward Euler method and an N.R. iteration method to compensate equations of Fecap (nonlinear device) for solving equations of unknown variables, carrying out linearization processing based on MNA, and carrying out linearization processing on the compensating equations of Fecap so as to meet solving requirements of a Spice simulation tool and form a final MNA model;
In said 2.2), the semiconductor devices in SPICE can be generally classified into two types, i.e., linear devices and nonlinear devices;
The linearity and nonlinearity of the device depend on the relationship between the terminal voltage of the device and the current flowing through the device, however, if the nonlinear circuit containing nonlinear elements is not subjected to linearization processing on the model formula, SPICE is still obtained as a linear relationship between voltage and current when the circuit is analyzed and solved, and simulation of the elements is in error. Thus, the general formula of the Fecap model was linearized using the Newton. Raphson iteration method and the backward Euler method.
Firstly, terminal voltage is represented by node voltage;
2) Using n.r. iteration, taylor first order expansion of the F1 function at the operating point (I (n),P(n)) can be obtained:
Wherein F 1 (n)(t)＝F1(I(n)(t),P(n) (t)), further transforming formula (3) for facilitating extraction of matrix elements
Wherein VN+, VN-, I (t), P (t) are variables to be solved to be put into X column vectors, corresponding coefficients thereof are taken as elements of an admittance matrix, related terms of all n iterations on the right are taken as known quantities to be put into RHS column vectors, and for the subsequent model description, the known terms are equivalent to Irhs
For equation (2), 1) linearizing dP/dt by using a backward euler method, and the F 2 function is the same as the F 1 function, and the first-order taylor expansion is performed at the working point (V (n)(t),P(n) (t)), so as to obtain:
Wherein h is a time step, F 2 (n)(t)＝F2(V(n)(t),P(n)(t)),V(t)＝VN+(t)-VN- (t), and performing transformation on formula (5)
Extracting the elements with the coefficients G before the variables I (t), P (t) and V N+(t)、VN- (t), and equally, for the subsequent model description, equating the known term to be Prhs and putting the element into RHS column vector
For currents flowing through nodes V N+ and V N- to flow in the positive direction, assuming the flow into node V N+ is in the positive direction, there are the variables V N+： I (t) and V N-： -I (t) with only I (t), the coefficients are 1 and-1, and no known term is provided.
According to the above description, coefficients before extracting unknown variables form an admittance matrix G:
column vector X formed by unknown variables:
Column vector RHS formed from a known quantity:
to this end, the admittance matrices G and RHS of composite Fecap MNA model have been obtained, and next, the F1 and F2 functions are obtained to write the model into the SPICE simulation program.
2.3 Combining Fecap terminal voltages, polarization states and model formulas to obtain specific expressions of functions F1 and F2 to form a final MNA model of Fecap;
the step 2.3) specifically comprises the following steps:
For the F 1 function, the terminal voltage of Fecap is contributed by the potential difference of the parasitic resistance inside the ferroelectric and the ferroelectric layer potential difference, so the L-K model formula based on Fecap is available:
Wherein AFE is the surface area of the ferroelectric capacitor. For the F 2 function, dp/dt in the L-K model formula of transform Fecap is:
combining the admittance matrices G and RHS, since the F1 and F2 functions are known, then an MNA model with the exact parameters Fecap is obtained;
As shown in fig. 3:
The corresponding matrix parameters are only written into modeling codes specified by SPICE to obtain the built-in MNA model Fecap in SPICE.

Claims (7)

1.一种面向电路仿真的铁电电容建模方法，其特征在于，包括以下步骤；1. A ferroelectric capacitor modeling method for circuit simulation, comprising the following steps: 步骤1：将修正节点分析法MNA引入到Fecap的MNAmodel建模；Step 1: Introduce the modified nodal analysis method (MNA) into the MNAmodel modeling of Fecap; 步骤2：基于MNA，利用Fecap的L-K模型公式得到补偿方程，用于求解未知变量的方程，得到最终的Fecap元件的导纳矩阵G和已知量向量列RHS，将导纳矩阵G和已知量列RHS合并得到Fecap的MNAmodel；Step 2: Based on MNA, the compensation equation is obtained using the L-K model formula of Fecap, which is used to solve the equation of the unknown variable to obtain the final Fecap element's admittance matrix G and the known quantity vector column RHS. The admittance matrix G and the known quantity column RHS are combined to obtain the Fecap's MNAmodel; 所述步骤1中，使得MNA与Fecap的MNAmodel建模联系具体过程为：In step 1, the specific process of connecting MNA with Fecap's MNAmodel modeling is as follows: 利用基尔霍夫电流定律KCL、基尔霍夫电压定律KVL以及元件自身的特性方程来求解未知变量，得到元件的导纳矩阵G，变量列X以及已知量列RHS，其中导纳矩阵G和已知量列RHS合并后即为元件的MNAmodel，每增加一个未知变量则会在导纳矩阵G中产生新的一行和一列，同时在变量列X的相应位置生产对应的未知量；Kirchhoff's current law KCL, Kirchhoff's voltage law KVL, and the element's own characteristic equation are used to solve the unknown variables, obtaining the element's admittance matrix G, variable column X, and known quantity column RHS. The admittance matrix G and known quantity column RHS are combined to form the element's MNAmodel. Each addition of an unknown variable generates a new row and column in the admittance matrix G, and at the same time, produces the corresponding unknown quantity at the corresponding position in the variable column X. 所述步骤2具体为：The step 2 is specifically as follows: 2.1)：基于对Fecap的L-K模型的一般化，得到Fecap模型的一般式；2.1): Based on the generalization of Fecap's L-K model, the general formula of Fecap model is obtained; 2.2)：利用向后欧拉法和N.R.迭代法对Fecap的补偿方程，用于求解未知变量的方程，进行线性化处理基于MNA，对Fecap的补偿方程进行线性化处理以满足Spice仿真工具的求解要求以及形成最终的MNAmodel；2.2): Using the backward Euler method and the N.R. iteration method to linearize the Fecap compensation equation for solving the equation of unknown variables, the Fecap compensation equation is linearized based on MNA to meet the solution requirements of the Spice simulation tool and form the final MNA model; 2.3)：结合Fecap的端电压、极化状态以及模型公式得到函数F1和F2函数的具体表达式，形成最终的Fecap的MNAmodel。2.3): Combine the terminal voltage, polarization state and model formula of Fecap to obtain the specific expressions of functions F1 and F2, forming the final MNAmodel of Fecap. 2.根据权利要求1所述的一种面向电路仿真的铁电电容建模方法，其特征在于，结合铁电电容Fecap的物理特性，在将铁电电容引入电路时，铁电电容的极化状态和电流是新的未知量，得到4X4的导纳矩阵G，1X4的变量列X(VN+(t)，VN-(t)，i(t)，p(t))T以及1X4的RHS列，然后将导纳矩阵G和已知量列RHS合并得到FECAP的MNAmodel。2. a kind of ferroelectric capacitor modeling method towards circuit simulation according to claim 1, it is characterized in that, in conjunction with the physical characteristic of ferroelectric capacitor Fecap, when ferroelectric capacitor is introduced circuit, the polarization state of ferroelectric capacitor and electric current are new unknown quantities, obtain the admittance matrix G of 4X4, the variable column X (VN + (t), VN- (t), i(t), p(t)) T of 1X4 and the RHS column of 1X4, then admittance matrix G and known quantity column RHS are merged to obtain the MNAmodel of FECAP. 3.根据权利要求1所述的一种面向电路仿真的铁电电容建模方法，其特征在于，所述步骤2.1)具体为：3. The ferroelectric capacitor modeling method for circuit simulation according to claim 1, wherein the step 2.1) is specifically: 选择L-K模型，极化P与单位能量G之间的关系通过下面的Landau自由能方程来描述；Selecting the L-K model, the relationship between polarization P and unit energy G is described by the following Landau free energy equation; 其中E为电场，得L-K模型：Where E is the electric field, the L-K model is obtained: 其中ρ是热力学系数，TFE表示铁电层的厚度，V＝ETFE是铁电层上的电压，而α，β，γ是与材料属性相关的系数，结合对L-K模型的分析，并根据Fecap的端电压和极化状态来列出Fecap模型的一般式即：Where ρ is the thermodynamic coefficient, T FE represents the thickness of the ferroelectric layer, V = ET FE is the voltage on the ferroelectric layer, and α, β, γ are coefficients related to material properties. Combined with the analysis of the LK model, and based on the terminal voltage and polarization state of the Fecap, the general formula of the Fecap model is listed: V(t)＝F1(I(t),P(t)) (1)V(t)＝F 1 (I(t),P(t)) (1) 其中流过Fecap的电流I和极化P分别为Fecap的内部状态变量，V表示端电压，F1、F2表示任意函数；Where the current I and polarization P flowing through the Fecap are the internal state variables of the Fecap, V represents the terminal voltage, and F1 and F2 represent arbitrary functions; 基于MNA，已经获得了求解Fecap未知变量的方程式(1)和式(2)，由于引入了电流变量和极化变量于列向量X中，所以在生成导纳矩阵G时会生成对应的行和列。Based on MNA, equations (1) and (2) for solving the unknown variables of Fecap have been obtained. Since the current variables and polarization variables are introduced into the column vector X, the corresponding rows and columns will be generated when generating the admittance matrix G. 4.根据权利要求3所述的一种面向电路仿真的铁电电容建模方法，其特征在于，所述2.2)中，SPICE中的半导体器件通常分为两类，即线性器件和非线性器件；4. The ferroelectric capacitor modeling method for circuit simulation according to claim 3, wherein, in 2.2), semiconductor devices in SPICE are generally divided into two categories, namely, linear devices and nonlinear devices; 器件的线性与非线性之分，取决于器件的端电压和流过器件的电流之间的关系，对于含有非线性元件的非线性电路，需要对其模型公式进行线性化处理；The distinction between linear and nonlinear devices depends on the relationship between the terminal voltage of the device and the current flowing through the device. For nonlinear circuits containing nonlinear elements, their model formulas need to be linearized. 利用Newton.Raphson迭代法以及向后欧拉法对Fecap模型的一般式进行线性化处理。The general formula of the Fecap model is linearized using the Newton-Raphson iterative method and the backward Euler method. 5.根据权利要求4所述的一种面向电路仿真的铁电电容建模方法，其特征在于，具体为：5. The ferroelectric capacitor modeling method for circuit simulation according to claim 4, characterized in that: 1)首先，端电压由节点电压表示；1) First, the terminal voltage is represented by the node voltage; 2)利用N.R.迭代法，在工作点(I(n)，P(n))处对F1函数进行泰勒一阶展开，可得：2) Using the NR iteration method, the Taylor first-order expansion of the F1 function at the working point (I (n) , P (n) ) is performed, and the following is obtained: 其中F1 (n)(t)＝F1(I(n)(t)，P(n)(t))，为了方便提取矩阵元素，对式(3)作进一步变换：Where F 1 (n) (t) = F 1 (I (n) (t), P (n) (t)). In order to extract matrix elements conveniently, equation (3) is further transformed as follows: 其中，VN+、VN-、I(t)、P(t)为待求解变量将放入X列向量，其对应的系数将作为导纳矩阵的元素，右边所有的n次迭代的相关项将作为已知量放入RHS列向量中，为了后续的模型描述，将已知项等效为Irhs：Among them, VN+, VN-, I(t), and P(t) are variables to be solved and will be placed in the X column vector. Their corresponding coefficients will be used as elements of the admittance matrix. All the relevant terms of the n iterations on the right will be placed in the RHS column vector as known quantities. For the subsequent model description, the known terms are equivalent to Irhs: 对于式(2)，对dP/dt采用向后欧拉法进行线性化处理，F2函数则同F1函数处理相同，在工作点(V(n)(t)，P(n)(t))出一阶泰勒展开，可得：For equation (2), dP/dt is linearized using the backward Euler method. The F2 function is processed in the same way as the F1 function. A first-order Taylor expansion is performed at the operating point (V (n) (t), P (n) (t)), and we can obtain: 其中，h是时间步长，F2 (n)(t)＝F2(V(n)(t)，P(n)(t))，V(t)＝VN+(t)-VN-(t)，再对式(5)进行变换处理：Where h is the time step, F 2 (n) (t) = F 2 (V (n) (t), P (n) (t)), V (t) = V N+ (t) - V N- (t), and then transform equation (5): 提取变量I(t)、P(t)、VN+(t)、VN-(t)前的系数为G的元素，同样，将已知项等效为Prhs并放入RHS列向量：Extract the elements of G whose coefficients are before the variables I(t), P(t), V N+ (t), and V N- (t). Similarly, equate the known terms to Prhs and put them into the RHS column vector: 对于流过节点VN+和VN-的电流，以流入为正方向，假设流入节点VN+为正方向，则有VN+：I(t)与VN-：-I(t)，变量仅有I(t)，系数为1和-1，不提供已知项。For the current flowing through nodes V N+ and V N- , the inflow direction is considered the positive direction. Assuming that the inflow into node V N+ is the positive direction, then V N+ : I(t) and V N- : -I(t). The only variable is I(t), and the coefficients are 1 and -1. No known terms are provided. 6.根据权利要求5所述的一种面向电路仿真的铁电电容建模方法，其特征在于，根据上述描述，提取未知变量前的系数形成导纳矩阵G：6. The ferroelectric capacitor modeling method for circuit simulation according to claim 5, characterized in that, according to the above description, the coefficients before the unknown variables are extracted to form the admittance matrix G: 由未知变量形成的列向量X：The column vector X formed by the unknown variables: 由已知量形成的列向量RHS：The RHS of the column vector formed by the known quantities: 到此，已获得了合成Fecap MNA model的导纳矩阵G和RHS。So far, the admittance matrix G and RHS of the synthetic Fecap MNA model have been obtained. 7.根据权利要求1所述的一种面向电路仿真的铁电电容建模方法，其特征在于，所述步骤2.3)具体为：7. The ferroelectric capacitor modeling method for circuit simulation according to claim 1, wherein the step 2.3) is specifically: 对于F1函数，基于Fecap的L-K模型公式可得：For the F1 function, the LK model formula based on Fecap can be obtained: 其中，AFE为铁电电容的表面积，对于F2函数，变换Fecap的L-K模型公式中的dp/dt即可：Where AFE is the surface area of the ferroelectric capacitor. For the F2 function, the dp/dt in the LK model formula of Fecap can be transformed to: 将导纳矩阵G和RHS合并，得到Fecap的MNAmodel；Merge the admittance matrix G and RHS to obtain the MNAmodel of Fecap; 只需将对应的各矩阵参数写入SPICE规定的建模代码中，得到Fecap在SPICE中的内建MNAmodel。Simply write the corresponding matrix parameters into the modeling code specified by SPICE to obtain the built-in MNAmodel of Fecap in SPICE.
CN202411601845.6A 2024-11-11 2024-11-11 Ferroelectric capacitor modeling method for circuit simulation Active CN119538832B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202411601845.6A CN119538832B (en) 2024-11-11 2024-11-11 Ferroelectric capacitor modeling method for circuit simulation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202411601845.6A CN119538832B (en) 2024-11-11 2024-11-11 Ferroelectric capacitor modeling method for circuit simulation

Publications (2)

Publication Number Publication Date
CN119538832A CN119538832A (en) 2025-02-28
CN119538832B true CN119538832B (en) 2025-09-09

Family

ID=94699133

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202411601845.6A Active CN119538832B (en) 2024-11-11 2024-11-11 Ferroelectric capacitor modeling method for circuit simulation

Country Status (1)

Country Link
CN (1) CN119538832B (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101251871A (en) * 2008-04-03 2008-08-27 清华大学 Behavior Model of Ferroelectric Capacitor Applied in SPICE Circuit Simulation Program
CN118446144A (en) * 2024-05-31 2024-08-06 晶铁半导体技术(广东)有限公司 A method, system, device and product for constructing a ferroelectric capacitor behavior model

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009283042A (en) * 2008-05-20 2009-12-03 Renesas Technology Corp Semiconductor signal processor
US11751403B1 (en) * 2021-11-01 2023-09-05 Kepler Computing Inc. Common mode compensation for 2T1C non-linear polar material based memory bit-cell

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101251871A (en) * 2008-04-03 2008-08-27 清华大学 Behavior Model of Ferroelectric Capacitor Applied in SPICE Circuit Simulation Program
CN118446144A (en) * 2024-05-31 2024-08-06 晶铁半导体技术(广东)有限公司 A method, system, device and product for constructing a ferroelectric capacitor behavior model

Also Published As

Publication number Publication date
CN119538832A (en) 2025-02-28

Similar Documents

Publication Publication Date Title
US9898566B2 (en) Method for automated assistance to design nonlinear analog circuit with transient solver
Miettinen et al. PartMOR: Partitioning-based realizable model-order reduction method for RLC circuits
CN113221298B (en) Method and system for simulating electromechanical transient process
US20080300848A1 (en) Efficient simulation of dominantly linear circuits
CN119538832B (en) Ferroelectric capacitor modeling method for circuit simulation
CN116438536A (en) Modeling timing behavior using extended sensitivity data of physical parameters
TWI856519B (en) Method, system, and non-transitory computer-readable medium for transient analysis of memory module circuit
Rodriguez-Chavez et al. Graph-based symbolic and symbolic sensitivity analysis of analog integrated circuits
Bizzarri et al. Shooting by a two-step Galerkin method
CN118643782A (en) Integrated circuit dynamic capacitance matching method, simulation device and storage medium
US8554529B2 (en) Black box model for large signal transient integrated circuit simulation
WO2022265805A1 (en) Enhanced cell modeling for waveform propagation
Brambilla et al. Recasting modified nodal analysis to improve reliability in numerical circuit simulation
Li et al. SILCA: SPICE-accurate iterative linear-centric analysis for efficient time-domain Simulation of VLSI circuits with strong parasitic couplings
JPH07287051A (en) Input data generator for logic simulator
Xiong et al. Constraint abstraction for vectorless power grid verification
Hao et al. Symbolic moment computation for statistical analysis of large interconnect networks
Hart et al. Streamlined Circuit Device Model Development with fREEDAR® ãnd ADOL-C
JP2008090630A (en) Circuit operation analysis device, circuit operation analysis method and program
Ye et al. Fast variational interconnect delay and slew computation using quadratic models
Litovski et al. Concurrent analogue fault simulation, the equation formulation aspect
CN118690720B (en) Method and system for testing stability of chip modeling component based on production operation
JP2001291723A (en) Thermal resistance analysis method and temperature analysis method of heating object
Wu et al. A Dynamic Capacitance Matching (DCM)-Based Current Response Algorithm for Signal Line RC Network
de Oliveira Numerical Simulation of Electronic Systems Based on Circuit-Block Partitioning Strategies

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant