CN119628577B - Linear bias circuit and radio frequency power amplifying circuit - Google Patents
Linear bias circuit and radio frequency power amplifying circuit Download PDFInfo
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- CN119628577B CN119628577B CN202510158702.0A CN202510158702A CN119628577B CN 119628577 B CN119628577 B CN 119628577B CN 202510158702 A CN202510158702 A CN 202510158702A CN 119628577 B CN119628577 B CN 119628577B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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Abstract
The invention provides a linear bias circuit and a radio frequency power amplifying circuit, wherein the linear bias circuit comprises a first power supply, a first current mirror, a second power supply, a second current mirror, a first capacitor, a first transistor, a first resistor and a second capacitor, and the second end of the first resistor is used as an output end of the linear bias circuit and is used for being connected to the radio frequency power amplifying circuit. The linear bias circuit can control the input impedance of the linear bias circuit so as to improve the linear compensation effect of the linear bias circuit, and the efficiency and the linearity of the radio frequency power amplifying circuit can reach the optimal state under the working power after the linear bias circuit is applied to the radio frequency power amplifying circuit.
Description
Technical Field
The present invention relates to the field of wireless communications technologies, and in particular, to a linear bias circuit and a radio frequency power amplifying circuit.
Background
GaAs HBT (gallium arsenide heterojunction bipolar transistor) is widely applied to the fields of microwave power amplifiers, especially mobile phone power amplifiers, due to the advantages of high power density, high linearity and the like.
In a power amplifier designed based on GaAs HBT, the design of the static bias point is important for the performance of the power amplifier, on the one hand, when the input radio frequency power increases, the excessive positive voltage and negative current applied to the base-emitter transistor are limited due to the clamping effect of the transistor, so that the direct current voltage of the base-emitter junction is reduced, the current of the collector is increased, the transconductance is reduced, the gain is reduced and the phase is distorted finally, which causes the deterioration of linearity, on the other hand, as the thermal conductivity of GaAs (gallium arsenide) self material is very low, and as the temperature increases, the thermal conductivity of GaAs HBT continues to be reduced, and at higher temperature, the self-heating effect of GaAs HBT causes a series of problems such as the rise of the junction temperature of the transistor, the reduction of the opening voltage of the emitter junction, the gain reduction of the device and the like, and in addition, the parasitic impedance is increased due to the reduction of the carrier mobility.
In order to stabilize the static bias point of the power amplifier and achieve the temperature stabilizing effect to a certain extent, as shown in fig. 1, the prior art provides an active linear bias circuit, which comprises a triode Q1, a triode Q2, a triode Q3, a resistor R1, a resistor R2 and a capacitor C1, wherein one end of the resistor R1, namely, a collector of the triode, is respectively connected to a voltage VBB, and an output end of the active linear bias circuit is connected to the power amplifier, namely, one end of the resistor R2 is used as an output end of the active linear bias circuit. The power amplifier comprises a capacitor Cin, a triode Q0, a first end of the capacitor Cin is connected to the radio frequency signal RFin, a second end of the capacitor Cin is connected to a base electrode of the triode Q0, and an output end of the active linear bias circuit is connected to the base electrode of the triode Q0.
The capacitance of the capacitor C1 in the active linear bias circuit needs to be set to be large enough, so that almost all radio frequency signals passing through the Y connection point are bypassed to the ground by the capacitor C1, thereby ensuring the voltage stability of the Y connection point, when the power of the input radio frequency signals increases, part of radio frequency signals leak into the bias circuit, vbe1 (base-emitter junction direct current voltage drop) after rectification by the triode Q1 is reduced, and Vbe0 (base-emitter junction voltage of the triode in the power amplifier) is increased due to the reduction of Vbe1, so that Vbe0 is compensated, and the static working point of the power amplifier is stable. In addition, when the temperature rises, due to the existence of the resistor R2, the current increased by the triode Q1 and the triode Q2 can be inhibited to a certain extent, and the temperature stabilizing effect is realized to a certain extent.
Although the active linear bias circuit can stabilize the static bias point of the power amplifier and realize the temperature stabilizing effect to a certain extent, in the communication technology, the complex modulation signal has a larger PAPR (peak-to-average ratio), which can reach the peak value of the efficiency when approaching saturation for the power amplifier with the inherent bias of the active linear bias circuit, and the linearity of the power amplifier can be deteriorated when approaching saturation, so the active linear bias circuit can not make the efficiency and the linearity of the power amplifier reach the optimal state under the working power, and in addition, the existence of the resistor R2 can increase the input impedance of the active linear bias circuit, which can reduce the linear compensation effect of the bias circuit.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a linear bias circuit and a radio frequency power amplifying circuit, so as to solve the problems that the efficiency and linearity of a power amplifier under working power cannot reach the optimal state and the input impedance of the power amplifier is increased to reduce the linear compensation effect of the bias circuit in the prior art.
In order to solve the technical problems, the invention adopts the following technical scheme:
in a first aspect, the present invention provides a linear bias circuit comprising a first power supply, a first current mirror, a second power supply, a second current mirror, a first capacitor, a first transistor, a first resistor, and a second capacitor;
The negative electrode of the first power supply is grounded;
the input end of the first current mirror is connected to the positive electrode of the first power supply;
The negative electrode of the second power supply is grounded;
The first input end of the second current mirror is connected to the output end of the first current mirror, the second input end of the second current mirror is connected to the positive electrode of the second power supply, and the third input end of the second current mirror is used for being connected with working voltage;
A first end of the first capacitor is connected to the positive electrode of the second power supply, and a second end of the first capacitor is grounded;
A first input end of the first transistor is connected to the positive electrode of the second power supply, a second input end of the first transistor is used for being connected with working voltage, and an output end of the first transistor is connected to an output end of the second current mirror;
the first resistor is connected to the output end of the second current mirror, and the second end of the first resistor is used as the output end of the linear bias circuit and is used for being connected to a radio frequency power amplifying circuit;
the first end of the second capacitor is connected to the first end of the first resistor, and the second end of the second capacitor is connected to the second end of the first resistor.
Preferably, the first power supply and the second power supply are both current sources.
Preferably, the first transistor is a first triode, the base electrode of the first triode is used as a first input end of the first transistor, the collector electrode of the first triode is used as a second input end of the first transistor, and the emitter electrode of the first triode is used as an output end of the first transistor.
Preferably, the first current mirror comprises a second triode and a third triode;
The collector electrode of the second triode is used as the input end of the first current mirror, the base electrode of the second triode is connected to the collector electrode of the second triode, and the emitter electrode of the second triode is grounded;
the base electrode of the third triode is connected to the base electrode of the second triode, the collector electrode of the third triode is used as the output end of the first current mirror, and the emitter electrode of the third triode is grounded.
Preferably, the second current mirror includes a fourth triode, a second resistor, a fifth triode and a sixth triode;
the base electrode of the fourth triode is used as a first input end of the second current mirror, the collector electrode of the fourth triode is used as a second input end of the second current mirror, and the emitter electrode of the fourth triode is grounded;
The first end of the second resistor is connected to the collector electrode of the fourth triode;
the base electrode of the fifth triode is connected to the second end of the second resistor, the collector electrode of the fifth triode is used as the third input end of the second current mirror, and the emitter electrode of the fifth triode is connected to the base electrode of the fourth triode;
The base electrode of the sixth triode is connected to the base electrode of the fourth triode, the collector electrode of the sixth triode is used as the output end of the second current mirror, and the emitter electrode of the sixth triode is grounded.
Preferably, the first power supply and the second power supply are both voltage sources.
Preferably, the first transistor is a first field effect transistor, a gate of the first field effect transistor is used as a first input end of the first transistor, a drain of the first field effect transistor is used as a second input end of the first transistor, and a source of the first field effect transistor is used as an output end of the first transistor.
Preferably, the first current mirror comprises a second field effect transistor and a third field effect transistor;
The drain electrode of the second field effect transistor is used as the input end of the first current mirror, the grid electrode of the second field effect transistor is connected to the drain electrode of the second field effect transistor, and the source electrode of the second field effect transistor is grounded;
The grid electrode of the third field effect tube is connected to the grid electrode of the second field effect tube, the drain electrode of the third field effect tube is used as the output end of the first current mirror, and the source electrode of the third field effect tube is grounded.
Preferably, the second current mirror includes a fourth field effect transistor, a second resistor, a fifth field effect transistor and a sixth field effect transistor;
the grid electrode of the fourth field effect transistor is used as a first input end of the second current mirror, the drain electrode of the fourth field effect transistor is used as a second input end of the second current mirror, and the source electrode of the fourth field effect transistor is grounded;
The first end of the second resistor is connected to the drain electrode of the fourth field effect transistor;
the grid electrode of the fifth field effect transistor is connected to the second end of the second resistor, the drain electrode of the fifth field effect transistor is used as the third input end of the second current mirror, and the source electrode of the fifth field effect transistor is connected to the grid electrode of the fourth field effect transistor;
The grid electrode of the sixth field effect transistor is connected to the grid electrode of the fourth field effect transistor, the drain electrode of the sixth field effect transistor is used as the output end of the second current mirror, and the source electrode of the sixth field effect transistor is grounded.
In a second aspect, the present invention provides a radio frequency power amplifying circuit comprising an input matching network, a power amplifier and a linear bias circuit as described above;
The input end of the input matching network is used for connecting radio frequency signals;
the input end of the power amplifier is connected to the output end of the input matching network, and the output end of the power amplifier is used for outputting the radio frequency signal after power amplification;
An output of the linear bias circuit is connected to an input of the power amplifier.
Compared with the prior art, the linear bias circuit can control the input impedance of the linear bias circuit to improve the linear compensation effect by designing the first power supply, the first current mirror, the second power supply, the second current mirror, the first capacitor, the first transistor, the first resistor and the second capacitor and limiting the connection mode of each device, and in addition, after the linear bias circuit is applied to the radio frequency power amplifying circuit, the efficiency and the linearity of the radio frequency power amplifying circuit under the working power can be enabled to reach the optimal state.
Drawings
The present invention will be described in detail with reference to the accompanying drawings. The foregoing and other aspects of the invention will become more apparent and more readily appreciated from the following detailed description taken in conjunction with the accompanying drawings. In the accompanying drawings:
FIG. 1 is a schematic circuit diagram of an active linear bias circuit of the prior art after being applied to a power amplifier;
fig. 2 is a schematic circuit diagram of a linear bias circuit according to an embodiment of the present invention after the linear bias circuit is applied to a radio frequency power amplifying circuit.
Detailed Description
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs, the terms used in the description herein are used for the purpose of describing particular embodiments only and are not intended to limit the application, and the terms "comprising" and "having" and any variations thereof in the description of the application and the claims and the above description of the drawings are intended to cover non-exclusive inclusions. The terms first, second and the like in the description and in the claims or in the above-described figures, are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
The embodiment of the invention provides a linear bias circuit 100, which is shown in fig. 2, and includes a first power supply 1, a first current mirror 2, a second power supply 4, a second current mirror 3, a first capacitor Cb1, a first transistor 5, a first resistor Rb1, and a second capacitor Cb2.
The negative electrode of the first power supply 1 is grounded.
The input of the first current mirror 2 is connected to the positive pole of the first power supply 1.
The negative pole of the second power supply 4 is grounded.
The first input of the second current mirror 3 is connected to the output of the first current mirror 2, the second input of the second current mirror 3 is connected to the positive pole of the second power supply 4, and the third input of the second current mirror 3 is for connection to the operating voltage VCC.
The first end of the first capacitor Cb1 is connected to the positive electrode of the second power supply 4, and the second end of the first capacitor Cb1 is grounded.
The first input of the first transistor 5 is connected to the anode of the second power supply 4, the second input of the first transistor 5 is for being connected to an operating voltage VCC, and the output of the first transistor 5 is connected to the output of the second current mirror 3.
The first resistor Rb1 is connected to the output terminal of the second current mirror 3, and the second terminal of the first resistor Rb1 is used as the output terminal of the linear bias circuit 100 for connection to the radio frequency power amplifying circuit 200.
The first end of the second capacitor Cb2 is connected to the first end of the first resistor Rb1, and the second end of the second capacitor Cb2 is connected to the second end of the first resistor Rb 1.
Wherein, the first power supply 1 and the second power supply 4 are both current sources.
The first transistor 5 is a first triode HBT1, the base electrode of the first triode HBT1 is used as a first input end of the first transistor 5, the collector electrode of the first triode HBT1 is used as a second input end of the first transistor 5, and the emitter electrode of the first triode HBT1 is used as an output end of the first transistor 5.
The first current mirror 2 comprises a second transistor HBT2 and a third transistor HBT3.
The collector of the second triode HBT2 serves as the input end of the first current mirror 2, the base of the second triode HBT2 is connected to the collector of the second triode HBT2, and the emitter of the second triode HBT2 is grounded.
The base of the third triode HBT3 is connected to the base of the second triode HBT2, the collector of the third triode HBT3 serves as the output end of the first current mirror 2, and the emitter of the third triode HBT3 is grounded.
The second current mirror 3 comprises a fourth transistor HBT4, a second resistor Rb2, a fifth transistor HBT5 and a sixth transistor HBT6.
The base electrode of the fourth triode HBT4 is used as a first input end of the second current mirror 3, the collector electrode of the fourth triode HBT4 is used as a second input end of the second current mirror 3, and the emitter electrode of the fourth triode HBT4 is grounded;
The resistance of the second resistor Rb2 is the same as that of the first resistor Rb1, and the first end of the second resistor Rb2 is connected to the collector of the fourth transistor HBT 4.
The base of the fifth transistor HBT5 is connected to the second end of the second resistor Rb2, the collector of the fifth transistor HBT5 is used as the third input end of the second current mirror 3, and the emitter of the fifth transistor HBT5 is connected to the base of the fourth transistor HBT 4.
The base of the sixth transistor HBT6 is connected to the base of the fourth transistor HBT4, the collector of the sixth transistor HBT6 is used as the output terminal of the second current mirror 3, and the emitter of the sixth transistor HBT6 is grounded.
After the linear bias circuit 100 in this embodiment is applied to the rf power amplifying circuit 200 (as shown in fig. 2), the first triode HBT1 and the bypass first capacitor Cb1 jointly achieve the linearization of the linear bias circuit 100, the capacitance value to be set for the first capacitor Cb1 needs to be set to be large enough, so that almost all the rf signals passing through the Y connection point can be bypassed to the ground by the first capacitor Cb1, thereby ensuring the voltage stability of the Y connection point, when the power of the input rf signal increases, part of the rf signals leak into the linear bias circuit 100, the dc voltage drop of the base-emitter junction through rectification of the first triode HBT1 is reduced, and at this time, the base-emitter junction voltage of the seventh triode HBT7 serving as the power amplifier 202 of the rf power amplifying circuit 200 correspondingly increases, so that the base-emitter junction voltage of the seventh triode HBT7 is compensated to suppress the decrease of the base-emitter junction voltage thereof, and in addition, by designing the second capacitor Cb2 in parallel with the first resistor Rb1, more rf energy can be prevented from passing through the first resistor Rb1.
When the linear bias circuit 100 in the present embodiment is applied to the radio frequency power amplifying circuit 200 (as shown in fig. 2), the following expression can be obtained with the base current ignored:
Vbe(HBT1)+Vbe(HBT7)+V(Rb1)=Vbe(HBT6)+Vbe(HBT5)+V(Rb2);
wherein Vbe represents the base-emitter junction voltage of the triode, and V represents the resistance value of the resistor.
Because the collector currents of the sixth transistor HBT6 and the first transistor HBT1 are the same, vbe (HBT 1) =vbe (HBT 6) can be selected, and a suitable resistance value can be selected, so that V (Rb 1) =v (Rb 2), in this case, vbe (HBT 7) =vbe (HBT 5), the current of the first current source I1 controls the current passing through the second transistor HBT2, the current of the second transistor HBT2 is the same as the current of the third transistor HBT3 under the action of the first current mirror 2, meanwhile, the fifth transistor HBT5 is the same as the current of the third transistor HBT3, and the limit condition that Vbe (HBT 7) =vbe (HBT 4) is added, the second current source I2 can indirectly control the current in the seventh transistor HBT7, the current of the first current source I1 and the sixth transistor HBT6 can be controlled, and the static current of the first transistor HBT1 can be controlled, and the emitter bias current of the third transistor HBT1 can be controlled to be the same as the linear bias current of the third transistor HBT1, and the bias current of the third transistor HBT1 is the linear bias 100, and the bias current of the third transistor HBT1 is input to the linear bias 100.
Based on the above analysis, by selecting the appropriate emitter area of the triode and the parameters of the first resistor Rb1 and the second capacitor Cb2, the quiescent current of the seventh triode HBT7 and the impedance of the linear bias circuit 100 can be controlled, thereby providing greater flexibility for the design of the rf power amplifier circuit 200. Helping to optimize its efficiency while maintaining a certain degree of linearity.
In the practical application process of the linear bias circuit 100 in this embodiment, the capacitance of the bypass first capacitor Cb1 needs to be set to be large enough, so that almost all radio frequency signals passing through the Y connection point are bypassed to the ground by the first capacitor Cb1, thereby ensuring the voltage stability of the Y connection point, the first triode HBT1 can exert the optimal linearization effect, a proper resistance value is selected, so that V (Rb 1) =v (Rb 2), at this time, the first current source I1 can control the quiescent current in the seventh triode HBT7, in the process of operating the radio frequency power amplification circuit 200, the current of the first current source I1 can be dynamically adjusted along with the increase of the input power, thereby ensuring the optimal efficiency and linearity of the radio frequency power amplification circuit 200, and the current of the second current source I2 can be dynamically adjusted, thereby adjusting the emitter impedance of the first triode HBT1, further controlling the input impedance of the whole linear bias circuit 100, thereby bringing greater flexibility to the design of the radio frequency power amplification circuit 200, and being beneficial to optimizing the efficiency of the radio frequency power amplification circuit 200, and maintaining a certain linearity.
The effect of the linear bias circuit 100 in this embodiment is summarized as controllable impedance, the first resistor Rb1 and the second capacitor Cb2 are connected in parallel, so that the linearization effect of the linear bias circuit 100 on the rf power amplifying circuit 200 can be exerted to the greatest extent while the self-heating effect of the triode is compensated, meanwhile, the quiescent current of the seventh triode HBT7 can be independently controlled by controlling the first current source I1, the working state of the rf power amplifying circuit 200 can be flexibly adjusted along with the power change, and the input impedance of the linear bias circuit 100 can be controlled by controlling the second current source I2, which can improve the design freedom degree of the rf power amplifying circuit 200, and meanwhile, the memory effect of the rf power amplifying circuit 200 and the like can be independently interfered and inhibited, so as to improve the performance of the rf power amplifying circuit 200.
Compared with the prior art, the linear bias circuit 100 in this embodiment is designed with the first power supply 1, the first current mirror 2, the second power supply 4, the second current mirror 3, the first capacitor Cb1, the first transistor 5, the first resistor Rb1 and the second capacitor Cb2, and the connection modes of the devices are limited, so that the input impedance of the linear bias circuit 100 can be controlled to improve the linear compensation effect thereof, and in addition, after the linear bias circuit 100 is applied to the rf power amplifying circuit 200, the efficiency and the linearity of the rf power amplifying circuit 200 under the working power can be optimized.
Example two
The first embodiment is different from the first embodiment in that the first power source 1 and the second power source 4 are both voltage sources.
The first transistor 5 is a first field effect transistor, the grid electrode of the first field effect transistor is used as a first input end of the first transistor 5, the drain electrode of the first field effect transistor is used as a second input end of the first transistor 5, and the source electrode of the first field effect transistor is used as an output end of the first transistor 5.
The first current mirror 2 comprises a second field effect transistor and a third field effect transistor;
the drain electrode of the second field effect transistor is used as the input end of the first current mirror 2, the grid electrode of the second field effect transistor is connected to the drain electrode of the second field effect transistor, and the source electrode of the second field effect transistor is grounded;
The grid electrode of the third field effect tube is connected to the grid electrode of the second field effect tube, the drain electrode of the third field effect tube is used as the output end of the first current mirror 2, and the source electrode of the third field effect tube is grounded.
The second current mirror 3 comprises a fourth field effect transistor, a second resistor, a fifth field effect transistor and a sixth field effect transistor;
the grid electrode of the fourth field effect transistor is used as the first input end of the second current mirror 3, the drain electrode of the fourth field effect transistor is used as the second input end of the second current mirror 3, and the source electrode of the fourth field effect transistor is grounded;
the first end of the second resistor is connected to the drain electrode of the fourth field effect transistor;
The grid electrode of the fifth field effect transistor is connected to the second end of the second resistor, the drain electrode of the fifth field effect transistor is used as the third input end of the second current mirror 3, and the source electrode of the fifth field effect transistor is connected to the grid electrode of the fourth field effect transistor;
the grid electrode of the sixth field effect transistor is connected to the grid electrode of the fourth field effect transistor, the drain electrode of the sixth field effect transistor is used as the output end of the second current mirror 3, and the source electrode of the sixth field effect transistor is grounded.
The first difference between the present embodiment and the above embodiment is that the transistor is replaced with a field effect transistor, and the current source is replaced with a voltage source, so that the linear bias circuit in the present embodiment is substantially the same as the linear bias circuit 100 in the first embodiment, and therefore, the working principle and the achieved technical effect of the linear bias circuit in the present embodiment are the same as those of the linear bias circuit 100 in the first embodiment, and are not repeated herein.
Example III
The present embodiment provides a radio frequency power amplifying circuit 200, which, as shown in fig. 2, includes an input matching network 201, a power amplifier 202, and the linear bias circuit 100 in the first embodiment.
An input of the input matching network 201 is for connection to a radio frequency signal RFin.
An input terminal of the power amplifier 202 is connected to an output terminal of the input matching network 201, and an output terminal of the power amplifier 202 is configured to output the power amplified radio frequency signal RFout.
An output of the linear bias circuit 100 is connected to an input of the power amplifier 202.
In this embodiment, the input matching network 201 includes a third capacitor Cb3, a first terminal of the third capacitor Cb3 is used as an input terminal of the input matching network 201, and a second terminal of the third capacitor Cb3 is used as an output terminal of the input matching network 201.
The power amplifier 202 includes a seventh triode HBT7, a base electrode of the seventh triode HBT7 is used as an input end of the power amplifier 202, a collector electrode of the seventh triode HBT7 is used as an output end of the power amplifier 202, and an emitter electrode of the seventh triode HBT7 is grounded. Of course, according to practical requirements, the seventh triode HBT7 may be replaced by a seventh field effect transistor, where the gate of the seventh field effect transistor is used as the input end of the power amplifier 202, the drain of the seventh field effect transistor is used as the output end of the power amplifier 202, and the source of the seventh field effect transistor is grounded.
Since the operating principle and the achieved technical effects of the linear bias circuit in the second embodiment are the same as those of the linear bias circuit 100 in the first embodiment, the linear bias circuit 100 in the first embodiment to which the present embodiment is applied may be replaced with the linear bias circuit in the second embodiment according to actual needs.
Since the rf power amplifying circuit 200 in the present embodiment uses the linear bias circuit 100 in the first embodiment, the technical effects achieved by the linear bias circuit 100 in the first embodiment can be achieved, and the details are not repeated here.
It should be noted that the above embodiments described above with reference to the drawings are only for illustrating the present invention and not for limiting the scope of the present invention, and it should be understood by those skilled in the art that modifications or equivalent substitutions to the present invention are intended to be included in the scope of the present invention without departing from the spirit and scope of the present invention. Furthermore, unless the context indicates otherwise, words occurring in the singular form include the plural form and vice versa. In addition, unless specifically stated, all or a portion of any embodiment may be used in combination with all or a portion of any other embodiment.
Claims (10)
1. A linear bias circuit, which is characterized by comprising a first power supply, a first current mirror, a second power supply, a second current mirror, a first capacitor, a first transistor, a first resistor and a second capacitor;
The negative electrode of the first power supply is grounded;
the input end of the first current mirror is connected to the positive electrode of the first power supply;
The negative electrode of the second power supply is grounded;
The first input end of the second current mirror is connected to the output end of the first current mirror, the second input end of the second current mirror is connected to the positive electrode of the second power supply, and the third input end of the second current mirror is used for being connected with working voltage;
A first end of the first capacitor is connected to the positive electrode of the second power supply, and a second end of the first capacitor is grounded;
A first input end of the first transistor is connected to the positive electrode of the second power supply, a second input end of the first transistor is used for being connected with working voltage, and an output end of the first transistor is connected to an output end of the second current mirror;
The first end of the first resistor is connected to the output end of the second current mirror, and the second end of the first resistor is used as the output end of the linear bias circuit and is used for being connected to a radio frequency power amplifying circuit;
The first end of the second capacitor is connected to the first end of the first resistor, and the second end of the second capacitor is connected to the second end of the first resistor;
The second current mirror comprises a fourth transistor, a second resistor, a fifth transistor and a sixth transistor;
the input end of the fourth transistor is used as the second input end of the second current mirror, the first output end of the fourth transistor is grounded, and the second output end of the fourth transistor is used as the first input end of the second current mirror;
A first end of the second resistor is connected to an input end of the fourth transistor;
A first input end of the fifth transistor is connected to a second end of the second resistor, a second input end of the fifth transistor is used as a third input end of the second current mirror, and an output end of the fifth transistor is connected to an output end of the fourth transistor;
the input end of the sixth transistor is connected to the output end of the fourth transistor, the first output end of the sixth transistor is grounded, and the second output end of the sixth transistor serves as the output end of the second current mirror.
2. The linear bias circuit of claim 1, wherein the first power supply and the second power supply are both current sources.
3. The linear bias circuit of claim 2, wherein the first transistor is a first transistor, a base of the first transistor is used as a first input of the first transistor, a collector of the first transistor is used as a second input of the first transistor, and an emitter of the first transistor is used as an output of the first transistor.
4. The linear bias circuit of claim 3, wherein the first current mirror includes a second transistor and a third transistor;
The collector electrode of the second triode is used as the input end of the first current mirror, the base electrode of the second triode is connected to the collector electrode of the second triode, and the emitter electrode of the second triode is grounded;
the base electrode of the third triode is connected to the base electrode of the second triode, the collector electrode of the third triode is used as the output end of the first current mirror, and the emitter electrode of the third triode is grounded.
5. The linear bias circuit of claim 4, wherein the fourth transistor is a fourth transistor, the fifth transistor is a fifth transistor, and the sixth transistor is a sixth transistor;
the collector of the fourth triode is used as the input end of the fourth transistor, the reflection of the fourth triode is used as the first output end of the fourth transistor, and the base of the fourth triode is used as the second output end of the fourth transistor;
the base electrode of the fifth triode is connected to the first input end of the fifth transistor, the collector electrode of the fifth triode is used as the second input end of the fifth transistor, and the emitter electrode of the fifth triode is used as the output end of the fifth transistor;
the base electrode of the sixth triode is connected to the input end of the sixth transistor, the emitter electrode of the sixth triode is used as the first output end of the sixth transistor, and the collector electrode of the sixth triode is used as the second output end of the sixth transistor.
6. The linear bias circuit of claim 1, wherein the first power supply and the second power supply are both voltage sources.
7. The linear bias circuit of claim 6, wherein the first transistor is a first field effect transistor, a gate of the first field effect transistor is used as a first input terminal of the first transistor, a drain of the first field effect transistor is used as a second input terminal of the first transistor, and a source of the first field effect transistor is used as an output terminal of the first transistor.
8. The linear bias circuit of claim 7, wherein the first current mirror includes a second field effect transistor and a third field effect transistor;
The drain electrode of the second field effect transistor is used as the input end of the first current mirror, the grid electrode of the second field effect transistor is connected to the drain electrode of the second field effect transistor, and the source electrode of the second field effect transistor is grounded;
The grid electrode of the third field effect tube is connected to the grid electrode of the second field effect tube, the drain electrode of the third field effect tube is used as the output end of the first current mirror, and the source electrode of the third field effect tube is grounded.
9. The linear bias circuit of claim 8, wherein the fourth transistor is a fourth field effect transistor, the fifth transistor is a fifth field effect transistor, and the sixth transistor is a sixth field effect transistor;
The drain electrode of the fourth field effect transistor is used as an input end of the fourth transistor, the source electrode of the fourth field effect transistor is used as a first output end of the fourth transistor, and the grid electrode of the fourth field effect transistor is used as a second output end of the fourth transistor;
The grid electrode of the fifth field effect transistor is connected to the first input end of the fifth transistor, the drain electrode of the fifth field effect transistor is used as the second input end of the fifth transistor, and the source electrode of the fifth field effect transistor is connected to the output end of the fifth transistor;
The grid electrode of the sixth field effect transistor is connected to the input end of the sixth transistor, the source electrode of the sixth field effect transistor is used as the first output end of the sixth transistor, and the drain electrode of the sixth field effect transistor is used as the second output end of the sixth transistor.
10. A radio frequency power amplifying circuit, characterized in that it comprises an input matching network, a power amplifier and a linear biasing circuit according to any one of claims 1 to 9;
The input end of the input matching network is used for connecting radio frequency signals;
the input end of the power amplifier is connected to the output end of the input matching network, and the output end of the power amplifier is used for outputting the radio frequency signal after power amplification;
An output of the linear bias circuit is connected to an input of the power amplifier.
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| CN202510158702.0A CN119628577B (en) | 2025-02-13 | 2025-02-13 | Linear bias circuit and radio frequency power amplifying circuit |
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| CN202510158702.0A CN119628577B (en) | 2025-02-13 | 2025-02-13 | Linear bias circuit and radio frequency power amplifying circuit |
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| CN119628577B true CN119628577B (en) | 2025-05-27 |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1489826A (en) * | 2000-07-21 | 2004-04-14 | �ʼҷ����ֵ�������˾ | High-frequency amplifier with dependent control of quiescent current and bias impedance |
| CN115395905A (en) * | 2021-05-25 | 2022-11-25 | 中兴通讯股份有限公司 | Power amplifier bias circuit, power amplification circuit and communication equipment |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006509458A (en) * | 2002-12-09 | 2006-03-16 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Amplifier circuit with extended Wilson current mirror self-bias booster circuit |
| JP4026603B2 (en) * | 2004-02-16 | 2007-12-26 | ソニー株式会社 | Bias voltage supply circuit and high frequency amplifier circuit |
| US7345547B2 (en) * | 2005-10-17 | 2008-03-18 | Wj Communications, Inc. | Bias circuit for BJT amplifier |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1489826A (en) * | 2000-07-21 | 2004-04-14 | �ʼҷ����ֵ�������˾ | High-frequency amplifier with dependent control of quiescent current and bias impedance |
| CN115395905A (en) * | 2021-05-25 | 2022-11-25 | 中兴通讯股份有限公司 | Power amplifier bias circuit, power amplification circuit and communication equipment |
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