Disclosure of Invention
The invention provides a method, a device and equipment for phase locking of power grid voltage of a power electronic converter, which are used for solving the technical problems that the existing phase-locked loop of a follow-up grid type converter is easily affected by power grid fluctuation, so that the power electronic converter is controlled to fluctuate and even unstably occur, and overcurrent off-grid occurs.
In view of this, a first aspect of the present invention provides a method for phase locking a power grid voltage of a power electronic converter, comprising:
S1, obtaining an output signal of a three-phase-locked loop;
s2, converting an output signal of the three-phase-locked loop into a square wave signal;
S3, judging whether the square wave signal is normal or not according to the preset power system stability range degree, if yes, executing the step S4, otherwise, executing the step S5, wherein the preset power system stability range degree comprises frequency domain degree, period domain degree and phase domain degree;
S4, outputting an output signal of the three-phase-locked loop;
S5, performing linear weighting calculation on the phase value of the output signal of the three-phase-locked loop by adopting a sliding window to obtain a weighted phase value, performing linear weighting calculation on the frequency value of the output signal of the three-phase-locked loop by adopting a sliding window to obtain a weighted frequency value, and executing the step S6;
s6, according to the weighted phase value and the weighted frequency value, synthesizing the output signals of the three-phase-locked loop into an internal phase-locked signal for output and identifying a phase-locked abnormal signal.
Optionally, step S3 specifically includes:
And recording a period average value Tavg0 and a period error range dT of the square wave signal in a preset time, judging whether the square wave signal is a normal signal or not according to whether the frequency of the square wave signal is between 48Hz and 51.5Hz, whether the frequency change rate is not more than 0.2Hz/S and whether the phase is not suddenly changed in the period range Tavg0-dT to Tavg0+dT, judging whether the square wave signal is a normal signal or not according to whether the frequency of the first periodic signal is between 48Hz and 51.5Hz, judging whether the signal period is normal or not according to whether the frequency change rate is not more than 0.2Hz/S and whether the phase is suddenly changed or not in the period error range dT, regarding that the signal is not the first periodic signal, regarding the continuous period change is smaller than the preset time period if the previous periodic signal is the normal signal, regarding the signal period as normal, performing step S4, regarding the continuous period change is not smaller than the preset time period, regarding the signal as abnormal, performing step S5, wherein the preset time covers a plurality of signals.
Optionally, the preset time period is 1.6us.
Alternatively, the preset time is 30s.
Optionally, step S3 further includes:
judging whether the square wave signal in 10s is judged to be the accumulation time of the abnormal signal or not to exceed 2s, if so, forcibly setting the square wave signal with the accumulation time exceeding 2s in the preset time to be a normal signal.
Optionally, in step S5, the calculation formula of the weighted phase value is:
Wherein, For the weighted phase value(s),For the phase values at n times arranged in reverse order in time,Is thatThe phase weight values of the one-to-one correspondence,The value is linearly reduced between 0 and 1.
Optionally, in step S5, the calculation formula of the weighted frequency value is:
Wherein, For the weighted frequency values to be used,For the frequency values at n times arranged in reverse order in time,Is thatThe frequency weight values of the one-to-one correspondence,The value is linearly reduced between 0 and 1.
The invention provides a power grid voltage phase locking device of a power electronic converter, which comprises a three-phase locked loop, an inner phase locked signal construction module and a comprehensive judgment output module;
the three-phase-locked loop and the internal phase-locked signal construction module are connected, and the three-phase-locked loop and the internal phase-locked signal construction module are respectively connected with the comprehensive judgment output module;
The three-phase-locked loop is used for acquiring three-phase signals from a three-phase power supply, processing the three-phase signals and outputting three-phase external phase-locked signals;
the internal phase-locked signal construction module is used for acquiring an output signal of the three-phase-locked loop, converting the output signal of the three-phase-locked loop into a square wave signal, linearly weighting the phase value of the output signal of the three-phase-locked loop by adopting a sliding window to obtain a weighted phase value, linearly weighting the frequency value of the output signal of the three-phase-locked loop by adopting the sliding window to obtain a weighted frequency value, synthesizing the output signal of the three-phase-locked loop into the internal phase-locked signal according to the weighted phase value and the weighted frequency value, outputting the internal phase-locked signal and identifying a phase-locked abnormal signal;
The comprehensive judgment output module is used for judging whether the square wave signal is normal or not according to the preset power system stability range domain degree, if yes, outputting an output signal of the three-phase-locked loop, otherwise, outputting an inner phase-locked signal synthesized by the inner phase-locked signal construction module, wherein the preset power system stability range domain degree comprises frequency domain degree, period domain degree and phase domain degree.
Optionally, the root comprehensive judgment output module is specifically configured to:
And recording a period average value Tavg0 and a period error range dT of the square wave signal in a preset time, judging whether the square wave signal is a normal signal or not according to whether the frequency of the square wave signal is between 48Hz and 51.5Hz, whether the frequency change rate is not more than 0.2Hz/S and whether the phase is not suddenly changed in the period range Tavg0-dT to Tavg0+dT, judging whether the square wave signal is a normal signal or not according to whether the frequency of the first periodic signal is between 48Hz and 51.5Hz, judging whether the signal period is normal or not according to whether the frequency change rate is not more than 0.2Hz/S and whether the phase is suddenly changed or not in the period error range dT, regarding that the signal is not the first periodic signal, regarding the continuous period change is smaller than the preset time period if the previous periodic signal is the normal signal, regarding the signal period as normal, performing step S4, regarding the continuous period change is not smaller than the preset time period, regarding the signal as abnormal, performing step S5, wherein the preset time covers a plurality of signals.
Optionally, in the phase-locked signal building module, the calculation formula of the weighted phase value is:
Wherein, For the weighted phase value(s),For the phase values at n times arranged in reverse order in time,Is thatThe phase weight values of the one-to-one correspondence,The value is linearly reduced between 0 and 1;
the calculation formula of the weighted frequency value is as follows:
Wherein, For the weighted frequency values to be used,For the frequency values at n times arranged in reverse order in time,Is thatThe frequency weight values of the one-to-one correspondence,The value is linearly reduced between 0 and 1.
A third aspect of the invention provides a power electronic converter grid voltage phase lock apparatus, the apparatus comprising a processor and a memory:
The memory is used for storing program codes and transmitting the program codes to the processor;
The processor is configured to execute the power electronic converter grid voltage phase locking method according to any one of the first aspects according to instructions in the program code.
According to the technical scheme, the power grid voltage phase locking method of the power electronic converter has the following advantages:
according to the power electronic converter power grid voltage phase locking method, in the fluctuation range of a normal power system, the output signals of the three-phase-locked loop are adopted, when the fluctuation range of the normal power system is exceeded, the output signals of the three-phase-locked loop are used for carrying out phase and frequency weighting, an internal phase-locked signal is constructed for tracking and calculating the phase and the frequency in the normal range, the internal phase-locked signal is switched to be output, the output phase-locked signal is more stable, the power grid voltage phase-locked output is not influenced by the power grid fluctuation and is not easy to be unstable, meanwhile, the abnormal power grid phase-locked mark is given, the power electronic converter control system is prompted to limit working current in time, and the technical problems that the existing follow-up grid type converter phase-locked loop is easy to be influenced by the power grid fluctuation, the power electronic converter is controlled to fluctuate and even be unstable, and overcurrent and off-grid occur are solved.
Detailed Description
In order to make the present invention better understood by those skilled in the art, the following description will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
For ease of understanding, referring to fig. 1 to 3, an embodiment of a method for phase locking a grid voltage of a three-power electronic converter is provided in the present invention, including:
and S1, obtaining an output signal of the three-phase-locked loop.
It should be noted that the three-phase-locked loop is mainly used for detecting and tracking the phase of the three-phase voltage or current signal, so as to ensure that the system can be correctly synchronized with the power grid or other power sources, thereby ensuring the stability and reliability of the system. Conventional three-phase-locked loops include Synchronous reference frame phase-locked loops (Synchronous REFERENCE FRAME PLL, SRF-PLL), enhanced phase-locked loops (ENHANCED PLL, EPLL), clarke transform-based phase-locked loops, and quadratic generalized integral phase-locked loops (Second Order Generalized Integrator PLL, SOGI-PLL). As shown in fig. 2 and 3, in the embodiment of the present invention, the output signal of the three-phase locked loop is first obtained and may be denoted as signal 2.
And S2, converting the output signal of the three-phase-locked loop into a square wave signal.
It should be noted that, the output signal of the three-phase-locked loop is converted into a square wave signal with a duty ratio of 50% according to the period information.
And step S3, judging whether the square wave signal is normal or not according to the preset power system stability range degree, if yes, executing step S4, otherwise, executing step S5, wherein the preset power system stability range degree comprises frequency domain degree, period domain degree and phase domain degree.
It should be noted that, when the power electronic converter is applied to the power system, the stability range degree under the normal working condition should include frequency domain degree, period domain degree and phase domain degree. If the square wave signal meets the preset power system stability range degree, the square wave signal is normal, otherwise, the square wave signal is abnormal.
Specifically, the judging process of whether the square wave signal is abnormal is as follows:
Recording a period average value Tavg0 and a period error range dT of the square wave signal (the preset time covers a plurality of signal periods, for example, 1500 signal period data in 30 seconds), wherein the period error range dT=2×dT0, and dT0 is a positive and negative error value covering more than 80% of the data in the preset time. And judging whether the square wave signal is a normal signal or not according to whether the frequency of the square wave signal is between 48Hz and 51.5Hz, whether the frequency change rate is not more than 0.2Hz/s and whether the phase is not suddenly changed or not in the period range Tavg0-dT to Tavg0+dT for the first periodic signal. If the frequency of the square wave signal is between 48Hz and 51.5Hz, the frequency change rate is not more than 0.2Hz/s, and the phase is not suddenly changed, the periodic signal is considered to be normal, otherwise, the periodic signal is considered to be abnormal. For the non-first periodic signal, if the last periodic signal is a normal signal, compared with the last periodic signal, the continuous periodic variation is smaller than the preset duration, the signal period is considered to be normal, the step S4 is executed, the continuous periodic variation is not smaller than the preset duration, the period is considered to be abnormal, and the step S5 is executed. If the previous periodic signal is an abnormal signal, compared with the previous periodic signal, the continuous periodic change is smaller than the preset time length +dT, the signal period is considered to be normal, the step S4 is executed, the continuous periodic change is not smaller than the preset time length +dT, the period is considered to be abnormal, and the step S5 is executed.
In one embodiment, the preset time period is 1.6us. In order to avoid overload or misjudgment of the system caused by long-time accumulation of abnormal signals, in step S3, as shown in fig. 3, when abnormal square wave signals occur, it is required to determine whether the accumulation time of the square wave signals within 10S is determined to be more than 2S, if so, the square wave signals after the accumulation time exceeds 2S in the preset time are forcibly set to be normal signals.
And S4, outputting an output signal of the three-phase-locked loop.
It should be noted that, if the square wave signal is normal, the output signal of the three-phase-locked loop is directly output.
And S5, performing linear weighting calculation on the phase value of the output signal of the three-phase-locked loop by adopting a sliding window to obtain a weighted phase value, performing linear weighting calculation on the frequency value of the output signal of the three-phase-locked loop by adopting a sliding window to obtain a weighted frequency value, and executing the step S6.
If the square wave signal is abnormal, performing phase linear weighting calculation on the phase value of the output signal of the three-phase-locked loop by adopting a sliding window to obtain a weighted phase value, and performing frequency linear weighting calculation on the frequency value of the output signal of the three-phase-locked loop by adopting the sliding window to obtain a weighted frequency value. When the sliding window is adopted for weighting calculation of the phase value, the more the weight ratio of the phase value is higher, the more the weight ratio of the historical phase value is lower, the phase value is comprehensively weighted and calculated, and the stability and timeliness of the phase are guaranteed. When the frequency value is weighted by adopting a sliding window, the more the frequency value weight ratio is larger at the position closer to the current moment, the less the historical frequency value weight ratio is, the frequency value is comprehensively weighted, and the stability and timeliness of the frequency are ensured.
The calculation formula of the weighted phase value is:
Wherein, For the weighted phase value(s),For the phase values at n times arranged in reverse order in time,Is thatThe phase weight values of the one-to-one correspondence,The value is linearly reduced between 0 and 1.
For example, the most recent phase valueBefore the weight ratio is 1,5sWeight ratio of 0, intermediate phaseCalculated according to linear weights (e.g. 2.5s pre-phaseThe weight ratio is 0.5).
The calculation formula of the weighted frequency value is as follows:
Wherein, For the weighted frequency values to be used,For the frequency values at n times arranged in reverse order in time,Is thatThe frequency weight values of the one-to-one correspondence,The value is linearly reduced between 0 and 1.
For example, the most recent phase valueBefore the weight ratio is 1,5sWeight ratio of 0, intermediate phaseCalculated according to linear weights (e.g. 2.5s pre-phaseWeight ratio of 0.5)
And S6, synthesizing the output signals of the three-phase-locked loop into an internal phase-locked signal for outputting according to the weighted phase value and the weighted frequency value, and identifying a phase-locked abnormal signal.
After the weighted phase value and the weighted frequency value are calculated, the weighted phase value and the weighted frequency value are used as the phase value and the frequency value of the output signal of the three-phase-locked loop, and the phase-locked signal is synthesized and output, as shown in fig. 3, the phase-locked signal may be denoted as signal 1. And when the internal phase-locked signal is output, the abnormal signal of the power grid phase lock is given to identify, and the power electronic converter control system is prompted to limit the working current in time. As shown in fig. 2, in the embodiment of the present invention, the comprehensive judgment output module needs to determine whether to directly output the output signal of the three-phase-locked loop according to whether the obtained output signal of the three-phase-locked loop is abnormal. Referring to fig. 3, two control amounts of 1 and 0 may be set in the comprehensive judgment output module, if the output signal of the three-phase locked loop is within the normal range, the control amount of the comprehensive judgment output module is 1, and the output signal of the three-phase locked loop, that is, the selection signal 2 of the comprehensive judgment output module is directly adopted for output, and if the output signal of the three-phase locked loop is abnormal, the control amount of the comprehensive judgment output module is 0, and the internal phase locked signal is adopted for output, that is, the selection signal 1 of the comprehensive judgment output module is adopted for output.
According to the power electronic converter power grid voltage phase locking method, in the fluctuation range of a normal power system, the output signals of the three-phase-locked loop are adopted, when the fluctuation range of the normal power system is exceeded, the output signals of the three-phase-locked loop are used for carrying out phase and frequency weighting, an internal phase-locked signal is constructed for tracking and calculating the phase and the frequency in the normal range, the internal phase-locked signal is switched to be output, the output phase-locked signal is more stable, the power grid voltage phase-locked output is not influenced by the power grid fluctuation and is not easy to be unstable, meanwhile, the abnormal power grid phase-locked mark is given, the power electronic converter control system is prompted to limit working current in time, and the technical problems that the existing follow-up grid type converter phase-locked loop is easy to be influenced by the power grid fluctuation, the power electronic converter is controlled to fluctuate and even be unstable, and overcurrent and off-grid occur are solved.
For easy understanding, referring to fig. 4, the embodiment of the invention provides a power electronic converter grid voltage phase locking device, which comprises a three-phase locked loop, an inner phase locked signal construction module and a comprehensive judgment output module;
the three-phase-locked loop and the internal phase-locked signal construction module are connected, and the three-phase-locked loop and the internal phase-locked signal construction module are respectively connected with the comprehensive judgment output module;
The three-phase-locked loop is used for acquiring three-phase signals from a three-phase power supply, processing the three-phase signals and outputting three-phase external phase-locked signals;
the internal phase-locked signal construction module is used for acquiring an output signal of the three-phase-locked loop, converting the output signal of the three-phase-locked loop into a square wave signal, linearly weighting the phase value of the output signal of the three-phase-locked loop by adopting a sliding window to obtain a weighted phase value, linearly weighting the frequency value of the output signal of the three-phase-locked loop by adopting the sliding window to obtain a weighted frequency value, synthesizing the output signal of the three-phase-locked loop into the internal phase-locked signal according to the weighted phase value and the weighted frequency value, outputting the internal phase-locked signal and identifying a phase-locked abnormal signal;
The comprehensive judgment output module is used for judging whether the square wave signal is normal or not according to the preset power system stability range domain degree, if yes, outputting an output signal of the three-phase-locked loop, otherwise, outputting an inner phase-locked signal synthesized by the inner phase-locked signal construction module, wherein the preset power system stability range domain degree comprises frequency domain degree, period domain degree and phase domain degree.
In one embodiment, the comprehensive judgment output module is specifically configured to:
And recording a period average value Tavg0 and a period error range dT of the square wave signal in a preset time, judging whether the square wave signal is a normal signal or not according to whether the frequency of the square wave signal is between 48Hz and 51.5Hz, whether the frequency change rate is not more than 0.2Hz/S and whether the phase is not suddenly changed in the period range Tavg0-dT to Tavg0+dT, judging whether the square wave signal is a normal signal or not according to whether the frequency of the first periodic signal is between 48Hz and 51.5Hz, judging whether the signal period is normal or not according to whether the frequency change rate is not more than 0.2Hz/S and whether the phase is suddenly changed or not in the period error range dT, regarding that the signal is not the first periodic signal, regarding the continuous period change is smaller than the preset time period if the previous periodic signal is the normal signal, regarding the signal period as normal, performing step S4, regarding the continuous period change is not smaller than the preset time period, regarding the signal as abnormal, performing step S5, wherein the preset time covers a plurality of signals.
In one embodiment, the weighted phase value is calculated as:
Wherein, For the weighted phase value(s),For the phase values at n times arranged in reverse order in time,Is thatThe phase weight values of the one-to-one correspondence,The value is linearly reduced between 0 and 1;
in one embodiment, the weighted frequency value is calculated as:
Wherein, For the weighted phase value(s),For the frequency values at n times arranged in reverse order in time,Is thatThe frequency weight values of the one-to-one correspondence,The value is linearly reduced between 0 and 1.
In one embodiment, the preset time period is 1.6us.
In one embodiment, the preset time is 30s. The comprehensive judgment output module is also used for:
judging whether the square wave signal in 10s is judged to be the accumulation time of the abnormal signal or not to exceed 2s, if so, forcibly setting the square wave signal with the accumulation time exceeding 2s in the preset time to be a normal signal.
Embodiments of a power electronic converter grid voltage phase lock apparatus are provided, the apparatus comprising a processor and a memory:
The memory is used for storing program codes and transmitting the program codes to the processor;
the processor is used for executing the power electronic converter grid voltage phase locking method provided by the invention according to the instructions in the program codes.
The power electronic converter grid voltage phase locking device and the equipment provided by the invention are used for executing the power electronic converter grid voltage phase locking method provided by the invention, and the principle and the obtained technical effects are the same as those of the power electronic converter grid voltage phase locking method provided by the invention, and are not repeated herein.
While the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art that the foregoing embodiments may be modified or equivalents may be substituted for some of the features thereof, and that the modifications or substitutions do not depart from the spirit and scope of the embodiments of the invention.