CN119766238A

CN119766238A - Low-voltage high-performance acquisition system

Info

Publication number: CN119766238A
Application number: CN202411806092.2A
Authority: CN
Inventors: 程剑平; 张瑜; 袁文师
Original assignee: Shanghai Xinchi Technology Group Co ltd
Current assignee: Shanghai Xinchi Technology Group Co ltd
Priority date: 2024-12-10
Filing date: 2024-12-10
Publication date: 2025-04-04

Abstract

The invention discloses a low-voltage high-performance acquisition system, which belongs to the field of integrated circuits and comprises a programmable gain amplifier, a gain adjusting module, an ADC (analog to digital converter) and a clock generating module, wherein the programmable gain amplifier, the ADC and the clock generating module all work under a first voltage, and the gain adjusting module works under a second voltage, and a voltage difference exists between the first voltage and the second voltage. The invention designs a charge pump circuit which can be used for all gain gear switches, and the clock generation is based on the existing clock generation module, so that the cost is relatively low, and the acquisition effect with high performance can be achieved.

Description

Low-voltage high-performance acquisition system

Technical Field

The invention relates to the technical field of integrated circuits, in particular to a low-voltage high-performance acquisition system.

Background

As shown in fig. 1, a conventional high-performance acquisition system is generally composed of a high-performance PGA (programmable gain amplifier) and a high-precision ADC. Through the adjustment of the gain, the measuring range can be automatically converted, the measuring precision is improved, and the requirements of a system are better met.

In an actual circuit, the gain adjusting function is realized by adjusting the equivalent resistance of the feedback resistance module in the PGA. The switch on the signal path often causes linearity problems, especially in low voltage applications, when the range of variation of the signal is relatively large, the optimization of linearity is often difficult and costly. In this context, there is a need for an acquisition system that is effective in improving linearity even at low voltages.

Disclosure of Invention

The invention aims to provide a low-voltage high-performance acquisition system so as to solve the problems in the background technology.

In order to solve the technical problems, the invention provides a low-voltage high-performance acquisition system, which comprises a programmable gain amplifier, a gain adjusting module, an ADC and a clock generating module, wherein the programmable gain amplifier is connected with the programmable gain adjusting module;

The programmable gain amplifier, the ADC, and the clock generation module all operate at a first voltage, the gain adjustment module operates at a second voltage,

Wherein a voltage difference exists between the first voltage and the second voltage.

In one embodiment, the second voltage is generated by a charge pump circuit for powering the gate terminal of the gain adjustment module.

In one embodiment, the charge pump and the ADC provide a clock source through a clock generation module, the ADC performs sampling when a sampling clock is high and performs integration when an integration clock is high, and the clock of the charge pump is after the sampling is finished and before the integration is started.

The low-voltage high-performance acquisition system provided by the invention is designed with a charge pump circuit which can be used by all gain gear switches, and the clock generation is based on the existing clock generation module, so that the cost is relatively low, and the acquisition effect of high performance can be achieved.

Drawings

Fig. 1 is a schematic diagram of a conventional acquisition system.

Fig. 2 is a schematic diagram of a low-voltage high-performance acquisition system according to the present invention.

Fig. 3 is a schematic structural diagram of a PGA gain gear adjusting module according to the present invention.

Fig. 4 is a schematic diagram of clock timing provided by the present invention.

Detailed Description

The invention provides a low voltage high performance acquisition system which is further described in detail below with reference to the accompanying drawings and specific examples. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.

The invention provides an acquisition system, which can reduce the design difficulty of PGA (programmable gain amplifier) gear adjustment when the alignment degree is higher under low-voltage application.

Fig. 2 is a schematic diagram of the structure of the acquisition system according to the present invention, where Power a is the normal operating voltage of the chip, and PGA, ADC, clock generator all operate at Power a voltage. The new acquisition system designs the gear adjusting module of the PGA under the Power B voltage, and reduces the design difficulty of the PGA gear adjusting switch by utilizing the voltage difference between the Power A voltage and the Power B voltage, thereby improving the linearity. Because Power a is itself a relatively low voltage for low voltage applications, the switch impedance may be relatively high, and particularly at different process corners, the switch size may be relatively large to obtain relatively small impedance.

As shown in fig. 3, the PGA gain gear adjusting module is specifically designed in the present invention to generate Power B by using a Charge Pump circuit for supplying Power to the gate terminal of the PGA gear adjusting switch, so that the design difficulty of the switch can be greatly reduced, and the linearity of the overall acquisition system can be more easily improved.

The charge pump needs to have a clock source during design, and in high-precision application, the sampling of signals may be affected by the time sequence of each module using the clock, for example, the clock of the charge pump may cause jitter of the PGA output signal, and if the ADC samples the PGA output signal when the signal is not recovered, the collection precision of the overall collection system is affected. The invention particularly designs the clock time sequence of the whole acquisition system, and avoids the mutual interference among different modules in principle. As shown in fig. 4, the ADCs sample when the sampling clock is high, and integrate when the integration clock is high. According to the invention, the charge pump clock is designed after sampling is finished and before integration is started, so that each time of clock switching of the charge pump avoids sampling time, the PGA output signal is prevented from being sampled by a subsequent ADC when being interfered by the clock jump of the charge pump, and sampling errors are reduced.

The acquisition system comprises a PGA, a PGA gain adjusting module, a charge pump of a power supply module, an ADC and a clock generating module. The PGA gain adjusting module adopts the mode of increasing the voltage of the switch gate terminal to reduce the overall switch impedance, thereby reducing the impedance change range caused by signal change and improving the overall linearity. Because the charge pump generates high voltage and needs a clock signal, the time sequence of the whole acquisition system is designed according to the time sequence in fig. 4, and the error of the charge pump on the acquisition system can be effectively reduced.

The above description is only illustrative of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, and any alterations and modifications made by those skilled in the art based on the above disclosure shall fall within the scope of the appended claims.

Claims

1. A low-voltage, high-performance acquisition system, comprising: a programmable gain amplifier, a gain adjustment module, an ADC, and a clock generation module;

The programmable gain amplifier, the ADC, and the clock generation module all operate at a first voltage, and the gain adjustment module operates at a second voltage.

There is a voltage difference between the first voltage and the second voltage.

2. The low-voltage, high-performance acquisition system as described in claim 1 is characterized in that the second voltage is generated by a charge pump circuit and is used to power the gate end of the gain adjustment module.

3. The low-voltage, high-performance acquisition system as described in claim 2 is characterized in that the charge pump and the ADC provide clock sources through a clock generation module; the ADC samples when the sampling clock is high and integrates when the integration clock is high; the clock of the charge pump is after the sampling ends and before the integration starts.