CN119967975B

CN119967975B - A kind of inverted micro light emitting diode and its preparation method

Info

Publication number: CN119967975B
Application number: CN202510450196.2A
Authority: CN
Inventors: 曹冰; 袁维文; 陈洋; 王紫薇; 江河; 孙倜; 许峰
Original assignee: Suzhou University
Current assignee: Suzhou University
Priority date: 2025-04-11
Filing date: 2025-04-11
Publication date: 2025-07-08
Anticipated expiration: 2045-04-11
Also published as: CN120769630A; CN119967975A; CN120769622A; CN120769621A

Abstract

The present invention discloses a flip-chip micro-LED and a preparation method thereof, wherein the flip-chip micro-LED comprises a plurality of light-emitting units arranged in a matrix, each of the light-emitting units comprises a main structure and a light-emitting surface structure stacked along the light-emitting direction of the flip-chip micro-LED, the main structure comprises an n-type semiconductor structure, the n-type semiconductor structure and the light-emitting surface structure are integrally formed; the light-emitting surface structure comprises an inclined surface structure, the inclined surface structure comprises n-level inclined surfaces distributed from the edge of the n-type semiconductor structure to the center of the n-type semiconductor structure, n being greater than or equal to 2; the angle between the inclined surface and the horizontal plane gradually decreases along the light-emitting direction. The flip-chip micro-LED of the present invention uses multiple inclined surfaces to reduce total internal reflection, increase the possibility of light emission, and allow more light to escape, thereby improving the top light extraction efficiency.

Description

Flip-chip miniature light-emitting diode and preparation method thereof

Technical Field

The invention relates to the technical field of semiconductors, in particular to a flip-chip micro light-emitting diode capable of improving top light extraction efficiency and a preparation method of the flip-chip micro light-emitting diode.

Background

Micro light emitting diodes (Micro LIGHT EMITTING Diode) have the advantages of high peak brightness, long service life, low power consumption, high resolution and the like, and have gradually revealed application prototypes in wearable devices, AR/VR devices, vehicle-mounted display devices and Micro projectors. However, micro-LEDs have low light extraction efficiency due to the effects of total internal reflection (total internal reflection, TIR) and fresnel reflection, and especially light extraction efficiency in the vertical direction gradually decreases with the size of the micro-LEDs.

In view of this, many solutions have been proposed for the problem of low light extraction efficiency of micro-LEDs, including the manner of providing an antireflection film, a surface micro-nanostructure, a microlens array, and the like. However, although it is a convenient way to deposit an antireflection film on the surface of the micro-LED to improve the light efficiency, it is necessary to rely on a high-precision film plating device, a way to set the surface micro-nanostructure requires a relatively complex structural design, and may also require a high-precision device and a complex process technology to manufacture the microstructure, while the micro-lens array is additionally mounted on the micro-LED chip, and the micro-lens array is integrated in the micro-LED, so as to improve the top light extraction efficiency, but at present, the chip size of the micro-LED is continuously reduced, the integration difficulty is higher, the precision required for alignment is also improved, and a proper gluing scheme is also considered.

Disclosure of Invention

Accordingly, the present invention is directed to an improved flip-chip micro light emitting diode, which can effectively improve the light extraction efficiency of the top of the micro light emitting diode.

The invention provides a flip-chip micro light-emitting diode, which comprises a plurality of light-emitting units arranged according to a matrix, wherein each light-emitting unit comprises a main body structure and a light-emitting surface structure which are arranged in a stacked manner along the light-emitting direction of the flip-chip micro light-emitting diode, the main body structure comprises an n-type semiconductor structure, the n-type semiconductor structure and the light-emitting surface structure are integrally formed, the light-emitting surface structure comprises an inclined surface structure, the inclined surface structure comprises n-level inclined surfaces distributed along the edge of the n-type semiconductor structure to the center of the n-type semiconductor structure, n is greater than or equal to 2, and the included angle between each inclined surface and the horizontal plane is gradually reduced along the light-emitting direction.

According to some preferred embodiments of the present invention, the n-type semiconductor structure is made of the same material as the light emitting surface structure, and the vertical height of the inclined surface is gradually reduced along the light emitting direction.

According to some preferred embodiments of the present invention, the light emitting surface structure further includes a sidewall structure, the sidewall structure is disposed between the n-type semiconductor structure and the inclined surface structure along the light emitting direction, and a height of the sidewall structure is greater than or equal to 100nm.

According to some preferred embodiments of the present invention, the light emitting surface structure includes a first plane located between adjacent inclined planes, and a length of the first plane is 0.01-2 μm.

According to some preferred embodiments of the present invention, the light emitting surface structure includes a second plane located at the center of the light emitting surface structure, and the length of the second plane is 37% -64% of the length of the micro light emitting diode.

According to some preferred embodiments of the present invention, the maximum thickness of the light emitting surface structure is 1.2-1.5 μm.

According to some preferred embodiments of the present invention, the micro light emitting diode has a size of 5-20 μm, and n is less than or equal to 3, i.e. the light emitting surface structure of the flip-chip micro light emitting diode with a preferred main structure size of 5-20 μm has three-level inclined surfaces.

According to some preferred embodiments of the present invention, the n-level inclined plane includes a first-level inclined plane having an angle of 45 ° to 80 ° with respect to a horizontal plane, a second-level inclined plane having an angle of 30 ° to 60 ° with respect to a horizontal plane, and a third-level inclined plane having an angle of 20 ° to 45 ° with respect to a horizontal plane.

According to some preferred embodiments of the invention, the first stage chamfer has a height greater than a height of the second stage chamfer, which is greater than a height of the third stage chamfer.

Preferably, the height of the first-stage inclined plane is 300-500 nm, the height of the second-stage inclined plane is 200-400 nm, and the height of the third-stage inclined plane is 100-300 nm.

The invention also provides a preparation method of the flip-chip micro light-emitting diode, which comprises the following steps:

providing a substrate, and preparing an epitaxial layer on the substrate, wherein the epitaxial layer comprises a first n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer which are stacked;

Etching the epitaxial layer to form a second n-type semiconductor layer and a plurality of main body structures arranged at intervals, wherein the main body structures comprise n-type semiconductor structures, light-emitting structures and p-type semiconductor structures which are sequentially stacked on the second n-type semiconductor layer, and the second n-type semiconductor layer is the rest part of the n-type semiconductor structure removed after the first n-type semiconductor layer is etched;

removing the substrate;

and carrying out etching treatment on the second n-type semiconductor layer for multiple times to obtain the light emitting surface structure so as to prepare the miniature light emitting diode.

In some embodiments of the present invention, the method for manufacturing the flip-chip micro light emitting diode specifically includes the following steps:

step S1, an epitaxial layer grows on a substrate by using an MOCVD process, wherein the epitaxial layer sequentially comprises a first n-type semiconductor layer (n-GaN layer), a light emitting layer (MQW layer), a p-type semiconductor layer (p-GaN layer) and an ITO layer;

Step S2, etching the epitaxial layer to form a second n-type semiconductor layer and a plurality of main body structures arranged at intervals, wherein the main body structures comprise n-type semiconductor structures, light-emitting structures and p-type semiconductor structures which are sequentially stacked on the second n-type semiconductor layer, the second n-type semiconductor layer is the rest part of the n-type semiconductor structure after the first n-type semiconductor layer is etched, the overall etching depth is 1-2 mu m, and the main body structure size is 5-20 mu m;

step S3, preparing a silicon oxide insulating layer outside the main structure by using PECVD;

S4, preparing an N electrode and a P electrode through EBE electron beam thermal evaporation, wherein the N electrode is positioned between adjacent main structures, and the P electrode is positioned on the ITO layer;

Step S5, removing the substrate by utilizing a laser stripping technology;

And S6, repeatedly carrying out photoetching process on the second n-type semiconductor layer to form an n-level inclined plane, obtaining the light emitting surface structure, and finally obtaining the miniature light emitting diode.

According to some preferred embodiments of the present invention, the etching treatment is performed on the second n-type semiconductor layer for a plurality of times to obtain the light emitting surface structure, including the following steps:

coating a photoresist layer on the surface of the second n-type semiconductor layer and performing photoetching to form a current pattern;

etching the second n-type semiconductor layer by taking the current pattern as a mask to form an ith inclined plane on the surface of the second n-type semiconductor layer, wherein i is more than or equal to 1 and less than or equal to n;

Removing the photoresist layer;

And repeatedly executing the steps to form an n-level inclined plane on the surface of the second n-type semiconductor layer, so as to obtain the light-emitting surface structure.

In the invention, n of the n-level inclined plane is preferably 3, namely the n-level inclined plane comprises a first-level inclined plane, a second-level inclined plane and a third-level inclined plane, and the second n-type semiconductor layer is subjected to multiple etching treatment to obtain the light-emitting surface structure, and the method comprises the following steps:

Coating a first photoresist layer on the surface of the second n-type semiconductor layer and performing photoetching to form a first pattern;

Transferring the first pattern to the second n-type semiconductor layer by using a plasma etching process, so that a first-stage inclined plane is formed on the surface of the second n-type semiconductor layer;

Removing the first photoresist layer;

Coating a second photoresist layer on the surface of the second n-type semiconductor layer with the first level inclined plane and performing photoetching to form a second pattern;

Transferring the second pattern to a second n-type semiconductor layer with a first level inclined plane by using a plasma etching process, so that a second level inclined plane is formed on the surface of the second n-type semiconductor layer with the first level inclined plane;

Removing the second photoresist layer;

Coating a third photoresist layer on the surface of the second n-type semiconductor layer with the first-stage inclined plane and the second-stage inclined plane and performing photoetching to form a third pattern;

and transferring the third pattern to a second n-type semiconductor layer with a first-stage inclined plane and a second-stage inclined plane by using a plasma etching process, so that a third-stage inclined plane is formed on the surface of the second n-type semiconductor layer with the first-stage inclined plane and the second-stage inclined plane, and the light-emitting surface structure is obtained.

In some embodiments, the light emitting surface structure is obtained by performing multiple etching treatments on the second n-type semiconductor layer, and specifically includes the following steps:

Step S61, coating a first photoresist layer on the surface of the second n-type semiconductor layer and performing photoetching to form a first pattern;

step S62, transferring the first pattern to the second n-type semiconductor layer by using a plasma etching process, so that a first-stage inclined plane is formed on the surface of the second n-type semiconductor layer, wherein the etching depth is 300nm-500nm, preferably 400nm, and the included angle between the first-stage inclined plane and the horizontal plane is 45-80 degrees;

step S63, removing the first photoresist layer, coating a second photoresist layer on the surface of the second n-type semiconductor layer with the first level inclined plane and carrying out photoetching to form a second pattern;

step S64, transferring the second pattern to a second n-type semiconductor layer with a first level inclined plane by using a plasma etching process, so that a second level inclined plane is formed on the surface of the second n-type semiconductor layer with the first level inclined plane, wherein the etching depth is 200nm-400nm, preferably 300nm and smaller than that of the first level inclined plane, and the included angle of the second level inclined plane and the horizontal plane is 30-60 degrees and smaller than that of the first level inclined plane;

step S65, removing the second photoresist layer, coating a third photoresist layer on the surface of the second n-type semiconductor layer with the first-stage inclined plane and the second-stage inclined plane, and photoetching to form a third pattern;

and step S66, transferring the third pattern to the second n-type semiconductor layer with the first-stage inclined plane and the second-stage inclined plane by using a plasma etching process, so that the surface of the second n-type semiconductor layer with the first-stage inclined plane and the second-stage inclined plane forms a third-stage inclined plane. The etching depth is 100nm-300nm, preferably 200nm, and is smaller than that of the second-stage inclined plane, and the included angle between the second-stage inclined plane and the horizontal plane is 20-45 degrees, which is smaller than that between the second-stage inclined plane and the horizontal plane.

Thus, a light-emitting surface structure with three-level inclined planes is obtained on the second n-type semiconductor layer.

Compared with the prior art, the flip-chip micro light-emitting diode has the advantages that the adopted multi-section inclined surface can reduce total internal reflection, increase the possibility of light emergent, prevent most of light emitted in the light-emitting layer caused by total internal reflection from being absorbed by the semiconductor layer or the electrode layer after total reflection and further escape more light, thereby improving the top light extraction efficiency, and the micro-lens array is not required to be additionally designed and manufactured, so that the subsequent alignment and gluing procedures with micro-LEDs are reduced, the process preparation is convenient, simple and feasible, and the yield is high.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic top view of a micro LED;

fig. 2 is a schematic structural diagram of a flip-chip micro light emitting diode according to an embodiment of the present invention;

fig. 3 is a schematic perspective view of a top light emitting structure of a flip-chip micro led according to an embodiment of the present invention;

FIG. 4 is a schematic cross-sectional view of a light emitting structure on a top surface of a flip-chip micro light emitting diode according to an embodiment of the present invention;

Fig. 5 is a schematic diagram of a manufacturing process of a flip-chip micro light emitting diode according to an embodiment of the present invention;

Fig. 6 is a schematic diagram of a manufacturing process of a top surface light emitting structure of a flip-chip micro light emitting diode according to an embodiment of the present invention;

Fig. 7 is a schematic structural diagram of a mask plate for preparing a top surface light emitting structure according to embodiment 6 of the present invention;

FIG. 8 is a comparative graph of the results of the top LEEs of micro-LEDs of the examples and comparative examples of the present invention;

The reference numerals comprise a flip-chip micro light emitting diode-1, a light emitting unit-2, a main body structure-3, a light emitting surface structure-4, a substrate-5, a first n-type semiconductor layer-6, a light emitting layer-7,p type semiconductor layer-8, an ITO layer-9, a second n-type semiconductor layer-10, an n-type semiconductor structure-11, a silicon oxide insulating layer-12, an N electrode-13, a P electrode-14, a side wall structure-15, a first-stage inclined plane-16, a second-stage inclined plane-17, a third-stage inclined plane-18, a first plane-19, a second plane-20, a photoresist layer-21, a mask-22 and a light shielding region-23.

Detailed Description

In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.

In a conventional GaN-based micro light emitting diode, light emitted from an active layer is emitted into air (medium with a small refractive index) through a semiconductor material (medium with a large refractive index), only a part of light with a certain angle can escape into the air, and most of light with a certain angle is returned to the medium after total reflection and is absorbed by a light emitting layer or an electrode, as shown in fig. 1 (a), only light within a critical angle can escape into the air, and the critical angle between the GaN material and the air is 23.4 °. According to the flip-chip micro light emitting diode provided by the invention, after the surface is etched with the multi-section inclined surface, part of light rays can be increased to exit from the inclined surface, more light rays can escape, the probability of light ray surface exit is increased, and further the light extraction efficiency of the top is improved, as shown in a graph (b) in fig. 1. The flip-chip micro light emitting diode provided by the invention is described in detail below.

Referring to fig. 2, fig. 2 is a schematic structural diagram of a flip-chip micro light emitting diode according to an embodiment of the present invention, where the flip-chip micro light emitting diode 1 includes a plurality of light emitting units 2 arranged in a matrix.

Each light emitting unit 2 includes a main body structure 3 and a light emitting surface structure 4 stacked along the light emitting direction of the flip-chip micro light emitting diode 1. The main body structure 3 includes an n-type semiconductor structure 11, and the n-type semiconductor structure 11 and the light-emitting surface structure 4 are integrally formed.

Further, as shown in fig. 3 and 4, the light-emitting surface structure 4 includes a slope structure, the slope structure includes n-level slopes distributed along an edge of the n-type semiconductor structure 11 to a center of the n-type semiconductor structure 11, n is greater than or equal to 2, and an included angle between the slope and a horizontal plane gradually decreases along a light-emitting direction. Fig. 3 (a) shows a pyramid-shaped light-emitting surface structure 4, and fig. 3 (b) shows a pyramid-shaped light-emitting surface structure 4.

In one embodiment, n is less than or equal to 3.

In an embodiment, the n-type semiconductor structure 11 is made of the same material as the light emitting surface structure 4, and the vertical height of the inclined plane gradually decreases along the light emitting direction.

In an embodiment, as shown in fig. 4, the light-emitting surface structure 4 further includes a sidewall structure 15, where the sidewall structure 15 is disposed between the n-type semiconductor structure 11 and the inclined surface structure along the light-emitting direction, and the height of the sidewall structure 15 is greater than or equal to 100nm.

In one embodiment, the light emitting surface structure 4 includes a first plane 19 located between adjacent inclined planes, and the length of the first plane 19 is 0.01-2 μm. The arrangement of the first plane 19 can increase the light emitting area, further improve the light emitting probability and further improve the light extraction efficiency of the top.

In an embodiment, the light-emitting surface structure 4 includes a second plane 20 located at the center of the light-emitting surface structure 4, and the length of the second plane 20 is 37% -64% of the length of the micro light-emitting diode. For example, the second plane 20 has a length of 37%, 38%, 40%, 42%, 45%, 48%, 50%, 52%, 55%, 56%, 58%, 60%, 62%, or 64% of the length of the micro light emitting diode. The length of the micro light emitting diode is the size of the micro light emitting diode, and more specifically, the main structure size of the micro light emitting diode.

In an embodiment, the maximum thickness of the light-emitting surface structure 4 is 1.2-1.5 μm, and the maximum thickness of the light-emitting surface structure 4 is the height of the light-emitting surface structure 4 in the light-emitting direction. For example, the maximum thickness of the light exit surface structure 4 may be 1.2μm、1.22μm、1.24μm、1.26μm、1.28μm、1.3μm、1.32μm、1.34μm、1.36μm、1.38μm、1.4μm、1.42μm、1.44μm、1.46μm、1.48μm or 1.5 μm.

In one embodiment, the n-level inclined surfaces include a first-level inclined surface 16, a second-level inclined surface 17, and a third-level inclined surface 18, wherein an angle between the first-level inclined surface 16 and a horizontal plane is 45 ° -80 °, for example, 45 °, 55 °, 60 °, 65 °, 70 °, 75 °, or 80 °, an angle between the second-level inclined surface 17 and a horizontal plane is 30 ° -60 °, for example, 30 °, 35 °, 40 °, 45 °, 50 °, 55 °, or 60 °, and an angle between the third-level inclined surface 18 and a horizontal plane is 20 ° -45 °, for example, 20 °, 25 °, 30 °, 35 °, 40 °, or 45 °.

Further, the height of the first stage inclined surface 16 is greater than the height of the second stage inclined surface 17, and the height of the second stage inclined surface 17 is greater than the height of the third stage inclined surface 18.

Further, the height of the first stage inclined surface 16 is 300nm to 500nm, the height of the second stage inclined surface 17 is 200nm to 400nm, and the height of the third stage inclined surface 18 is 100nm to 300nm. Preferably, the height of the first stage inclined surface 16 is 400nm, the height of the second stage inclined surface 17 is 300nm, and the height of the third stage inclined surface 18 is 200nm.

In one embodiment, the micro light emitting diode has a size of 5-20 μm. For example, the micro light emitting diode has a size of 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, 11 μm, 12 μm, 13 μm, 14 μm, 15 μm, 16 μm, 17 μm, 18 μm, 19 μm or 20 μm.

As shown in fig. 2 to 6, the invention further provides a preparation method of the flip-chip micro light emitting diode 1, which specifically includes the following steps:

In step S1, a substrate 5 is provided, and an epitaxial layer is grown on the substrate 5 by using a Metal-organic chemical vapor deposition (Metal-organic Chemical Vapor Deposition, MOCVD) process, wherein the epitaxial layer sequentially comprises a first n-type semiconductor layer 6 (which may be an n-GaN layer), a light-emitting layer 7 (i.e., a multi-quantum well layer), a p-type semiconductor layer 8 (which may be a p-GaN layer) and a conductive layer (which may be an ITO layer 9).

The material of the substrate 5 is preferably sapphire or gallium nitride.

Step S2, etching the epitaxial layer, so that the epitaxial layer forms the second n-type semiconductor layer 10 and a plurality of main structures 3 arranged at intervals.

The overall etch depth is 1-2 μm. The host structure 3 has a size of 5-20 μm. The body structure 3 includes an n-type semiconductor structure 11, a light emitting structure, and a p-type semiconductor structure sequentially stacked on the second n-type semiconductor layer 10. The second n-type semiconductor layer 10 is the remaining portion of the n-type semiconductor structure 11 removed after the first n-type semiconductor layer 6 is etched.

Step S3, preparing the silicon oxide insulation layer 12 outside the main body structure 3 by using plasma enhanced chemical vapor deposition (PLASMA ENHANCED CHEMICAL vapor deposition (PECVD)).

The silicon oxide insulating layer 12 is left with a window for the subsequent preparation of the P electrode 14.

And S4, preparing an N electrode 13 and a P electrode 14 by electron beam evaporation (Electron Beam Evaporation, EBE), wherein the N electrode 13 is positioned between adjacent main structures 3 and is connected with the second N-type semiconductor layer 10, and the P electrode 14 is positioned on the ITO layer 9 and penetrates through the silicon oxide insulating layer 12 and is connected with the conductive layer.

Step S5, the substrate 5 is completely removed by using a laser lift-off technique.

And S6, photoetching the side, far away from the main body structure 3, of the second n-type semiconductor layer 10 for multiple times to form an n-level inclined plane, so as to obtain a light emitting surface structure 4, and finally obtaining the miniature light emitting diode.

Preferably, as shown in fig. 3 to 6, n of the n-level inclined plane is 3, that is, the n-level inclined plane includes a first-level inclined plane 16, a second-level inclined plane 17 and a third-level inclined plane 18, and the second n-type semiconductor layer 10 is subjected to multiple etching processes to obtain the light-emitting surface structure 4, which specifically includes the following steps:

Step S61, coating a first photoresist layer 21 on the surface of the second n-type semiconductor layer 10 and performing photolithography to form a first pattern.

Step S62, transferring the first pattern to the second n-type semiconductor layer 10 by using a plasma etching process, so that the surface of the second n-type semiconductor layer 10 forms a first level inclined plane 16.

The etching depth is 300nm-500nm, preferably 400nm, and the included angle between the first-stage inclined plane 16 and the horizontal plane is 45-80 degrees.

Step S63 of removing the first photoresist layer 21, and coating a second photoresist layer 21 on the surface of the second n-type semiconductor layer 10 having the first level inclined surface 16 and performing photolithography to form a second pattern.

Step S64 of transferring the second pattern to the second n-type semiconductor layer 10 having the first level inclined plane 16 using a plasma etching process, so that the surface of the second n-type semiconductor layer 10 having the first level inclined plane 16 forms a second level inclined plane 17.

The etching depth is 200nm-400nm, preferably 300nm, and is smaller than that of the first-stage inclined plane 16, and the included angle between the second-stage inclined plane 17 and the horizontal plane is 30-60 degrees, which is smaller than that between the first-stage inclined plane 16 and the horizontal plane.

Step S65, removing the second photoresist layer 21, coating a third photoresist layer 21 on the surface of the second n-type semiconductor layer 10 having the first level inclined surface 16 and the second level inclined surface 17, and performing photolithography to form a third pattern.

Step S66 of transferring the third pattern to the second n-type semiconductor layer 10 having the first level inclined plane 16 and the second level inclined plane 17 using a plasma etching process, so that the surface of the second n-type semiconductor layer 10 having the first level inclined plane 16 and the second level inclined plane 17 forms a third level inclined plane 18.

The etching depth is 100nm-300nm, preferably 200nm, and is smaller than that of the second-stage inclined plane 17, and the included angle between the second-stage inclined plane 17 and the horizontal plane is 20-45 degrees, which is smaller than that between the second-stage inclined plane 17 and the horizontal plane. To this end, the light-emitting surface structure 4 having three-level inclined surfaces is obtained on the second n-type semiconductor layer 10.

In other embodiments, the above steps may be repeated to form a light-emitting surface structure 4 with more slopes having n greater than 3, or the number of repeated steps may be reduced to form a light-emitting surface structure 4 with two-stage slopes having n=2. Preferably, the light emitting surface structure 4 of the flip-chip micro light emitting diode 1 having the size of the main structure 3 is 5 μm to 20 μm has three-level inclined surfaces (n=3), the light emitting surface structure 4 of the flip-chip micro light emitting diode 1 having the size of the main structure 3 is 20 μm to 30 μm has four-level inclined surfaces (n=4), and so on, the larger the size of the main structure 3, the larger n is.

Example 1

Referring to fig. 1 to 4, the flip-chip micro light emitting diode 1 provided in this embodiment includes a plurality of light emitting units 2 arranged in a matrix. Each light emitting unit 2 includes a main body structure 3 and a light emitting surface structure 4 stacked along the light emitting direction of the flip-chip micro light emitting diode 1. The main body structure 3 includes an n-type semiconductor structure 11, and the n-type semiconductor structure 11 and the light-emitting surface structure 4 are integrally formed. The n-type semiconductor structure 11 is made of the same material as the light-emitting surface structure 4.

The maximum thickness of the light exit surface structure 4 is 1.38 μm, and the maximum thickness of the light exit surface structure 4 is the height of the light exit surface structure 4 in the light exit direction. The light-emitting surface structure 4 comprises an inclined surface structure, a side wall structure 15, a first plane 19 positioned between adjacent inclined surfaces and a second plane 20 positioned at the center of the light-emitting surface structure 4, wherein the side wall structure 15 is arranged between the n-type semiconductor structure 11 and the inclined surface structure along the light-emitting direction, and the height of the side wall structure 15 is equal to 150nm. The length of the first plane 19 is 0.5 μm, and the light emergent area can be increased by the arrangement of the first plane 19, so that the light emergent probability is further improved, and the light extraction efficiency at the top is further improved. Preferably, the length of the second plane 20 is 37% of the length of the micro light emitting diode.

The bevel structure comprises n-level bevels distributed along the edge of the n-type semiconductor structure 11 to the center of the n-type semiconductor structure 11. N in this embodiment is equal to 2. The n-level inclined plane comprises a first-level inclined plane 16 and a second-level inclined plane 17, wherein the included angle between the first-level inclined plane 16 and the horizontal plane is 45 degrees, the included angle between the second-level inclined plane 17 and the horizontal plane is 30 degrees, and the included angle between the inclined plane and the horizontal plane is gradually reduced along the light emitting direction.

The height of the first stage inclined surface 16 is 400nm, the height of the second stage inclined surface 17 is 300nm, and the vertical height of the inclined surface gradually decreases along the light emitting direction.

Example 2

The structure of the flip-chip micro led 1 in this embodiment is basically the same as that of embodiment 1, except that in the light-emitting surface structure 4 of this embodiment, the included angle between the first-stage inclined surface 16 and the horizontal plane is 80 ° and the included angle between the second-stage inclined surface 17 and the horizontal plane is 60 °.

Example 3

As shown in fig. 5 to 6, the light emitting surface structure 4 is obtained by performing etching treatment on the second n-type semiconductor layer 10 for multiple times in this embodiment, and specifically includes the following steps:

Step S61, coating the first photoresist layer 21 on the surface of the second n-type semiconductor layer 10 and performing the first photolithography to form the first pattern.

Step S62, transferring the first pattern to the second n-type semiconductor layer 10 using a plasma etching process, so that the surface of the second n-type semiconductor layer 10 forms the first level inclined surface 16.

The plasma etching process corresponds to an etching depth of 400nm, and the included angle between the first-stage inclined surface 16 and the horizontal plane is 45 degrees.

Step S63 of removing the first photoresist layer 21, coating the second photoresist layer 21 on the surface of the second n-type semiconductor layer 10 having the first level inclined surface 16 and performing a second photolithography to form a second pattern.

The exposure time at the second lithography is increased so that the area covered by the photoresist is reduced.

In step S64, the second pattern is transferred to the second n-type semiconductor layer 10 with the first level inclined surface 16 by using a plasma etching process by adjusting the gas flow and the ratio thereof, so that the second level inclined surface 17 is formed on the surface of the second n-type semiconductor layer 10 with the first level inclined surface 16.

The etching depth is 300nm, the etching depth is smaller than that of the first-stage inclined plane 16, and the included angle between the second-stage inclined plane 17 and the horizontal plane is 30 degrees.

Step S65, removing the second photoresist layer 21, coating a third photoresist layer 21 on the surface of the second n-type semiconductor layer 10 having the first level inclined surface 16 and the second level inclined surface 17, and performing a third photolithography to form a third pattern.

The exposure time at the third lithography continues to increase so that the area covered by the photoresist continues to decrease.

In step S66, the third pattern is transferred to the second n-type semiconductor layer 10 with the first stage inclined plane 16 and the second stage inclined plane 17 by using a plasma etching process to form a third stage inclined plane 18 on the surface of the second n-type semiconductor layer 10 with the first stage inclined plane 16 and the second stage inclined plane 17 by adjusting the gas flow and the duty ratio thereof.

The etching depth corresponding to the plasma etching process is 200nm, which is smaller than the etching depth of the second-stage inclined plane 17, and the included angle of the third-stage inclined plane 18 and the horizontal plane is 20 degrees, which is smaller than the included angle of the second-stage inclined plane 17 and the horizontal plane. To this end, the light-emitting surface structure 4 having three-level inclined surfaces is obtained on the second n-type semiconductor layer 10.

Example 4

The difference between this embodiment and embodiment 3 is that the angle between the inclined plane and the horizontal plane on the light-emitting surface structure 4 is different. In this embodiment, the angle between the first-stage inclined surface 16 and the horizontal plane is 80 °, the angle between the second-stage inclined surface 17 and the horizontal plane is 60 °, and the angle between the third-stage inclined surface 18 and the horizontal plane is 45 °. The remaining structure and preparation steps are substantially the same as in example 3 and will not be described in detail herein.

Example 5

The embodiment is a method for manufacturing a flip-chip micro light emitting diode 1 with a multi-stage inclined plane light emitting structure, comprising the following steps:

Step S1, providing a sapphire substrate 5, and growing an epitaxial layer on the substrate 5 by using an MOCVD process, wherein the epitaxial layer sequentially comprises a first n-type semiconductor layer 6 with the thickness of 5 mu m and the material of n-GaN, a multi-quantum well layer with the thickness of 100nm, a p-type semiconductor layer 8 with the thickness of 100nm and the material of p-GaN and an ITO layer 9 with the thickness of 100 nm.

And S2, performing ICP dry etching on the epitaxial layer to enable the epitaxial layer to form a second n-type semiconductor layer 10 and a plurality of main structures 3 arranged at intervals.

The etching depth was 2. Mu.m. The main structure 3 has a size of 10 μm, and the main structure 3 includes an n-type semiconductor structure 11, a light emitting structure, and a p-type semiconductor structure sequentially stacked on a second n-type semiconductor layer 10, wherein the second n-type semiconductor layer 10 is the remainder of the n-type semiconductor structure 11 removed after etching the first n-type semiconductor layer 6.

And S3, preparing a silicon oxide insulating layer 12 outside the main structure 3 by PECVD, wherein a window for preparing the P electrode 14 is reserved on the silicon oxide insulating layer 12.

And S4, preparing an N electrode 13 and a P electrode 14 by EBE electron beam thermal evaporation, wherein the N electrode 13 is positioned between the adjacent main body structures 3, and the P electrode 14 is positioned on the ITO layer 9 and penetrates through the silicon oxide insulating layer 12.

And S6, photoetching the side, far away from the main body structure 3, of the second n-type semiconductor layer 10 for multiple times to form a three-level inclined plane, so as to obtain a light emitting surface structure 4, and finally obtaining the miniature light emitting diode.

Step S6 adopts the method in embodiment 3, and will not be described here.

Example 6

The etching method for forming the multi-level inclined plane light emitting structure on the light emitting surface of the flip-chip micro light emitting diode 1 according to the present embodiment is different from the embodiment 3 in that, as shown in fig. 7, in the second photolithography of step S63 and the third photolithography of step S65, the light shielding area 23 corresponding to the mask 22 when the second-level inclined plane 17 and the third-level inclined plane 18 are prepared is gradually reduced, and the exposure time of photolithography is not changed, so as to achieve the same purpose as in the embodiment 3. The remaining steps are substantially the same as those of example 3, and will not be described again. In fig. 7, (a) is a schematic structural diagram of the mask 22 in the first lithography, (b) is a schematic structural diagram of the mask 22 in the second lithography, and (c) is a schematic structural diagram of the mask 22 in the third lithography.

Comparative example 1

The structure of the flip-chip micro light emitting diode 1 in this comparative example is basically the same as that of the embodiment 1, except that in the light emitting surface structure 4 of this comparative example, there are no inclined surfaces and no first flat surfaces 19, the entire light emitting surface structure 4 is rectangular, and the top of the light emitting surface structure 4 is flat.

Comparative example 2

The structure of the flip-chip micro light emitting diode 1 in this comparative example is basically the same as that of example 1, except that n of the n-level inclined planes in the light emitting surface structure 4 of this comparative example is 1, that is, only the first-level inclined plane 16 is provided, and the included angle between the first-level inclined plane 16 and the horizontal plane is 45 °.

Comparative example 3

The structure of the flip-chip micro light emitting diode 1 in this comparative example is basically the same as that of example 1, except that n of the n-level inclined planes in the light emitting surface structure 4 of this comparative example is 1, that is, only the first-level inclined plane 16 is provided, and the included angle between the first-level inclined plane 16 and the horizontal plane is 80 °.

Comparative example 4

The structure of the flip-chip micro light emitting diode 1 in this comparative example is substantially the same as that of example 1, except that the entire light emitting surface structure 4 of this comparative example is hemispherical, and no inclined surface and no first plane 19 are present.

Simulation and results

Simulation calculations of top light extraction efficiency (Light Extraction Efficiency, LEE) were performed on the surfaces of the flip-chip micro-LEDs of the above examples and comparative examples using software based on the Finite difference time Domain method (FDTD). Example 1 and example 3 are more gentle multi-stage slope schemes without strong steepness, example 2 and example 4 are micro-LED structure models with larger multi-stage slope angles and better steepness, and the calculation results of the two top light extraction efficiencies are shown in fig. 8, wherein (a) in fig. 8 is the top light extraction efficiency result of the flip-chip micro-LED in example 1, example 3, comparative example 1, comparative example 2 and comparative example 4, and (b) in fig. 8 is the top light extraction efficiency result of the flip-chip micro-LED in example 2, example 4, comparative example 1, comparative example 3 and comparative example 4.

The results of fig. 8 show that the light extraction efficiency of the top of the flip-chip led 1 can be effectively improved by the light-emitting surface structures 4 in embodiments 1-4, and the inclination angles of the inclined surfaces in embodiments 1 and 3 are more gentle than those in embodiments 2 and 4. The top LEEs of examples 1 and 2, which contained two inclined planes, were substantially flat and also significantly superior to the hemispherical light exit surface structure of comparative example 4. Namely, when etching is performed only twice to form two sections of inclined planes, the lifting effect of the top LEE of the flip micro-LED is basically equal, but the inclined plane and the horizontal plane of the embodiment 2 have larger included angles, and the preparation is easier to control.

The top LEEs of the examples 3 and 4 having the three-stage inclined surfaces are further improved, and the structure of the hemispherical light-emitting surface of the comparative example 4 is greatly improved, and the effect of the example 3 is obviously better than that of the example 4, and can reach 1.43 times of that of the comparative example 4. That is, when three etching is performed, the small-angle three-stage bevel structure of example 3 can obtain a larger top LEE, but the small-angle multi-stage bevel process is more difficult to implement than example 4, the inclination angle is not well controlled, and example 4 is easier to prepare.

The invention does not relate to the design and manufacture of any micro lens, does not need to add an optical lens or an optical element on the light emergent surface to focus light and orient, does not additionally add other optical elements on a plane to realize functions, is realized on the original basis through the traditional photoetching and etching process, and can also achieve the improvement of light extraction efficiency. The design of the light-emitting surface of the multi-section inclined surface is not an arc-shaped light-emitting surface, but the light-emitting surface of the multi-section inclined surface is different from a spherical or arc-shaped surface, and the effect is better than that of the spherical or arc-shaped surface. The multistage inclined plane improves the light extraction efficiency at top according to the refraction of light and the principle of increase light-emitting area, and then promotes light-emitting efficiency. The light-emitting surface structure of the invention is etched on the surface of the semiconductor gallium nitride layer to form a multi-section inclined surface, so the light-emitting surface structure is not a substrate material. Compared with the prior art, the invention has the following beneficial effects:

1. The multi-section inclined light emitting surface is directly prepared on the GaN surface of the micro-LED, a complex surface micro-nano structure is not required to be additionally designed to improve the light emitting efficiency, the multi-section inclined surface corresponds to micro-LED pixels one by one, the multi-inclined surface light emitting is convenient, simple and feasible in process preparation, better than the effect realized by an arc or hemispherical structure, the chip structure is designed to be a flip-chip structure, the surface light emitting is more beneficial, the arc and hemispherical light emitting is difficult to prepare and form at one time generally, the yield is lower, and especially, the hemispherical surface increases the light crosstalk between adjacent pixels.

2. Compared with the traditional micro-lens array, the multi-section inclined surface is directly arranged on the micro-LED device, and the multi-section inclined surface is different in that the micro-lens array does not need to be additionally designed and manufactured, and the subsequent alignment and gluing procedures with the micro-LED are reduced.

3. Due to total internal reflection, most of the light emitted in the light-emitting layer returns to the medium to be absorbed by the semiconductor layer or the electrode layer after total reflection, and the multi-section inclined plane adopted by the design of the invention can reduce total internal reflection, increase the possibility of light emergent, and enable more light to escape, thereby improving the top light extraction efficiency.

The above embodiments are only for illustrating the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the present invention and to implement the same, but are not intended to limit the scope of the present invention, and all equivalent changes or modifications made according to the spirit of the present invention should be included in the scope of the present invention.

The endpoints and any values of the ranges disclosed herein are not limited to the precise range or value, and are understood to encompass values approaching those ranges or values. For numerical ranges, one or more new numerical ranges may be found between the endpoints of each range, between the endpoint of each range and the individual point value, and between the individual point value, in combination with each other, and are to be considered as specifically disclosed herein.

Claims

1. The flip-chip micro light-emitting diode is characterized by comprising a plurality of light-emitting units arranged in a matrix, wherein each light-emitting unit comprises a main body structure and a light-emitting surface structure which are arranged in a stacked mode along the light-emitting direction of the flip-chip micro light-emitting diode, the main body structure comprises an n-type semiconductor structure, the n-type semiconductor structure and the light-emitting surface structure are integrally formed, the light-emitting surface structure comprises a bevel structure, the bevel structure comprises n-level bevels distributed from the edge of the n-type semiconductor structure to the center of the n-type semiconductor structure, n is greater than or equal to 2, the included angle between each bevel and the horizontal plane is gradually reduced along the light-emitting direction, the n-level bevels comprise a first-level bevel, a second-level bevel and a third-level bevel, the included angle between the first-level bevel and the horizontal plane is 45 degrees to 80 degrees, the included angle between the second-level bevel and the horizontal plane is 30 degrees to 60 degrees, and the included angle between the third-level bevel and the horizontal plane is 20 degrees to 45 degrees.

2. The flip-chip led of claim 1, wherein said n-type semiconductor structure is the same material as said light exit surface structure, and the vertical height of said inclined surface decreases gradually along said light exit direction.

3. The flip-chip micro light emitting diode of claim 1, wherein the light exit surface structure further comprises a sidewall structure, the sidewall structure is disposed between the n-type semiconductor structure and the inclined surface structure along the light exit direction, and a height of the sidewall structure is greater than or equal to 100nm.

4. The flip-chip micro light emitting diode of claim 1, wherein the light exit surface structure comprises a first plane located between adjacent inclined planes, and the length of the first plane is 0.01-2 μm;

and/or the light-emitting surface structure comprises a second plane positioned at the center of the light-emitting surface structure, and the length of the second plane is 37% -64% of the length of the miniature light-emitting diode.

5. The flip-chip micro light emitting diode of claim 1, wherein the maximum thickness of the light exit surface structure is 1.2-1.5 μm;

and/or the size of the miniature light emitting diode is 5-20 mu m;

And/or n is less than or equal to 3.

6. The flip-chip micro light emitting diode of claim 5, wherein the first level of the slope is greater than the second level of the slope, and the second level of the slope is greater than the third level of the slope.

7. The flip-chip micro light emitting diode of claim 6, wherein the first level of inclined surface has a height of 300nm-500nm, the second level of inclined surface has a height of 200nm-400nm, and the third level of inclined surface has a height of 100nm-300nm.

8. A method of fabricating a flip-chip micro light emitting diode as claimed in any one of claims 1 to 7, comprising the steps of:

removing the substrate;

9. The method of manufacturing a semiconductor device according to claim 8, wherein the performing etching treatment on the second n-type semiconductor layer for a plurality of times to obtain the light-emitting surface structure includes the steps of:

Removing the photoresist layer;

10. The method of manufacturing a semiconductor device according to claim 8 or 9, wherein the performing multiple etching treatments on the second n-type semiconductor layer to obtain the light emitting surface structure includes the following steps:

Removing the first photoresist layer;

Removing the second photoresist layer;